Novel half-bridge power module

Abstract

The utility model relates to technical field of semiconductor device discloses a novel half bridge power module, and power module includes: AMB substrate, first chip group and second chip group are provided with side by side on the AMB substrate, upper bridge, one end is connected with first chip group, the other end is connected with the AMB substrate, lower bridge, one end is connected with second chip group, and the other end extends to the upper bridge upper, positive DC terminal, set up in the base plate near first chip group's one side, and the height that positive DC terminal sets up is higher than the height of lower bridge, negative DC terminal, one end is connected with the other end of lower bridge, sets up in the top surface of positive DC terminal. The utility model reduces the size of power module, and upper bridge and lower bridge set up through the form of layering, and positive DC terminal and negative DC terminal set up in the form of layering, shorten the whole loop, realize the loop of current mutual overlap, thereby reduce the parasitic inductance of commutation loop, realize the reduction of module stray inductance.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor device technology, and more specifically to a novel half-bridge power module. Background Technology

[0002] In the existing technology, most high-current half-bridge modules are packaged with ED3, but they use aluminum bonding wires for electrical interconnection, which leads to increased switching losses, severe voltage overshoot, a long overall commutation circuit, and significantly increased stray inductance of the system due to the extended electrical terminals. The bonding wires are also prone to detachment due to thermomechanical fatigue under temperature cycling, making them increasingly unsuitable for the high-voltage platforms of current new energy vehicles. Furthermore, the overall structure of existing high-current half-bridge modules is too large and heavy, which contradicts the current development requirements of high power density and lightweight in the new energy field. Utility Model Content

[0003] The purpose of this invention is to overcome the problems of large size, parasitic inductance, and stray inductance in existing high-current half-bridge modules, and to provide a new type of half-bridge power module. This power module greatly improves the space utilization of power devices, reduces module volume, increases power density, and reduces module size. Furthermore, by stacking the upper and lower bridges, as well as the positive and negative DC terminals, a current-overlapping circuit is achieved, thereby reducing the parasitic inductance of the commutation circuit and lowering the module's stray inductance.

[0004] To achieve the above objectives, this utility model provides a novel half-bridge power module, comprising: AMB substrate, on which a first chipset and a second chipset are arranged side by side; The upper bridge is connected at one end to the first chipset and at the other end to the AMB substrate; The lower bridge has one end connected to the second chipset and the other end extending above the upper bridge; A positive DC terminal is disposed on the side of the AMB substrate near the first chipset, and the height of the positive DC terminal is higher than the height of the lower bridge. The negative DC terminal is connected at one end to the other end of the lower bridge and is disposed on the top surface of the positive DC terminal.

[0005] Optionally, the AMB substrate includes: Ceramic layer; A first copper layer is disposed on the top surface of the ceramic layer, and a first chipset is disposed on the first copper layer; A second copper layer is disposed on the top surface of the ceramic layer, on one side of the first copper layer, and a second chipset is disposed on the second copper layer. A third copper layer and a fourth copper layer are disposed between the first copper layer and the second copper layer, and the different copper layers are insulated from each other.

[0006] Optionally, the upper bridge includes: First connecting part; Multiple first pins are disposed at one end of the first connection portion and connected to the first chipset; The second pin is located at the other end of the first connection portion and is connected to the second copper layer.

[0007] Optionally, the lower bridge includes: Second connecting part; Multiple third pins are disposed at one end of the second connection portion and are L-shaped, and are connected to the second chipset; Two fourth pins are located at the other end of the second connection part and are L-shaped. One pin is connected to the third copper layer and the other pin is connected to the fourth copper layer.

[0008] Optionally, the positive DC terminal includes: Third connecting part; Two fifth pins are located on the two edges of one end of the third connection portion and are L-shaped, and are connected to the first copper layer.

[0009] Optionally, the negative DC terminal includes: Fourth connecting part; Two sixth pins are located on the two edges of one end of the fourth connection part and are L-shaped, and are connected to the second connection part.

[0010] Optionally, the power module further includes: An AC terminal is disposed on the side of the second chipset away from the first chipset, connected to the second copper layer, and the height of the AC terminal is higher than the height of the upper bridge.

[0011] Optionally, the AC terminal includes: Fifth connecting part; Two seventh pins are located on the two edges of one end of the fifth connection portion and are L-shaped, and are connected to the second copper layer.

[0012] Optionally, a sintering layer is provided between the chips of the first chipset and the second chipset and the first copper layer and the second copper layer, and the sintering layer is made of silver.

[0013] Optionally, the power module further includes: A packaging shell, wherein a through hole is provided on the packaging shell; A base plate is disposed at the bottom of the AMB substrate, and pins are provided on the base plate for heat dissipation.

[0014] Through the above technical solution, this utility model provides a novel half-bridge power module. A first chipset and a second chipset are arranged side-by-side on an AMB substrate. One end of the upper bridge is connected to the first chipset, and the other end is connected to the AMB substrate. One end of the lower bridge is connected to the second chipset, and the other end extends above the upper bridge. The positive DC terminal is located on the side of the AMB substrate closer to the first chipset, and its height is higher than that of the lower bridge. One end of the negative DC terminal is connected to the other end of the lower bridge and is located on the top surface of the positive DC terminal. This power module greatly improves the space utilization of power devices, reduces module volume, increases power density, and decreases module size. Furthermore, by stacking the upper and lower bridges, as well as the positive and negative DC terminals, overlapping current loops are achieved, thereby reducing the parasitic inductance of the commutation circuit and lowering the module's stray inductance. Attached Figure Description

[0015] The accompanying drawings are provided to further illustrate the embodiments of the present invention and form part of the specification. They are used together with the following detailed description to explain the embodiments of the present invention, but do not constitute a limitation thereof. In the drawings: Figure 1 This is a structural schematic diagram of a novel half-bridge power module according to one embodiment of the present invention; Figure 2 This is a side view of a novel half-bridge power module according to one embodiment of the present invention; Figure 3 This is an internal schematic diagram of a novel half-bridge power module according to one embodiment of the present invention; Figure 4 This is a schematic diagram of the lower bridge of a novel half-bridge power module according to one embodiment of the present invention; Figure 5 This is a schematic diagram of the upper bridge of a novel half-bridge power module according to one embodiment of the present invention; Figure 6 This is a terminal schematic diagram of a novel half-bridge power module according to one embodiment of the present invention; Figure 7 This is a circuit diagram of a novel half-bridge power module according to one embodiment of the present invention.

[0016] Explanation of reference numerals in the attached figures Detailed Implementation

[0017] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit the scope of the present invention.

[0018] In this embodiment of the utility model, unless otherwise stated, directional terms such as "upper," "lower," "top," and "bottom" are generally used to describe the relative positional relationships of the components in relation to the directions shown in the accompanying drawings or in relation to the vertical, perpendicular, or gravitational directions.

[0019] Furthermore, if the embodiments of this utility model involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0020] like Figure 1 The diagram shown is a structural schematic of a novel half-bridge power module according to one embodiment of the present invention. Figure 2 The image shown is a side view of a novel half-bridge power module according to one embodiment of the present invention. Figure 3 The diagram shown is an internal schematic of a novel half-bridge power module according to one embodiment of the present invention. Figure 7 The diagram shown is a circuit schematic of a novel half-bridge power module according to one embodiment of the present invention. Figures 1 to 3The power module may include an AMB substrate 9, an upper bridge 6, a lower bridge 7, a positive DC terminal 1, and a negative DC terminal 2. A first chipset 8 and a second chipset 10 are arranged side-by-side on the AMB substrate 9. One end of the upper bridge 6 is connected to the first chipset 8, and the other end is connected to the AMB substrate 9. One end of the lower bridge 7 is connected to the second chipset 10, and the other end extends above the upper bridge 6. The positive DC terminal 1 is located on the side of the AMB substrate 9 closest to the first chipset 8, and its height is higher than that of the lower bridge 7. One end of the negative DC terminal 2 is connected to the other end of the lower bridge 7 and is located on the top surface of the positive DC terminal 1. By using the AMB substrate 9 as the substrate for the power module, the bonding strength of the AMB substrate is higher, it is suitable for higher temperature cycling, and has good current carrying capacity, enabling the entire module to withstand extremely high temperature, current, and power cycles. The first chipset 8 and the second chipset 10 are arranged side-by-side on the AMB substrate 9 in a symmetrical layout to reduce uneven current distribution. The other end of the lower bridge 7 extends above the upper bridge 6, creating a stacked configuration that saves space. Considering connection strength and current intensity compatibility, the upper bridge 6 and lower bridge 7 are clipped together and spatially overlapped, causing the power circuit currents in the upper bridge 6 and lower bridge 7 to be opposite, thus partially canceling the commutation circuit inductance. Utilizing magnetic field cancellation technology—where the coupling inductance between two adjacent conductors cancels their self-inductance, reducing the total inductance—the upper bridge 6 and lower bridge 7 are connected by a clip to form a stacked configuration, achieving overlapping current circuits and reducing parasitic inductance in the commutation circuit, thereby lowering the module's stray inductance. The circuit diagram of this power module can be as follows: Figure 7 As shown.

[0021] In this embodiment, the positive DC terminal 1 is positioned on the side of the AMB substrate 9 closest to the first chipset 8, and its height is higher than that of the lower bridge 7. One end of the negative DC terminal 2 is connected to the other end of the lower bridge 7 and is positioned on the top surface of the positive DC terminal 1. The positive DC terminal 1 is designated P1 in the circuit diagram, and the negative DC terminal 2 is designated N1. The positive DC terminal 1 and negative DC terminal 2 are connected in a stacked configuration instead of the traditional flat terminal configuration. This utilizes the magnetic field cancellation technique—if the currents flowing through two adjacent conductors are opposite, the coupling inductance between the conductors will cancel out the self-inductance of the conductors, reducing the total inductance presented by the conductors. In the power module, by using a stacked electrode terminal configuration (DC+ and DC-), a current-overlapping loop is achieved, thereby reducing the parasitic inductance of the commutation loop and lowering the stray inductance of the module.

[0022] In this embodiment, the AMB substrate 9 includes a ceramic layer 95, a first copper layer 91, a second copper layer 92, a third copper layer 93, and a fourth copper layer 94. The first copper layer 91 is disposed on the top surface of the ceramic layer 95, and a first chipset 8 is disposed on the first copper layer 91. The second copper layer 92 is disposed on one side of the top surface of the ceramic layer 95 and the first copper layer 91, and a second chipset 10 is disposed on the second copper layer 92. The third copper layer 93 and the fourth copper layer 94 are disposed between the first copper layer 91 and the second copper layer 92, and the different copper layers are insulated from each other. The specific arrangement of each copper layer can be as follows: Figure 4 He Ru Figure 5 As shown.

[0023] In this embodiment, to connect each chip of the first chipset 8, the upper bridge 6 includes a first connection portion 61, a plurality of first pins 62, and a second pin 63. The plurality of first pins 62 are disposed at one end of the first connection portion 61 and connected to the first chipset 8, thereby connecting each chip of the first chipset 8. The second pins 63 are disposed at the other end of the first connection portion 61 and connected to the second copper layer 92, thereby connecting the first chipset 8 on the first copper layer 91 to the second copper layer 92.

[0024] In this embodiment, to connect each chip of the second chipset 10, the lower bridge 7 includes a second connection portion 71, a plurality of third pins 72, and two fourth pins 73. The plurality of third pins 72 are located at one end of the second connection portion 71 and are L-shaped, connecting to the second chipset 10. By arranging the third pins 72 in an L-shape, the lower bridge 7 has a certain height to extend to the top surface of the upper bridge 6, thus forming a stacked arrangement to save space and reduce the overall size of the power module. The two fourth pins 73 are located at the other end of the second connection portion 71 and are L-shaped. One pin connects to the third copper layer 93, and the other pin connects to the fourth copper layer 94. Their L-shaped arrangement ensures they are at the same height as the third pins 72, preventing the lower bridge 7 from touching the upper bridge 6.

[0025] In this embodiment, the positive DC terminal 1 includes a third connecting portion 11 and two fifth pins 12. The two fifth pins 12 are disposed on the two edges of one end of the third connecting portion 11 and are L-shaped, connected to the first copper surface. The placement of the two fifth pins 12 on the two edges of one end of the third connecting portion 11 makes room for the first chipset 8, and the L-shape allows the positive DC terminal 1 to have a certain height.

[0026] In this embodiment, the negative DC terminal 2 includes a fourth connecting portion 21 and two sixth pins 22. The two sixth pins 22 are disposed on two edges of one end of the fourth connecting portion 21 and are L-shaped, connecting to the second connecting portion 71. The negative DC terminal 2 is disposed on the top surface of the positive DC terminal 1 and connected to the fourth connecting portion 21 of the lower bridge 7 via the sixth pins 22. The L-shape of the sixth pins 22 ensures that the negative DC terminal 2 has a certain height, preventing it from touching the positive DC terminal 1 when it overlaps with the top surface of the positive DC terminal 1, given that the lower bridge 7 already has a certain height.

[0027] In this embodiment, the power module further includes an AC terminal 3, which is disposed on the side of the second chipset 10 away from the first chipset 8 and connected to the second copper layer 92. The height of the AC terminal 3 is higher than the height of the upper bridge 6. The AC terminal 3 includes a fifth connection portion 31 and two seventh pins 32. The two seventh pins 32 are disposed on two edges of one end of the fifth connection portion 31 and are L-shaped, connected to the second copper layer 92.

[0028] In this embodiment, a sintering layer is provided between the chips of the first chipset 8 and the second chipset 10 and the first copper layer 91 and the second copper layer 92. Considering thermal conductivity and heat dissipation, the sintering layer is made of silver.

[0029] In this embodiment, the power module also includes a housing 4 and a base plate 5. For example... Figure 1 and Figure 6 As shown, the package housing 4 has through holes to allow terminals to be brought out. The AMB substrate 9 has G1, S1, D1, T1, T2, G2, and S2 terminals respectively. Figure 6 In the process, the first chipset 8 and the second chipset 10 are connected to the copper layer where each terminal is located via aluminum wire bonding, wherein terminals T1 and T2 are used to connect thermistors. A base plate 5 is provided at the bottom of the AMB substrate 9, and pins are provided at the bottom of the base plate 5 for heat dissipation.

[0030] Through the above technical solution, this utility model provides a novel half-bridge power module. A first chipset 8 and a second chipset 10 are arranged side-by-side on an AMB substrate 9. One end of the upper bridge 6 is connected to the first chipset 8, and the other end is connected to the AMB substrate 9. One end of the lower bridge 7 is connected to the second chipset 10, and the other end extends above the upper bridge 6. The positive DC terminal 1 is located on the side of the AMB substrate 9 closest to the first chipset 8, and its height is higher than that of the lower bridge 7. One end of the negative DC terminal 2 is connected to the other end of the lower bridge 7 and is located on the top surface of the positive DC terminal 1. This power module greatly improves the space utilization of power devices, reduces module volume, increases power density, and decreases module size. Furthermore, by stacking the upper bridge 6 and lower bridge 7, as well as the positive DC terminal 1 and negative DC terminal 2, overlapping current loops are achieved, thereby reducing the parasitic inductance of the commutation circuit and lowering the module's stray inductance.

[0031] The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings; however, the present invention is not limited thereto. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solution of the present invention. This includes combining various specific technical features in any suitable manner. To avoid unnecessary repetition, the present invention will not describe the various possible combinations separately. However, these simple modifications and combinations should also be considered as the content disclosed in the present invention and are all within the protection scope of the present invention.

Claims

1. A novel half-bridge power module, characterized in that, The power module includes: AMB substrate, on which a first chipset and a second chipset are arranged side by side; The upper bridge is connected at one end to the first chipset and at the other end to the AMB substrate; The lower bridge has one end connected to the second chipset and the other end extending above the upper bridge; A positive DC terminal is disposed on the side of the AMB substrate near the first chipset, and the height of the positive DC terminal is higher than the height of the lower bridge. The negative DC terminal is connected at one end to the other end of the lower bridge and is disposed on the top surface of the positive DC terminal.

2. The power module according to claim 1, characterized in that, The AMB substrate includes: Ceramic layer; A first copper layer is disposed on the top surface of the ceramic layer, and a first chipset is disposed on the first copper layer; A second copper layer is disposed on the top surface of the ceramic layer, on one side of the first copper layer, and a second chipset is disposed on the second copper layer. A third copper layer and a fourth copper layer are disposed between the first copper layer and the second copper layer, and the different copper layers are insulated from each other.

3. The power module according to claim 2, characterized in that, The upper bridge includes: First connecting part; Multiple first pins are disposed at one end of the first connection portion and connected to the first chipset; The second pin is located at the other end of the first connection portion and is connected to the second copper layer.

4. The power module according to claim 2, characterized in that, The lower bridge includes: Second connecting part; Multiple third pins are disposed at one end of the second connection portion and are L-shaped, and are connected to the second chipset; Two fourth pins are located at the other end of the second connection part and are L-shaped. One pin is connected to the third copper layer and the other pin is connected to the fourth copper layer.

5. The power module according to claim 2, characterized in that, The positive DC terminal includes: Third connecting part; Two fifth pins are located on the two edges of one end of the third connection portion and are L-shaped, and are connected to the first copper layer.

6. The power module according to claim 4, characterized in that, The negative DC terminal includes: Fourth connecting part; Two sixth pins are located on the two edges of one end of the fourth connector and are L-shaped, and are connected to the second connector.

7. The power module according to claim 2, characterized in that, The power module also includes: An AC terminal is disposed on the side of the second chipset away from the first chipset, connected to the second copper layer, and the height of the AC terminal is higher than the height of the upper bridge.

8. The power module according to claim 7, characterized in that, The AC terminals include: Fifth connecting part; Two seventh pins are located on the two edges of one end of the fifth connection portion and are L-shaped, and are connected to the second copper layer.

9. The power module according to claim 2, characterized in that, A sintering layer is provided between the chips of the first chipset and the second chipset and the first copper layer and the second copper layer, and the sintering layer is made of silver.

10. The power module according to claim 1, characterized in that, The power module also includes: A packaging shell, wherein a through hole is provided on the packaging shell; A base plate is disposed at the bottom of the AMB substrate, and pins are provided on the base plate for heat dissipation.

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