A fault arc detection circuit

Abstract

This utility model relates to the field of detection circuit technology, and in particular to a fault arc detection circuit. Its technical solution includes a current loop, a sampling protection module, a filtering and demagnetizing module, an amplification and matching module, a reference voltage stabilization module, a signal comparison module, and a signal output terminal. The current loop is sleeved on the conductor under test and is used to convert the AC current signal in the conductor under test into a measurable electrical signal. Through targeted module design, this utility model's fault arc detection circuit overcomes the core technical deficiencies of traditional detection circuits, achieving stable acquisition, accurate identification, and rapid response of fault arc signals. It balances circuit reliability, adaptability, and cost control, effectively ensuring electrical safety in household, industrial, and other scenarios, and meeting the core requirements for fault arc detection in practical applications.

Description

Technical Field

[0001] This utility model relates to the field of detection circuit technology, and in particular to a fault arc detection circuit. Background Technology

[0002] Fault arc is an intermittent discharge phenomenon in electrical circuits caused by problems such as poor wire contact and insulation aging. Its current signal has high-frequency oscillation characteristics. If it is not detected in time, it can easily cause electrical fires. Therefore, fault arc detection circuit is a key device to ensure electrical safety.

[0003] Existing fault arc detection circuits mostly use a current loop to sense a current signal, which is then converted into a level signal by a sampling resistor, amplified, and input to the sampling device. However, this type of traditional circuit has significant technical defects: First, the oscillating characteristics of the fault arc make the level signal prone to overshoot or severe oscillation, affecting sampling stability. Complex filtering measures can also filter out key signal features of the fault arc, making it difficult to balance stability and feature fidelity. Second, the current loop has a fixed magnetic field induction curve, and the instantaneous overshoot signal caused by the fault arc can easily saturate the current loop, thus interrupting subsequent detection. Third, the reference voltage of traditional circuits is susceptible to temperature drift and lacks targeted overvoltage protection design, further reducing detection accuracy and circuit reliability, and failing to meet the requirements for accurate and stable fault arc detection in practical scenarios. Therefore, this application proposes a fault arc detection circuit. Utility Model Content

[0004] The purpose of this invention is to address the significant technical shortcomings of existing fault arc detection circuits in terms of signal processing, reference stability, current loop reliability, and anti-interference protection, and to propose a fault arc detection circuit.

[0005] The technical solution of this utility model is: a fault arc detection circuit, comprising:

[0006] A current loop is fitted onto the conductor being tested and is used to convert the alternating current signal in the conductor being tested into a measurable electrical signal.

[0007] A sampling protection module is connected to the current loop and is used to sample the electrical signal output by the current loop and prevent overvoltage generated by the fault arc from damaging the subsequent circuit.

[0008] A filtering and demagnetizing module, which is connected to the sampling protection module, is used to filter the sampled electrical signal and assist in demagnetizing the current loop when magnetic saturation occurs in the current loop.

[0009] An amplification matching module, which is connected to a filtering and demagnetizing module, is used to amplify the filtered electrical signal.

[0010] A reference voltage stabilization module is used to provide a stable reference voltage and transmit the reference voltage to the positive feedback terminal of the amplification matching module;

[0011] A signal comparison module, wherein the input terminal of the signal comparison module is connected to the output terminal and the positive feedback terminal of the amplification and matching module respectively, and is used to compare the magnitude of the electrical signal output by the amplification and matching module with the reference voltage;

[0012] The signal output terminal includes two branches. One branch is connected to the output terminal of the amplification matching module to transmit the amplified electrical signal to an external acquisition device. The other branch is connected to the output terminal of the signal comparison module to output the compared level signal.

[0013] Optionally, the sampling protection module includes a sampling resistor RL1 and a transient voltage suppressor diode (TVS); one end of the sampling resistor RL1 is connected to the output terminal of the current loop, and the other end is grounded; the transient voltage suppressor diode (TVS) is connected in parallel with the sampling resistor RL1 to absorb overvoltage.

[0014] Optionally, the filtering and demagnetizing module includes a capacitor C1; one end of the capacitor C1 is connected to the side of the sampling resistor RL1 near the output end of the current loop, and the other end is grounded; when the current loop becomes magnetically saturated due to an instantaneous overshoot signal, the capacitor C1 demagnetizes the current loop by outputting a reverse electromotive force, and at the same time filters the voltage signal across the sampling resistor RL1.

[0015] Optionally, the amplification matching module includes a first operational amplifier IC1, a first matching resistor R1, a second matching resistor R4, and a feedback capacitor R2; the inverting input terminal of the first operational amplifier IC1 is connected to the output terminal of the filter demagnetizing module through the first matching resistor R1, and the non-inverting input terminal is connected to the output terminal of the reference voltage stabilization module; one end of the second matching resistor R4 is connected to the inverting input terminal of the first operational amplifier IC1, and the other end is connected to the output terminal of the first operational amplifier IC1; the feedback capacitor R2 is connected in parallel with the second matching resistor R4 to adjust the amplification factor of the first operational amplifier IC1.

[0016] Optionally, the reference voltage stabilization module includes a second operational amplifier IC3, a reference current-limiting resistor R6, and a second current-limiting resistor R5. One end of the reference current-limiting resistor R6 is connected to a 3V3 power supply I, and the other end is connected to the non-inverting input of the second operational amplifier IC3 to provide a 1.5V reference voltage. The output of the second operational amplifier IC3 is connected to the non-inverting input of the first operational amplifier IC1 through the second current-limiting resistor R5, and the inverting input of the second operational amplifier IC3 is connected to its own output, forming a voltage follower to suppress the reference voltage temperature drift caused by temperature changes.

[0017] Optionally, the signal comparison module includes a second operational amplifier IC2 and a third current-limiting resistor R3; one end of the third current-limiting resistor R3 is connected to the output terminal of the first operational amplifier IC1, and the other end is connected to the non-inverting input terminal of the second operational amplifier IC2; the inverting input terminal of the second operational amplifier IC2 is connected to the non-inverting input terminal of the first operational amplifier IC1, and the output terminal serves as a branch of the signal output terminal; when a fault arc occurs, the first operational amplifier IC1 outputs a sine wave signal that varies around a 1.5V reference voltage, and the second operational amplifier IC2 outputs a square wave signal corresponding to the sine wave signal, and the square wave signal does not change excessively when the sine wave signal crosses the 1.5V reference voltage line.

[0018] Optionally, filter capacitors C2 and C3 are also included; one end of filter capacitor C2 is connected to 3V3 power supply II, and the other end is grounded; one end of filter capacitor C3 is connected to 3V3 power supply III, and the other end is grounded, used to filter 3V3 power supply III and stabilize the power supply voltage.

[0019] Optionally, the current loop is an open-loop current transformer whose magnetic field induction curve is adapted to the variation range of the AC current signal in the conductor under test, and can accurately sense AC current signals of different intensities and convert them into corresponding electrical signals.

[0020] Optionally, both the first operational amplifier IC1 and the second operational amplifier IC2 are high common-mode rejection ratio operational amplifiers to reduce the impact of common-mode interference on the amplification and comparison process of electrical signals.

[0021] Optionally, the value of the reference current-limiting resistor R6 is set according to the 3V3 power supply III voltage and the 1.5V reference voltage requirement to ensure that the non-inverting input terminal of the second operational amplifier IC3 obtains a stable 1.5V voltage.

[0022] Compared with the prior art, this application includes at least one of the following beneficial technical effects:

[0023] Capacitor C1 achieves dual functions of filtering and current loop demagnetization, which can filter out noise and avoid current loop magnetic saturation caused by overshoot signals, without the need for complex filtering. With the adjustable amplifier circuit of feedback capacitor R2, the signal amplification factor can be precisely controlled to avoid over-amplification distortion and fully preserve the key signal characteristics of fault arc, thus solving the contradiction between "overshoot affecting sampling" and "filtering losing characteristics" in traditional circuits.

[0024] By using the voltage follower constructed from operational amplifier IC3, the temperature drift of the reference voltage caused by temperature changes is suppressed, ensuring the stability of the 1.5V reference voltage. This makes the signal comparison results of operational amplifier IC2 more accurate and reduces the problems of misjudgment and missed judgment caused by reference drift.

[0025] The transient voltage suppressor diode (TVS) can quickly absorb the overvoltage generated by the fault arc, protecting the precision components in the downstream stage; the power supply filter module composed of capacitors C2 and C3 provides stable power supply and reduces noise interference; the overall circuit components are simplified, with fewer fault points, while ensuring overvoltage protection and anti-interference capabilities, extending the circuit's service life.

[0026] The current loop adopts an open-close design, which can be installed without damaging the wires and is compatible with AC wires in various scenarios; the signal output provides both sine wave and square wave signals to meet the docking needs of different devices and has a wide range of applications.

[0027] This utility model's fault arc detection circuit, through targeted modular design, addresses the core technical deficiencies of traditional detection circuits, achieving stable acquisition, accurate identification, and rapid response of fault arc signals. It balances circuit reliability, adaptability, and cost control, effectively ensuring electrical safety in home, industrial, and other scenarios, and meeting the core requirements for fault arc detection in practical applications. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of a fault arc detection circuit. Detailed Implementation

[0029] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model. It should be noted that, unless otherwise specified, the following embodiments and features can be combined with each other.

[0030] Example

[0031] like Figure 1 As shown, the fault arc detection circuit proposed in this utility model includes a current loop, a sampling protection module, a filtering and demagnetizing module, an amplification and matching module, a reference voltage stabilization module, a signal comparison module, and a signal output terminal. Each part will be described in detail below.

[0032] Current loop and the conductor under test: The current loop adopts an open-loop current transformer. Its loop can be easily fitted onto the conductor under test without damaging the conductor's insulation layer. It is compatible with single-phase / three-phase AC conductors commonly found in household and industrial settings. It can accurately sense changes in AC current signals in the conductor under test and convert them into measurable weak electrical signals (induced current signals).

[0033] Sampling Protection Module: Directly connected to the signal output of the current loop, its core components are a sampling resistor RL1 and a transient voltage suppressor diode (TVS). One end of the sampling resistor RL1 is connected to the current loop output, and the other end is grounded, converting the induced current signal output by the current loop into a voltage signal across RL1. The TVS is connected in parallel with RL1, and its response speed is less than 1ns. It can instantly absorb overvoltages generated by fault arcs (such as voltage spikes caused by lightning strikes or short circuits), preventing damage to precision components such as subsequent operational amplifiers and significantly improving the circuit's surge protection capability.

[0034] The filtering and demagnetizing module consists of only capacitor C1, with one end connected to the side of RL1 closest to the current loop output and the other end grounded. This module has dual functions of filtering and demagnetizing: on the one hand, C1 can filter out high-frequency noise (such as power grid harmonic interference) in the output voltage signal of RL1, ensuring the purity of the signal input to the subsequent stage; on the other hand, when a fault arc causes a momentary overshoot signal, resulting in magnetic saturation of the current loop due to the magnetic field strength exceeding the saturation threshold, C1 will quickly cancel the remaining magnetic field inside the current loop by outputting a reverse electromotive force, allowing the current loop to quickly return to the normal induction state. This design solves the problem of signal distortion and detection interruption after magnetic saturation of traditional current loops, ensuring the continuity of fault arc signal acquisition.

[0035] Amplification and Matching Module: Centered on the first operational amplifier IC1, this module is equipped with a first matching resistor R1, a second matching resistor R4, and a feedback capacitor R2. IC1 is an operational amplifier with a high common-mode rejection ratio (CMRR > 80dB), which can effectively suppress the impact of common-mode interference from the power grid on signal amplification. One end of R1 is connected to the signal output terminal of C1, and the other end is connected to the inverting input terminal of IC1 to match the signal impedance and reduce signal attenuation during transmission. One end of R4 is connected to the inverting input terminal of IC1, and the other end is connected to the output terminal of IC1, forming a negative feedback loop. R2 is connected in parallel with R4. By adjusting the capacitance value of R2 (e.g., using an adjustable capacitor of 100pF-1μF), the amplification factor of IC1 can be flexibly adjusted (the amplification factor range can be set from 10 to 100 times). This not only amplifies the weak fault arc signal to a level range suitable for ADC sampling (e.g., 0-3V), but also avoids signal distortion caused by over-amplification, perfectly balancing signal strength and signal fidelity.

[0036] The reference voltage stabilization module consists of a second operational amplifier IC3, a reference current-limiting resistor R6, and a second current-limiting resistor R5. One end of R6 is connected to a 3V3 power supply III, and the other end is connected to the non-inverting input of IC3. Its resistance value is precisely calculated based on the requirements of the 3V3 power supply III and the 1.5V reference voltage (e.g., a 4.7kΩ resistor is used to form a voltage divider with the input impedance of IC3, ensuring a stable 1.5V voltage at the non-inverting input of IC3). The inverting input of IC3 is directly connected to its own output, forming a voltage follower. The core advantage of this structure is zero output impedance and low temperature drift. It can transmit the 1.5V reference voltage to the non-inverting input of IC1 without attenuation. When the ambient temperature varies within the range of -20℃ to 85℃, the reference voltage fluctuation is less than ±5mV, avoiding the false or missed fault arcs caused by temperature drift in traditional reference circuits, thus improving detection accuracy.

[0037] Signal Comparison Module: Includes a second operational amplifier IC2 and a third current-limiting resistor R3. One end of R3 is connected to the output of IC1, and the other end is connected to the non-inverting input of IC2, used to limit the current input to IC2 and protect IC2; the inverting input of IC2 is connected to the non-inverting input of IC1 (i.e., the 1.5V reference voltage terminal) to form a voltage comparator. When there is no fault arc in the circuit, the normal current signal output by IC1 is amplified into a smooth sine wave, and it stays on the 1.5V reference voltage side most of the time. IC2 outputs a stable high or low level without frequent jumps. When a fault arc occurs, the current signal exhibits a flat shoulder phenomenon at the zero crossing point. The sine wave output by IC1 will fluctuate frequently around the 1.5V reference voltage. IC2 then converts this sine wave into a corresponding square wave signal. The jumping frequency of the square wave is consistent with the oscillation frequency of the fault arc, and there is no excessive change (such as glitches or delays) when the sine wave crosses the 1.5V reference line, which facilitates the subsequent acquisition equipment to quickly identify the characteristics of the fault arc.

[0038] Power supply filtering module: Composed of capacitors C2 and C3, one end of which is connected to 3V3 power supply I and 3V3 power supply II respectively, and the other end is grounded. C2 is a 10μF electrolytic capacitor (to filter low-frequency ripple), and C3 is a 0.1μF ceramic capacitor (to filter high-frequency ripple), forming a high-low frequency dual filtering structure to ensure stable 3V3 power supply output, avoid power supply noise interference with the operation of IC1, IC2, and IC3, and further improve the overall stability of the circuit.

[0039] Signal output terminal: It is divided into two independent branches. One branch is directly connected to the output terminal of IC1, which transmits the amplified sine wave signal to an external ADC sampling device (such as a microcontroller or data acquisition card) for high-precision waveform analysis. The other branch is connected to the output terminal of IC2, which transmits the square wave signal to an external alarm or control module (such as a relay or audible and visual alarm) to achieve rapid response to fault arcs.

[0040] Workflow

[0041] A current loop is fitted onto the conductor being tested, sensing the alternating current signal in the conductor in real time and converting it into an induced current signal. This induced current signal flows through a sampling resistor RL1, becoming a voltage signal across RL1. Simultaneously, the TVS (Transient Voltage Suppressor) is in standby mode, instantly conducting to absorb energy in case of overvoltage. The voltage signal output from RL1 is filtered by capacitor C1 to remove high-frequency noise. If the current loop becomes magnetically saturated due to overshoot, C1 outputs a reverse electromotive force, rapidly demagnetizing the current loop and restoring its normal induction capability.

[0042] The filtered voltage signal is input to the inverting input of IC1 via R1. Under the negative feedback loop formed by R4 and R2, IC1 amplifies the signal to a level suitable for sampling. The amplification factor can be flexibly set by adjusting the capacitance of R2. The 3V3 power supply III, after being divided by R6, provides a 1.5V reference voltage to the non-inverting input of IC3. IC3, through a voltage follower structure, transmits the stable 1.5V reference voltage to the non-inverting input of IC1.

[0043] The amplified signal output by IC1 is transmitted directly to an external sampling device. Simultaneously, it is input to the non-inverting input of IC2 via R3. IC2 compares this signal with a 1.5V reference voltage and outputs the corresponding square wave signal to the external alarm / control module. The external sampling device analyzes whether the sine wave output by IC1 has a "zero-crossing shoulder," or the external control module detects the transition frequency of the square wave output by IC2 to determine if a fault arc has occurred, thereby triggering an alarm or power-off protection.

[0044] This circuit, through a combination of C1 filtering and demagnetizing and R2 adjustable feedback amplification, avoids the problems of overshoot and oscillation signals affecting sampling stability in traditional circuits (C1 provides rapid demagnetization, and TVS absorbs overvoltage), and also prevents the loss of signal characteristics due to complex filtering (R2 precisely controls the amplification factor, without over-filtering), ensuring that fault arc signals can be completely and stably acquired. The voltage follower formed by IC3 effectively suppresses temperature drift, and the 1.5V reference voltage fluctuates very little over a wide temperature range, making the comparison results of IC2 more accurate and avoiding misjudgment or missed faults caused by reference voltage drift. It is especially suitable for high-temperature industrial environments or low-temperature outdoor scenarios.

[0045] This invention features a simple, low-cost, and highly reliable circuit structure: the core components consist of only 3 operational amplifiers, 6 resistors, 4 capacitors, and 1 TVS, eliminating the need for complex digital chips or dedicated sensors, thus reducing component procurement costs. Simultaneously, the simplified structure reduces potential failure points. Combined with the TVS's overvoltage protection and power supply filtering design, the circuit's mean time between failures (MTBF) is increased to over 50,000 hours, significantly enhancing reliability. The current loop employs an open / close design, allowing for installation without damaging wires, and is compatible with AC wires in various scenarios such as household sockets, industrial distribution boxes, and new energy charging piles. The signal output provides both sine and square wave signals, adaptable to high-precision sampling equipment and low-cost alarm modules respectively, meeting the needs of different users. The TVS's overvoltage response time is less than 1ns, and IC2's comparison response time is less than 100ns. The delay from the generation of a fault arc to the output alarm signal is less than 1ms, enabling rapid triggering of protective measures before a fault arc causes a fire or equipment damage, significantly improving electrical safety.

[0046] The above specific embodiments are merely several optional embodiments of this utility model. Based on the technical solution of this utility model and the relevant teachings of the above embodiments, those skilled in the art can make various alternative improvements and combinations to the above specific embodiments.

Claims

1. A fault arc detection circuit, characterized in that, include: A current loop is fitted onto the conductor being tested and is used to convert the alternating current signal in the conductor being tested into a measurable electrical signal. A sampling protection module, which is connected to the current loop, is used to sample the electrical signal output by the current loop; A filtering and demagnetizing module, which is connected to the sampling protection module, is used to filter the sampled electrical signal; An amplification matching module, which is connected to a filtering and demagnetizing module, is used to amplify the filtered electrical signal. A reference voltage stabilization module is used to provide a stable reference voltage and transmit the reference voltage to the positive feedback terminal of the amplification matching module; A signal comparison module, wherein the input terminal of the signal comparison module is connected to the output terminal and the positive feedback terminal of the amplification and matching module respectively, and is used to compare the magnitude of the electrical signal output by the amplification and matching module with the reference voltage; The signal output terminal includes two branches. One branch is connected to the output terminal of the amplification matching module to transmit the amplified electrical signal to an external acquisition device. The other branch is connected to the output terminal of the signal comparison module to output the compared level signal.

2. The fault arc detection circuit according to claim 1, characterized in that, The sampling protection module includes a sampling resistor RL1 and a transient suppression diode TVS; one end of the sampling resistor RL1 is connected to the output terminal of the current loop, and the other end is grounded; the transient suppression diode TVS is connected in parallel with the sampling resistor RL1.

3. The fault arc detection circuit according to claim 1, characterized in that, The filtering and demagnetizing module includes a capacitor C1; one end of the capacitor C1 is connected to the side of the sampling resistor RL1 near the current loop output terminal, and the other end is grounded.

4. The fault arc detection circuit according to claim 1, characterized in that, The amplification matching module includes a first operational amplifier IC1, a first matching resistor R1, a second matching resistor R4, and a feedback capacitor R2. The inverting input of the first operational amplifier IC1 is connected to the output of the filter demagnetizing module through the first matching resistor R1, and the non-inverting input is connected to the output of the reference voltage stabilization module. One end of the second matching resistor R4 is connected to the inverting input of the first operational amplifier IC1, and the other end is connected to the output of the first operational amplifier IC1. The feedback capacitor R2 is connected in parallel with the second matching resistor R4.

5. The fault arc detection circuit according to claim 1, characterized in that, The reference voltage stabilization module includes a second operational amplifier IC3, a reference current-limiting resistor R6, and a second current-limiting resistor R5. One end of the reference current-limiting resistor R6 is connected to a 3V3 power supply I, and the other end is connected to the non-inverting input of the second operational amplifier IC3 to provide a 1.5V reference voltage. The output of the second operational amplifier IC3 is connected to the non-inverting input of the first operational amplifier IC1 through the second current-limiting resistor R5, and the inverting input of the second operational amplifier IC3 is connected to its own output, forming a voltage follower to suppress the reference voltage drift caused by temperature changes.

6. The fault arc detection circuit according to claim 1, characterized in that, The signal comparison module includes a second operational amplifier IC2 and a third current-limiting resistor R3. One end of the third current-limiting resistor R3 is connected to the output terminal of the first operational amplifier IC1, and the other end is connected to the non-inverting input terminal of the second operational amplifier IC2. The inverting input terminal of the second operational amplifier IC2 is connected to the non-inverting input terminal of the first operational amplifier IC1, and its output terminal serves as a branch of the signal output terminal. When a fault arc occurs, the first operational amplifier IC1 outputs a sine wave signal that varies around a 1.5V reference voltage, and the second operational amplifier IC2 outputs a square wave signal corresponding to the sine wave signal. When the sine wave signal crosses the 1.5V reference voltage line, the square wave signal does not change excessively.

7. The fault arc detection circuit according to claim 1, characterized in that, It also includes filter capacitors C2 and C3; one end of filter capacitor C2 is connected to 3V3 power supply II, and the other end is grounded; one end of filter capacitor C3 is connected to 3V3 power supply III, and the other end is grounded.

8. The fault arc detection circuit according to claim 1, characterized in that, The current loop is an open-loop current transformer.

9. The fault arc detection circuit according to claim 4, characterized in that, Both the first operational amplifier IC1 and the second operational amplifier IC2 are high common-mode rejection ratio operational amplifiers.

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