A power semiconductor device, a test system, and a test machine

Abstract

This utility model discloses a power semiconductor device, a testing system, and a testing machine. The testing system includes a threshold voltage and Calvin test power supply and a switching module. The switching module includes a relay U21 and a relay RL1. The threshold voltage and Calvin test power supply is connected to the output pin 4 of the relay U21. The two ends of the switching pin of the relay RL1 are connected to the threshold voltage and Calvin test power supply and the collector C of the power semiconductor device under test, respectively. The output pin 3 of the relay U21 is connected to the gate G of the power semiconductor device under test. This utility model provides a threshold test function that can check for undetected damage to the device under test at extremely low cost and high efficiency after dynamic testing.

Description

Technical Field

[0001] This utility model relates to the field of power semiconductor device testing technology, specifically a power semiconductor device, a testing system, and a testing machine. Background Technology

[0002] With technological advancements, the application of power semiconductors IGBTs and MOSFETs has become increasingly widespread. Before and during device development, manufacturing, and application, their switching characteristics need to be evaluated. Evaluation methods include single-pulse, double-pulse, multi-pulse testing, and short-circuit testing. IGBT / MOSFET dynamic performance testing machines, as specialized testing equipment for this field, are the ideal choice for module manufacturers to conduct various functional verifications, performance verifications, and factory inspections. Among these, the gate control under test is the core module of the testing system, and its function determines the overall functionality and efficiency of the testing machine.

[0003] In power electronics applications such as frequency converters and drives, engineers typically select appropriate drive circuits and designs based on the characteristics of the power modules for practical applications.

[0004] For testing equipment, due to the wide variety of test devices and their different requirements, traditional design methods can easily lead to problems such as insufficient test voltage range and slow replacement of gate resistors, which greatly affect testing efficiency and cost.

[0005] Currently available testing machines do not have Kelvin contact testing capabilities, nor do they have integrated threshold voltage testing capabilities. Furthermore, they use independent power-on and power-off switches located far from the driver board. Utility Model Content

[0006] The technical problem to be solved by this utility model is that the existing testing machine does not have the function of threshold voltage testing.

[0007] To solve the above-mentioned technical problems, this utility model provides the following technical solution:

[0008] A power semiconductor device testing system includes a threshold voltage and a Calvin test power supply and a switching module; wherein the switching module includes: a relay U21 and a relay RL1;

[0009] The threshold voltage and Calvin test power supply are connected to the output pin 4 of relay U21; the two ends of the switch pin of relay RL1 are connected to the threshold voltage and Calvin test power supply and the collector C of the power semiconductor device under test, respectively; the output pin 3 of relay U21 is connected to the gate G of the power semiconductor device under test.

[0010] In this embodiment, the switching module includes a relay RL2;

[0011] The two ends of the switch pin of relay RL2 are connected to the collector C and emitter E of the power semiconductor device under test, respectively.

[0012] In this embodiment, the testing system includes a control center;

[0013] The control interface of the control center is connected to the input pin 2 of relay U21, the coil pin 3 of relay RL1, and the coil pin 3 of relay RL2.

[0014] In this embodiment, the test system includes an adjustable power supply 11 for providing a positive turn-on voltage, a turn-on resistor 11, an adjustable power supply 21 for providing a negative turn-off voltage, a turn-off resistor 22, and switches T42 and T43.

[0015] The two ends of the turn-on resistor 11 are connected to the output terminal of the adjustable power supply 11 and the gate G of the power semiconductor device under test, respectively; and the switch T42 is connected in series to the connection line between the turn-on resistor 11 and the adjustable power supply 11.

[0016] The two ends of the shut-off resistor 22 are connected to the output terminal of the adjustable power supply 21 and the gate G of the power semiconductor device under test, respectively; and the switch T43 is connected in series to the connection line between the shut-off resistor 22 and the adjustable power supply 21.

[0017] In this embodiment, the input terminals of both adjustable power supply 11 and adjustable power supply 21 are connected to the control interface of the control center.

[0018] In this embodiment, the switch T42 is connected in series with the turn-on resistor 11 as a turn-on resistor branch.

[0019] Multiple turn-on resistor branches are connected in parallel between the adjustable power supply 11 and the gate G of the power semiconductor device under test; and the resistance value of the turn-on resistor 11 is different for each turn-on resistor branch.

[0020] In this embodiment, the switch T43 is connected in series with the turn-off resistor 22 as a turn-off resistor branch;

[0021] Multiple shut-off resistor branches are connected in parallel between the adjustable power supply 21 and the gate G of the power semiconductor device under test; and the resistance value of the shut-off resistor 22 on each shut-off resistor branch is different.

[0022] In this embodiment, the test system also includes an isolated power supply; the isolated power supply is connected to the power interface of the control center.

[0023] This invention also provides a test machine suitable for power semiconductor devices, which integrates the test system described above.

[0024] This invention also provides a power semiconductor device, which is tested using the aforementioned testing system.

[0025] Compared with the prior art, the beneficial effects of this utility model are: this utility model provides a voltage regulation function for the switch control of the device under test, a selection function for up to hundreds of on and hundreds of off resistor values, a contact test function based on Kelvin measurement, and a threshold voltage test function.

[0026] The threshold voltage testing function offers the following advantages:

[0027] Comparing the threshold voltage of the device under test before and after dynamic testing can provide a more accurate understanding of the degree of aging and damage inside the device during dynamic testing.

[0028] Threshold voltage testing, as a low-voltage and safe test, can be used as the final step in the testing process to ensure, in the safest way, that the device under test (DUT) is not damaged in the blind zone of dynamic testing (after dynamic testing, there is usually a period of several milliseconds when the device is still under high voltage but there is no suitable monitoring system to continuously monitor the DUT. If the DUT experiences performance degradation during this period, it may not be detected by the conventional dynamic testing machine monitoring system).

[0029] Kelvin contact testing offers the following advantages over conventional dynamic contact testing (such as providing a pulse voltage to the gate to measure voltage slope, gate current, or observe the turn-on status of the device under test):

[0030] This ensures that both the sampling connection and the power connection are reliable and effective, and that the contact resistance can be quantified through this test.

[0031] Even for devices under test such as diodes that do not have gates, good testing results can still be achieved, regardless of the type of device under test.

[0032] The advantages of combining threshold voltage testing and Kelvin contact testing functions:

[0033] Each drive is equipped with Kelvin contact monitoring and threshold voltage monitoring. Compared to a single test machine with only one system, this can greatly reduce the testing time required when testing multiple unit modules (for example, even if a regular test machine has this function, it still needs to test each unit individually, and 6 units would require 6 times the time required by this patented system).

[0034] Advantages of the on / off resistor priority function:

[0035] The system has multiple resistors with different resistance values ​​and switches to control these resistors. It can be matched with hundreds of different resistance values ​​through different combinations, which can solve various problems mentioned in the background, such as insufficient test voltage range and slow replacement of gate resistors.

[0036] This invention also integrates an isolated power supply system, allowing for single-power-input operation. Multiple isolated power supplies can be generated from the integrated isolated power supply within the system to meet the power supply needs of different components. The integrated communication interface allows numerous parameters, such as voltage and resistance settings, to be executed digitally by the control center. This reduces the number of leads and avoids accuracy loss during non-digital transmission. Furthermore, digital communication enables the system to perform functions such as Kelvin contact testing and threshold voltage testing without additional cable connections, reducing system size and complexity. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of a power semiconductor device testing system according to an embodiment of the present invention.

[0038] Figure 2 This is a schematic diagram of the Kelvin contact test function in an embodiment of this utility model.

[0039] Figure 3 This is a schematic diagram of the threshold voltage test function in an embodiment of the present invention.

[0040] Figure 4 This is a circuit diagram of the switching module in an embodiment of the present invention.

[0041] Figure 5 This is a block diagram of a test system according to another embodiment of the present invention.

[0042] Figure 6 This is a schematic diagram of the on / off resistor selection function according to an embodiment of the present invention. Detailed Implementation

[0043] To facilitate understanding of the technical solution of this utility model by those skilled in the art, the technical solution of this utility model will now be further described in conjunction with the accompanying drawings.

[0044] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0045] Example 1

[0046] Please see Figure 1 As shown, this utility model provides a power semiconductor device testing system, including a threshold voltage and Kelvin test power supply and a switching module. The switching module enables Kelvin contact testing and threshold voltage testing of the power semiconductor device under test.

[0047] Please see Figure 2 As shown, in this embodiment, the principle of the Kelvin contact test function is as follows:

[0048] The connection between the test system and the power semiconductor device under test typically involves three electrodes and five contacts. Taking an IGBT as an example, it includes three electrodes: collector, emitter, and gate. This is achieved through methods such as... Figure 2 The topology connects four contacts (emitter and collector) together. By applying a current excitation CS and measuring the voltage at the excitation terminal, the resistance value of the entire circuit (including wires, connectors, etc.) can be measured, thereby confirming the connection / contact status of the power semiconductor device under test and the equipment.

[0049] Please see Figure 3 As shown, in this embodiment, the threshold voltage test function is as follows:

[0050] Taking IGBT as an example, the threshold voltage can be obtained by shorting the collector and gate, injecting a current into the collector, and measuring the voltage between the gate and emitter at this time.

[0051] Please see Figure 4 As shown, in this embodiment, based on the working principle of the above-mentioned Kelvin contact test and threshold voltage test, the switching module includes: relay U21, relay RL1, and relay RL2.

[0052] The threshold voltage and Calvin test power supply are connected to pin 4 of the output side of relay U21. The two ends of the switch pin of relay RL1 are connected to the threshold voltage and Calvin test power supply and the collector C of the power semiconductor device under test, respectively. Pin 3 of the output side of relay U21 is connected to the gate G of the power semiconductor device under test. Pin 2 of the input side of relay U21 is connected to the control signal, and pin 3 of the coil of relay RL1 is also connected to the control signal.

[0053] In this embodiment, during the threshold voltage test, relay U21 is closed through input pin 2, and relay RL1 is closed through coil pin 3. The threshold voltage and the output CC_Source of the Calvin test power supply flow through relay U12 and relay RL1 into Caux and the gate G of the power semiconductor device under test, respectively, and flow out from Eaux (back to the negative terminal). When the voltage of the gate G of the power semiconductor device under test reaches a certain value, the current flowing into Caux will be equal to the threshold voltage and the set current of the Calvin test power supply, and the voltage will no longer change; this is called the threshold voltage. Caux is defined as the voltage connected to the collector C inside the power semiconductor device under test.

[0054] In this embodiment, the two ends of the switch pin of relay RL2 are connected to the collector C and emitter E of the power semiconductor device under test, respectively, and the coil pin 3 of relay RL2 is connected to the control signal.

[0055] In this embodiment, during the Kelvin test, relays RL1 and RL2 are closed. The voltage and the output CC_Source of the Kelvin test power supply flow into Caux through relay RL1, out from C_Prime, and then into E_Prime through relay RL2 (Eaux and E_Prime are short-circuited internally in the power semiconductor device under test). Finally, Eaux flows into the negative terminal. At this time, the voltage between pin 1 of relay RL1 and the emitter E of the power semiconductor device under test, divided by the current flowing through it, is the resistance of the entire circuit. The resistance value can be used to determine whether there is a connection. Here, E_Primed is defined as the power point on the emitter E of the power semiconductor device under test. C_Prime is defined as the power point on the collector C of the power semiconductor device under test, and Eaux is defined as the point connected to the emitter E internally in the power semiconductor device under test.

[0056] In this embodiment, relay U21 is a solid-state relay, specifically using G3VM-61VY3(TR), and relays RL1 and RL2 are both reed relays, specifically using SHV05-BV88269.

[0057] Example 2

[0058] Please see Figure 4 , 5As shown, in another embodiment of this utility model, the test system further includes a control center. The control interface of the control center is connected to the input pin 2 of relay U21, the coil pin 3 of relay RL1, and the coil pin 3 of relay RL2. The control center provides a control signal defined as G-RL-N to the input pin 2 of relay U21 to achieve the closing of the output pins 3 and 4 of relay U21; provides a control signal defined as C-RL-N to the coil pin 3 of relay RL2 to achieve the closing of the switch pins 1 and 4 of relay RL2; and provides a control signal defined as Ca-RL-N to the coil pin 3 of relay RL1 to achieve the closing of the switch pins 1 and 4 of relay RL1.

[0059] This embodiment does not limit the specific control center product. As long as it is a commercially available control chip with some core basic functions such as signal input acquisition, logic operation and processing, signal output and control, timing and counting, data storage and memory, communication and interaction, it is acceptable.

[0060] Furthermore, an isolation communication circuit is provided between the control center and the control terminal. The output of the isolation communication circuit is connected to the communication interface of the control center, and the input of the isolation communication circuit is connected to the control terminal. The control terminal can be, for example, an industrial control computer or a general-purpose computer, used to issue control signals. This invention does not limit the specific isolation communication circuit; any circuit that reduces the number of leads and avoids accuracy loss during non-digital transmission is acceptable.

[0061] In this embodiment, the test system also includes an adjustable power supply 11 for providing a positive turn-on voltage, a turn-on resistor 11, an adjustable power supply 21 for providing a negative turn-off voltage, a turn-off resistor 22, and switches T42 and T43, enabling the test system to integrate a turn-on / turn-off resistor selection function. Multiple resistors with different resistance values ​​and switches that control these resistors can be matched in different ways to produce hundreds of different resistance values.

[0062] The two ends of the switching resistor 11 are connected to the output terminal of the adjustable power supply 11 and the gate G of the power semiconductor device under test, respectively. Furthermore, the switch T42 is connected in series in the connection line between the switching resistor 11 and the adjustable power supply 11.

[0063] The two ends of the shut-off resistor 22 are connected to the output terminal of the adjustable power supply 21 and the gate G of the power semiconductor device under test, respectively. A switch T43 is connected in series in the connection line between the shut-off resistor 22 and the adjustable power supply 21. The input terminals of both the adjustable power supply 11 and the adjustable power supply 21 are connected to the control interface of the control center.

[0064] In this embodiment, the switch T42 is connected in series with the turn-on resistor 11 as a turn-on resistor branch, and multiple turn-on resistor branches are set in parallel between the adjustable power supply 11 and the gate G of the power semiconductor device under test, and the resistance value of the turn-on resistor 11 in each turn-on resistor branch is different.

[0065] In this embodiment, the switch T43 is connected in series with the turn-off resistor 22 as a turn-off resistor branch, and multiple turn-off resistor branches are set in parallel between the adjustable power supply 21 and the gate G of the power semiconductor device under test; and the resistance value of the turn-off resistor 22 in each turn-off resistor branch is different.

[0066] In one embodiment of this utility model, the testing system further includes an isolated power supply, which is connected to the power interface of the control center.

[0067] This invention also provides a test machine suitable for power semiconductor devices, which integrates the test system described above.

[0068] This invention also provides a power semiconductor device, which is tested using the test system described above.

[0069] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this invention, and no reference numerals in the claims should be construed as limiting the scope of the claims.

[0070] The above-described embodiments are merely examples of implementation methods of the utility model. The scope of protection of this utility model is not limited to the above-described embodiments. For those skilled in the art, several modifications and improvements can be made without departing from the concept of this utility model, and these all fall within the scope of protection of this utility model.

Claims

1. A power semiconductor device testing system, characterized in that, include: Threshold voltage and Calvin test power supply and switching module; wherein, the switching module includes: relay U21, relay RL1; The threshold voltage and Calvin test power supply are connected to the output pin 4 of relay U21; the two ends of the switch pin of relay RL1 are connected to the threshold voltage and Calvin test power supply and the collector C of the power semiconductor device under test, respectively; the output pin 3 of relay U21 is connected to the gate G of the power semiconductor device under test.

2. The power semiconductor device testing system according to claim 1, characterized in that, The switching module includes relay RL2; The two ends of the switch pin of relay RL2 are connected to the collector C and emitter E of the power semiconductor device under test, respectively.

3. The power semiconductor device testing system according to claim 2, characterized in that, The testing system includes a control center; The control interface of the control center is connected to the input pin 2 of relay U21, the coil pin 3 of relay RL1, and the coil pin 3 of relay RL2.

4. The power semiconductor device testing system according to claim 3, characterized in that, The test system includes an adjustable power supply one (11) for providing a positive turn-on voltage, a turn-on resistor (11), an adjustable power supply two (21) for providing a negative turn-off voltage, a turn-off resistor (22), and switches T42 and T43. The two ends of the turn-on resistor (11) are connected to the output terminal of the adjustable power supply (11) and the gate G of the power semiconductor device under test, respectively; and the switch T42 is connected in series to the connection line between the turn-on resistor (11) and the adjustable power supply (11). The two ends of the shut-off resistor (22) are connected to the output terminal of the adjustable power supply (21) and the gate G of the power semiconductor device under test, respectively; and the switch T43 is connected in series to the connection line between the shut-off resistor (22) and the adjustable power supply (21).

5. The power semiconductor device testing system according to claim 3, characterized in that, The input terminals of adjustable power supply one (11) and adjustable power supply two (21) are both connected to the control interface of the control center.

6. The power semiconductor device testing system according to claim 4, characterized in that, Connect the switch T42 in series with the turn-on resistor (11) as a turn-on resistor branch; Multiple turn-on resistor branches are set up in parallel between the adjustable power supply (11) and the gate G of the power semiconductor device under test; and the turn-on resistor (11) on each turn-on resistor branch has a different resistance value.

7. The power semiconductor device testing system according to claim 4, characterized in that, Connect the switch T43 in series with the turn-off resistor (22) as a turn-off resistor branch; Multiple shut-off resistor branches are set up in parallel between the adjustable power supply (21) and the gate G of the power semiconductor device under test; and the resistance value of the shut-off resistor (22) on each shut-off resistor branch is different.

8. The power semiconductor device testing system according to claim 3, characterized in that, The testing system also includes an isolated power supply; the isolated power supply is connected to the power interface of the control center.

9. A testing machine suitable for power semiconductor devices, characterized in that, The testing machine integrates the testing system described in any one of claims 1-8.

10. A power semiconductor device, characterized in that, The test is performed using the test system described in any one of claims 1-8.

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