A wired-wireless converged charging device supporting multiple protocols

Abstract

This utility model relates to a wired-wireless integrated charging device supporting multiple protocols, comprising: a rechargeable battery, a BUCK-BOOST circuit, and a multi-protocol interface circuit connected in sequence, all of which are connected to a first main control chip; and a rechargeable battery, a BUCK circuit, a second main control chip, an LC resonant circuit, and an ASK demodulation circuit connected in sequence, with the ASK demodulation circuit also connected to the second main control chip. This utility model, through a dual-main-controller collaborative architecture and refined circuit design, achieves true integration and intelligent collaboration between wired and wireless charging, resulting in a significant improvement in overall performance. It successfully solves key issues such as multi-protocol compatibility, dynamic power allocation between wired and wireless circuits, efficiency optimization, and safety protection, achieving a truly "1+1>2" integrated charging experience.

Description

Technical Field

[0001] This utility model relates to the field of charging technology, specifically to a wired and wireless integrated charging device that supports multiple protocols. Background Technology

[0002] The core advantage of wired charging lies in its stability and efficiency; a 100W PD fast charger can fully charge a laptop in 30 minutes, something wireless charging cannot match. However, its disadvantages are also obvious—it requires a cable, which is very inconvenient in mobile scenarios. Although wireless charging is less efficient, its convenience of simply placing the device on the charger is irreplaceable, especially in car and bedside scenarios.

[0003] Existing charging devices either only have wired charging capabilities or only have wireless charging capabilities, and very few have both wired and wireless charging capabilities; even those that do have both wired and wireless charging capabilities have issues with dynamic power allocation and protocol conflicts. Utility Model Content

[0004] This invention provides a wired and wireless integrated charging device that supports multiple protocols to solve at least one of the above-mentioned technical problems.

[0005] The technical solution of this utility model to solve the above-mentioned technical problems is as follows: a wired and wireless integrated charging device that supports multiple protocols, including a rechargeable battery BAT and a wired charging module and a wireless charging module with a dual main control architecture. The wired charging module includes a first main control chip, a BUCK-BOOST circuit, and a multi-protocol interface circuit; the rechargeable battery, the BUCK-BOOST circuit, and the multi-protocol interface circuit are connected in sequence, and the rechargeable battery, the BUCK-BOOST circuit, and the multi-protocol interface circuit are all connected to the first main control chip. The wireless charging module includes a second main control chip, a BUCK circuit, an LC resonant circuit, and an ASK demodulation circuit; the rechargeable battery, the BUCK circuit, the second main control chip, the LC resonant circuit, and the ASK demodulation circuit are connected in sequence, and the ASK demodulation circuit is also connected to the second main control chip.

[0006] Based on the above technical solution, the present invention can be further improved as follows.

[0007] Furthermore, the BUCK-BOOST circuit includes: The first capacitor is connected between the rechargeable battery and ground; The second capacitor, the third capacitor, and the fourth capacitor are all connected in parallel to the first capacitor; The fifth capacitor has one end connected to the rechargeable battery and the CSP2 pin of the first main control chip, and the other end connected to the CSN2 pin of the first main control chip. The first resistor has one end connected to the rechargeable battery; The second resistor has one end connected to the other end of the first resistor and the other end connected to the CSN2 pin of the first main control chip. The first low-voltage gallium nitride device has its drain connected to the other end of the first resistor and the PCON pin of the first main control chip, and its gate connected to the HG2 pin of the first main control chip. The second low-voltage gallium nitride device has its drain connected to the source of the first low-voltage gallium nitride device, its gate connected to the LG2 pin of the first main control chip, and its source grounded. The sixth capacitor is connected between the LX2 pin and the BST2 pin of the first main control chip; The third resistor is connected at one end to the LX2 pin of the first main control chip and the source of the first low-voltage gallium nitride device. The seventh capacitor has one end connected to the other end of the third resistor, and the other end grounded. The eighth capacitor is connected between the LX1 pin and the BST1 pin of the first main control chip; The fourth resistor is connected at one end to the LX1 pin of the first main control chip; The ninth capacitor has one end connected to the other end of the fourth resistor, and the other end grounded. An inductor is connected between one end of the third resistor and one end of the fourth resistor; The third low-voltage gallium nitride device has its drain connected to the PCIN pin of the first main control chip and its gate connected to the HG1 pin of the first main control chip. The fourth low-voltage gallium nitride device has its drain connected to the source of the third low-voltage gallium nitride device, its gate connected to the LG1 pin of the first main control chip, and its source grounded. The fifth resistor has one end connected to the drain of the third low-voltage gallium nitride device and the other end connected to the CSN1 pin of the first main control chip. The sixth resistor is connected at one end to the drain of the third low-voltage gallium nitride device; The tenth capacitor has one end connected to the other end of the sixth resistor and the CSP1 pin of the first main control chip, and the other end connected to the CSN1 pin of the first main control chip. The eleventh capacitor has one end connected to the other end of the sixth resistor and the multi-protocol interface circuit, and the other end grounded. The twelfth, thirteenth, and fourteenth capacitors are all connected in parallel to the eleventh capacitor.

[0008] Furthermore, the multi-protocol interface circuit includes: The fifth low-voltage gallium nitride device has its drain connected to one end of the eleventh capacitor and its gate connected to the VBUSG pin of the first main control chip. The USB-C interface has its VBUS pin connected to the source of the fifth low-voltage gallium nitride device; The fifteenth capacitor has one end connected to the VBUS pin of the USB-C interface and the other end grounded. The sixth low-voltage gallium nitride device has its drain connected to one end of the eleventh capacitor and its gate connected to the VOUT1G pin of the first main control chip. The USB-A interface has its VCC pin connected to the source of the sixth low-voltage gallium nitride device; The sixteenth capacitor has one end connected to the VCC pin of the USB-A interface and the other end grounded.

[0009] Furthermore, the wired charging module also includes a button circuit, a battery cell number setting circuit, a battery capacity control circuit, a battery voltage control circuit, a digital display circuit, a system input / output maximum power selection circuit, and a charging / discharging temperature control circuit, all connected to the first main control chip.

[0010] Furthermore, the button circuit includes a seventh resistor connected in series between the KEY pin of the first main control chip and ground, and a button; The battery cell number setting circuit includes an eighth resistor connected between the BAT_S2 pin of the first main control chip and ground, and a ninth resistor connected between the BAT_S1 pin of the first main control chip and ground. The battery capacity control circuit includes a tenth resistor connected between the FCAP pin of the first main control chip and ground. The battery voltage control circuit includes an eleventh resistor connected between the VSET pin of the first main control chip and ground. The digital display circuit includes a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, and a digital display tube. The digital display tube is connected to the LED5 pin, LED4 pin, LED3 pin, LED2 pin, and LED1 pin of the first main control chip through the thirteenth resistor, the fourteenth resistor, the fifteenth resistor, the sixteenth resistor, and the seventeenth resistor, respectively. The system input / output maximum power selection circuit includes a nineteenth resistor connected between the PMAX pin of the first main control chip and ground. The charge / discharge temperature control circuit includes an eighteenth resistor connected between the NTC1 pin of the first main control chip and ground, wherein the eighteenth resistor is an NTC resistor.

[0011] Furthermore, the BUCK circuit includes: The LDO chip has its Vin pin connected to the rechargeable battery, its GND pin grounded, and its Vout pin outputting a 12V voltage. The nineteenth capacitor is connected between the Vin pin and the GND pin of the LDO chip. The twentieth capacitor is connected between the Vout pin and the GND pin of the LDO chip.

[0012] Furthermore, the LC resonant circuit includes: The twenty-first capacitor has one end connected to the BST2 pin of the second main control chip and the other end connected to the LX2 pin of the second main control chip. One end of the coil is connected to the other end of the twenty-first capacitor; The twenty-third capacitor has one end connected to the other end of the coil and the other end connected to the LX1 pin of the second main control chip. The twenty-second capacitor has one end connected to the other end of the twenty-third capacitor, and the other end connected to the BST1 pin of the second main control chip.

[0013] Furthermore, the ASK demodulation circuit includes: A Zener diode, with its positive terminal connected to the other end of the coil; The twentieth resistor has one end connected to the negative terminal of the Zener diode; The twenty-first resistor has one end connected to the negative terminal of the Zener diode and the other end connected to the VDET pin of the second main control chip. The twenty-second resistor has one end connected to the other end of the twenty-first resistor, and the other end grounded. The twenty-third resistor has one end connected to the other end of the twentyth resistor, and the other end grounded. The twenty-fourth capacitor is connected in parallel with the twenty-third resistor; The 25th capacitor has one end connected to the other end of the 20th resistor, and the other end connected to the VDECODE pin of the second main control chip.

[0014] Furthermore, the wireless charging module also includes a status display circuit, an NTC thermal protection circuit, and a FOD dynamic detection circuit connected to the second main control chip.

[0015] Furthermore, the status display circuit includes a 25th resistor, a 26th resistor, a first light-emitting diode, and a second light-emitting diode. The 25th resistor and the first light-emitting diode are connected in series between the LED1 pin of the second main control chip and ground, and the 26th resistor and the second light-emitting diode are connected in series between the LED2 pin of the second main control chip and ground. The NTC thermal protection circuit includes a 28th resistor and a 28th capacitor connected in parallel between the NTC pin of the second main control chip and ground, wherein the 28th resistor is an NTC resistor; The FOD dynamic detection circuit includes a 27th resistor connected between the LOSS_THR pin of the second main control chip and ground, and a 27th capacitor connected between the VDET pin of the second main control chip and ground.

[0016] The beneficial effects of this utility model are as follows: This utility model provides a wired and wireless integrated charging device that supports multiple protocols. By combining wired and wireless charging through a dual-master control collaborative architecture and sophisticated circuit design, it achieves true integration and intelligent collaboration between wired and wireless charging, resulting in a significant improvement in overall performance. It successfully solves key issues such as multi-protocol compatibility, dynamic power allocation between wired and wireless circuits, efficiency optimization, and safety protection, achieving a truly synergistic charging experience where "1+1>2". It not only provides users with unprecedented convenience and powerful battery life, but also ensures efficient, safe, and flexible charging, meeting diverse charging needs in various scenarios. Attached Figure Description

[0017] Figure 1 This is a block diagram of the internal circuit structure of a wired and wireless converged charging device supporting multiple protocols according to this utility model. Figure 2 This is a circuit diagram of the wired charging module in a wired-wireless integrated charging device that supports multiple protocols according to this utility model. Figure 3 This is a circuit diagram of the wireless charging module in a wired-wireless integrated charging device that supports multiple protocols according to this utility model. Detailed Implementation

[0018] The principles and features of this utility model are described below with reference to the accompanying drawings. The examples given are only for explaining this utility model and are not intended to limit the scope of this utility model.

[0019] like Figure 1 As shown, a wired and wireless converged charging device supporting multiple protocols includes a rechargeable battery BAT and a wired charging module and a wireless charging module with a dual main control architecture. The wired charging module includes a first main control chip U1, a BUCK-BOOST circuit, and a multi-protocol interface circuit; the rechargeable battery BAT, the BUCK-BOOST circuit, and the multi-protocol interface circuit are connected in sequence, and the rechargeable battery BAT, the BUCK-BOOST circuit, and the multi-protocol interface circuit are also connected to the first main control chip U1. The wireless charging module includes a second main control chip U2, a BUCK circuit, an LC resonant circuit, and an ASK demodulation circuit; the rechargeable battery BAT, the BUCK circuit, the second main control chip U2, the LC resonant circuit, and the ASK demodulation circuit are connected in sequence, and the ASK demodulation circuit is also connected to the second main control chip U2.

[0020] In this embodiment, as Figure 2 As shown, the BUCK-BOOST circuit includes: The first capacitor C1 is connected between the rechargeable battery BAT and ground; The second capacitor C2, the third capacitor C3, and the fourth capacitor C4 are all connected in parallel to the first capacitor C1; The fifth capacitor C5 has one end connected to the rechargeable battery BAT and the CSP2 pin of the first main control chip U1, and the other end connected to the CSN2 pin of the first main control chip U1. The first resistor R1 is connected at one end to the rechargeable battery BAT. The second resistor R2 has one end connected to the other end of the first resistor R1, and the other end connected to the CSN2 pin of the first main control chip U1. The first low-voltage gallium nitride device Q1 has its drain connected to the other end of the first resistor R1 and the PCON pin of the first main control chip U1, and its gate connected to the HG2 pin of the first main control chip U1. The second low-voltage gallium nitride device Q2 has its drain connected to the source of the first low-voltage gallium nitride device Q1, its gate connected to the LG2 pin of the first main control chip U1, and its source grounded. The sixth capacitor C6 is connected between the LX2 pin and the BST2 pin of the first main control chip U1; The third resistor R3 is connected at one end to the LX2 pin of the first main control chip U1 and the source of the first low-voltage gallium nitride device Q1. The seventh capacitor C7 has one end connected to the other end of the third resistor R3, and the other end grounded. The eighth capacitor C8 is connected between the LX1 pin and the BST1 pin of the first main control chip U1; The fourth resistor R4 is connected at one end to the LX1 pin of the first main control chip U1; The ninth capacitor C9 has one end connected to the other end of the fourth resistor R4, and the other end grounded. Inductor L1 is connected between one end of the third resistor R3 and one end of the fourth resistor R4; The third low-voltage gallium nitride device Q3 has its drain connected to the PCIN pin of the first main control chip U1 and its gate connected to the HG1 pin of the first main control chip U1. The fourth low-voltage gallium nitride device Q4 has its drain connected to the source of the third low-voltage gallium nitride device Q3, its gate connected to the LG1 pin of the first main control chip U1, and its source grounded. The fifth resistor R5 is connected at one end to the drain of the third low-voltage gallium nitride device Q3, and at the other end to the CSN1 pin of the first main control chip U1. The sixth resistor R6 is connected at one end to the drain of the third low-voltage gallium nitride device Q3; The tenth capacitor C10 has one end connected to the other end of the sixth resistor R6 and the CSP1 pin of the first main control chip U1, and the other end connected to the CSN1 pin of the first main control chip U1. The eleventh capacitor C11 has one end connected to the other end of the sixth resistor R6 and the multi-protocol interface circuit, and the other end grounded. The twelfth capacitor C12, the thirteenth capacitor C13, and the fourteenth capacitor C14 are all connected in parallel to the eleventh capacitor C11.

[0021] Specifically, the core of the BUCK-BOOST circuit consists of four low-voltage gallium nitride devices that enable synchronous rectification of charging (Buck voltage reduction) and discharging (Boost voltage increase). Compared with diode rectification, the synchronous rectification loss of low-voltage gallium nitride devices is lower, thus this invention has higher charging and discharging efficiency.

[0022] In this embodiment, as Figure 2 As shown, the multi-protocol interface circuit includes: The fifth low-voltage gallium nitride device Q5 has its drain connected to one end of the eleventh capacitor C11, and its gate connected to the VBUSG pin of the first main control chip U1. The USB-C interface has its VBUS pin connected to the source of the fifth low-voltage gallium nitride device Q5; The fifteenth capacitor, C15, has one end connected to the VBUS pin of the USB-C interface and the other end grounded. The sixth low-voltage gallium nitride device Q6 has its drain connected to one end of the eleventh capacitor C11, and its gate connected to the VOUT1G pin of the first main control chip U1. The USB-A interface has its VCC pin connected to the source of the sixth low-voltage gallium nitride device Q6; The sixteenth capacitor, C16, has one end connected to the VCC pin of the USB-A interface and the other end grounded.

[0023] Specifically, the fifteenth capacitor, C15, is a filter capacitor that filters the input and output signals. The first main control chip U1 can control the switching on and off of the fifth low-voltage gallium nitride device, Q5, to determine whether the USB-C interface communicates with the first main control chip U1. The first main control chip U1 has a built-in input / output identification interface, automatically switches the built-in pull-up and pull-down resistors, and automatically identifies the charging and discharging attributes of the inserted device. The first main control chip U1 has a Try.SRC function, which prioritizes charging the other party when connected to a DRP device. When operating as a DFP, the CC pin is used to configure the external output current capability information of 3A; when operating as a UFP, it can identify the output current capability of the other party. It supports PD2.0 / PD3.0 bidirectional input / output protocols and PPS output protocol. It supports a maximum power output of 100W, with input voltage levels of 5V, 9V, 12V, 15V, and 20V, and output voltage levels of 5V, 9V, 12V, 15V, and 20V. When an E-MARK cable is detected, the output broadcast capability ranges from 5V / 3A, 9V / 3A, 12V / 3A, 15V / 3A, 20V / 5A, and PPS 3.3 to 21V / 3A; when an E-MARK cable is not detected, the output broadcast capability ranges from 5V / 3A, 9V / 3A, 12V / 3A, 15V / 3A, 20V / 3A, and PPS 3.3 to 21V / 3A. The sixteenth capacitor, C16, is a filter capacitor that filters the input and output signals. The first main control chip U1 can control whether the USB-A interface communicates with the first main control chip U1 by controlling the on / off state of the sixth low-voltage gallium nitride device Q6.

[0024] This utility model's wired charging module supports QC2.0 / QC3.0 / QC3+, FCP, AFC, SCP, VOOC, and Apple protocols. However, it does not support QC2.0, QC3.0, or QC3+ when charging a power bank, and it does not support external fast charging protocol ICs. While it supports FCP and AFC fast charging input when charging a power bank, since FCP and AFC use DP / DM for fast charging handshake requests, adding other fast charging protocol ICs will prevent further support for FCP and AFC fast charging. When the power bank charges a mobile phone: after entering discharge mode, it automatically detects the fast charging timing on the DP and DM pins, intelligently identifies the phone type, and supports phones with QC2.0 / QC3.0 / QC3+, FCP, AFC, SCP, and VOOC protocols, as well as Apple phones in 2.4A mode, BC1.2 mode, and ordinary Android phones in 1A mode.

[0025] When supporting Apple phones: DP=DM=2.7V. When supporting BC1.2: DP and DM are shorted. In BC1.2 mode, when a DP voltage greater than 0.325V and less than 2V is detected for 1.25s, a fast charging request is initially identified. At this time, the short circuit between DP and DM will be disconnected, and DM will be pulled 20kJ to ground. If the DP voltage is greater than 0.325V and less than 2V, and the DM voltage is less than 0.325V for 2ms, the fast charging connection is considered successful, and the requested voltage can then be output according to QC2.0 / QC3.0 / QC3+ requirements. At any time when the DP voltage is less than 0.325V, the fast charging mode will be forcibly exited, and the output voltage will immediately return to the default 5V.

[0026] In this embodiment, the wired charging module further includes a button circuit, a battery cell setting circuit, a battery capacity control circuit, a battery voltage control circuit, a digital display circuit, a system input / output maximum power selection circuit, and a charging / discharging temperature control circuit, all connected to the first main control chip U1. Preferably, as follows... Figure 2 As shown: The button circuit includes a seventh resistor R7 connected in series between the KEY pin of the first main control chip U1 and ground, and a button SW; wherein, the first main control chip U1 can obtain the state of the button SW through the KEY pin.

[0027] The battery cell number setting circuit includes an eighth resistor R8 connected between the BAT_S2 pin of the first main control chip U1 and ground, and a ninth resistor R9 connected between the BAT_S1 pin of the first main control chip U1 and ground; wherein, the number of battery cells is set by setting the eighth resistor R8 and the ninth resistor R9.

[0028] The battery capacity control circuit includes a tenth resistor R10 connected between the FCAP pin of the first main control chip U1 and ground; wherein the battery capacity is controlled by setting the resistance value of the tenth resistor R10.

[0029] The battery voltage control circuit includes an eleventh resistor R11 connected between the VSET pin of the first main control chip U1 and ground; wherein the battery voltage is controlled by setting the resistance value of the eleventh resistor R11.

[0030] The digital display circuit includes a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, and a digital display tube U3. The digital display tube U3 is connected to the LED5, LED4, LED3, LED2, and LED1 pins of the first main control chip U1 via the thirteenth resistor R13, fourteenth resistor R14, fifteenth resistor R15, sixteenth resistor R16, and seventeenth resistor R17, respectively. Among them, the thirteenth resistor R13, fourteenth resistor R14, fifteenth resistor R15, sixteenth resistor R16, and seventeenth resistor R17 serve to limit the current.

[0031] The system input / output maximum power selection circuit includes a nineteenth resistor R19 connected between the PMAX pin of the first main control chip U1 and ground; wherein, the system sets the maximum power by setting the resistance value of the nineteenth resistor R19.

[0032] The charge / discharge temperature control circuit includes an eighteenth resistor R18 connected between the NTC1 pin of the first main control chip U1 and ground. The eighteenth resistor R18 is an NTC resistor. The resistance value of the eighteenth resistor R18 is affected by temperature. Charging stops when the NTC temperature is below 0 degrees Celsius, normal charging occurs between 0 and 45 degrees Celsius, and charging stops when the temperature exceeds 45 degrees Celsius. In the discharge state: discharging stops when the temperature is below -20 degrees Celsius, normal discharge occurs between -20 and 60 degrees Celsius, and discharging stops when the temperature exceeds 60 degrees Celsius.

[0033] In this embodiment, as Figure 3 As shown, the BUCK circuit includes: The LDO chip U4 has its Vin pin connected to the rechargeable battery BAT, its GND pin grounded, and its Vout pin outputting a 12V voltage. The nineteenth capacitor, C19, is connected between the Vin pin and the GND pin of the LDO chip U4. The twentieth capacitor, C20, is connected between the Vout pin and the GND pin of the LDO chip U4.

[0034] The core function of the BUCK circuit is to convert the input voltage into a stable low-voltage output, ensuring a continuous, low-ripple power supply for the downstream circuitry. Additionally, the BUCK circuit includes a 29th capacitor (C29) and a 30th capacitor (C30) to filter the input signal.

[0035] In this embodiment, as Figure 3 As shown, the LC resonant circuit includes: The twenty-first capacitor C21 has one end connected to the BST2 pin of the second main control chip U2, and the other end connected to the LX2 pin of the second main control chip U2. One end of coil L2 is connected to the other end of the 21st capacitor C21; The twenty-third capacitor C23 has one end connected to the other end of the coil L2, and the other end connected to the LX1 pin of the second main control chip U2; The twenty-second capacitor C22 is connected at one end to the other end of the twenty-third capacitor C23, and at the other end to the BST1 pin of the second main control chip U2.

[0036] Specifically, an LC resonant capacitor forms a magnetic resonance coupling with the receiving coil, transmitting electrical energy in the form of a high-frequency alternating magnetic field. The resonant capacitor is directly connected to coil L2, forming a resonant circuit at the transmitting end to ensure energy coupling efficiency.

[0037] In this embodiment, as Figure 3 As shown, the ASK demodulation circuit includes: The positive terminal of the Zener diode D is connected to the other end of the coil L2; The twentieth resistor R20 is connected at one end to the negative terminal of the Zener diode D; The twenty-first resistor R21 is connected at one end to the negative terminal of the Zener diode D and at the other end to the VDET pin of the second main control chip U2. The twenty-second resistor R22 has one end connected to the other end of the twenty-first resistor R21, and the other end is grounded. The twenty-third resistor R23 has one end connected to the other end of the twentieth resistor R20, and the other end grounded. The twenty-fourth capacitor C24 is connected in parallel with the twenty-third resistor R23; The twenty-fifth capacitor C25 is connected at one end to the other end of the twentyth resistor R20, and at the other end to the VDECODE pin of the second main control chip U2.

[0038] Specifically, this utility model has two built-in ASK demodulation circuits, which can respectively collect coil voltage and current for ASK communication demodulation and decoding; the current decoding obtains the signal through the sampling resistor and sends it to the chip for digital demodulation and decoding.

[0039] In this embodiment, the wireless charging module further includes a status display circuit, an NTC thermal protection circuit, and a FOD dynamic detection circuit connected to the second main control chip U2. Preferably, as follows: Figure 3 As shown: The status display circuit includes a 25th resistor R25, a 26th resistor R26, a first light-emitting diode (LED1), and a second light-emitting diode (LED2). The 25th resistor R25 and the first LED1 are connected in series between the LED1 pin of the second main control chip U2 and ground. The 26th resistor R26 and the second LED2 are connected in series between the LED2 pin of the second main control chip U2 and ground. The second main control chip U2 drives the first LED1 and the second LED2 respectively through the 25th resistor R25 and the 26th resistor R26 (both current-limiting resistors). In standby mode, both LEDs are off. During charging, the first LED1 is constantly lit, and the second LED2 is off. In case of an abnormality, the first LED1 is off, and the second LED2 flashes.

[0040] The NTC thermal protection circuit includes a 28th resistor R28 and a 28th capacitor C28 connected in parallel between the NTC pin of the second main control chip U2 and ground. The 28th resistor R28 is the NTC resistor. The NTC pin of the second main control chip U2 outputs a fixed current of 20uA. This pin determines the NTC temperature by sampling the voltage of the 28th resistor R28. This shutdown characteristic provides enhanced application capabilities and is not limited to thermal shutdown. When the voltage of the NTC pin is less than the set voltage, the system will enter the NTC protection state and end power transmission. After entering the NTC protection state, if the voltage of the NTC pin is greater than the set voltage, normal charging will resume. If the NTC application is not used, this pin is grounded through a 100K resistor.

[0041] The FOD dynamic detection circuit includes a 27th resistor R27 connected between the LOSS_THR pin of the second main control chip U2 and ground, and a 27th capacitor C27 connected between the VDET pin of the second main control chip U2 and ground. Dynamic FOD refers to the ability to detect foreign objects on the coil during wireless charging. The second main control chip U2 can adjust the sensitivity of static FOD by adjusting the 27th capacitor C27 on the VDET pin; by default, a 2.2nF capacitor is connected to ground to use the standard static FOD sensitivity. The larger the capacitor connected, the higher the static FOD sensitivity and the easier it is to detect foreign objects. The second main control chip U2 can also adjust the sensitivity of dynamic FOD by connecting the 27th resistor R27 to the LOSS_THR pin. The LOSS_THR pin is connected to the 27th resistor R27 of 100K by default to ground, using the standard dynamic FOD sensitivity. The larger the external resistor connected to the LOSS_THR pin, the lower the sensitivity of dynamic FOD, and the less likely it is to detect FOD. The sensitivity of dynamic FOD is set only by checking the resistance of the LOSS_THR pin upon power-up. The resistance should be greater than 50K ohms and less than 100K ohms.

[0042] This utility model discloses a multi-protocol wired and wireless integrated charging device that combines wired and wireless charging. Through a dual-master control collaborative architecture and sophisticated circuit design, it achieves true integration and intelligent collaboration between wired and wireless charging, resulting in a significant improvement in overall performance. It successfully solves key issues such as multi-protocol compatibility, dynamic power allocation between wired and wireless circuits, efficiency optimization, and safety protection, achieving a true "1+1>2" integrated charging experience. It not only provides users with unprecedented convenience and powerful battery life but also ensures efficient, safe, and flexible charging, meeting diverse charging needs in various scenarios.

[0043] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A multi-protocol supported wired-wireless converged charging device, characterized in that, This includes rechargeable and dischargeable batteries (BAT) as well as wired charging modules and wireless charging modules with a dual-controller architecture. The wired charging module includes a first main control chip, a BUCK-BOOST circuit, and a multi-protocol interface circuit; the rechargeable battery, the BUCK-BOOST circuit, and the multi-protocol interface circuit are connected in sequence, and the rechargeable battery, the BUCK-BOOST circuit, and the multi-protocol interface circuit are all connected to the first main control chip. The wireless charging module includes a second main control chip, a BUCK circuit, an LC resonant circuit, and an ASK demodulation circuit; the rechargeable battery, the BUCK circuit, the second main control chip, the LC resonant circuit, and the ASK demodulation circuit are connected in sequence, and the ASK demodulation circuit is also connected to the second main control chip.

2. The wired-wireless converged charging device supporting multiple protocols according to claim 1, characterized in that, The BUCK-BOOST circuit includes: The first capacitor is connected between the rechargeable battery and ground; The second capacitor, the third capacitor, and the fourth capacitor are all connected in parallel to the first capacitor; The fifth capacitor has one end connected to the rechargeable battery and the CSP2 pin of the first main control chip, and the other end connected to the CSN2 pin of the first main control chip. The first resistor has one end connected to the rechargeable battery; The second resistor has one end connected to the other end of the first resistor and the other end connected to the CSN2 pin of the first main control chip. The first low-voltage gallium nitride device has its drain connected to the other end of the first resistor and the PCON pin of the first main control chip, and its gate connected to the HG2 pin of the first main control chip. The second low-voltage gallium nitride device has its drain connected to the source of the first low-voltage gallium nitride device, its gate connected to the LG2 pin of the first main control chip, and its source grounded. The sixth capacitor is connected between the LX2 pin and the BST2 pin of the first main control chip; The third resistor is connected at one end to the LX2 pin of the first main control chip and the source of the first low-voltage gallium nitride device. The seventh capacitor has one end connected to the other end of the third resistor, and the other end grounded. The eighth capacitor is connected between the LX1 pin and the BST1 pin of the first main control chip; The fourth resistor is connected at one end to the LX1 pin of the first main control chip; The ninth capacitor has one end connected to the other end of the fourth resistor, and the other end grounded. An inductor is connected between one end of the third resistor and one end of the fourth resistor; The third low-voltage gallium nitride device has its drain connected to the PCIN pin of the first main control chip and its gate connected to the HG1 pin of the first main control chip. The fourth low-voltage gallium nitride device has its drain connected to the source of the third low-voltage gallium nitride device, its gate connected to the LG1 pin of the first main control chip, and its source grounded. The fifth resistor has one end connected to the drain of the third low-voltage gallium nitride device and the other end connected to the CSN1 pin of the first main control chip. The sixth resistor is connected at one end to the drain of the third low-voltage gallium nitride device; The tenth capacitor has one end connected to the other end of the sixth resistor and the CSP1 pin of the first main control chip, and the other end connected to the CSN1 pin of the first main control chip. The eleventh capacitor has one end connected to the other end of the sixth resistor and the multi-protocol interface circuit, and the other end grounded. The twelfth, thirteenth, and fourteenth capacitors are all connected in parallel to the eleventh capacitor.

3. The wired-wireless converged charging device supporting multiple protocols according to claim 2, characterized in that, The multi-protocol interface circuit includes: The fifth low-voltage gallium nitride device has its drain connected to one end of the eleventh capacitor and its gate connected to the VBUSG pin of the first main control chip. The USB-C interface has its VBUS pin connected to the source of the fifth low-voltage gallium nitride device; The fifteenth capacitor has one end connected to the VBUS pin of the USB-C interface and the other end grounded. The sixth low-voltage gallium nitride device has its drain connected to one end of the eleventh capacitor and its gate connected to the VOUT1G pin of the first main control chip. The USB-A interface has its VCC pin connected to the source of the sixth low-voltage gallium nitride device; The sixteenth capacitor has one end connected to the VCC pin of the USB-A interface and the other end grounded.

4. The wired-wireless converged charging device supporting multiple protocols according to claim 1, characterized in that, The wired charging module also includes a button circuit, a battery cell number setting circuit, a battery capacity control circuit, a battery voltage control circuit, a digital display circuit, a system input / output maximum power selection circuit, and a charging / discharging temperature control circuit, all connected to the first main control chip.

5. The wired-wireless converged charging device supporting multiple protocols according to claim 4, characterized in that, The button circuit includes a seventh resistor connected in series between the KEY pin of the first main control chip and ground, and a button. The battery cell number setting circuit includes an eighth resistor connected between the BAT_S2 pin of the first main control chip and ground, and a ninth resistor connected between the BAT_S1 pin of the first main control chip and ground. The battery capacity control circuit includes a tenth resistor connected between the FCAP pin of the first main control chip and ground. The battery voltage control circuit includes an eleventh resistor connected between the VSET pin of the first main control chip and ground. The digital display circuit includes a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, and a digital display tube. The digital display tube is connected to the LED5 pin, LED4 pin, LED3 pin, LED2 pin, and LED1 pin of the first main control chip through the thirteenth resistor, the fourteenth resistor, the fifteenth resistor, the sixteenth resistor, and the seventeenth resistor, respectively. The system input / output maximum power selection circuit includes a nineteenth resistor connected between the PMAX pin of the first main control chip and ground. The charge / discharge temperature control circuit includes an eighteenth resistor connected between the NTC1 pin of the first main control chip and ground, wherein the eighteenth resistor is an NTC resistor.

6. The wired-wireless converged charging device supporting multiple protocols according to claim 1, characterized in that, The BUCK circuit includes: The LDO chip has its Vin pin connected to the rechargeable battery, its GND pin grounded, and its Vout pin outputting a 12V voltage. The nineteenth capacitor is connected between the Vin pin and the GND pin of the LDO chip. The twentieth capacitor is connected between the Vout pin and the GND pin of the LDO chip.

7. The wired-wireless converged charging device supporting multiple protocols according to claim 1, characterized in that, The LC resonant circuit includes: The twenty-first capacitor has one end connected to the BST2 pin of the second main control chip and the other end connected to the LX2 pin of the second main control chip. One end of the coil is connected to the other end of the twenty-first capacitor; The twenty-third capacitor has one end connected to the other end of the coil and the other end connected to the LX1 pin of the second main control chip. The twenty-second capacitor has one end connected to the other end of the twenty-third capacitor, and the other end connected to the BST1 pin of the second main control chip.

8. The wired-wireless converged charging device supporting multiple protocols according to claim 7, characterized in that, The ASK demodulation circuit includes: A Zener diode, with its positive terminal connected to the other end of the coil; The twentieth resistor has one end connected to the negative terminal of the Zener diode; The twenty-first resistor has one end connected to the negative terminal of the Zener diode and the other end connected to the VDET pin of the second main control chip. The twenty-second resistor has one end connected to the other end of the twenty-first resistor, and the other end grounded. The twenty-third resistor has one end connected to the other end of the twentyth resistor, and the other end grounded. The twenty-fourth capacitor is connected in parallel with the twenty-third resistor; The 25th capacitor has one end connected to the other end of the 20th resistor, and the other end connected to the VDECODE pin of the second main control chip.

9. The wired-wireless converged charging device supporting multiple protocols according to claim 1, characterized in that, The wireless charging module also includes a status display circuit, an NTC thermal protection circuit, and a FOD dynamic detection circuit connected to the second main control chip.

10. The wired-wireless converged charging device supporting multiple protocols according to claim 9, characterized in that, The status display circuit includes a 25th resistor, a 26th resistor, a first light-emitting diode, and a second light-emitting diode. The 25th resistor and the first light-emitting diode are connected in series between the LED1 pin of the second main control chip and ground, and the 26th resistor and the second light-emitting diode are connected in series between the LED2 pin of the second main control chip and ground. The NTC thermal protection circuit includes a 28th resistor and a 28th capacitor connected in parallel between the NTC pin of the second main control chip and ground, wherein the 28th resistor is an NTC resistor; The FOD dynamic detection circuit includes a 27th resistor connected between the LOSS_THR pin of the second main control chip and ground, and a 27th capacitor connected between the VDET pin of the second main control chip and ground.

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