A wide voltage range BOOST full-bridge clamp DC-DC converter circuit
By using a wide-voltage-range BOOST full-bridge clamped DC-DC converter circuit, combined with a BUCK step-down circuit and a full-bridge clamping circuit, the problem of existing circuits being unable to handle both wide voltage and high current is solved, achieving efficient and stable power conversion and meeting the aging test requirements of diverse power supply products.
Patent Information
- Application Number
- CN202522412470.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-13
- Publication Date
- 2026-11-06
- Estimated Expiration
- 2035-11-13
AI Technical Summary
Existing conversion circuits cannot simultaneously accommodate wide voltage and high current characteristics, resulting in low power conversion efficiency and fire hazards, and cannot meet the aging test requirements of diverse power supply products.
A wide voltage range BOOST full-bridge clamp DC-DC converter circuit is adopted, which combines a BUCK step-down circuit, a full-bridge clamp circuit and a transformer. By alternating the conduction and turn-off of MOSFETs and diodes, the functions of BOOST boost, full-bridge output and active clamping are realized, reducing the voltage stress of switching elements and eliminating the need for high-energy-consuming rectifier diodes.
It achieves input adaptability over a wide voltage range, improves circuit efficiency and stability, reduces voltage stress on switching elements, and enhances the overall performance and safety of the circuit.
Smart Images

Figure CN224947467U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of conversion circuit technology, and in particular to a wide voltage range BOOST full-bridge clamp DC-DC conversion circuit. Background Technology
[0002] In the production of power supply products, to ensure product quality, power supply products must undergo long-term load aging tests in the later stages of production. This subjects the products to prolonged high-temperature, full-load conditions to simulate the customer's usage environment, causing defective products to fail prematurely and exposing problems in product design, manufacturing, and materials. Most factories use resistors as the load for the power supply. During aging tests, the resistors convert electrical energy into heat energy, which is then consumed. Aging tests waste electrical energy into heat, increasing power costs, raising ambient temperatures, and posing a fire hazard. With the increase in domestic production capacity, the electrical energy consumed in aging tests for various power supplies is increasing, becoming an unnecessary cost burden for many factories. Therefore, it is necessary to implement energy conversion and reuse technologies.
[0003] A relatively simple way to convert and utilize the output energy of power supply products is through energy feedback. This involves using an additional DC-DC (direct current to direct current) power module as a feedback load to convert the power supply's output energy into a fixed voltage. This voltage is then fed back into the grid via a DC-AC (direct current to alternating current) power module. Since DC-AC power supplies are non-isolated modules, the DC-DC power module must achieve input and output isolation. Due to the wide variety of power supply products, their extremely wide voltage range, and relatively large current range, the circuits commonly used for feedback loads are mainly BOOST, BUCK-BOOST, and SEPIC circuits. Since the maximum boost ratio of BOOST circuits is only about 10 times, they are mainly used for low-voltage, high-current applications. BUCK-BOOST and SEPIC circuits also have voltage boost / buck functions and are suitable for wide voltage range applications, but the switching elements in these circuits experience high voltage stress and cannot withstand large input currents. Currently, to simplify the driver circuit, the BUCK-BOOST and SEPIC circuits use a design where the BUCK-BOOST and SEPIC drivers and the subsequent isolated PUSH_PULL circuit share a common ground, thus making parallel connection impossible. Utility Model Content
[0004] To address the shortcomings of existing conversion circuits in the aforementioned technologies, which cannot simultaneously accommodate wide voltage and high current characteristics, this invention provides a wide voltage range BOOST full-bridge clamped DC-DC conversion circuit.
[0005] To achieve the above objectives, this utility model provides a wide voltage range BOOST full-bridge clamp DC-DC converter circuit, including a BUCK step-down circuit composed of a first inductor, a second inductor, a first diode, and a first MOSFET, a full-bridge clamp circuit, and a transformer. The first terminal formed by the parallel connection of the first inductor and the second inductor is coupled to a first input voltage VL, the source of the first MOSFET, the anode of the first diode, and the transformer. The second terminal corresponds to the output rectified voltage and is coupled to the full-bridge clamp circuit. The drain of the first MOSFET is coupled to a second input voltage VIN, and its gate is coupled to DR_S1. The cathode of the first diode is coupled to ground via the full-bridge clamp circuit.
[0006] As an improvement of this utility model, the full-bridge clamping circuit includes a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor. The drain of the second MOS transistor and the source of the fourth MOS transistor, and the drain of the third MOS transistor and the source of the fifth MOS transistor, are respectively coupled to the second terminal of the first inductor and the second terminal of the second inductor. The source of the second MOS transistor and the source of the third MOS transistor are coupled to ground, the cathode of the first diode, and the negative terminal of the first capacitor. The drain of the fourth MOS transistor and the drain of the fifth MOS transistor are jointly coupled to the positive terminal of the second capacitor, and the negative terminal of the second capacitor is grounded. The gates of the second MOS transistor, the third MOS transistor, the fourth MOS transistor, and the fifth MOS transistor are respectively connected to DR_s3, DR_s4, DR_s5, and DR_s6.
[0007] As an improvement of this utility model, the transformer includes a first winding T1A and a second winding T1B. The first winding T1A is coupled to a first terminal formed by the full-bridge clamping circuit, the first inductor, and the second inductor connected in parallel. The second winding T1B is coupled to a rectifier and filter circuit.
[0008] As an improvement of this utility model, the rectifier filter circuit includes a second diode, a third diode, a fourth diode, a fifth diode, and a third capacitor. The anode of the third diode and the cathode of the fifth diode are jointly coupled to the first end of the second winding T1B, and the anode of the second diode and the cathode of the fourth diode are jointly coupled to the second end of the second winding T1B. The cathodes of the second diode and the third diode, together with the positive terminal of the third capacitor, output voltage V_bus. The anodes of the fourth diode and the fifth diode, together with the negative terminal of the third capacitor, are jointly coupled to ground PGND.
[0009] As an improvement of this utility model, the first diode is a freewheeling diode.
[0010] As an improvement of this utility model, it also includes a filter capacitor, the positive terminal of which is coupled to the drain of the first MOS transistor and the input voltage VIN, and the negative terminal is coupled to ground to the cathode of the first diode and the full-bridge clamping circuit.
[0011] As an improvement of this utility model, the first capacitor is a filter capacitor.
[0012] The beneficial effects of this utility model are as follows: Compared with the prior art, this utility model provides a wide voltage range BOOST full-bridge clamped DC-DC converter circuit, including a BUCK step-down circuit composed of a first inductor, a second inductor, a first diode, and a first MOSFET, a full-bridge clamping circuit, and a transformer. The first terminal formed by the parallel connection of the first and second inductors is coupled to the first input voltage VL, the source of the first MOSFET, the anode of the first diode, and the transformer. The second terminal corresponds to the output rectified voltage and is coupled to the full-bridge clamping circuit. The drain of the first MOSFET is coupled to the input voltage VIN, and the gate is coupled to DR_S1. The first diode... The cathode and full-bridge clamping circuit are coupled to ground. This invention improves upon the BUCK-BOOST circuit by using a set of full-bridge circuits to simultaneously achieve BOOST and full-bridge output functions. It has three functions: BOOST boost, full-bridge output, and active clamping, achieving wide voltage range input adaptability and meeting the diverse needs of different power supply products during aging tests. The combination of BUCK step-down circuit and full-bridge clamping circuit not only effectively reduces the voltage stress on switching elements but also improves the overall efficiency and stability of the circuit. At the same time, the high-energy-consuming rectifier diodes are eliminated from the circuit, significantly improving the circuit efficiency. Attached Figure Description
[0013] Figure 1 This is the circuit schematic diagram of this utility model; Figure 2 This is a first timing diagram of the present invention; Figure 3 This is a schematic diagram of the T1 timing current path of the first timing sequence of this utility model; Figure 4 This is a schematic diagram of the T3 timing current path of the first timing sequence of this utility model; Figure 5 This is a schematic diagram of the T5 timing current path in the first timing sequence of this utility model; Figure 6 This is a schematic diagram of the T7 timing current path in the first timing sequence of this utility model; Figure 7 This is a second timing diagram of the present invention; Figure 8This is a schematic diagram of the T1 timing current path of the second timing sequence of this utility model; Figure 9 This is a schematic diagram of the T3 timing current path of the second timing sequence of this utility model; Figure 10 This is a schematic diagram of the T7 timing current path in the second timing sequence of this utility model; Figure 11 This is a third timing diagram of the present invention; Figure 12 This is a schematic diagram of the T1 timing current path of the third timing sequence of this utility model; Figure 13 This is a schematic diagram of the T2 timing current path of the third timing sequence of this utility model.
[0014] The symbols for the main components are explained below: L1, First inductor; L2, Second inductor; Q1, First MOSFET; Q3, Second MOSFET; Q4, Third MOSFET; Q5, Fourth MOSFET; Q6, Fifth MOSFET; T1A, First winding; T1B, Second winding; C1, First capacitor; C2, Second capacitor; C3, Third capacitor; D1, First diode; D2, Second diode; D3, Third diode; D4, Fourth diode; D5, Fifth diode; VL, First input voltage; VIN, Second input voltage; V_bus, Output voltage. Detailed Implementation
[0015] To more clearly illustrate this utility model, the following description, in conjunction with the accompanying drawings, will provide a further picture.
[0016] In the following description, specific examples are given to provide a more in-depth understanding of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of them. It should be understood that the specific embodiments described are only used to explain the present invention and are not intended to limit the present invention.
[0017] It should be understood that when the terms “comprising” and / or “including” are used in this specification, they indicate the presence of the said feature, integral, step, operation, element, or component, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, or combinations thereof.
[0018] Please see the appendix Figure 1 - Appendix Figure 13This utility model discloses a wide voltage range BOOST full-bridge clamped DC-DC converter circuit, comprising a BUCK step-down circuit composed of a first inductor L1, a second inductor L2, a first diode D1, and a first MOSFET Q1, a full-bridge clamping circuit, and a transformer. The first terminal formed by the parallel connection of the first inductor L1 and the second inductor L2 is coupled to the first input voltage VL, the source of the first MOSFET Q1, the anode of the first diode D1, and the transformer. The second terminal corresponds to the output rectified voltage and is coupled to the full-bridge clamping circuit. The drain of the first MOSFET Q1 is coupled to the second input voltage VIN, and its gate is coupled to DR_S1. The cathode of the first diode D1 is coupled to ground via the full-bridge clamping circuit. In the above scheme, the first MOSFET Q1, the first diode D1, the first inductor L1, and the second inductor L2 constitute the BUCK buck main power circuit. When the second input voltage VIN is higher than the highest voltage of the subsequent BOOST full-bridge circuit, the BUCK circuit is responsible for bucking the voltage. The first inductor L1 and the second inductor L2 are buck-boost power inductors, mainly for energy storage. The first MOSFET Q1 is the buck switching MOSFET of the BUCK buck circuit, which controls the current switching of the first inductor L1 and the second inductor L2, thereby realizing the buck function. The first inductor L1 and the second inductor L2 output rectified voltage to the full-bridge clamping circuit and the transformer. The function of the full-bridge clamping circuit is to clamp the peak voltage generated by the leakage inductance of the transformer within a safe range, protect the components in the circuit from overvoltage damage, and at the same time realize efficient energy transfer.
[0019] In this embodiment, the full-bridge clamping circuit includes a second MOSFET, a third MOSFET, a fourth MOSFET, and a fifth MOSFET. The drain of the second MOSFET is coupled to the source of the fourth MOSFET, and the drain of the third MOSFET is coupled to the source of the fifth MOSFET, respectively, at the second terminals of the first inductor and the second terminals of the second inductor. The sources of the second and third MOSFETs are coupled to ground, along with the cathode of the first diode and the cathode of the first capacitor. The drains of the fourth and fifth MOSFETs are coupled to the positive terminal of the second capacitor, and the negative terminal of the second capacitor is grounded. The gates of the second, third, fourth, and fifth MOSFETs are connected to DR_s3, DR_s4, DR_s5, and DR_s6, respectively. In actual operation, when drive signals DR_s3, DR_s4, DR_s5, and DR_s6 are applied to the second MOSFET Q... 3. When the gates of the third MOSFET Q4, fourth MOSFET Q5, and fifth MOSFET Q6 are turned on, these MOSFETs will turn on and off according to a specific timing sequence, thereby clamping the voltage spikes in the transformer leakage inductance. Specifically, for example, at one moment, the second MOSFET Q3 and the fifth MOSFET Q6 are turned on, while the third MOSFET Q4 and the fourth MOSFET Q5 are turned off. At this time, the energy generated by the transformer leakage inductance will be transferred through the path formed by the second MOSFET Q3 and the fifth MOSFET Q6, and the voltage spike will be limited to a safe range. At another moment, the third MOSFET Q4 and the fourth MOSFET Q5 are turned on, while the second MOSFET Q3 and the fifth MOSFET Q6 are turned off, realizing the reverse transfer of energy and the clamping of the voltage spike. By alternately turning the MOSFETs on and off, the circuit can operate stably under various conditions and effectively protect the components in the circuit from overvoltage damage.
[0020] In this embodiment, the transformer includes a first winding T1A and a second winding T1B. The first winding T1A is coupled to a first terminal formed by the parallel connection of the full-bridge clamping circuit, the first inductor L1, and the second inductor L2. The second winding T1B is coupled to the rectifier and filter circuit. The first winding T1A mainly undertakes the task of energy transmission, and the energy transmitted from the BUCK step-down circuit and the full-bridge clamping circuit is further coupled to the second winding T1B. The second winding T1B is connected to the rectifier and filter circuit and is responsible for converting the AC voltage output by the transformer into DC voltage to meet different voltage conversion requirements, thereby satisfying application scenarios with a wide voltage range and ensuring the efficient operation and stability of the circuit.
[0021] In this embodiment, the rectifier-filter circuit includes a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, and a third capacitor C3. The anode of the third diode D3 and the cathode of the fifth diode D5 are jointly coupled to the first end of the second winding T1B, and the anode of the second diode D2 and the cathode of the fourth diode D4 are jointly coupled to the second end of the second winding T1B. The cathodes of the second diode D2 and the third diode D3, together with the positive terminal of the third capacitor C3, output voltage V_bus. The anodes of the fourth diode D4 and the fifth diode D5, together with the negative terminal of the third capacitor C3, are jointly coupled to ground PGND. In practical applications, the rectifier-filter circuit operates as follows: when the AC voltage output by the second winding T1B is in the positive half-cycle, the second diode D2 and... When the third diode D3 is turned on, current flows sequentially through the second diode D2, the third capacitor C3, and the third diode D3 again, charging the third capacitor C3. During this time, the voltage across the third capacitor C3 gradually increases, and the output voltage V_bus also increases accordingly. When the AC voltage output from the second winding T1B is in the negative half-cycle, the fourth diode D4 and the fifth diode D5 are turned on, and current flows sequentially through the fourth diode D4, the third capacitor C3, and the fifth diode D5 again, charging the third capacitor C3. This allows the third capacitor C3 to continuously store energy and maintain the stability of the output voltage V_bus. Through full-wave rectification, the rectifier and filter circuit efficiently converts the AC voltage output from the transformer into a relatively stable DC voltage, providing reliable power support for subsequent circuits.
[0022] In this embodiment, the first diode D1 is a freewheeling diode. Its function is to provide a freewheeling path for the inductor current when the first MOSFET Q1 is turned off, so as to prevent the inductor current from suddenly generating excessively high voltage spikes, thereby protecting other components in the circuit.
[0023] In this embodiment, a first capacitor C1 is also included. The positive terminal of the first capacitor C1 is coupled to the drain of the first MOSFET Q1 and the input voltage VIN, and the negative terminal is coupled to the cathode of the first diode D1 and the full-bridge clamping circuit to ground. The first capacitor C1 is a filter capacitor. The first capacitor C1 is a filter capacitor for the input voltage VIN. The first capacitor C1 can effectively filter out the ripple in the input voltage, making the input voltage more stable, providing a stable DC power supply for the entire circuit, and further improving the performance and reliability of the circuit.
[0024] To further illustrate the scheme of this application, the timing waveforms of the first MOSFET Q1 and the second MOSFET Q2 are described below: In this embodiment, the first MOSFET Q1, the first diode D1, the first inductor L1, and the second inductor L2 constitute the BUCK step-down main power circuit. When the input VIN voltage is higher than the highest voltage of the subsequent BOOST full-bridge circuit, the BUCK circuit is responsible for stepping down the voltage. The first inductor L1, the second inductor L2, the second MOSFET Q3, the third MOSFET Q4, the fourth MOSFET Q5, the fifth MOSFET Q6, and T1 constitute the BOOST full-bridge clamping circuit. The first inductor L1, the second inductor L2, the second MOSFET Q3, and the third MOSFET Q4 constitute the BOOST circuit. The second MOSFET Q3, the third MOSFET Q4, the fourth MOSFET Q5, the fifth MOSFET Q6, and T1 constitute the full-bridge circuit and the clamping circuit. The first capacitor C1 is the filter capacitor for the input voltage VIN; the first MOSFET Q1 is a buck switching MOSFET, and the first diode D1 is a buck freewheeling diode; the first inductor L1 and the second inductor L2 are buck-boost power inductors, mainly for energy storage; the second MOSFET Q3 and the third MOSFET Q4 are mainly responsible for the BOOST boost and the switching function of the lower arm of the full bridge; the fourth MOSFET Q5 and the fifth MOSFET Q6 are mainly responsible for the upper arm of the full bridge and voltage clamping function; the second capacitor C2 is the BOOST boost rectifier capacitor and clamping capacitor; the transformer T1 realizes input-output isolation and voltage conversion; the second diode D2, the third diode D3, the fourth diode D4, the fifth diode D5, and the third capacitor C3 form the output rectifier and filter circuit. In the circuit, VIN represents the input voltage; GND represents the input ground; VL represents the input voltage of the first inductor L1 and the second inductor L2; DR_s1, DR_s3, DR_s4, DR_s5, and DR_s6 represent the drive signals of the first MOSFET Q1, the second MOSFET Q3, the third MOSFET Q4, the fourth MOSFET Q5, and the fifth MOSFET Q6, respectively; V_bus and PGND represent the output voltage bus and the output ground. In the circuit, the second winding T1B of the transformer is the primary side (NP), and the first winding T1A of the transformer is the secondary side (NS). The transformer turns ratio is: N = NP / NS.
[0025] Circuit operation principle: DR_s1 is the BUCK drive PWM, and its duty cycle is adjustable within the range of 0%-100%. DR_s3, DR_s4 and DR_s5, DR_s6 respectively form the drive PWM signals for the two bridge arms of the full bridge, with the two sets of drive signals 180 degrees out of phase. The drive waveforms of DR_s3 and DR_s4, and DR_s5 and DR_s6 are complementary, and a dead time of 600ns is retained. The duty cycle D of DR_s3 and DR_s5 can be achieved in the range of 5%-97%. When the input voltage VIN is higher than V_bus / N*(1-D), the BUCK circuit starts to work, switching from full conduction to switching state, and the duty cycle begins to decrease from 100% to prevent the voltage of the inductor input VL from rising. The BOOST full bridge clamping section has two operating states: DR_s3 and DR_s5 duty cycles less than or equal to 50% and greater than 50%.
[0026] When the input voltage VIN is higher than V_bus / N*0.5 but lower than V_bus / N, the first MOSFET Q1 is fully turned on, and the duty cycles of DR_s3 and DR_s5 are less than 50%. At this time, the BOOST full-bridge clamp is in the BOOST full-bridge operating state. The second MOSFET Q3 and the fifth MOSFET Q6 are turned on. The power supply VIN current flows through the first MOSFET Q1, the first inductor L1, and the second MOSFET Q3 to ground. The power supply stores energy in the first inductor L1. The energy stored in the second capacitor C2 flows through the fifth MOSFET Q6, the first winding T1A, and the second MOSFET Q3 to ground, providing current to the transformer winding and enabling the transformer primary output voltage. When the second MOSFET Q3 and the fifth MOSFET Q6 are off, and the third MOSFET Q4 and the fourth MOSFET Q5 are on, the first inductor L1 generates a back electromotive force due to the second MOSFET Q3 being off. This back electromotive force is then used to charge the second capacitor C2 through the fourth MOSFET Q5. At this time, the fourth MOSFET Q5 is in synchronous rectification mode. When the third MOSFET Q4 is on, the power supply VIN flows to ground through the first MOSFET Q1, the second inductor L2, and the third MOSFET Q4, storing energy in the second inductor L2. Simultaneously, after the first inductor L1 has finished charging the second capacitor C2, the current flows through the fourth MOSFET Q5, the first winding T1A, and the third MOSFET Q4 to ground, providing current to the transformer winding and enabling the transformer primary output voltage.
[0027] When the input voltage VIN is higher than V_bus / N, the second MOSFET Q3 and the fifth MOSFET Q6 operate at their minimum duty cycle. At this time, the duty cycle of the first MOSFET Q1 will be less than 100%, and its duty cycle is adjusted according to the input parameters. When the first MOSFET Q1 is turned on, the input voltage VIN current flows through the first MOSFET Q1, the first inductor L1 or the second inductor L2, T1, the second MOSFET Q3 or the third MOSFET Q4 to the power supply GND ground line. The current also stores energy in the inductor after flowing through the first inductor L1 or the second inductor L2. When the first MOSFET Q1 is turned off, the energy stored in the inductor flows through T1, the second MOSFET Q3 or the third MOSFET Q4, and the first diode D1 to the other end of the inductor, achieving a freewheeling effect.
[0028] When the input voltage VIN is lower than V_bus / N*0.5, the first MOSFET Q1 has a 100% duty cycle and is fully turned on. The duty cycles of the second MOSFET Q3 and the fourth MOSFET Q5 will be greater than 50%. At this time, the BOOST full-bridge clamp is in BOOST clamping mode. First, the second MOSFET Q3 turns on, and the input voltage VIN current flows through the first MOSFET Q1, the first inductor L1, and the second MOSFET Q3 to the input GND, where the power supply stores energy in the first inductor L1. Then, the fifth MOSFET Q6 turns on, clamping the voltage absorbed on the second capacitor C2 within the V_bus / N voltage range through the fifth MOSFET Q6, T1, and the second MOSFET Q3. After the fifth MOSFET Q6 turns off, since the duty cycle is greater than 50%, before the second MOSFET Q3 turns off, the third MOSFET Q4 begins to turn on. The input voltage VIN current flows through the first MOSFET Q1, the second inductor L2, and the third MOSFET Q4 to the input GND, where the power supply stores energy in the second inductor L2. At this time, the second MOSFET Q3 is off, and the fourth MOSFET Q5 is on. The energy stored in the first inductor L1 returns to GND via the inductor back electromotive force current through T1 and the third MOSFET Q4, resulting in the transformer output voltage. Simultaneously, the peak current generated by the transformer leakage inductance charges the second capacitor C2 through the fourth MOSFET Q5. After the fourth MOSFET Q5 has finished charging the second capacitor C2, since the fourth MOSFET Q5 and the third MOSFET Q4 are still on, the voltage of the second capacitor C2 is clamped within the V_bus / N voltage range through the fourth MOSFET Q5, T1, and the third MOSFET Q4.
[0029] In the circuit, the first capacitor C1, the first MOSFET Q1, the first diode D1, the first inductor L1, and the second inductor L2 constitute a buck circuit to improve the input voltage capability VIN. The first capacitor C1 serves as the input filter capacitor, the first MOSFET Q1 as the buck switch, the first diode D1 as the buck freewheeling diode, and the first inductors L1 and L2 as buck energy storage inductors. The first inductor L1, the second inductor L2, the second MOSFET Q3, the third MOSFET Q4, the fourth MOSFET Q5, the fifth MOSFET Q6, the second capacitor C2, and T1 constitute a boost full-bridge clamping circuit. The first inductors L1 and L2 are boost energy storage inductors, the second MOSFETs Q3 and Q4 are boost switches and also lower arm switches of the full-bridge, the fourth MOSFET Q5 and Q6 are upper arm switches and clamping switches of the full-bridge, and the second capacitor C2 is either a filter capacitor or a clamping capacitor. T1, the second diode D2, the third diode D3, the fourth diode D4, the fifth diode D5, and the third capacitor C3 form a full-bridge filter circuit.
[0030] To further illustrate the scheme of this application, the following section, combining the timing waveforms of the first MOSFET Q1 to the fifth MOSFET Q6, extracts eight timing sequences from t1 to t8 in conjunction with the appendix. Figure 2 - Appendix Figure 13 Please explain: Example 1, please refer to the appendix. Figure 2 - Appendix Figure 6 Operating mode with a duty cycle of less than or equal to 50%: At time t1, the first MOSFET Q1 remains constantly on. The input power supply VIN current flows through the first MOSFET Q1, the first inductor L1, and the second MOSFET Q3 before returning to the negative terminal GND of the input voltage VIN. At this time, the VIN current stores energy in the first inductor L1, and the induced electromotive force in the first inductor L1 is positive on the left and negative on the right. Simultaneously, the voltage stored in the second capacitor C2 flows through the fifth MOSFET Q6, the first winding T1A, and the second MOSFET Q3 to GND, forming a current. The second winding T1B of the transformer primary generates an induced voltage that is positive at the bottom and negative at the top. This voltage is rectified and filtered by the third diode D3, the third capacitor C3, and the fourth diode D4 before outputting DC V_bus.
[0031] The timing sequence t2 represents the dead time of the bridge arm of the second MOSFET Q3 and the fourth MOSFET Q5.
[0032] At time t3, the second MOSFET Q3 is turned off and the fourth MOSFET Q5 is turned on. The energy storage current of the first inductor L1 is interrupted, and the inductor generates a back electromotive force with the left side negative and the right side positive. Its current flows through the fourth MOSFET Q5 and the second capacitor C2 back to the negative terminal of the input power supply GND, and then through the first MOSFET Q1 back to the negative terminal of the first inductor L1, thus charging the second capacitor C2.
[0033] t4 timing, which is the dead time of the bridge arm of the third MOSFET Q4 and the fifth MOSFET Q6.
[0034] At time t5, the third MOSFET Q4 is turned on. The input power supply VIN current flows through the first MOSFET Q1, the second inductor L2, and the third MOSFET Q4 back to the negative terminal GND of the input voltage VIN. At this time, the VIN current stores energy in the second inductor L2, and the induced electromotive force in the second inductor L2 is positive on the left and negative on the right. Simultaneously, the voltage stored in the second capacitor C2 flows through the fourth MOSFET Q5, the first winding T1A, and the third MOSFET Q4 to GND to form a current. The second winding T1B of the transformer primary generates an induced voltage that is negative at the bottom and positive at the top. After rectification and filtering by the second diode D2, the third capacitor C3, and the fifth diode D5, the DC output V_bus is generated.
[0035] The t6 timing sequence refers to the dead time of the bridge arm of the third MOSFET Q4 and the fifth MOSFET Q6.
[0036] At time t7, the third MOSFET Q4 is turned off and the fifth MOSFET Q6 is turned on. The energy storage current of the second inductor L2 is interrupted, and the inductor generates a back electromotive force with the left side negative and the right side positive. Its current flows through the fifth MOSFET Q6 and the second capacitor C2 back to the negative terminal of the input power supply GND, and then through the first MOSFET Q1 back to the negative terminal of the first inductor L1, thus charging the second capacitor C2.
[0037] The t8 timing sequence represents the dead time of the bridge arm for the second MOSFET Q3 and the fourth MOSFET Q5. This completes the timing sequence for operations with a duty cycle of 50% or less.
[0038] Example 2, please refer to the appendix. Figure 7 - Appendix Figure 10 Operating mode with a duty cycle greater than 50%: At time t1, the first MOSFET Q1 remains on, while the second MOSFET Q3 and the third MOSFET Q4 are on. The input power supply VIN current flows through the first MOSFET Q1, the first inductor L1, the second MOSFET Q3, the second inductor L2, and the third MOSFET Q4 back to the negative terminal GND of the input voltage VIN. At this time, the VIN current stores energy in the first inductor L1 and the second inductor L2. The induced electromotive force of the first inductor L1 and the second inductor L2 is positive on the left and negative on the right.
[0039] The t2 timing sequence is the dead time of the bridge arm of the third MOSFET Q4 and the fifth MOSFET Q6.
[0040] At time t3, the second MOSFET Q3 remains on, the third MOSFET Q4 is off, and the fifth MOSFET Q6 is on. Due to the sudden interruption of the current in the second inductor L2, its electromotive force becomes negative on the left and positive on the right. The current flows from the right end of the second inductor L2 through T1A, the second MOSFET Q3, the input power supply, and the first MOSFET Q1 back to the left end, providing energy to the transformer output. Because transformer T1 has leakage inductance, at the instant the third MOSFET Q4 is turned off, the voltage spike generated by the leakage inductance will charge the second capacitor C2 through the fifth MOSFET Q6. Since the voltage spike generated by the leakage inductance is very short, it will also discharge the second capacitor C2 later in the conduction phase of the fifth MOSFET Q6. The voltage accumulated on the second capacitor C2 forms a current loop through the fifth MOSFET Q6, the first winding T1A, and the second MOSFET Q3. The transformer's second winding T1B generates an induced voltage that is positive at the bottom and negative at the top. This voltage is rectified and filtered by the third diode D3, the third capacitor C3, and the fourth diode D4 before outputting DC V_bus. In this operating mode, the transformer output energy mainly comes from the energy stored in the second inductor L2 when the third MOSFET Q4 is turned off, and the energy continuously transmitted radially from the first inductor L1 through the conduction path of the second MOSFET Q3 to the primary of the transformer. The second capacitor C2 is mainly used to absorb the peak voltage generated by the leakage inductance of the transformer. Therefore, the fourth MOSFET Q5, the fifth MOSFET Q6, and the second capacitor C2 play a clamping role in this mode.
[0041] t4 timing, which is the dead time of the bridge arm of the third MOSFET Q4 and the fifth MOSFET Q6.
[0042] At time t5, the second MOSFET Q3 remains on, the fifth MOSFET Q6 is off, and the third MOSFET Q4 is on, with the current path being the same as at time t1.
[0043] The t6 timing sequence represents the dead time of the bridge arm of the second MOSFET Q3 and the fourth MOSFET Q5.
[0044] At time t7, the third MOSFET Q4 remains on, the second MOSFET Q3 is off, and the fourth MOSFET Q5 is on. Due to the sudden interruption of the current in the first inductor L1, its electromotive force becomes negative on the left and positive on the right. The current flows from the right end of the first inductor L1 through T1A, the third MOSFET Q4, the input power supply VIN, and the first MOSFET Q1 back to the left end, providing energy to the transformer output. Because transformer T1 has leakage inductance, at the moment the second MOSFET Q3 is turned off, the voltage spike generated by the leakage inductance will charge the second capacitor C2 through the fourth MOSFET Q5. Since the peak time of the leakage inductance is very short, it will also discharge the second capacitor C2 later in the conduction phase of the fourth MOSFET Q5. The voltage accumulated on the second capacitor C2 forms a current loop through the fourth MOSFET Q5, the first winding T1A, and the third MOSFET Q4. The transformer's second winding T1B generates an induced voltage that is negative at the bottom and positive at the top. This voltage is rectified and filtered by the second diode D2, the third capacitor C3, and the fifth diode D5 before outputting DC V_bus.
[0045] Timing t8 represents the dead time of the bridge arm for the second MOSFET Q3 and the fourth MOSFET Q5. This completes the timing sequence for operation with a duty cycle greater than 50%.
[0046] Example 3, please refer to the appendix. Figure 11 - Appendix Figure 13 BUCK working sequence: At time t1, the first MOSFET Q1 is turned on, and the input power supply VIN current flows through Q1, the first inductor L1, the second inductor L2, the second MOSFET Q3, and the third MOSFET Q4 back to the input power supply ground GND. At this time, the first inductors L1 and L2 begin to store energy and generate an electromotive force with positive on the left and negative on the right.
[0047] At time t2, the first MOSFET Q1 is turned off, and the current in the first inductor L1 and the second inductor L2 is suddenly interrupted. The induced electromotive force becomes negative on the left and positive on the right. The induced electromotive force current flows from the right end of the first inductor L1 and the second inductor L2 through the second MOSFET Q3, the third MOSFET Q4, and the first diode D1 back to the left end of the inductor. At this time, the diode D1 plays the role of freewheeling.
[0048] The advantages of this utility model are: This invention improves upon the BUCK-BOOST circuit by employing a full-bridge circuit to simultaneously achieve BOOST and full-bridge output functions. It features BOOST boost, full-bridge output, and active clamping, enabling wide voltage range input adaptability and meeting the diverse needs of various power supply products during aging tests. The combination of a BUCK step-down circuit and a full-bridge clamping circuit effectively reduces voltage stress on switching components and improves overall circuit efficiency and stability. Furthermore, the elimination of high-energy-consuming rectifier diodes significantly enhances circuit efficiency.
[0049] The above-disclosed embodiments are only a few specific examples of this utility model. However, this utility model is not limited thereto. Any variations that can be conceived by those skilled in the art should fall within the protection scope of this utility model.
Claims
1. A wide voltage range BOOST full-bridge clamped DC-DC conversion circuit, characterized by, The circuit includes a buck converter circuit consisting of a first inductor, a second inductor, a first diode, and a first MOSFET, a full-bridge clamping circuit, and a transformer. The first terminal formed by the parallel connection of the first and second inductors is coupled to a first input voltage VL, the source of the first MOSFET, the anode of the first diode, and the transformer. The second terminals of the first and second inductors are coupled to the full-bridge clamping circuit, corresponding to the output rectified voltage. The drain of the first MOSFET is coupled to a second input voltage VIN, and its gate is coupled to DR_S1. The cathode of the first diode is coupled to ground via the full-bridge clamping circuit.
2. The wide voltage range BOOST full-bridge clamped DC-DC converter circuit according to claim 1, characterized in that, The full-bridge clamping circuit includes a second MOSFET, a third MOSFET, a fourth MOSFET, and a fifth MOSFET. The drain of the second MOSFET and the source of the fourth MOSFET, and the drain of the third MOSFET and the source of the fifth MOSFET, are respectively coupled to the second terminal of the first inductor and the second terminal of the second inductor. The source of the second MOSFET and the source of the third MOSFET are coupled to ground, the cathode of the first diode, and the cathode of the first capacitor. The drain of the fourth MOSFET and the drain of the fifth MOSFET are jointly coupled to the positive terminal of the second capacitor, and the negative terminal of the second capacitor is grounded. The gates of the second MOSFET, the third MOSFET, the fourth MOSFET, and the fifth MOSFET are respectively connected to DR_s3, DR_s4, DR_s5, and DR_s6.
3. The wide voltage range BOOST full-bridge clamped DC-DC converter circuit according to claim 1, characterized in that, The transformer includes a first winding T1A and a second winding T1B. The first winding T1A is coupled to a first terminal formed by the full-bridge clamping circuit, the first inductor, and the second inductor connected in parallel. The second winding T1B is coupled to a rectifier and filter circuit.
4. The wide voltage range BOOST full-bridge clamped DC-DC converter circuit according to claim 3, characterized in that, The rectifier and filter circuit includes a second diode, a third diode, a fourth diode, a fifth diode, and a third capacitor. The anode of the third diode and the cathode of the fifth diode are coupled to the first end of the second winding T1B, and the anode of the second diode and the cathode of the fourth diode are coupled to the second end of the second winding T1B. The cathodes of the second diode and the third diode, together with the positive terminal of the third capacitor, output a voltage V_bus. The anodes of the fourth diode and the fifth diode, together with the negative terminal of the third capacitor, are coupled to ground PGND.
5. The wide voltage range BOOST full-bridge clamped DC-DC converter circuit according to claim 1, characterized in that, The first diode is a freewheeling diode.
6. The wide voltage range BOOST full-bridge clamped DC-DC converter circuit according to claim 1, characterized in that, It also includes a first capacitor, the positive terminal of which is coupled to the drain of the first MOS transistor and the input voltage VIN, and the negative terminal is coupled to ground to the cathode of the first diode and the full-bridge clamping circuit.
7. The wide voltage range BOOST full-bridge clamped DC-DC converter circuit according to claim 6, characterized in that, The first capacitor is a filter capacitor.
