A complementary PWM signal generator

Abstract

This utility model relates to the field of power electronics technology, specifically to a complementary PWM signal generator. Through a clock signal generator composed of a 555 timer chip, a frequency divider and shaping circuit composed of a 74LS74, an integrator circuit composed of an AD8044 operational amplifier, and an inverting amplifier circuit, it achieves the generation of two time-complementary PWM signals, ensuring the continuity of the current on the grid input side and reducing interference to the grid. The two-channel triangular-to-square wave conversion and duty cycle control circuit composed of an AD8044, in conjunction with a voltage comparison switch, can independently or synchronously control the duty cycle of the two PWM signals, realizing the output of two PWM wave signals with different duty cycles. This allows for flexible control of the main circuit outputting different voltage levels or parallel output of the two power supplies, meeting the application requirements of complex power electronic conversion devices.

Description

Technical Field

[0001] This utility model relates to the field of power electronics technology, and in particular to a complementary PWM signal generator. Background Technology

[0002] In DC chopper technology, PWM (Pulse Width Modulation) switching pulses play a crucial role, and the performance of the chopper circuit is largely determined by the PWM switching pulses. Existing PWM signal generators can produce pulse signals with specific frequencies and duty cycles, providing basic control signals for various power electronic conversion devices, enabling these devices to achieve basic voltage regulation and power conversion functions. In switching power supplies, by adjusting the duty cycle of the PWM signal, the output voltage can be controlled relatively stably to meet the power requirements of different electronic devices. In passive inverter circuits, PWM signals can help realize the function of converting DC to AC, powering numerous AC loads.

[0003] However, most existing PWM signal generators can only generate a single PWM signal, or the multiple PWM signals they generate cannot achieve precise time complementarity. In some application scenarios where the continuity of the grid input current is critical, a single PWM signal cannot meet the circuit's requirement for continuous operation of the input current, leading to discontinuous grid input current and increased interference to the grid. Furthermore, existing multi-channel PWM signal generators are difficult to flexibly control the duty cycle of two signals, and cannot simultaneously achieve the same or different duty cycles for two signals. Consequently, they cannot effectively control the main circuit to output different voltage levels or flexibly connect two power supplies in parallel, limiting their application in some complex power electronic conversion devices. Utility Model Content

[0004] The purpose of this invention is to provide a complementary PWM signal generator, which aims to solve the problems of existing PWM signal generators, most of which can only generate a single PWM signal, or the generated multiple PWM signals cannot achieve precise complementarity in time. In some application scenarios with high requirements for the continuity of the grid input current, a single PWM signal cannot meet the circuit's requirement for continuous operation of the input current, which will lead to discontinuous grid input current and increase interference to the grid. Furthermore, existing multi-channel PWM signal generators are difficult to flexibly control the duty cycle of the two signals, and cannot simultaneously achieve the same or different duty cycles of the two signals. Therefore, they cannot effectively control the output voltage of the main circuit at different levels or flexibly connect the two power supplies in parallel, which limits their application in some complex power electronic conversion devices.

[0005] To achieve the above objectives, this utility model employs a complementary PWM signal generator, comprising a clock signal generator, a frequency divider and shaping circuit, an integrator circuit, an inverting amplifier circuit, a two-channel triangular wave-to-square wave conversion and duty cycle control circuit, a first optocoupler drive / output circuit, and a second optocoupler drive / output circuit. The clock signal generator consists of a time base chip U1, resistors R1, R2, and RV1, a filter capacitor C1, and a filter capacitor C2. Pins 1 and 2 of the time base chip U1 are connected to the two ends of the filter capacitor C1, and pin 6 of the time base chip U1 is connected to one end of resistor R2. Resistor R2 is connected to one end of resistor RV1. Pin 4 of the time base chip U1 is connected to one end of resistor R1. Pin 7 of the time base chip U1 is connected to the other end of resistor R1 and the other end of resistor RV1. Pin 3 of the time base chip U1 is connected to pin 3 of the frequency divider and shaping circuit. Pin 5 of the frequency divider and shaping circuit is connected to the integrator circuit. The integrator circuit is connected to the two-channel triangular wave-to-square wave conversion and duty cycle control circuit and the phase inverting amplifier circuit. The two-channel triangular wave-to-square wave conversion and duty cycle control circuit is connected to the first optocoupler drive / output circuit. Both the two-channel triangular wave-to-square wave conversion and duty cycle control circuit and the phase inverting amplifier circuit are also connected to the second optocoupler drive / output circuit.

[0006] The integrating circuit consists of voltage U2:A, filter capacitor C3, resistors R3, R4, R5, R6, R15, and RV2. Pin 3 of voltage U2:A is connected to resistor RV2. Pin 4 of voltage U2:A is connected to one end of resistor R4. Resistor R4 is connected to one end of resistor RV2. Resistor RV2 is connected to one end of resistor R3. Resistor R3 is connected to pin 11 of voltage U2:A and the two-channel triangular wave-to-square wave conversion and duty cycle control circuit. Pin 2 of voltage U2:A is connected to one end of resistor R5, filter capacitor C3, and resistor R6. Resistor R5 is connected to pin 5 of the frequency division and shaping circuit. Pin 1 of voltage U2:A is connected to the other end of filter capacitor C3 and resistor R6. The two-channel triangular wave-to-square wave conversion and duty cycle control circuit and the phase inverting amplifier circuit are connected to pin 1 of voltage U2:A.

[0007] The phase inverter amplifier circuit consists of voltage U2:D, resistors R7, R8, R9, R10, R20, and RV4. Pin 12 of voltage U2:D is connected to one end of resistor R8. Resistor R8 is connected to one end of resistors R7 and RV4. Resistor R8 is connected to pin 11 of voltage U2:D. Pin 13 of voltage U2:D is connected to one end of resistors R9 and R10. Pin 14 of voltage U2:D is connected to the other end of resistors R9 and R10. Resistor R10 is connected to the two-channel triangular wave-to-square wave conversion and duty cycle control circuit and pin 1 of voltage U2:A. The two-channel triangular wave-to-square wave conversion and duty cycle control circuit is also connected to pin 14 of voltage U2:D.

[0008] The two-channel triangular-to-square-wave conversion and duty cycle control circuit includes a first voltage comparator and a second voltage comparator. The first voltage comparator consists of voltage U2:B, resistors R11, R12, R13, R14, and RV3. The second voltage comparator consists of voltage U2:C, resistors R16, R17, R18, R19, and RV5. Pin 5 of voltage U2:B is connected to one end of resistor R14. Resistor R14 is connected to resistor R15, pin 1 of voltage U2:A, and resistor R10. Pin 6 of voltage U2:B is connected to resistor R14. Resistor R14 is connected to resistor RV5. Resistors RV3, R16, and R17 are connected. Resistor RV3 is connected to resistors R11 and R12. Resistors R11 and R16 are both connected to resistor R3 and pin 11 of voltage U2:A. Pins 11 and 7 of voltage U2:B are both connected to the first optocoupler drive / output circuit. A comparison voltage switching switch is connected between resistors RV5, R14, and R19. Pin 10 of voltage U2:C is connected to resistor R18. Resistor R18 is connected to pin 14 of voltage U2:D. Pin 9 of voltage U2:C is connected to resistor R19. Pins 11 and 6 of voltage U2:C are both connected to the second optocoupler drive / output circuit.

[0009] The first optocoupler drive / output circuit includes a first optocoupler drive circuit and a first optocoupler output circuit. The first optocoupler drive circuit consists of an emitter follower composed of a resistor R21 and a transistor Q1. The first optocoupler output circuit consists of a voltage U4, resistors R22, R23, and R24, and a power supply E1. The transistor Q1 is connected to one end of the resistor R21 and pin 11 of the voltage U2:B. The resistor R21 is connected to pin 7 of the voltage U2:B. The transistor Q1 is connected to pin 1 of the voltage U4. Pin 2 of the voltage U4 is connected to the resistors R24 and R23 and the power supply E1. The resistor R24 ​​is connected to pin 4 of the voltage U4. The resistor R23 is connected to the resistor R22 and pin 6 of the voltage U4. The resistor R22 is connected to pin 5 of the voltage U4 and the power supply E1.

[0010] The second optocoupler drive / output circuit includes a second optocoupler drive circuit and a second optocoupler output circuit. The second optocoupler drive circuit consists of an emitter follower composed of a resistor R25 and a transistor Q2. The second optocoupler output circuit consists of a voltage U6, resistors R26, R27, and R28, and a power supply E2. The transistor Q2 is connected to one end of the resistor R25. The resistor R25 is connected to pin 8 of the voltage U2:C. The transistor Q2 is connected to pin 11 of the voltage U2:C. The transistor Q2 is connected to pin 1 of the voltage U6. Pin 2 of the transistor Q2 is connected to resistors R28 and R27 and the power supply E2. Resistor R28 is connected to pin 4 of the voltage U6. Resistor R27 is connected to resistor R26 and pin 6 of the voltage U6. Resistor R26 is connected to pin 5 of the voltage U6 and the power supply E2.

[0011] The frequency division and shaping circuit is implemented by voltage U3:A, and the comparison voltage switching switch is composed of switch SW1.

[0012] This invention discloses a complementary PWM signal generator. Addressing the problem that most existing PWM signal generators can only produce a single PWM signal, or that the generated multiple PWM signals cannot achieve precise time complementarity, this invention utilizes a clock signal generator composed of a 555 timer chip, a frequency divider and shaping circuit composed of a 74LS74, an integrator circuit composed of an AD8044 operational amplifier, and an inverting amplifier circuit to generate two time-complementary PWM signals. This ensures the continuity of the current on the grid input side and reduces interference to the grid. Furthermore, addressing the difficulty of flexibly controlling the duty cycle of two signals in existing multi-channel PWM signal generators, the invention employs a two-channel triangular-to-square wave conversion and duty cycle control circuit composed of an AD8044, in conjunction with a voltage comparison switch. This circuit can independently or synchronously control the duty cycle of the two PWM signals, achieving the output of two PWM wave signals with different duty cycles. This allows for flexible control of the main circuit outputting different voltage levels or parallel connection of two power supplies, meeting the application requirements of complex power electronic conversion devices. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of the complementary PWM signal generator of this utility model.

[0015] Figure 2 This is a circuit diagram of the complementary PWM signal generator of this utility model.

[0016] 1- Clock signal generator, 2- Frequency divider and shaping circuit, 3- Integrator circuit, 4- Inverter amplifier circuit, 5- First voltage comparator, 6- Second voltage comparator, 7- Comparison voltage switching switch, 8- First optocoupler drive circuit, 9- Second optocoupler drive circuit, 10- First optocoupler output circuit, 11- Second optocoupler output circuit, 12- Two-channel triangular wave to square wave conversion and duty cycle control circuit, 13- Comparison control voltage, 14- One-channel PWM wave output, 15- Two-channel PWM wave output, 16- 9V auxiliary power supply, 17- External control voltage. Detailed Implementation

[0017] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this utility model, and should not be construed as limiting this utility model.

[0018] Please see Figures 1 to 2This utility model provides a complementary PWM signal generator, including a clock signal generator 1, a frequency divider and shaping circuit 2, an integrator circuit 3, an inverting amplifier circuit 4, a two-channel triangular wave-to-square wave conversion and duty cycle control circuit 12, a first optocoupler drive / output circuit, and a second optocoupler drive / output circuit. The clock signal generator 1 is composed of a time base chip U1, resistors R1, R2, and RV1, a filter capacitor C1, and a filter capacitor C2. Pins 1 and 2 of the time base chip U1 are connected to the two ends of the filter capacitor C1, pin 6 of the time base chip U1 is connected to one end of resistor R2, and resistor R2 is connected to one end of resistor RV1. Pin 4 of the timer chip U1 is connected to one end of resistor R1. Pin 7 of the timer chip U1 is connected to the other end of resistor R1 and the other end of resistor RV1. Pin 3 of the timer chip U1 is connected to pin 3 of the frequency divider and shaping circuit 2. Pin 5 of the frequency divider and shaping circuit 2 is connected to the integrator circuit 3. The integrator circuit 3 is connected to the two-channel triangular wave to square wave conversion and duty cycle control circuit 12 and the phase inverting amplifier circuit 4. The two-channel triangular wave to square wave conversion and duty cycle control circuit 12 is connected to the first optocoupler drive / output circuit. Both the two-channel triangular wave to square wave conversion and duty cycle control circuit 12 and the phase inverting amplifier circuit 4 are also connected to the second optocoupler drive / output circuit.

[0019] In this embodiment, the working principle is as follows: pins 2 and 6 of the time base chip U1 are connected in parallel to the filter capacitor C1. When the power is first turned on, Vcc (5V), the voltage across the filter capacitor C1 cannot change abruptly, so the voltage at pin 2 (pin 6) of the time base chip U1 is 0V. This low voltage, through the action of the internal voltage comparator and RS flip-flop, causes the output terminal Q (pin 3) of U1 to output a high level, that is, the clock signal generator 1 (1) outputs a high level, Q=1, Q=0, and the electronic switch is in the off state; the DC voltage +5 charges the filter capacitor C1 through resistors R1, R2 and RV1; when the voltage across the filter capacitor C1 has not been charged to 2 / 3Vcc, the circuit maintains the output voltage U0 at a high level; this is a metastable state; as the voltage on the filter capacitor C1 rises to ≥2 / 3Vcc, through the action of the internal voltage comparator and RS flip-flop of U1, the Q terminal (pin 3) of U1 outputs a low level, Q=0, =1, turn on the internal electronic switch, and discharge the filter capacitor C1 through resistor R2 and resistor RV1; during this discharge process, keep the output terminal Q (pin 3) of U1 at a low level, that is, the clock signal generator 1 (1) outputs a low level; when the voltage on the filter capacitor C1 drops to ≤1 / 3Vcc, through the action of the internal voltage comparator and RS flip-flop of U1, the Q terminal (pin 3) of U1 outputs a high level, completing one flip; repeat this process to generate oscillation and output a clock signal.

[0020] In this embodiment, the clock frequency of the road is determined by the parameters of resistors R1, R2, RV1, and filter capacitor C1, and can be adjusted by resistor RV1; at the same time, there is no requirement for the duty cycle of the clock signal.

[0021] Furthermore, the integrating circuit 3 consists of voltage U2:A, filter capacitor C3, resistors R3, R4, R5, R6, R15, and RV2. Pin 3 of voltage U2:A is connected to resistor RV2, pin 4 of voltage U2:A is connected to one end of resistor R4, resistor R4 is connected to one end of resistor RV2, resistor RV2 is connected to one end of resistor R3, resistor R3 is connected to pin 11 of voltage U2:A and the two-way triangular wave-to-square wave conversion and duty cycle control circuit 12, pin 2 of voltage U2:A is connected to one end of resistor R5, filter capacitor C3, and resistor R6, resistor R5 is connected to pin 5 of the frequency division and shaping circuit 2, pin 1 of voltage U2:A is connected to the other end of filter capacitor C3 and resistor R6, and the two-way triangular wave-to-square wave conversion and duty cycle control circuit 12 and the phase inverting amplifier circuit 4 are connected to pin 1 of voltage U2:A.

[0022] In this embodiment, the comparator chip AD8044 (U2) is the core component, mainly responsible for the constant current source charging and discharging. The timing resistor R5 and filter capacitor C3 perform integration operations; their parameters determine the charging / discharging waveform speed and the amplitude of the triangular wave. Resistors R3, R4, and RV2 provide a static operating point for AD8044 (voltage U2:A) through voltage division, ensuring that the operating point of AD8044 (voltage U2:A) is 1 / 2 Vcc, guaranteeing its operation under a single power supply. Resistor RV2 fine-tunes the operating point. Resistor R6 is a negative feedback resistor, its purpose being to ensure stable operating point. Resistor R15 is the load resistor. Its working principle is that when a 50% duty cycle clock signal is input to pin 2 of the AD8044 (U2) chip, due to the operational amplifier characteristics, the charging and discharging of the filter capacitor C3 by resistor R5 is constant current, with the charging current I... C =Vcc-U THo Therefore, the voltage across the capacitor changes linearly; when the input is high, the voltage at the output terminal (pin 1) decreases linearly, and when the input is low, the voltage at the output terminal (pin 1) increases linearly, forming a triangular wave output.

[0023] Furthermore, the phase inverter amplifier circuit 4 is composed of voltage U2:D, resistors R7, R8, R9, R10, R20, and RV4. Pin 12 of voltage U2:D is connected to one end of resistor R8. Resistor R8 is connected to one end of resistors R7 and RV4. Resistor R8 is connected to pin 11 of voltage U2:D. Pin 13 of voltage U2:D is connected to one end of resistors R9 and R10. Pin 14 of voltage U2:D is connected to the other end of resistors R9 and R10. Resistor R10 is connected to the two-channel triangular wave-to-square wave conversion and duty cycle control circuit 12 and pin 1 of voltage U2:A. The two-channel triangular wave-to-square wave conversion and duty cycle control circuit 12 is also connected to pin 14 of voltage U2:D.

[0024] In this embodiment, resistors R7 and RV4 provide a voltage divider to the AD8044 (voltage U2:D) to provide a static operating point, enabling it to operate on a single power supply. Resistor RV4 is used for fine-tuning the operating point. Resistor R8 is a balancing resistor; resistor R9 is a negative feedback resistor; the signal is connected to the inverting input terminal through resistor R10, forming an inverting amplifier with a gain of 1. Resistor R20 is a load resistor to ensure stable circuit operation; the signal is output from pin 14, and this signal, together with the input signal, forms an inverted signal with the same amplitude.

[0025] Further, the two-channel triangular wave to square wave conversion and duty cycle control circuit 12 includes a first voltage comparator 5 and a second voltage comparator 6. The first voltage comparator 5 consists of voltage U2:B, resistors R11, R12, R13, R14, and RV3. The second voltage comparator 6 consists of voltage U2:C, resistors R16, R17, R18, R19, and RV5. Pin 5 of voltage U2:B is connected to one end of resistor R14. Resistor R14 is connected to resistor R15, pin 1 of voltage U2:A, and resistor R10. Pin 6 of voltage U2:B is connected to resistor R14. Resistor R14 is connected to resistor RV5. Resistor RV5 is connected to resistors RV3, R16, and R17. Resistor RV3 is connected to resistors R11 and R12. Resistors R11 and R16 are both connected to resistor R3 and pin 11 of voltage U2:A. Pins 11 and 7 of voltage U2:B are both connected to the first optocoupler drive / output circuit. A comparison voltage switching switch 7 is connected between resistors RV5, R14, and R19. Pin 10 of voltage U2:C is connected to resistor R18. Resistor R18 is connected to pin 14 of voltage U2:D. Pin 9 of voltage U2:C is connected to resistor R19. Pins 11 and 6 of voltage U2:C are both connected to the second optocoupler drive / output circuit.

[0026] In this embodiment, the AD8044 (voltage U2:B) in the first voltage comparator 5 is the core component. Resistors R11, R12, and RV3 form an adjustable voltage divider circuit to control the duty cycle of the square wave. This voltage can provide feedback voltage control when forming a voltage regulator circuit, and in intelligent control, it is achieved by A / D conversion. The resistors R16, R17, and RV5 of the second voltage comparator are independently controlled by a voltage divider.

[0027] Further, the first optocoupler drive / output circuit includes a first optocoupler drive circuit 8 and a first optocoupler output circuit 10. The first optocoupler drive circuit 8 consists of an emitter follower composed of a resistor R21 and a transistor Q1. The first optocoupler output circuit 10 consists of a voltage U4, resistors R22, R23, and R24, and a power supply E1. The transistor Q1 is connected to one end of the resistor R21 and pin 11 of the voltage U2:B. The resistor R21 is connected to pin 7 of the voltage U2:B. The transistor Q1 is connected to pin 1 of the voltage U4. Pin 2 of the voltage U4 is connected to the resistors R24 and R23 and the power supply E1. The resistor R24 ​​is connected to pin 4 of the voltage U4. The resistor R23 is connected to the resistor R22 and pin 6 of the voltage U4. The resistor R22 is connected to pin 5 of the voltage U4 and the power supply E1.

[0028] In this embodiment, the first optocoupler driving circuit 8 drives the optocoupler voltage U4 with a large current and outputs a complementary PWM signal; the resistors R22 and R23 in the first optocoupler output circuit 10 divide the voltage U4 to a small operating point, so as to reduce the requirement for input current, improve the switching speed of voltage U4, and improve the quality of switching signal; the optocoupler voltage U4 is powered by a floating 9V power supply E1, adopts an emitter follower structure, and outputs a floating PWM wave pulse signal with an amplitude greater than or equal to 8V through resistor R24.

[0029] Further, the second optocoupler drive / output circuit includes a second optocoupler drive circuit 9 and a second optocoupler output circuit 11. The second optocoupler drive circuit 9 consists of an emitter follower composed of a resistor R25 and a transistor Q2. The second optocoupler output circuit 11 consists of a voltage U6, resistors R26, R27, and R28, and a power supply E2. The transistor Q2 is connected to one end of the resistor R25. The resistor R25 is connected to pin 8 of the voltage U2:C. The transistor Q2 is connected to pin 11 of the voltage U2:C. The transistor Q2 is connected to pin 1 of the voltage U6. Pin 2 of the transistor Q2 is connected to resistors R28 and R27 and the power supply E2. The resistor R28 is connected to pin 4 of the voltage U6. The resistor R27 is connected to resistor R26 and pin 6 of the voltage U6. The resistor R26 is connected to pin 5 of the voltage U6 and the power supply E2.

[0030] In this embodiment, the second optocoupler driving circuit 9 drives the optocoupler U5 with a larger current and outputs another complementary PWM signal; the resistors R26 and R27 in the second optocoupler output circuit 11 divide the voltage U6 to a small operating point, so as to reduce the requirement for input current, improve the switching speed of voltage U6, and improve the quality of switching signal; the optocoupler voltage U6 is powered by the floating 9V power supply E2, adopts the emitter follower structure, and outputs a floating PWM wave pulse signal with an amplitude greater than or equal to 8V through the resistor R28.

[0031] Furthermore, the frequency division and shaping circuit 2 is implemented by voltage U3:A, and the comparison voltage switching switch 7 is composed of switch SW1.

[0032] In this embodiment, the frequency divider and shaping circuit 2 performs frequency division and shaping, using the signal from the output terminal Q (pin 3) of U1 as a clock signal added to the clock terminal pin 3 for counting and frequency division output; transforming it into a clock with a 50% duty cycle, preparing for square wave to triangle wave conversion. Pins 1 and 4 of the 74ls74 can be left floating or connected to a +5V power supply. Its default operating power supply is pin 14, connected to a +5V power supply, and pin 7 grounded.

[0033] In this embodiment, the voltage comparison switch 7 switches to the independent side when the second voltage comparator 6 is independently controlled. At this time, the duty cycles of the two complementary signals are controlled by resistors RV3 and RV5 respectively, and the duty cycles can be different, which can control the main circuit to output two voltage levels of different levels. When the two signals are in complementary output, the switch switches to the complementary side. At this time, the two complementary signals are complementary in time and have the same duty cycle. This can control the main circuit to connect the two power supplies in parallel and output them as one power supply, doubling the output current.

[0034] In this invention, a clock signal generator 1 is composed of a 555 timer chip to generate a 20kHz square wave clock; a 74LS74 is used to construct a frequency divider and shaping circuit 2, which divides the clock frequency into a 10kHz square wave with a 50% duty cycle, preparing for the square wave-triangle wave conversion; an AD8044 operational amplifier is used to construct an integrating circuit 3 to realize the square wave-triangle wave conversion; an AD8044 is used to construct an inverting amplifier circuit 4 to perform phase inversion amplification of the triangular wave, realize phase shifting, and complete the time complementarity and interleaved output of the two triangular waves; one triangular wave and the control voltage are sent to a voltage comparator for comparison. Output: Two triangular waves and the control voltage are fed into a voltage comparator for comparison and output, realizing triangular wave to square wave conversion and duty cycle control to obtain two complementary PWM wave signals; when the main circuit requires two voltage outputs, the comparison voltage switch 7 switches between them to control the two comparators separately, generating two PWM wave signals with different duty cycles; the emitters of the first and second optocoupler drive / output circuits, which are formed by two transistor emitter followers, are connected to the negative terminal of the auxiliary power supply to generate an 8V amplitude, floating potential PWM power switch control signal output.

[0035] In this invention, during use, the two PWM signal output terminals are connected to the voltage-controlled power switching device of the main circuit to realize the chopping and voltage regulation function of the main circuit. By adjusting the frequency and duty cycle of the PWM signal, precise control of the output voltage can be achieved. Furthermore, the circuit is equipped with an internal and external voltage control switching switch. When an external voltage control signal is connected, a closed-loop control system is formed, which improves the stability and anti-interference capability of the output voltage. The complementary PWM signal generator adopts optocoupler output, with floating potential and convenient connection. The two signals are output in time-interleaved manner, which can achieve time complementarity, reduce or avoid the input interruption time of the main circuit, and reduce ripple. The duty cycle of the two signals can be controlled synchronously or independently, which is flexible. The drive signal voltage has high amplitude and high power, and is suitable for various power electronic conversion devices.

[0036] The above-disclosed embodiments are merely preferred embodiments of the present utility model and should not be construed as limiting the scope of the present utility model. Those skilled in the art can understand that implementing all or part of the above-described embodiments and making equivalent changes in accordance with the claims of the present utility model are still within the scope of the utility model.

Claims

1. A complementary PWM signal generator, characterized in that, The system includes a clock signal generator, a frequency divider and shaping circuit, an integrator circuit, an inverting amplifier circuit, a two-channel triangular wave to square wave conversion and duty cycle control circuit, a first optocoupler drive / output circuit, and a second optocoupler drive / output circuit. The clock signal generator consists of a time base chip U1, resistors R1, R2, and RV1, and filter capacitors C1 and C2. Pins 1 and 2 of the time base chip U1 are connected to the two ends of the filter capacitor C1. Pin 6 of the time base chip U1 is connected to one end of resistor R2. Resistor R2 is connected to one end of resistor RV1. Pin 4 of the time base chip U1 is connected to resistor R1. One end of the time base chip U1 is connected to pin 7 of resistor R1 and the other end of resistor RV1. Pin 3 of the time base chip U1 is connected to pin 3 of the frequency divider and shaping circuit. Pin 5 of the frequency divider and shaping circuit is connected to the integrator circuit. The integrator circuit is connected to the two-channel triangular wave-to-square wave conversion and duty cycle control circuit and the phase inverting amplifier circuit. The two-channel triangular wave-to-square wave conversion and duty cycle control circuit is connected to the first optocoupler drive / output circuit. The two-channel triangular wave-to-square wave conversion and duty cycle control circuit and the phase inverting amplifier circuit are also connected to the second optocoupler drive / output circuit.

2. The complementary PWM signal generator as described in claim 1, characterized in that, The integrating circuit consists of voltage U2:A, filter capacitor C3, resistors R3, R4, R5, R6, R15, and RV2. Pin 3 of voltage U2:A is connected to resistor RV2. Pin 4 of voltage U2:A is connected to one end of resistor R4. Resistor R4 is connected to one end of resistor RV2. Resistor RV2 is connected to one end of resistor R3. Resistor R3 is connected to pin 11 of voltage U2:A and the two-channel triangular wave-to-square wave conversion and duty cycle control circuit. Pin 2 of voltage U2:A is connected to one end of resistor R5, filter capacitor C3, and resistor R6. Resistor R5 is connected to pin 5 of the frequency division and shaping circuit. Pin 1 of voltage U2:A is connected to the other end of filter capacitor C3 and resistor R6. The two-channel triangular wave-to-square wave conversion and duty cycle control circuit and the phase inverting amplifier circuit are connected to pin 1 of voltage U2:A.

3. The complementary PWM signal generator as described in claim 2, characterized in that, The phase inverter amplifier circuit consists of voltage U2:D, resistors R7, R8, R9, R10, R20, and RV4. Pin 12 of voltage U2:D is connected to one end of resistor R8. Resistor R8 is connected to one end of resistors R7 and RV4. Resistor R8 is connected to pin 11 of voltage U2:D. Pin 13 of voltage U2:D is connected to one end of resistors R9 and R10. Pin 14 of voltage U2:D is connected to the other end of resistors R9 and R10. Resistor R10 is connected to the two-channel triangular wave-to-square wave conversion and duty cycle control circuit and pin 1 of voltage U2:A. The two-channel triangular wave-to-square wave conversion and duty cycle control circuit is also connected to pin 14 of voltage U2:D.

4. The complementary PWM signal generator as described in claim 3, characterized in that, The two-channel triangular wave-to-square wave conversion and duty cycle control circuit includes a first voltage comparator and a second voltage comparator. The first voltage comparator consists of voltage U2:B, resistors R11, R12, R13, R14, and RV3. The second voltage comparator consists of voltage U2:C, resistors R16, R17, R18, R19, and RV5. Pin 5 of voltage U2:B is connected to one end of resistor R14. Resistor R14 is connected to resistor R15, pin 1 of voltage U2:A, and resistor R10. Pin 6 of voltage U2:B is connected to resistor R14. Resistor R14 is connected to resistor RV5. Resistor RV5 is connected to... Resistors RV3, R16, and R17 are connected. Resistor RV3 is connected to resistors R11 and R12. Resistors R11 and R16 are both connected to resistor R3 and pin 11 of voltage U2:A. Pins 11 and 7 of voltage U2:B are both connected to the first optocoupler drive / output circuit. A comparison voltage switching switch is connected between resistors RV5, R14, and R19. Pin 10 of voltage U2:C is connected to resistor R18. Resistor R18 is connected to pin 14 of voltage U2:D. Pin 9 of voltage U2:C is connected to resistor R19. Pins 11 and 6 of voltage U2:C are both connected to the second optocoupler drive / output circuit.

5. The complementary PWM signal generator as described in claim 4, characterized in that, The first optocoupler drive / output circuit includes a first optocoupler drive circuit and a first optocoupler output circuit. The first optocoupler drive circuit consists of an emitter follower composed of a resistor R21 and a transistor Q1. The first optocoupler output circuit consists of a voltage U4, resistors R22, R23, and R24, and a power supply E1. The transistor Q1 is connected to one end of the resistor R21 and pin 11 of the voltage U2:B. The resistor R21 is connected to pin 7 of the voltage U2:B. The transistor Q1 is connected to pin 1 of the voltage U4. Pin 2 of the voltage U4 is connected to the resistors R24 and R23 and the power supply E1. The resistor R24 ​​is connected to pin 4 of the voltage U4. The resistor R23 is connected to the resistor R22 and pin 6 of the voltage U4. The resistor R22 is connected to pin 5 of the voltage U4 and the power supply E1.

6. The complementary PWM signal generator as described in claim 5, characterized in that, The second optocoupler drive / output circuit includes a second optocoupler drive circuit and a second optocoupler output circuit. The second optocoupler drive circuit consists of an emitter follower composed of a resistor R25 and a transistor Q2. The second optocoupler output circuit consists of a voltage U6, resistors R26, R27, and R28, and a power supply E2. The transistor Q2 is connected to one end of the resistor R25. The resistor R25 is connected to pin 8 of the voltage U2:C. The transistor Q2 is connected to pin 11 of the voltage U2:C. The transistor Q2 is connected to pin 1 of the voltage U6. Pin 2 of the transistor Q2 is connected to resistors R28 and R27 and the power supply E2. Resistor R28 is connected to pin 4 of the voltage U6. Resistor R27 is connected to resistor R26 and pin 6 of the voltage U6. Resistor R26 is connected to pin 5 of the voltage U6 and the power supply E2.

7. The complementary PWM signal generator as described in claim 6, characterized in that, The frequency division and shaping circuit is implemented by voltage U3:A, and the comparison voltage switching switch is composed of switch SW1.

Images