A MOS transistor gate drive circuit

Abstract

This invention belongs to the field of drive circuit technology, specifically relating to a MOSFET gate drive circuit. It includes a MOSFET, a first resistor, a second resistor, a diode, and a filter circuit. The gate drive signal is connected to one end of the first and second resistors, the other end of the first resistor is connected to the cathode of the diode, the anode of the diode and the other end of both the second resistor are connected to the input of the filter circuit, and the output of the filter circuit is connected to the gate of the MOSFET. This invention addresses the problem of MOSFETs being easily damaged by overshoot power spikes. By using the first resistor, the second resistor, and the diode to form an asymmetrical gate resistor at the MOSFET gate, the turn-on and turn-off processes are separated, adapting to the turn-on and turn-off speed requirements of different application scenarios. Appropriately increasing the turn-off gate resistor can effectively suppress drain-source voltage overshoot, while the filter circuit can absorb the high-frequency oscillations generated during switching.

Description

Technical Field

[0001] This utility model belongs to the field of driving circuit technology, specifically relating to a MOS transistor gate driving circuit. Background Technology

[0002] MOSFETs, as core power switching devices, are widely used in power electronics, automotive electronics, and industrial control. Due to their voltage-controlled gate drive for high-speed switching and their ultra-low conduction loss and near-zero turn-off loss, they enable high-frequency and miniaturized systems while achieving efficient energy conversion. In DC-DC converters and inverters, MOSFET drive circuits control the gate voltage to achieve rapid switching between the drain and source, thus enabling high-voltage and high-current on / off control. In motor control, MOSFET drive circuits use rapid switching to enable motor start / stop, forward / reverse rotation, and speed regulation.

[0003] In existing gate drive circuits, a single gate resistor is typically used. This design binds the turn-on speed and turn-off speed of the MOSFET together. If a faster turn-on speed is desired, the turn-off speed will also be faster, easily causing drain-source voltage overshoot, such as... Figure 1 As shown; overshoot voltage spikes increase the instantaneous power consumption of the MOSFET, and in severe cases, can cause the MOSFET to break down and be damaged, such as... Figure 2 As shown, this design significantly impacts the system's stability and security. Utility Model Content

[0004] To address the shortcomings of existing technologies, a MOSFET gate drive circuit is provided to solve the problem that overshooting power spikes can easily damage MOSFETs.

[0005] The technical solution of this utility model to solve the above-mentioned technical problems is as follows: a MOS transistor gate drive circuit, which includes a MOS transistor, a first resistor, a second resistor, a diode and a filter circuit; The gate drive signal is connected to one end of the first resistor and the second resistor, the other end of the first resistor is connected to the negative terminal of the diode, the positive terminal of the diode and the other end of the second resistor are both connected to the input terminal of the filter circuit, and the output terminal of the filter circuit is connected to the gate of the MOS transistor.

[0006] Compared with existing technologies, the above technical solutions have the following beneficial effects: By using a first resistor, a second resistor, and a diode to form an asymmetric gate resistor at the gate of the MOSFET, the turn-on and turn-off processes are separated, which can adapt to the requirements of different application scenarios for turn-on and turn-off speeds. Under the premise of meeting the turn-on speed and suppressing oscillation, appropriately increasing the turn-off gate resistor can effectively suppress the overshoot of drain-source voltage. At the same time, the filter circuit can absorb the high-frequency oscillations generated during the switching instant.

[0007] Based on the above technical solution, the embodiments of this application can be further improved as follows: In one embodiment, the filter circuit includes a third resistor and a ferrite bead connected in parallel. The positive terminal of the diode is connected to one end of the third resistor, the other end of the second resistor, and one end of the magnetic bead; The other end of the third resistor and the other end of the magnetic bead are connected to the gate of the MOS transistor.

[0008] Specifically, the high-frequency oscillation generated during the switching instant is absorbed and consumed by the ferrite bead in the filter circuit, while the normal switching signal can pass through the third resistor to the gate of the MOSFET.

[0009] In one embodiment, a pull-down resistor is further included, one end of which is connected to the gate of the MOS transistor, and the other end of which is connected to the drive signal ground.

[0010] Pull-down resistors are used to ensure that the MOSFET remains off when the drive output signal is in a high impedance state, preventing false turn-on caused by external noise.

[0011] In one embodiment, a bleed capacitor is also included, one end of which is connected to the input terminal of the filter circuit, and the other end is connected to the drive signal ground.

[0012] The set leakage capacitor can be used to accelerate current discharge and suppress the influence of the Miller plateau.

[0013] In one embodiment, the resistance values ​​of the first resistor and the second resistor are 1-100Ω, and the resistance ratio of the first resistor and the second resistor is 1:2-1:10.

[0014] In one embodiment, the impedance of the magnetic bead is 400Ω@100MHz-600Ω@100MHz.

[0015] In one embodiment, the resistance of the third resistor is 1-10Ω.

[0016] In one embodiment, the pull-down resistor has a resistance of 9KΩ-11KΩ. Attached Figure Description

[0017] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 The circuit diagram shows the use of a single-gate resistor in the background art.

[0019] Figure 2 for Figure 1 The drain-source voltage waveform diagram.

[0020] Figure 3 This is the circuit diagram of this utility model.

[0021] Figure 4 for Figure 3 The drain-source voltage waveform diagram. Detailed Implementation

[0022] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings. These embodiments are merely illustrative of the present invention and should not be construed as limiting the scope of protection of the present invention. It should be noted that, unless otherwise stated, the technical or scientific terms used in this application shall have the ordinary meaning as understood by one of ordinary skill in the art to which this utility model pertains.

[0023] In the description of this application, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0024] Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly defined.

[0025] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0026] Compared to Figure 1 The single-gate resistor drive circuit in the middle, Figure 2 For the corresponding Figure 1 The drain-source voltage waveform of the single-gate resistor drive circuit is shown in the figure. Channels 1 and 2 in the figure are the drain-source voltages of the two MOSFETs, respectively, with the unit being 250V / division. In this embodiment, as Figure 3 As shown, the present invention provides a MOS transistor gate drive circuit, which includes a MOS transistor Q1, a first resistor R1, a second resistor R2, a diode D1, and a filter circuit.

[0027] The gate drive signal is connected to one end of the first resistor R1 and the second resistor R2. The other end of the first resistor R1 is connected to the negative terminal of the diode D1. The positive terminal of the diode D1 and the other end of the second resistor R2 are both connected to the input terminal of the filter circuit. The output terminal of the filter circuit is connected to the gate of the MOS transistor Q1.

[0028] By using a first resistor R1, a second resistor R2, and a diode D1 to form an asymmetric gate resistor at the gate of the MOSFET Q1, the turn-on and turn-off processes are separated, which can adapt to the requirements of different application scenarios for turn-on and turn-off speeds. Under the premise of meeting the turn-on speed and suppressing oscillation, appropriately increasing the turn-off gate resistor can effectively suppress the overshoot of the drain-source voltage. At the same time, the filter circuit can absorb the high-frequency oscillations generated during the switching instant.

[0029] Specifically, the asymmetric gate resistor consists of a first resistor R1, a second resistor R2, and a diode D1. The first resistor R1 and the diode D1 are connected in series and then in parallel with the second resistor R2. The second resistor R2 is the gate resistor when the signal is turned on. When the drive signal changes from low level to high level, the negative voltage of the diode D1 is higher than the positive voltage, the diode D1 is in the off state, and the drive current only passes through the second resistor R2.

[0030] The first resistor R1 and the second resistor R2 are connected in parallel to form the gate resistor when the circuit is off. When the drive signal changes from high level to low level, the negative voltage of diode D1 is lower than the positive voltage, and diode D1 is in the conducting state. The drive current flows through the first resistor R1 and the second resistor R2 at the same time.

[0031] Among them, the gate resistor can increase the damping coefficient, suppress the gate-source voltage oscillation caused by the parasitic inductance of the trace and the input capacitance of the MOSFET, and control the turn-on and turn-off speed of the MOSFET.

[0032] Compared to ordinary gate resistors, asymmetric gate resistors, while suppressing gate-source voltage oscillations, allow for independent setting of the gate resistance during turn-on and turn-off. This enables rapid turn-on while reducing turn-off speed and preventing drain-source voltage overshoot.

[0033] Figure 4 For the corresponding Figure 3 The drain-source voltage waveform of the asymmetric gate resistor driving circuit is shown in the figure. Channels 1 and 2 in the figure are the drain-source voltages of the two MOS transistors, respectively, with the unit being 250V / division.

[0034] contrast Figure 4 and Figure 2 It is obvious that Figure 2 There is a significant overshoot at the falling edge of the voltage in channel 1 and the rising edge of the voltage in channel 2. However, after changing to an asymmetric gate resistor, Figure 4 The overshoot phenomenon has basically disappeared.

[0035] The resistance values ​​of the first resistor R1 and the second resistor R2 are 1-100Ω, and the resistance ratio of the first resistor R1 and the second resistor R2 is 1:2-1:10. Different application scenarios require different resistance ratios for turning on and off, which can be adjusted according to actual needs. In this embodiment, when the ratio is 1:2, the resistance value of the first resistor is 5Ω and the resistance value of the second resistor is 10Ω.

[0036] Specifically, the filter circuit includes a third resistor R3 and a ferrite bead L1 connected in parallel, wherein the impedance of the ferrite bead L1 is 400Ω@100MHz-600Ω@100MHz.

[0037] The positive terminal of the diode D1 is connected to one end of the third resistor R3, the other end of the second resistor R2, and one end of the magnetic bead L1; The other end of the third resistor R3 and the other end of the magnetic bead L1 are connected to the gate of the MOS transistor, wherein the resistance of the third resistor R3 is 1-10Ω.

[0038] The high-frequency oscillation generated during the switching instant will be absorbed and consumed by the ferrite bead L1 in the filter circuit, while the normal switching signal can be transmitted to the gate of the MOSFET from the third resistor R3.

[0039] In this embodiment, a pull-down resistor R4 is also included. One end of the pull-down resistor R4 is connected to the gate of the MOS transistor, and the other end of the pull-down resistor R4 is connected to the drive signal ground.

[0040] The pull-down resistor R4 has a resistance of 9KΩ-11KΩ.

[0041] Pull-down resistor R4 is used to ensure that the MOSFET is always off when the drive output signal is in a high impedance state, preventing false turn-on caused by external noise.

[0042] It also includes a bleed capacitor C1, one end of which is connected to the input terminal of the filter circuit, and the other end is connected to the drive signal ground.

[0043] The set leakage capacitor C1 can be used to accelerate current discharge and suppress the influence of the Miller plateau.

[0044] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.

Claims

1. A MOS transistor gate drive circuit, characterized in that, include: MOSFET, first resistor, second resistor, diode and filter circuit; The gate drive signal is connected to one end of the first resistor and the second resistor, the other end of the first resistor is connected to the negative terminal of the diode, the positive terminal of the diode and the other end of the second resistor are both connected to the input terminal of the filter circuit, and the output terminal of the filter circuit is connected to the gate of the MOS transistor.

2. The MOS transistor gate drive circuit according to claim 1, characterized in that, The filter circuit includes a third resistor and a ferrite bead connected in parallel. The positive terminal of the diode is connected to one end of the third resistor, the other end of the second resistor, and one end of the magnetic bead; The other end of the third resistor and the other end of the magnetic bead are connected to the gate of the MOS transistor.

3. The MOS transistor gate drive circuit according to claim 1, characterized in that, It also includes a pull-down resistor, one end of which is connected to the gate of the MOS transistor, and the other end of which is connected to the drive signal ground.

4. The MOS transistor gate drive circuit according to claim 1, characterized in that, It also includes a bleed capacitor, one end of which is connected to the input terminal of the filter circuit, and the other end is connected to the drive signal ground.

5. The MOS gate drive circuit of claim 1, wherein, The resistance values ​​of the first resistor and the second resistor are 1-100Ω, and the resistance ratio of the first resistor and the second resistor is 1:2-1:

10.

6. The MOS gate drive circuit of claim 2, wherein, The impedance of the magnetic bead is 400Ω@100MHz-600Ω@100MHz.

7. The MOS gate drive circuit of claim 2, wherein, The resistance of the third resistor is 1-10Ω.

8. The MOS gate drive circuit of claim 3, wherein, The pull-down resistor has a resistance of 9KΩ-11KΩ.

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