An array detector chip

By designing two rows of staggered photosensitive surfaces and electrodes on the array detector chip, the problem of low yield of array detector chips was solved, and the overall product yield was significantly improved.

CN224947928UActive Publication Date: 2026-11-06武汉钧恒科技有限公司
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Patent Information

Application Number
CN202522420251.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-11-14
Publication Date
2026-11-06
Estimated Expiration
2035-11-14

AI Technical Summary

Technical Problem

In existing 400G DR4 and 800G DR8 optical engines, the yield of array detector chips is low because the pass rate requirement for adjacent photosensitive surfaces is high, resulting in a low overall yield when cut into 1×4 array detector chips.

Method used

The detector chip is designed with two rows of photosensitive surfaces arranged side by side on its upper surface, with at least four photosensitive surfaces in each row. The center-to-center distance between adjacent photosensitive surfaces is 500 μm or 750 μm, and an electrode is designed at each photosensitive surface. The two rows of photosensitive surfaces are staggered to improve cutting selectivity.

Benefits of technology

By flexibly selecting the retention methods for photosensitive surfaces and electrodes, the overall product yield of array detector chips is improved by approximately 100%.

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Abstract

This utility model relates to an array detector chip. The upper surface of the detector chip has two rows of photosensitive surfaces arranged side-by-side. Each row has at least four photosensitive surfaces, all distributed along the length of the detector chip. All photosensitive surfaces in the same row are equally spaced, with a center-to-center distance of 500 μm or 750 μm between adjacent photosensitive surfaces. Each photosensitive surface on the upper surface of the detector chip has an electrode. The advantages are: by designing an additional row of identical photosensitive surfaces in the gaps of the detector chip, and by designing identical electrodes on each photosensitive surface, when cutting into a standard array detector chip, it is possible to choose to retain four qualified photosensitive surfaces and corresponding electrodes in one of the two rows of photosensitive surfaces. This provides great flexibility in cutting, and the overall product yield is approximately doubled.
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Description

Technical Field

[0001] This utility model relates to the field of detector chip technology, specifically to an array detector chip. Background Technology

[0002] Currently, the 400G DR4 and 800G DR8 optical engines use a 1×4 array detector chip, meaning that one detector chip has four photosensitive surfaces, and these four photosensitive surfaces are arranged in a row along the length of the detector chip. Figure 2 As shown, the center-to-center spacing between two adjacent photosensitive surfaces on an array detector chip is generally 250μm, 500μm, and 750μm. Among these, array detector chips with center-to-center spacings of 500μm and 750μm are more commonly used in high-speed optical engines. During the manufacturing process of array detector chips, to facilitate processing, current production methods include... Figure 1 As shown, the production of a strip-shaped array detector chip involves multiple photosensitive surfaces distributed along the length of the detector chip. For chips used in high-speed optical engines, the yield rate is relatively low. Therefore, it is required that four adjacent photosensitive surfaces pass the test simultaneously (the criteria for judging whether they pass the test are visual inspection and performance testing, generally by applying power to the electrodes to test the basic performance) in order to cut out a qualified 1×4 array detector chip, resulting in a relatively low overall yield rate. Utility Model Content

[0003] The technical problem to be solved by this utility model is to provide an array detector chip to overcome the shortcomings of the prior art.

[0004] The technical solution of this utility model to solve the above-mentioned technical problems is as follows: An array detector chip includes: a detector chip, the upper surface of which has two rows of photosensitive surfaces arranged side by side, each row having at least four photosensitive surfaces distributed along the length of the detector chip, all photosensitive surfaces in the same row being arranged at equal intervals and the center-to-center distance between two adjacent photosensitive surfaces being 500 μm or 750 μm, and an electrode being provided at each photosensitive surface on the upper surface of the detector chip.

[0005] Based on the above technical solution, the present invention can be further improved as follows.

[0006] Furthermore, the two rows of photosensitive surfaces are misaligned along the length of the detector chip and along the width of the detector chip, with one row of photosensitive surfaces being closer to the electrodes of the other row of photosensitive surfaces.

[0007] Furthermore, the center-to-center distance between two adjacent photosensitive surfaces in the same row is 500 μm, and the misalignment distance between the two rows of photosensitive surfaces in the length direction of the detector chip is 250 μm.

[0008] Furthermore, the center-to-center distance between two adjacent photosensitive surfaces in the same row is 750 μm, and the misalignment distance between the two rows of photosensitive surfaces in the length direction of the detector chip is 375 μm.

[0009] Furthermore, each photosensitive surface has two electrodes, namely a first electrode and a second electrode; the first electrode is U or V shaped, and the first electrode at each photosensitive surface is distributed in a semi-circular manner around the photosensitive surface, while the second electrode at each photosensitive surface is located in the area surrounded by the first electrode.

[0010] The beneficial effects of this invention are: an additional row of identical photosensitive surfaces is designed in the gaps of the detector chip, and identical electrodes are designed in each photosensitive surface. When cut into a standard array detector chip, it is possible to select one of the two rows of photosensitive surfaces to retain 4 qualified photosensitive surfaces and the corresponding electrodes. The cutting selection is very flexible, and the overall product yield is increased by about 1 time. Attached Figure Description

[0011] Figure 1 This is a structural diagram of an array detector chip in the prior art; Figure 2 This is a structural diagram of a 1×4 array detector chip in the prior art; Figure 3 This is a first manufacturing diagram of the array detector chip in this utility model; Figure 4 This is a second manufacturing diagram of the array detector chip in this utility model; Figure 5 This is a structural diagram of the first array detector chip cut out in this utility model; Figure 6 This is a structural diagram of the second type of array detector chip cut out in this utility model.

[0012] The attached diagram lists the components represented by each number as follows: 1. Detector chip, 2. Photosensitive surface, 3. Electrode. Detailed Implementation

[0013] The principles and features of this utility model are described below with reference to the accompanying drawings. The examples given are only for explaining this utility model and are not intended to limit the scope of this utility model.

[0014] Example 1 like Figure 3 , Figure 4 , Figure 5 , Figure 6As shown, an array detector chip includes: a detector chip 1, with two rows of photosensitive surfaces 2 arranged side by side on the upper surface of the detector chip 1, wherein each row has at least four photosensitive surfaces 2, and all photosensitive surfaces 2 in each row are distributed along the length direction of the detector chip 1. All photosensitive surfaces 2 in the same row are arranged at equal intervals and the center-to-center distance between two adjacent photosensitive surfaces 2 is 500 μm, or all photosensitive surfaces 2 in the same row are arranged at equal intervals and the center-to-center distance between two adjacent photosensitive surfaces 2 is 750 μm. Each photosensitive surface 2 on the upper surface of the detector chip 1 has an electrode 3. The working principle is as follows: light is incident on the photosensitive surface 2, and then the detector chip 1 converts the light signal into an electrical signal, which is transmitted to the electrical chip through the electrode 3 corresponding to the photosensitive surface 2 and the gold wire. That is, its working principle is still consistent with the prior art.

[0015] An additional row of identical photosensitive surfaces 2 is designed in the gap of the detector chip 1, and an identical electrode 3 is designed in each photosensitive surface 2. When cut into a 1×4 array detector chip, it is possible to select one of the two rows of photosensitive surfaces 2 to retain 4 qualified photosensitive surfaces 2 and retain the corresponding electrode 3. The cutting selection is very flexible, and the overall product yield is improved by about 1 time.

[0016] Example 2 like Figure 3 , Figure 4 , Figure 5 , Figure 6 As shown, this embodiment is a further improvement on embodiment 1, as detailed below: The two rows of photosensitive surfaces 2 are misaligned along the length of the detector chip 1. This can be understood as follows: in one row of photosensitive surfaces 2, there is a photosensitive surface 2 located in the other row of photosensitive surfaces 2 between two adjacent photosensitive surfaces 2. At the same time, the two rows of photosensitive surfaces 2 are also misaligned along the width of the detector chip 1, and one row of photosensitive surfaces 2 is closer to the electrode 3 of the other row of photosensitive surfaces 2.

[0017] Example 3 like Figure 3 , Figure 4 , Figure 5 , Figure 6 As shown, this embodiment is a further improvement on embodiment 2, as detailed below: If the center-to-center distance between two adjacent photosensitive surfaces 2 in the same row is 500 μm, then the misalignment distance of the two rows of photosensitive surfaces 2 in the length direction of the detector chip 1 is 250 μm.

[0018] Example 4 like Figure 3 , Figure 4 , Figure 5 , Figure 6As shown, this embodiment is a further improvement on embodiment 2, as detailed below: The center-to-center distance between two adjacent photosensitive surfaces 2 in the same row is 750 μm, so the misalignment distance of the two rows of photosensitive surfaces 2 in the length direction of the detector chip 1 is 375 μm.

[0019] Example 5 like Figure 3 , Figure 4 , Figure 5 , Figure 6 As shown, this embodiment is a further improvement on any one of embodiments 1 to 4, as detailed below: Each photosensitive surface 2 has two electrodes 3, and the two electrodes 3 at each photosensitive surface 2 are a first electrode and a second electrode, respectively. The first electrode is U or V shaped, and the first electrode at each photosensitive surface is distributed in a semi-circular manner around the photosensitive surface. The second electrode at each photosensitive surface is located in the area surrounded by the first electrode.

[0020] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. An array detector chip, characterized by include: The detector chip (1) has two rows of photosensitive surfaces (2) arranged side by side on its upper surface. Each row has at least four photosensitive surfaces (2) and they are all distributed along the length of the detector chip (1). All photosensitive surfaces (2) in the same row are arranged at equal intervals and the center distance between two adjacent photosensitive surfaces (2) is 500 μm or 750 μm. Each photosensitive surface (2) on the upper surface of the detector chip (1) has an electrode (3).

2. The array detector chip according to claim 1, characterized in that, The two rows of photosensitive surfaces (2) are misaligned in the length direction of the detector chip (1) and in the width direction of the detector chip (1), and one row of photosensitive surfaces (2) is close to the electrode (3) of the other row of photosensitive surfaces (2).

3. The array detector chip according to claim 2, characterized in that, The center-to-center distance between two adjacent photosensitive surfaces (2) in the same row is 500 μm, and the misalignment distance between the two rows of photosensitive surfaces (2) in the length direction of the detector chip (1) is 250 μm.

4. An array detector chip according to claim 2, characterized in that, The center-to-center distance between two adjacent photosensitive surfaces (2) in the same row is 750 μm, and the misalignment distance between the two rows of photosensitive surfaces (2) in the length direction of the detector chip (1) is 375 μm.

5. An array detector chip according to any one of claims 1 to 4, characterized in that, Each photosensitive surface (2) has two electrodes (3), namely a first electrode and a second electrode; the first electrode is U or V shaped, and the first electrode at each photosensitive surface is distributed in a semi-circular manner around the photosensitive surface, and the second electrode at each photosensitive surface is located in the area surrounded by the first electrode.