Back contact solar cells, photovoltaic modules and photovoltaic systems

By setting a protective layer at the edge of the back-contact solar cell, the problems of edge damage and carrier recombination are solved, and higher photoelectric conversion efficiency is achieved.

CN224947947UActive Publication Date: 2026-11-06ZHUHAI FUSHAN AIKO SOLAR ENERGY TECH CO LTD +4
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Patent Information

Application Number
CN202522042987.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-09-22
Publication Date
2026-11-06
Estimated Expiration
2035-09-22

AI Technical Summary

Technical Problem

The edge area of ​​the back contact solar cell is easily scratched and worn, which leads to carrier recombination and reduces photoelectric conversion efficiency.

Method used

A protective layer is provided at the edge of the back contact solar cell. The protective layer consists of a first doped layer, an insulating layer, and a second doped layer with opposite conductivity types. It is used to protect and passivate the edge and reduce carrier recombination.

Benefits of technology

It effectively protects the edges of back-contact solar cells from damage, reduces carrier recombination, and improves photoelectric conversion efficiency.

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Abstract

This application relates to the field of photovoltaic technology, providing a back-contact solar cell, a photovoltaic module, and a photovoltaic system. The back-contact solar cell includes: a silicon substrate, comprising a first surface and a second surface opposite to each other, and a side surface disposed between the first and second surfaces. A protective layer is disposed on at least one edge of the first surface. Along a direction away from the silicon substrate, the protective layer includes a first doped layer, an insulating layer, and a second doped layer sequentially disposed on at least one edge of the first surface. The first doped layer and the second doped layer have opposite conductivity types. The first surface of the silicon substrate includes a plurality of first regions, each of which has a first doped layer disposed. Spacers are formed between the first regions and regions corresponding to the protective layer at at least one edge of the first surface. This reduces carrier recombination at the edges of the back-contact solar cell, thereby improving the photoelectric conversion efficiency of the back-contact solar cell.
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Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and in particular to back-contact solar cells, photovoltaic modules and photovoltaic systems. Background Technology

[0002] Interdigitated back contact (IBC) solar cells are a high-efficiency solar cell technology. In an IBC, the positive and negative metal electrodes are arranged in an interdigitated pattern on the back surface of the solar cell. This design eliminates the presence of any metal grid lines obstructing the front surface, maximizing the illuminated area, reducing optical losses, and improving short-circuit current and overall photoelectric conversion efficiency. To prevent direct contact between N-type and P-type doped regions, which would hinder effective carrier collection, an isolation region is placed at the boundary between the two regions. As cell size decreases, the N-type and P-type doped regions are placed more densely.

[0003] In the edge region of the back-contact solar cell, the edge region is easily scratched and worn, resulting in microcracks and defects. These defects become recombination centers for minority carriers (such as holes or electrons), which can easily lead to leakage losses and reduce the photoelectric conversion efficiency of the back-contact solar cell. Utility Model Content

[0004] This application provides a back-contact solar cell, photovoltaic module, and photovoltaic system that can reduce the risk of edge damage to the back-contact solar cell, passivate the edge of the back-contact solar cell, reduce carrier recombination at the edge of the back-contact solar cell, and improve the photoelectric conversion efficiency of the back-contact solar cell.

[0005] To achieve the above objectives, this application adopts the following technical solution: In a first aspect, a back-contact solar cell is provided. The back-contact solar cell includes: a silicon substrate, including opposing first and second surfaces and a side surface disposed between the first and second surfaces; a protective layer is provided on at least one edge of the first surface; along a direction away from the silicon substrate, the protective layer includes a first doped layer, an insulating layer, and a second doped layer sequentially disposed on at least one edge of the first surface; the first doped layer and the second doped layer have opposite conductivity types; the first surface of the silicon substrate includes a plurality of first regions, on which the first doped layer is disposed; and the first regions and regions corresponding to the protective layers at at least one edge of the first surface are spaced apart to form gaps.

[0006] In conjunction with the first aspect, in some embodiments of the first aspect, the first surface of the silicon substrate further includes a plurality of second regions, the first regions and the second regions being alternately arranged, one of the first regions and the other of the second region being a first doped region and the other being a second doped region, the doping types of the first doped region and the second doped region being opposite.

[0007] In conjunction with the first aspect, in some embodiments of the first aspect, a protective layer is provided on at least one side.

[0008] In conjunction with the first aspect, in some embodiments of the first aspect, a passivation layer is further provided on the second doped layer on the protective layer.

[0009] In conjunction with the first aspect, in some embodiments of the first aspect, the passivation layer is composed of one or more of an oxide layer, a nitride layer, an oxide oxynitride layer, a carbide layer, and an amorphous silicon layer.

[0010] In conjunction with the first aspect, in some embodiments of the first aspect, the width of the second doped layer and the insulating layer in the protective layer along the first direction is smaller than the width of the first doped layer along the first direction, and the first direction intersects the extension direction of the protective layer.

[0011] In conjunction with the first aspect, in some embodiments of the first aspect, the widths of the second doped layer and the insulating layer along the first direction are equal or differ by a range of 1 μm to 10 μm.

[0012] In conjunction with the first aspect, in some embodiments of the first aspect, the width of the second doped layer and the insulating layer along the first direction ranges from 10µm to 200µm.

[0013] In conjunction with the first aspect, in some embodiments of the first aspect, along the first direction, the distance between the edge of the second doped layer or insulating layer adjacent to the side and the edge of the adjacent side of the first doped layer is a first distance, the first distance ranging from 10µm to 200µm.

[0014] In conjunction with the first aspect, in some embodiments of the first aspect, along the first direction, the distance between the edge of the second doped layer or insulating layer adjacent to the spacer and the edge of the adjacent spacer of the first doped layer is a second distance, and the second distance ranges from 10µm to 200µm.

[0015] In conjunction with the first aspect, in some embodiments of the first aspect, the width of the spacer along the first direction ranges from 50µm to 400µm, and the first direction intersects the extension direction of the protective layer.

[0016] In conjunction with the first aspect, in some embodiments of the first aspect, one of the first doped layer and the second doped layer is a polycrystalline silicon layer, microcrystalline silicon layer or amorphous silicon layer containing a first doping source, and the other is a polycrystalline silicon layer, microcrystalline silicon layer or amorphous silicon layer containing a second doping source, wherein the first doping source is an N-type doping source and the second doping source is a P-type doping source.

[0017] In conjunction with the first aspect, in some embodiments of the first aspect, the first doped layer includes a second doping source.

[0018] In conjunction with the first aspect, in some embodiments of the first aspect, the insulating layer is a silicon oxide layer containing a boron-doped source.

[0019] In a second aspect, a photovoltaic module is provided, which includes a back-contact solar cell provided in the first aspect and any embodiment thereof.

[0020] Thirdly, a photovoltaic system is provided, characterized in that the photovoltaic system includes the photovoltaic modules provided in the second aspect.

[0021] Based on the back-contact solar cell provided by this utility model, since a protective layer is provided on at least one edge of the first surface of the silicon substrate, the protective layer includes a first doped layer, an insulating layer and a second doped layer sequentially disposed on at least one edge of the first surface. Therefore, after the edge of the back-contact solar cell is subjected to external friction, the second doped layer, the insulating layer and the first doped layer can protect the edge of the silicon substrate, avoid wear on the edge of the silicon substrate, and reduce the risk of edge damage to the back-contact solar cell. At the same time, the first doped layer, the insulating layer and the second doped layer can also passivate the edge of the back-contact solar cell, reduce carrier recombination at the edge of the back-contact solar cell and improve the photoelectric conversion efficiency of the back-contact solar cell. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure of a back-contact solar cell provided by the present invention; Figure 2 This is a schematic diagram of another back-contact solar cell provided by this utility model.

[0023] Figure label: Back contact solar cell-10, silicon substrate-101, first surface-1011, first surface-1012, side surface-1013, protective layer-102, first doped layer-1021, insulating layer-1022, second doped layer-1023, spacer-103, passivation layer-104. Detailed Implementation

[0024] In this embodiment of the invention, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in this embodiment of the invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0025] Furthermore, to facilitate a clear description of the technical solutions of the embodiments of this utility model, the terms "first" and "second" are used in the embodiments of this utility model to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0026] It is understood that the term "embodiment" used throughout the specification means that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of the present invention. Therefore, the various embodiments throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It is understood that in the various embodiments of the present invention, the sequence number of each process does not imply the order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0027] It is understood that in this utility model, "when," "if," and "if" all refer to the corresponding processing that will be carried out under certain objective circumstances, and are not limited to a specific time, nor do they require a judgment action to be performed, nor do they imply any other limitations.

[0028] It is understood that some optional features in the embodiments of this utility model can be implemented independently in certain scenarios without relying on other features, such as the current solution on which they are based, to solve the corresponding technical problems and achieve the corresponding effects. Alternatively, they can be combined with other features as needed in certain scenarios. Correspondingly, the device given in the embodiments of this utility model can also implement these features or functions, which will not be elaborated here.

[0029] In this utility model, unless otherwise specified, the same or similar parts between the various embodiments can be referred to each other. In the various embodiments and implementation methods of this utility model, unless otherwise specified or logically conflicting, the terminology and / or descriptions between different embodiments and between the implementation methods of different embodiments are consistent and can be mutually referenced. The technical features in different embodiments and between the implementation methods of different embodiments can be combined according to their inherent logical relationships to form new embodiments, implementation methods, implementation methods, or implementation approaches. The following embodiments of this utility model do not constitute a limitation on the scope of protection of this utility model.

[0030] Interdigitated Back Contact (IBC) is a high-efficiency solar cell technology. The positive and negative metal electrodes of the IBC are arranged in an interdigitated pattern on the back surface of the IBC. This design eliminates the obstruction of metal grid lines on the front surface of the IBC, maximizing the illumination area, reducing optical losses, and improving short-circuit current and overall photoelectric conversion efficiency. To prevent direct contact between N-type and P-type doped regions, which would hinder effective carrier collection, an isolation region is placed at the boundary between the two regions. As the cell size decreases, the N-type and P-type doped regions are placed more densely.

[0031] In the edge region of the back contact solar cell 10, the edge region is easily scratched and worn, resulting in microcracks and defects, which become recombination centers for minority carriers (such as holes or electrons), easily causing leakage losses and thus reducing the photoelectric conversion efficiency of the back contact solar cell 10.

[0032] To address the aforementioned problems, this invention provides a back-contact solar cell, such as... Figure 1 As shown, the back-contact solar cell 10 includes: a silicon substrate 101, including opposing first surfaces 1011 and 1012 and a side surface 1013 disposed between the first surfaces 1011 and 1012; a protective layer 102 is provided on at least one edge of the first surface 1011; along the direction away from the silicon substrate 101, the protective layer 102 includes a first doped layer 1021, an insulating layer 1022 and a second doped layer 1023 sequentially disposed on at least one edge of the first surface 1011; the first doped layer 1021 and the second doped layer 1023 have opposite conductivity types; the first surface 1011 of the silicon substrate 101 includes a plurality of first regions, on which the first doped layer 1021 is disposed; and the first regions and the regions corresponding to the protective layer 102 at at least one edge of the first surface 1011 are spaced apart to form spacers 103.

[0033] Based on the back-contact solar cell 10 provided by this utility model, since a protective layer 102 is provided on at least one edge of the first surface 1011 of the silicon substrate 101, the protective layer 102 includes a first doped layer 1021, an insulating layer 1022 and a second doped layer 1023 sequentially disposed on at least one edge of the first surface 1011, the second doped layer 1023, the insulating layer 1022 and the first doped layer 1021 can protect the edge of the silicon substrate 101 after the edge of the back-contact solar cell 10 is subjected to external friction, thereby preventing the edge of the silicon substrate 101 from being worn and reducing the risk of edge damage to the back-contact solar cell 10. At the same time, the first doped layer 1021, the insulating layer 1022 and the second doped layer 1023 can also passivate the edge of the back-contact solar cell 10, reduce carrier recombination at the edge of the back-contact solar cell 10 and improve the photoelectric conversion efficiency of the back-contact solar cell 10.

[0034] The back contact cell can be a heterojunction back contact cell or an interdigitated back contact cell. Of course, the back contact cell can also be other types of back contact cells, and this utility model does not impose any specific limitations on this.

[0035] The surface of the silicon substrate 101 may not have any film layer, that is, the silicon substrate 101 is a silicon substrate without film layer, or various film layers may be formed on the surface of the silicon substrate 101, such as a tunneling oxide layer, etc. The present invention does not impose specific restrictions on the specific film layer structure of the silicon substrate 101.

[0036] For example, a tunneling oxide layer is formed on the surface of the silicon substrate 101, that is, the silicon substrate 101 is composed of a silicon substrate and a tunneling oxide layer.

[0037] The silicon substrate can be microcrystalline silicon, polycrystalline silicon, or amorphous silicon, and this invention does not impose any specific restrictions on it.

[0038] The tunneling oxide layer can be one or more of the following: silicon oxide layer, aluminum oxide layer, titanium oxide layer, zinc oxide layer, intrinsic amorphous silicon layer, intrinsic polycrystalline silicon layer, intrinsic nanocrystalline silicon layer, and intrinsic mixed-crystalline silicon layer. The tunneling oxide layer can work in conjunction with doped layers to achieve selective transport of photogenerated carriers through the quantum tunneling effect, while suppressing carrier recombination without affecting carrier absorption, thereby improving the photoelectric conversion efficiency of the back-contact solar cell.

[0039] Along the thickness direction of the back contact solar cell, the thickness of the tunneling oxide layer ranges from 0.1 nm to 5 nm. For example, the thickness of the tunneling oxide layer can be 0.1 nm, 1 nm, 0.1 nm, 2 nm, 3 nm, 4 nm, or 5 nm. Of course, the thickness of the tunneling oxide layer can also have other values, and this invention does not impose specific limitations on this. By setting the thickness of the tunneling oxide layer within a suitable range, it is possible to avoid reducing the selective transport effect of photogenerated carriers due to an excessively thin tunneling oxide layer, and to avoid affecting the absorption of light by the back contact solar cell due to an excessively thick tunneling oxide layer. Setting an appropriate thickness for the tunneling oxide layer can improve the selectivity of the tunneling oxide layer for photogenerated carriers and enhance the light absorption efficiency of the back contact solar cell.

[0040] The first surface 1011 of the silicon substrate 101 can be the back surface of the silicon substrate 101. The silicon substrate 101 also includes a second surface 1012 opposite to the first surface 1011, and the second surface 1012 is the light-facing surface of the silicon substrate 101.

[0041] The first surface 1011 of the silicon substrate 101 also includes a plurality of second regions. The first region and the second region are alternately arranged. One of the first region and the second region is a first doped region with a first doped layer 1021 disposed thereon. The other is a second doped region with a second doped layer 1023 disposed thereon. The doping types of the first doped region and the second doped region are opposite. Correspondingly, the polarities of the first doped layer 1021 and the second doped layer 1023 are opposite.

[0042] One of the first doped region and the second doped region is a P-type doped region, and the other is an N-type doped region. For example, if the first doped region is a P-type doped region, the first doped layer 1021 on the first doped region is a P-type doped layer, and correspondingly, if the second doped region is an N-type doped region, the second doped layer 1023 on the second doped region is an N-type doped layer; or, if the first doped region is an N-type doped region, the first doped layer 1021 on the first doped region is an N-type doped layer, and correspondingly, if the second doped region is a P-type doped region, the second doped layer 1023 on the second doped region is a P-type doped layer.

[0043] The first doped layer 1021 and the second doped layer 1023 are, respectively, a polycrystalline silicon layer, a microcrystalline silicon layer, or an amorphous silicon layer containing a first doping source, and the other is a polycrystalline silicon layer, a microcrystalline silicon layer, or an amorphous silicon layer containing a second doping source. The first doping source is an N-type doping source, and the second doping source is a P-type doping source.

[0044] If the first doped layer 1021 is an N-type doped layer, then the first doped layer 1021 contains a first doping source, that is, the polarity of the first doped layer 1021 is N-type. Correspondingly, the second doped layer 1023 is a P-type doped layer, and the second doped layer 1023 contains a second doping source, that is, the polarity of the second doped layer 1023 is P-type. If the first doped layer 1021 is a P-type doped layer, then the first doped layer 1021 contains a second doping source, that is, the polarity of the first doped layer 1021 is P-type. Correspondingly, the second doped layer 1023 is an N-type doped layer, and the second doped layer 1023 contains a first doping source, that is, the polarity of the second doped layer 1023 is N-type.

[0045] Different dopant sources in a doped layer will result in different polarities in the doped layer. For example, when the first doped layer 1021 or the second doped layer 1023 contains a first dopant source, the first dopant source can be phosphorus, arsenic, or antimony. Of course, the first dopant source can also be other dopant sources, and this invention does not impose specific limitations on this. When the first doped layer 1021 or the second doped layer 1023 contains a second dopant source, the second dopant source can be boron, gallium, or aluminum. Of course, the second dopant source can also be other dopant sources, and this invention does not impose specific limitations on this.

[0046] To fabricate the first doped layer 1021 and the second doped layer 1023, a full-surface first doped layer 1021 is typically fabricated on the first surface 1011 of the silicon substrate 101. Then, a portion of the first doped layer 1021 is removed, resulting in multiple spaced-apart first doped layers 1021. Next, a full-surface second doped layer 1023 is fabricated, and the second doped layer 1023 on the first doped layer 1021 is removed, resulting in a spaced-apart distribution of the first and second doped layers 1021. For the first doped layer 1021 or the second doped layer 1023 in the protective layer 102, during the removal process, a mask can be used to conceal the first doped layer 1021 or the second doped layer 1023 in the protective layer 102, preventing their removal. This saves on the fabrication process of the protective layer 102 and reduces the cost of the back contact solar cell.

[0047] The insulating layer 1022 is a silicon oxide layer containing a boron dopant source, or it can also be a silicon oxide layer containing a phosphorus dopant source. Preferably, the insulating layer 1022 is a silicon oxide layer containing a boron dopant source. Since the silicon oxide layer containing the dopant source is a byproduct of the doping process, it usually needs to be removed. In the solution provided by this invention, by setting the boron dopant silicon oxide layer as the insulating layer 1022, on the one hand, there is no need for an additional process to remove the boron dopant silicon oxide layer, and on the other hand, there is no need for an additional process to fabricate the insulating layer 1022. This reduces the number of steps in the back contact cell process, lowers the cost of the back contact cell, and protects the back contact cell.

[0048] The dimensions of the first doped layer 1021, the insulating layer 1022, and the second doped layer 1023 are described below.

[0049] Along the thickness direction of the back contact cell, the thickness of the first doped layer 1021 or the second doped layer 1023 is greater than or equal to 10 nm, and the thickness of the first doped layer 1021 or the second doped layer 1023 is less than or equal to 100 nm. For example, the thickness of the first doped layer 1021 or the second doped layer 1023 is 10 nm, 20 nm, 40 nm, 60 nm, 80 nm, or 100 nm. Of course, the thickness of the first doped layer 1021 or the second doped layer 1023 can also have other values, and this utility model does not impose specific limitations on this. Thus, by setting the thickness of the first doped layer 1021 or the second doped layer 1023 within a suitable range, it is possible to avoid the first doped layer 1021 or the second doped layer 1023 being too thin, resulting in poor protection of the silicon substrate 101, while also avoiding the first doped layer 1021 or the second doped layer 1023 being too thick, which would increase the cost of the back contact cell. Setting an appropriate thickness for the first doped layer 1021 or the second doped layer 1023 can enhance the protection effect of the first doped layer 1021 or the second doped layer 1023 on the silicon substrate 101 and reduce the cost of the back contact cell.

[0050] Along the thickness direction of the back contact solar cell, the thickness of the insulating layer 1022 is greater than or equal to 5 nm and less than or equal to 70 nm. For example, the thickness of the insulating layer 1022 can be 5 nm, 10 nm, 20 nm, 40 nm, 60 nm, or 70 nm. Of course, the thickness of the insulating layer 1022 can also have other values, and this invention does not impose specific limitations on this. Thus, by setting the thickness of the insulating layer 1022 within a suitable range, it is possible to avoid poor insulation between the first doped layer 1021 or the second doped layer 1023, which are insulated by the insulating layer 1022, and poor protection of the silicon substrate 101 due to the insulating layer 1022 being too thin. Conversely, it is also possible to avoid increasing the cost of the back contact solar cell due to the insulating layer 1022 being too thick. Setting an appropriate thickness for the insulating layer 1022 can enhance the protection effect of the insulating layer 1022 on the silicon substrate 101 and reduce the cost of the back contact solar cell.

[0051] Along the first direction, the width of the first doped layer 1021 is 50μm-300μm. For example, the width of the first doped layer 1021 can be 50μm, 100μm, 200μm, or 300μm. Of course, the width of the first doped layer 1021 can also have other values, and this invention does not impose specific limitations on this. Thus, by setting the width of the first doped layer 1021 within a suitable range, it is possible to avoid a situation where the first doped layer 1021 has a small protection area on the first surface 1011 of the silicon substrate 101 due to its excessively narrow width, resulting in poor protection of the first surface 1011 of the silicon substrate 101. It is also possible to avoid an increase in the cost of the back contact solar cell due to an excessively wide width of the first doped layer 1021. Setting a suitable width for the first doped layer 1021 can increase the protection effect of the first doped layer 1021 on the first surface 1011 of the silicon substrate 101 and reduce the cost of the back contact solar cell.

[0052] It should be noted that the first direction intersects the extension direction of the protective layer 102. For example, the angle between the first direction and the extension direction of the protective layer 102 is a right angle, that is, the first direction is perpendicular to the extension direction of the protective layer 102; or the angle between the first direction and the extension direction of the protective layer 102 is an acute angle or an obtuse angle. This utility model does not impose specific limitations on this.

[0053] The width of the second doped layer 1023 and the insulating layer 1022 in the protective layer 102 along the first direction is greater than or equal to the width of the first doped layer 1021 along the first direction, or the width of the second doped layer 1023 and the insulating layer 1022 in the protective layer 102 along the first direction is less than the width of the first doped layer 1021 along the first direction. This utility model does not impose specific limitations on this.

[0054] Preferably, the width of the second doped layer 1023 and the insulating layer 1022 in the protective layer 102 along the first direction is smaller than the width of the first doped layer 1021 along the first direction. This reduces the overlap area between the second doped layer 1023 and the first doped layer 1021, thereby reducing the risk of short circuit between the second doped layer 1023 and the first doped layer 1021. At the same time, since the width of the insulating layer 1022 along the first direction is smaller than the width of the first doped layer 1021 along the first direction, the cost of manufacturing the insulating layer 1022 can be reduced, thereby reducing the cost of the back contact cell.

[0055] When the width of the second doped layer 1023 and the insulating layer 1022 in the protective layer 102 along the first direction is smaller than the width of the first doped layer 1021 along the first direction, the edges of the second doped layer 1023 and the insulating layer 1022 near the side surface 1013 of the silicon substrate 101 can be connected to the edge of the first doped layer 1021 near the side surface 1013 of the silicon substrate 101. That is, the edges of the second doped layer 1023 and the insulating layer 1022 away from the side surface 1013 of the silicon substrate 101 are connected to the edge of the first doped layer 1021. The edges of the second doped layer 1021 away from the silicon substrate 101 and the insulating layer 1022 away from the silicon substrate 101 and the side 1013 are not connected; or, the edges of the second doped layer 1023 and the insulating layer 1022 away from the silicon substrate 101 and the side 1013 of the first doped layer 1021 away from the silicon substrate 101 can be connected, that is, the edges of the second doped layer 1023 and the insulating layer 1022 near the silicon substrate 101 and the edges of the first doped layer 1021 near the silicon substrate 101 and the side 1013 of the first doped layer 1021 are not connected; or, as Figure 1 or Figure 2 As shown, the edges of the second doped layer 1023 and the insulating layer 1022 away from the silicon substrate 101 are not connected to the edges of the first doped layer 1021 away from the silicon substrate 101, and the edges of the second doped layer 1023 and the insulating layer 1022 close to the silicon substrate 101 are also not connected to the edges of the first doped layer 1021 close to the silicon substrate 101. This utility model does not impose specific limitations in this regard.

[0056] When the edges of the second doped layer 1023 and the insulating layer 1022 near the side surface 1013 of the silicon substrate 101 are not connected to the edge of the first doped layer 1021 near the side surface 1013 of the silicon substrate 101, such as Figure 1As shown, along the first direction, the distance between the edge of the second doped layer 1023 or insulating layer 1022 adjacent to the side 1013 and the edge of the side 1013 adjacent to the first doped layer 1021 is the first distance h1, which ranges from 10µm to 200µm. For example, the first distance h1 can be 10µm, 50µm, 100µm, 150µm, or 200µm. Of course, the first distance h1 can also have other values, and this invention does not impose any specific limitations on this. Thus, by setting the first distance h1 within a suitable range, it is possible to avoid micro-leakage at the edges of the first doped layer 1021 and the second doped layer 1023 due to the first distance h1 being too small, resulting in greater carrier recombination between the second doped layer 1023 and the first doped layer 1021, thereby reducing the photoelectric conversion efficiency of the back contact cell. It is also possible to avoid reducing the protection area of ​​the silicon substrate 101 by the second doped layer 1023 and the insulating layer 1022 due to the first distance h1 being too large. Setting a suitable distance for the first distance h1 can improve the photoelectric conversion efficiency of the back contact cell and increase the protection area of ​​the second doped layer 1023 and the insulating layer 1022 on the silicon substrate 101.

[0057] To ensure that the edges of the second doped layer 1023 and the insulating layer 1022 near the side surface 1013 of the silicon substrate 101 are not connected to the edge of the first doped layer 1021 near the side surface 1013 of the silicon substrate 101, during the fabrication of the second doped layer 1023 and the insulating layer 1022, the edges of the second doped layer 1023 and the insulating layer 1022 near the side surface 1013 of the silicon substrate 101 can be initially connected to the edge of the first doped layer 1021 near the side surface 1013 of the silicon substrate 101. In subsequent processes, coating is applied to the surface of the back contact solar cell 10 corresponding to the first surface 1011. The etching solution will flow down the sidewalls, thereby etching away the second doped layer 1023 and the insulating layer 1022 near the side surface 1013 of the silicon substrate 101. In this way, the edges of the second doped layer 1023 and the insulating layer 1022 near the side surface 1013 of the silicon substrate 101 are not connected to the edges of the first doped layer 1021 near the side surface 1013 of the silicon substrate 101. This also avoids the etching solution from etching the silicon substrate 101, reducing the risk of recombination caused by etching the silicon substrate 101, and reducing the cost of fabricating the second doped layer 1023 and the insulating layer 1022.

[0058] When the edges of the second doped layer 1023 and the insulating layer 1022 on the side 1013 away from the silicon substrate 101 are not connected to the edges of the first doped layer 1021 on the side 1013 away from the silicon substrate 101, such as Figure 1 or Figure 2As shown, along the first direction, the distance between the edge of the second doped layer 1023 and the insulating layer 1022 away from the side surface 1013 of the silicon substrate 101 and the edge of the first doped layer 1021 away from the side surface 1013 of the silicon substrate 101, i.e., the edge of the second doped layer 1023 or the insulating layer 1022 adjacent to the spacer 103 and the edge of the adjacent spacer 103 of the first doped layer 1021, is the second distance h2. The range of the second distance h2 is 10µm to 200µm. For example, the second distance h2 is 10µm, 50µm, 100µm, 150µm, or 200µm. Of course, the second distance h2 can also have other values, and this utility model does not impose specific limitations on it. Thus, by setting the second distance h2 within a suitable range, it is possible to avoid micro-leakage at the edges of the first doped layer 1021 and the second doped layer 1023 due to an excessively small second distance h2, resulting in greater carrier recombination between the second doped layer 1023 and the first doped layer 1021 and reducing the photoelectric conversion efficiency of the back contact cell. Conversely, it is also possible to avoid a reduction in the protection area of ​​the second doped layer 1023 and the insulating layer 1022 on the silicon substrate 101 due to an excessively large second distance h2. Setting a suitable distance h2 can improve the photoelectric conversion efficiency of the back contact cell and increase the protection area of ​​the second doped layer 1023 and the insulating layer 1022 on the silicon substrate 101.

[0059] The width of the second doped layer 1023 and the insulating layer 1022 along the first direction ranges from 10µm to 200µm. For example, the width of the second doped layer 1023 and the insulating layer 1022 along the first direction is 10µm, 50µm, 100µm, 150µm, or 200µm. Of course, the width of the second doped layer 1023 and the insulating layer 1022 along the first direction can also have other values, and this utility model does not impose specific limitations on this. Thus, by setting the widths of the second doped layer 1023 and the insulating layer 1022 within a suitable range along the first direction, it is possible to avoid both a small protection area for the first surface 1011 of the silicon substrate 101 due to excessively narrow widths of the second doped layer 1023 and the insulating layer 1022, which would result in poor protection of the first surface 1011 of the silicon substrate 101, and an excessively wide width, which would increase the cost of the back contact cell. Setting appropriate widths for the second doped layer 1023 and the insulating layer 1022 can increase the protection effect of the second doped layer 1023 and the insulating layer 1022 on the first surface 1011 of the silicon substrate 101 and reduce the cost of the back contact cell.

[0060] The second doped layer 1023 and the insulating layer 1022 have equal widths along the first direction, which increases the ease of fabricating the second doped layer 1023 and the insulating layer 1022.

[0061] Alternatively, the widths of the second doped layer 1023 and the insulating layer 1022 along the first direction may not be equal. For example, the difference in width between the second doped layer 1023 and the insulating layer 1022 along the first direction can range from 1 μm to 10 μm. For instance, the difference in width between the second doped layer 1023 and the insulating layer 1022 along the first direction can be 1 μm, 5 μm, or 10 μm. Of course, the difference in width between the second doped layer 1023 and the insulating layer 1022 along the first direction can also have other values, and this invention does not impose specific limitations on this. Thus, since the widths of the second doped layer 1023 and the insulating layer 1022 along the first direction are not equal, the widths of the second doped layer 1023 and the insulating layer 1022 can be set separately when fabricating them, thereby improving the flexibility of fabricating the second doped layer 1023 and the insulating layer 1022.

[0062] When the widths of the second doped layer 1023 and the insulating layer 1022 along the first direction are not equal, the edge of the second doped layer 1023 near the side surface 1013 of the silicon substrate 101 can be connected to the edge of the insulating layer 1022 near the side surface 1013 of the silicon substrate 101. That is, the edge of the second doped layer 1023 away from the silicon substrate 101 is not connected to the edge of the insulating layer 1022 away from the silicon substrate 101. Alternatively, the edge of the second doped layer 1023 away from the silicon substrate 101 can be connected to the edge of the insulating layer 1022 away from the silicon substrate 101. The edges of the second doped layer 1023 and the insulating layer 1022 are connected. That is, the edge of the second doped layer 1023 near the silicon substrate 101 is not connected to the edge of the insulating layer 1022 near the silicon substrate 101. Alternatively, the edge of the second doped layer 1023 away from the silicon substrate 101 is not connected to the edge of the insulating layer 1022 away from the silicon substrate 101, and the edge of the second doped layer 1023 near the silicon substrate 101 is not connected to the edge of the insulating layer 1022 near the silicon substrate 101. This utility model does not impose specific limitations on this.

[0063] The position of the protective layer 102, which includes the first doped layer 1021, the insulating layer 1022, and the second doped layer 1023, in the back contact cell will be described below with reference to the accompanying drawings.

[0064] like Figure 1As shown, the protective layer 102 can be disposed on at least one edge of the first surface 1011. For example, the protective layer 102 can be disposed on one edge of the first surface 1011, or the protective layer 102 can be disposed on two adjacent edges of the first surface 1011, or the protective layer 102 can be disposed on two opposite edges of the first surface 1011, or the protective layer 102 can be disposed on three sequentially adjacent edges of the first surface 1011, or the protective layer 102 can be disposed on four edges of the first surface 1011. The present invention does not impose specific limitations in this regard.

[0065] When the edges of the second doped layer 1023 and the insulating layer 1022 near the side surface 1013 of the silicon substrate 101 can be connected to the edge of the first doped layer 1021 near the side surface 1013 of the silicon substrate 101, in addition to providing a protective layer 102 at at least one edge of the first surface 1011, such as Figure 2 As shown, a protective layer 102 may also be provided on at least one side 1013 of the silicon substrate 101. For example, the protective layer 102 may be provided on one side 1013 of the silicon substrate 101, or on two adjacent sides 1013 of the silicon substrate 101, or on two opposite sides 1013 of the silicon substrate 101, or on three sequentially adjacent sides 1013 of the silicon substrate 101, or on four sides 1013 of the silicon substrate 101. This invention does not impose specific limitations in this regard. Thus, by providing a protective layer 102 on at least one side 1013 of the silicon substrate 101, the side 1013 of the silicon substrate 101 can be prevented from being worn, reducing the risk of damage to the side 1013 of the back contact solar cell 10. At the same time, the first doped layer 1021, the insulating layer 1022, and the second doped layer 1023 can also passivate the side 1013 of the back contact solar cell 10, reducing carrier recombination on the side 1013 of the back contact solar cell 10 and improving the photoelectric conversion efficiency of the back contact solar cell 10.

[0066] like Figure 2 As shown, the edge of the protective layer 102 and the side surface 1013 of the protective layer 102 can be connected, or the edge of the protective layer 102 and the side surface 1013 of the protective layer 102 can be unconnected. This utility model does not impose any specific restrictions on this.

[0067] When the edge of the protective layer 102 is connected to the side 1013 of the protective layer 102, the protective layer 102 on the edge can be integrally formed with the protective layer 102 on the side 1013, or they can be made separately. This utility model does not impose any specific restrictions on this.

[0068] like Figure 1 or Figure 2 As shown, the first surface 1011 of the silicon substrate 101 is further provided with a spacer portion 103. The width of the spacer portion 103 along the first direction ranges from 50µm to 400µm, and the first direction intersects the extension direction of the protective layer 102. For example, the width of the spacer portion 103 along the first direction is 50μm, 100μm, 200μm, 300μm, or 400μm. Of course, the width of the spacer portion 103 along the first direction can also have other values, and this utility model does not impose specific limitations on this. In this way, by setting the width of the spacer portion 103 along the first direction within a suitable range, it is possible to avoid insufficient spacing between adjacent doped layers due to the spacer portion 103 being too narrow along the first direction, thus reducing the insulation between adjacent doped layers. It is also possible to avoid the doped layer having a small area on the first surface 1011 due to the spacer portion 103 being too wide along the first direction, thus reducing the separation effect of the doped layer on the charge carriers. Setting a suitable width for the spacer 103 can improve the insulation between adjacent doped layers and enhance the separation effect of the doped layers on charge carriers.

[0069] like Figure 1 or Figure 2 As shown, a passivation layer 104 is further disposed on the second doped layer 1023 on the protective layer 102. Thus, the passivation layer 104 can further protect the silicon substrate 101, further reducing wear and surface recombination of the silicon substrate 101. Simultaneously, the passivation layer 104 can prevent corrosion of the back contact cell surface, avoiding back contact cell failure and improving the lifespan of the back contact cell. Furthermore, the passivation layer 104 can also increase the refractive index of the back contact cell surface, improving the light absorption capacity of the back contact cell, thereby improving the photoelectric conversion efficiency of the back contact cell.

[0070] The passivation layer 104 is composed of one or more of an oxide layer, a nitride layer, an oxide oxynitride layer, a carbide layer, and an amorphous silicon layer. For example, the passivation layer 104 includes at least one of an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, a silicon carbonitride layer, or a silicon oxide layer. Exemplarily, the passivation layer 104 includes an aluminum oxide layer, or a silicon nitride layer, or a silicon oxide layer, or a silicon oxide layer and an aluminum oxide layer, or a silicon oxide layer and a silicon nitride layer, or an aluminum oxide layer, a silicon oxide layer, and a silicon nitride layer. This invention does not impose specific limitations in these respects.

[0071] Along the thickness direction of the back contact solar cell, the thickness of the passivation layer 104 can be 5nm-100nm. For example, the thickness of the passivation layer 104 can be 5nm, 20nm, 50nm, 70nm, or 100nm. Of course, the thickness of the passivation layer 104 can also be other values, and this invention does not impose specific limitations on this. By setting the thickness of the passivation layer 104 within a suitable range, it is possible to avoid both poor passivation effect and inadequate protection of the silicon substrate 101 due to a thin passivation layer 104, and reduced light absorption and increased cost of the back contact solar cell due to a thick passivation layer 104. Setting an appropriate thickness for the passivation layer 104 can improve its passivation effect, enhance its protection of the silicon substrate 101, improve the light absorption of the back contact solar cell, and reduce the cost of the back contact solar cell.

[0072] This utility model also provides a photovoltaic module, which includes the back-contact solar cell 10 provided in the above embodiments.

[0073] Furthermore, photovoltaic modules may also include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film. The encapsulating film can be filled between the front and back sides of the back-contact solar cell 10, the photovoltaic glass, and adjacent back-contact solar cells 10. As a filler, it can be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulating film can be EVA film or POE film, and the specific choice can be made according to the actual situation, without limitation.

[0074] Photovoltaic glass can be applied to the encapsulating film on the front side of the back-contact solar cell 10. The photovoltaic glass can be ultra-clear glass, which has high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can achieve a light transmittance of over 93%. It can protect the back-contact solar cell 10 while minimizing any impact on its efficiency. Simultaneously, the encapsulating film bonds the photovoltaic glass and the back-contact solar cell 10 together, providing sealing, insulation, waterproofing, and moisture protection for the back-contact solar cell 10.

[0075] The backsheet can be attached to the adhesive film on the back of the back-contact solar cell 10. The backsheet provides protection and support for the back-contact solar cell 10, and possesses reliable insulation, water resistance, and aging resistance. Multiple options are available for the backsheet, typically tempered glass, acrylic glass, aluminum alloy TPT composite adhesive film, etc., and the specific choice depends on the specific circumstances and is not limited here. The backsheet, back-contact solar cell 10, adhesive film, and photovoltaic glass can be housed within a metal frame. The metal frame serves as the main external support structure for the entire photovoltaic module, providing stable support and installation. For example, the photovoltaic module can be installed at the desired location using the metal frame.

[0076] This utility model provides a photovoltaic system, including the photovoltaic module provided in the above embodiment.

[0077] In this embodiment, the photovoltaic system can be applied in photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants. It can also be applied to equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it is understood that the application scenarios of the photovoltaic system are not limited to these; that is, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic modules; for example, multiple photovoltaic modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to achieve solar power supply.

[0078] Although the present invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, the disclosure, and the appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0079] Although the present invention has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of the present invention. Accordingly, this specification and drawings are merely exemplary descriptions of the present invention as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the present invention. Clearly, those skilled in the art can make various alterations and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such modifications and modifications of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and modifications.

Claims

1. A back-contact solar cell, characterized in that, The back-contact solar cell includes: A silicon substrate includes opposing first and second surfaces and a side surface disposed between the first and second surfaces. A protective layer is provided on at least one edge of the first surface in a direction away from the silicon substrate. The protective layer includes a first doped layer, an insulating layer, and a second doped layer sequentially disposed on at least one edge of the first surface. The first doped layer and the second doped layer have opposite conductivity types. The first surface of the silicon substrate includes a plurality of first regions, on which the first doped layer is disposed, and the regions corresponding to the protective layer of at least one edge of the first surface are spaced apart to form a gap.

2. The back-contact solar cell according to claim 1, characterized in that, The first surface of the silicon substrate further includes a plurality of second regions, the first region and the second region being alternately arranged, one of the first region and the other of the second region being a first doped region and the other being a second doped region, the doping types of the first doped region and the second doped region being opposite.

3. The back-contact solar cell according to claim 1, characterized in that, The protective layer is provided on at least one side.

4. The back-contact solar cell according to claim 1, characterized in that, A passivation layer is also provided on the second doped layer on the protective layer.

5. The back-contact solar cell according to claim 4, characterized in that, The passivation layer is composed of one or more of the following: oxide layer, nitride layer, oxynitride layer, carbide layer, and amorphous silicon layer.

6. The back-contact solar cell according to claim 1, characterized in that, The width of the second doped layer and the insulating layer in the protective layer along the first direction is smaller than the width of the first doped layer along the first direction, and the first direction intersects the extension direction of the protective layer.

7. The back-contact solar cell according to claim 6, characterized in that, The widths of the second doped layer and the insulating layer along the first direction are equal or differ by a range of 1 μm to 10 μm.

8. The back-contact solar cell according to claim 7, characterized in that, The width of the second doped layer and the insulating layer along the first direction ranges from 10µm to 200µm.

9. The back-contact solar cell according to claim 7, characterized in that, Along the first direction, the distance between the edge of the second doped layer or the insulating layer adjacent to the side surface and the edge of the first doped layer adjacent to the side surface is a first distance, and the first distance ranges from 10µm to 200µm.

10. The back-contact solar cell according to claim 6, characterized in that, Along the first direction, the distance between the edge of the second doped layer or the insulating layer adjacent to the spacer and the edge of the first doped layer adjacent to the spacer is the second distance, and the second distance ranges from 10µm to 200µm.

11. The back-contact solar cell according to claim 1, characterized in that, The width of the spacer portion along the first direction ranges from 50µm to 400µm, and the first direction intersects the extension direction of the protective layer.

12. The back-contact solar cell according to claim 1, characterized in that, The first doped layer and the second doped layer are respectively a polycrystalline silicon layer, a microcrystalline silicon layer or an amorphous silicon layer containing a first doping source, and a polycrystalline silicon layer, a microcrystalline silicon layer or an amorphous silicon layer containing a second doping source. The first doping source is an N-type doping source and the second doping source is a P-type doping source.

13. A photovoltaic module, characterized in that, The photovoltaic module includes the back-contact solar cell as described in any one of claims 1-12.

14. A photovoltaic system, characterized in that, The photovoltaic system includes the photovoltaic module as described in claim 13.