A MEMS Actuation Cooling Chip
By constructing the actuator and drive circuit in the MEMS actuator cooling chip using a CMOS standard wafer, and achieving monolithic integration using low-temperature bonding and CMOS-compatible processes, the problems of complex MEMS actuator structure and airtightness are solved, heat dissipation efficiency and packaging reliability are improved, and it is suitable for compact electronic devices.
Patent Information
- Application Number
- CN202522289310.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-29
- Publication Date
- 2026-11-06
- Estimated Expiration
- 2035-10-29
AI Technical Summary
Existing MEMS actuators require additional physical and electrical interconnection through system-level packaging, resulting in complex structures, significant parasitic effects, and defects in airtightness and reliability, making them difficult to integrate with CMOS circuits on a single chip.
Design a MEMS actuation cooling chip, using a CMOS standard wafer to construct the actuator and driving circuit, and achieve monolithic integration through low-temperature bonding and CMOS-compatible processes. The reciprocating motion of the actuator generates directional pulsed airflow for heat dissipation. The packaging structure adopts CMOS-compatible anodic bonding and low-temperature bonding processes to ensure hermeticity and electrical isolation.
It achieves seamless integration of MEMS actuators and CMOS circuits, reduces interconnect losses and production costs, improves package reliability and consistency, enhances heat dissipation efficiency, and meets the needs of compact electronic devices.
Smart Images
Figure CN224947974U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of semiconductor cooling, and in particular to a MEMS actuated cooling chip. Background Technology
[0002] With the continuous shrinking of semiconductor device feature sizes and the rapid development of 3D integration technology, the power density of semiconductor devices such as high-performance computing chips, 5G RF modules, and artificial intelligence accelerators is growing exponentially. Thermal management has become a key bottleneck restricting their performance improvement and reliability.
[0003] Microelectromechanical systems (MEMS) technology offers a promising solution to the aforementioned problems. Among them, MEMS synthetic jet actuators can generate directional pulsed airflow through the reciprocating vibration of microstructures, directly impacting the heating surface and effectively disrupting the stagnant thermal boundary layer, thereby greatly enhancing convective heat transfer efficiency—an ideal new heat dissipation solution. However, despite the validated heat dissipation principle, this technology faces a fundamental obstacle to large-scale commercial application, especially in consumer electronics: the structural design of most existing MEMS actuators is significantly incompatible with the monolithic integration of mainstream CMOS integrated circuits. This structural mismatch specifically leads to the following problems:
[0004] First, the system integration structure is complex and introduces parasitic effects. Traditional MEMS actuators are typically discrete chip structures, requiring physical and electrical interconnection with CMOS driver circuits via system-in-package (SISP). This discrete structure not only increases package size and occupies valuable internal space, but also introduces significant parasitic resistance, inductance, and capacitance due to the introduction of additional bonding wires, solder joints, and interconnect substrates. These parasitic components reduce system energy efficiency, affect signal integrity, increase the risk of failure, and make it difficult to meet the compact heat dissipation requirements of highly integrated electronic devices.
[0005] Second, the actuator body structure has defects in airtightness and reliability. Some designs use pre-etched cavities or complex decoupling film structures to achieve integration with CMOS chips at the packaging level, resulting in deficiencies in airtightness and mechanical stability of the actuator (10)'s vibration components, cavities, and fluid channels. Such structures are prone to problems such as air leakage, material fatigue, or output displacement attenuation, which not only limits their heat dissipation efficiency but also reduces the reliability of the device under long-term operating conditions, failing to fully realize the theoretical heat dissipation potential of synthetic jet technology.
[0006] Therefore, the semiconductor device field urgently needs to develop a MEMS actuator structure that can fundamentally achieve monolithic integration with CMOS circuits. This structure should be built directly on CMOS wafers, making full use of the standard layers and materials in integrated circuit manufacturing to achieve seamless integration of the actuation unit and control circuitry at the chip level. Utility Model Content
[0007] This invention provides a MEMS actuator cooling chip, which aims to solve the problems of structural complexity and significant parasitic effects caused by the need for additional system-level packaging to achieve physical and electrical interconnection in MEMS actuators.
[0008] To achieve the above objectives, embodiments of this utility model provide a MEMS actuation cooling chip, comprising:
[0009] The actuator is a MEMS actuator.
[0010] The bottom structure includes, from top to bottom, a first silicon substrate, a first glass layer, and a second silicon substrate. A recessed first cavity is provided on the first silicon substrate and the first glass layer. The actuator is disposed on the first silicon substrate and seals the first cavity. A CMOS driving circuit is integrated on the second silicon substrate. The CMOS driving circuit is electrically connected to the actuator to drive the actuator to deform.
[0011] A packaging structure is disposed on the bottom structure. The packaging structure encloses the actuator in a second cavity formed by the packaging structure. The actuator is provided with a central through hole, which connects the first cavity and the second cavity. The top of the packaging structure is used to fix the chip body.
[0012] Preferably, the actuator includes, from top to bottom, an upper electrode assembly, a piezoelectric assembly, a lower electrode assembly, and a silicon-based assembly. The upper electrode assembly and the lower electrode assembly are respectively disposed above and below the piezoelectric assembly and are electrically connected to the piezoelectric assembly. The silicon-based assembly is disposed below the lower electrode assembly, and the silicon-based assembly is bonded to the first silicon substrate by a low-temperature bonding process.
[0013] Preferably, both the upper electrode assembly and the lower electrode assembly are layered structures with a thickness of 0.1 μm formed by sputtering Mo material;
[0014] The piezoelectric component is a layered structure with a thickness of 1 μm formed by low-temperature sputtering of AlN material.
[0015] Preferably, the first silicon substrate and the second silicon substrate are CMOS standard wafers; a TGV is disposed on the first glass layer, and a TSV electrically connected to the TGV is disposed on the first silicon substrate; the first silicon substrate is bonded to the first glass layer by a low-temperature bonding process, the second silicon substrate is bonded to the first glass layer by a CMOS anodic bonding process, and the output terminal of the CMOS driving circuit on the second silicon substrate is electrically connected to the upper electrode assembly and the lower electrode assembly through the TGV and the TSV.
[0016] Preferably, the TGV and TSV have the same structure, including an electrical connection hole formed on the first glass layer or the first silicon substrate and a composite conductive layer deposited in the electrical connection hole, wherein the composite conductive layer consists of an inner layer made of Au and an outer layer made of TiW material from the hole center to the hole wall.
[0017] Preferably, the packaging structure includes a third glass layer, a third silicon substrate, and a second glass layer arranged from top to bottom; the second cavity penetrates the packaging structure along the stacking direction of the packaging structure; the second glass layer and the first silicon substrate are bonded together using a CMOS anodic bonding process; the second glass layer and the third silicon substrate are bonded together using a low-temperature bonding process; the third silicon substrate and the third glass layer are bonded together using a CMOS anodic bonding process; and the chip body is mounted on top of the third glass layer.
[0018] Preferably, the size of the first cavity formed on the first silicon substrate and the first glass layer is smaller than the size of the actuator, so that the silicon-based component of the actuator is bonded to the first silicon substrate by a low-temperature bonding process.
[0019] Preferably, the third glass layer, the third silicon substrate, and the second glass layer have lateral openings communicating with the second cavity, and the opening directions of the third glass layer, the third silicon substrate, and the second glass layer are consistent.
[0020] Preferably, the first glass layer, the second glass layer, and the third glass layer are all borosilicate glass.
[0021] Preferably, the central through-hole is a through-hole formed by an ICP etching process.
[0022] The above-mentioned solution of this utility model has the following beneficial effects:
[0023] This application achieves efficient heat dissipation by generating pulsating jets through voltage-driven actuators to oscillate and vertically impact the thermal boundary layer. Moreover, the overall manufacturing process is compatible with CMOS standard processes, reducing interconnection losses between chips, lowering production costs and integration difficulties caused by process incompatibility, and ensuring the reliability and consistency of the package.
[0024] Other features and advantages of this invention will be described in detail in the following detailed description section. Attached Figure Description
[0025] Figure 1 This is a schematic diagram of the appearance of this utility model;
[0026] Figure 2 This is a longitudinal sectional view of the present invention;
[0027] Figure 3 This is a schematic diagram of the actuator and the bottom structure.
[0028] Figure 4 This is a longitudinal sectional view of the actuator and the bottom structure;
[0029] Figure 5 is a schematic diagram of the actuator cooling the chip body (package structure omitted), in which:
[0030] Figure 5a This is a schematic diagram of the actuator moving downwards;
[0031] Figure 5b This is a schematic diagram of the actuator moving upwards.
[0032] [Explanation of Labels in the Attached Image]
[0033] 10-Actuator, 11-Central through-hole, 12-Upper electrode assembly, 13-Piezoelectric assembly, 14-Lower electrode assembly, 15-Silicon-based assembly,
[0034] 20-Bottom structure, 21-First silicon substrate, 22-First glass layer, 22a-TGV, 21a-TSV, 23-Second silicon substrate, 24-First cavity
[0035] 30-Packaging structure, 31-Second cavity, 32-Chip body, 33-Third glass layer, 34-Third silicon substrate, 35-Second glass layer. Detailed Implementation
[0036] To make the technical problems, technical solutions and advantages of this utility model clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.
[0037] like Figures 1-5b As shown, this application provides a MEMS actuated cooling chip, including an actuator 10, a bottom structure 20 and a package structure 30, wherein the bottom structure 20 is used to mount the actuator 10, the package structure 30 is disposed above the bottom structure 20 to fix the chip body 32, and the actuator 10 generates a jet below the chip body 32 to cool the chip body 32.
[0038] Reference Figure 2 and Figure 4As shown, the actuator 10 in this application is a MEMS actuator. The bottom structure 20 includes, from top to bottom, a first silicon substrate 21, a first glass layer 22, and a second silicon substrate 23, wherein the first silicon substrate 21 and the first glass layer 22 are recessed at the same position to form a first cavity 24. The aforementioned actuator 10 is disposed on the first silicon substrate 21 and seals the top of the first cavity 24. A CMOS driving circuit electrically connected to the actuator 10 and used to drive the actuator 10 to work is integrated on the second silicon substrate 23, thereby causing the actuator 10 to deform at a preset frequency.
[0039] The aforementioned encapsulation structure 30 is disposed on the bottom structure 20. The encapsulation structure 30 also has a cavity, which is a second cavity 31. The second cavity 31 communicates with the outside. The encapsulation structure 30, by being mounted on the bottom structure 20, aims to enclose the actuator 10 within the second cavity 31. A central through-hole 11 is formed on the actuator 10, extending along the thickness direction of the actuator 10, thereby allowing the first cavity 24 and the second cavity 31 to communicate and exchange gases. The aforementioned chip body 32 is fixed at the top of the encapsulation structure 30.
[0040] Reference Figure 5a and Figure 5b As shown, the arrows indicate the airflow direction, and the spiral lines represent vortex rings. When the actuator 10 deforms at a preset frequency, it periodically oscillates in the up-down direction. Since the second cavity 31 is connected to the outside world, and the second cavity 31 is connected to the first cavity 24 through the central through-hole 11, when the actuator 10 moves downward, the air in the first cavity 24 is compressed, and the high-pressure air is ejected upward at high speed through the central through-hole 11, cooling the chip body 32 above. At the same time, the high-speed jet forms a vortex ring at the edge of the central through-hole 11; when the actuator 10 moves upward, the first cavity 24 forms a negative pressure, and the surrounding air enters the first cavity 24 through the second cavity 31 and the central through-hole 11.
[0041] When air is drawn into the first cavity 24, the aforementioned vortex ring, under the influence of its own induced velocity, moves away from the upper end of the central through hole 11, preventing it from being re-drawn into the first cavity 24. The actuator 10 is periodically driven by the CMOS driving circuit to reciprocate, continuously generating high-speed jets. These jets vertically impact the hot surface of the chip body 32, creating strong disturbances to the thermal boundary layer, thereby significantly enhancing the convective heat transfer effect and achieving efficient heat dissipation.
[0042] In this embodiment, the driving voltage is 35V, the operating frequency of the actuator 10 is not less than 13614 Hz, and the maximum displacement at the central through hole 11 of the actuator 10 is at least 0.161 µm.
[0043] Furthermore, the actuator 10 includes an upper electrode assembly 12, a piezoelectric assembly 13, a lower electrode assembly 14, and a silicon-based assembly 15 stacked from top to bottom. The upper electrode assembly 12 and the lower electrode assembly 14 are electrically connected to the piezoelectric assembly 13 from the upper and lower sides, respectively. The silicon-based assembly 15 is bonded to the first silicon substrate 21 through a low-temperature bonding process.
[0044] In this application, the silicon-based component 15 is a CMOS standard wafer, which can be directly used as the substrate for fabricating CMOS driving circuits (not shown in the figure), with a thickness of 10 μm. The upper electrode component 12 and the lower electrode component 14 are made of the same material, both being layered structures made of Mo, with a thickness of 100 nm. The piezoelectric component 13 is a layered structure made of AlN material, with a thickness of 1 μm.
[0045] In fabricating actuator 10, a layered structure is deposited on the metal interconnect layer of silicon-based component 15 using a CMOS-compatible magnetron sputtering process to serve as lower electrode component 14. AlN material is then used to form a layered structure on the upper surface of lower electrode component 14 using a low-temperature reactive sputtering process to serve as piezoelectric component 13. The low-temperature reactive sputtering process avoids damage to the CMOS driving circuitry. A layered structure is then deposited again on top of piezoelectric component 13 using a CMOS-compatible magnetron sputtering process to serve as upper electrode component 12.
[0046] The central through hole 11 is made using ICP etching technology, and the central through hole 11 completely penetrates the thickness direction of the actuator 10, i.e., the vertical direction.
[0047] In this application, compared with the complex decoupling structure of the actuator 10, the actuator 10 of this application has a relatively simple structure, and its manufacturing process has been standardized, making it easy to mass-produce and reduce production costs.
[0048] In this application, the first silicon substrate 21 and the second silicon substrate 23 are CMOS standard wafers, the first glass layer 22 is borosilicate glass, a TGV22a is disposed on the first glass layer 22, and a TSV21a electrically connected to the TGV22a is disposed on the first silicon substrate 21. The first silicon substrate 21 is bonded to the first glass layer 22 by a low-temperature bonding process, and the second silicon substrate 23 is bonded to the first glass layer 22 by a CMOS anodic bonding process. At the same time, the output terminal of the CMOS driving circuit on the second silicon substrate 23 is electrically connected to the upper electrode assembly 12 and the lower electrode assembly 14 through the TGV22a, TSV21a and wires.
[0049] Specifically, the TGV22a is formed on the first glass layer 22 and includes an electrical connection hole formed on the first glass layer 22 and a composite conductive layer deposited in the electrical connection hole.
[0050] Similarly, the TSV21a is formed on the first silicon substrate 21 and includes an electrical connection hole formed on the first silicon substrate 21 and a composite conductive layer deposited in the electrical connection hole.
[0051] The composite conductive layer comprises an inner layer made of Au material and an outer layer made of TiW material, wherein the outer layer is wrapped around the inner layer.
[0052] When the first silicon substrate 21 and the first glass layer 22 are bonded, TSV21a and TGV22a are positioned correspondingly, thereby ensuring that the composite conductive layers in TSV21a and TGV22a are in contact to achieve electrical connection. TSV21a is electrically connected to the upper electrode assembly 12 and the lower electrode assembly 14 through wires, and TGV22a is electrically connected to the CMOS driving circuit.
[0053] Both the first silicon substrate 21 and the second silicon substrate 23 are bonded to the first glass layer 22, thereby maintaining good airtightness of the first cavity 24 and the second cavity 31 to achieve good pressure stability and ensure that external gas enters the first cavity 24 through the second cavity 31 and the central through-hole 11. The first silicon substrate 21 serves as the mounting carrier for the actuator 10, providing rigid support and offsetting the structural stress generated by the high-frequency vibration of the actuator 10. The second silicon substrate 23 integrates a CMOS driving circuit, and its output terminal is electrically connected to the upper electrode assembly 12 and the lower electrode assembly 14 of the actuator 10, realizing monolithic integration.
[0054] The aforementioned packaging structure 30 includes a third glass layer 33, a third silicon substrate 34, and a second glass layer 35 from top to bottom, wherein the second cavity 31 penetrates the packaging structure 30 along the stacking direction of the packaging structure 30, that is, the second cavity 31 penetrates the third glass layer 33, the third silicon substrate 34, and the second glass layer 35 in the vertical direction.
[0055] The second glass layer 35 is bonded to the first silicon substrate 21 using a CMOS anodic bonding process, the second glass layer 35 is bonded to the third silicon substrate 34 using a low-temperature bonding process, the third silicon substrate 34 is bonded to the third glass layer 33 using a CMOS anodic bonding process, and a chip body 32 is mounted on top of the third glass layer 33.
[0056] In this embodiment, the second glass layer 35 is bonded to ensure the sealing of the first silicon substrate 21. At the same time, the second glass layer 35 serves as the first sealing and insulating layer, protecting the actuator 10 below. Moreover, the insulation of the second glass layer 35 can ensure the electrical isolation of subsequent stacked components, such as the electrical isolation of the chip body 32.
[0057] The second glass layer 35 and the third silicon substrate 34 are bonded together by a CMOS-compatible low-temperature bonding process. The third silicon substrate 34 serves as a support structure and a heat dissipation plate, providing mechanical strength for the whole structure and a flat substrate for mounting the chip body 32 on top.
[0058] The third silicon substrate 34 and the third glass layer 33 are bonded together again using the CMOS standard anodic bonding process. The third glass layer 33 forms the second sealing and insulating layer, and the chip body 32 is mounted on the third glass layer 33.
[0059] In this embodiment, the second glass layer 35 and the third glass layer 33 are both borosilicate glass with a thickness of 20 μm, and the third silicon substrate 34 is a CMOS standard silicon substrate with a thickness of 450 μm. In this embodiment, reducing the thickness of the second glass layer 35 and the third glass layer 33 is more conducive to heat diffusion.
[0060] In the aforementioned bottom structure 20, the size of the first cavity 24 is smaller than the size of the actuator 10, thereby ensuring that the silicon-based component 15 of the actuator 10 is bonded to the upper surface of the first silicon substrate 21 and the upper end of the first cavity 24 is sealed, thereby realizing the connection between the silicon-based component 15 and the first silicon substrate 21 through a low-temperature bonding process.
[0061] Preferably, in this embodiment, the cross-section of the first cavity 24 and the cross-section of the actuator 10 are both polygonal, and the diameter of the inscribed circle of the first cavity 24 is smaller than the diameter of the inscribed circle of the actuator 10.
[0062] In this application, the third glass layer 33, the third silicon substrate 34, and the second glass layer 35 all have openings communicating with the second cavity 31 on their sides, and the openings on the third glass layer 33, the third silicon substrate 34, and the second glass layer 35 are oriented in the same direction.
[0063] In this embodiment, the third glass layer 33, the third silicon substrate 34, and the second glass layer 35 are all in a U-shape. When the three are stacked vertically, the openings are in the same direction, allowing external airflow to enter the second cavity 31. When the actuator 10 moves downward, the gas in the first cavity 24 forms a high-speed jet through the central through-hole 11 and is injected into the second cavity 31 to dissipate heat from the chip body 32. At the same time, a vortex ring is formed in the second cavity 31 away from the second central through-hole 11. When the actuator 10 moves upward, external gas enters the first cavity 24 through the opening and the central through-hole 11, preparing for the next high-speed jet formation.
[0064] In this application, a MEMS actuator and a standard CMOS wafer are organically combined, and a MEMS actuator cooling chip fabricated using existing CMOS-compatible processes can be monolithically integrated with the drive control circuitry of compact electronic devices. This reduces interconnection losses between chips and lowers production costs and integration difficulties caused by process incompatibility. Furthermore, the packaging process of the MEMS actuator cooling chip employs CMOS-compatible anodic bonding and low-temperature bonding processes, facilitating high compatibility with CMOS production lines and enabling wafer-level packaging and testing. This significantly improves reliability and consistency. Finally, since the bonding technologies used in this application are all existing standard technologies, the overall packaging complexity and cost are effectively reduced.
[0065] In terms of heat dissipation, the actuator 10 has a central opening, which significantly increases the gas exchange volume. This provides a strong guarantee for the high-intensity synthetic jet and also allows the high-speed jet to vertically impact the hot surface of the chip body 32, effectively disturbing the thermal boundary layer and greatly improving the convective heat transfer coefficient, thus solving the overheating problem of compact electronic devices.
[0066] Finally, various glass layers are also provided in this MEMS actuation cooling chip, which effectively provides electrical isolation between the various devices.
Claims
1. A MEMS actuation cooling chip, characterized in that, include: The actuator (10) is a MEMS actuator; The bottom structure (20) includes a first silicon substrate (21), a first glass layer (22), and a second silicon substrate (23) from top to bottom. A recessed first cavity (24) is provided on the first silicon substrate (21) and the first glass layer (22). The actuator (10) is disposed on the first silicon substrate (21) and seals the first cavity (24). A CMOS driving circuit is integrated on the second silicon substrate (23). The CMOS driving circuit is electrically connected to the actuator (10) to drive the actuator (10) to deform. A packaging structure (30) is disposed on the bottom structure (20). The packaging structure (30) encloses the actuator (10) in the second cavity (31) formed by the packaging structure (30). The actuator (10) is provided with a central through hole (11), which connects the first cavity (24) and the second cavity (31). The top of the packaging structure (30) is used to fix the chip body (32).
2. The MEMS actuation cooling chip according to claim 1, characterized in that: The actuator (10) includes, from top to bottom, an upper electrode assembly (12), a piezoelectric assembly (13), a lower electrode assembly (14), and a silicon-based assembly (15). The upper electrode assembly (12) and the lower electrode assembly (14) are respectively disposed above and below the piezoelectric assembly (13) and are electrically connected to the piezoelectric assembly (13). The silicon-based assembly (15) is disposed below the lower electrode assembly (14). The silicon-based assembly (15) is bonded to the first silicon substrate (21) by a low-temperature bonding process.
3. The MEMS actuation cooling chip according to claim 2, characterized in that: The upper electrode assembly (12) and the lower electrode assembly (14) are both layered structures with a thickness of 0.1 μm formed by sputtering Mo material; The piezoelectric component (13) is a layered structure with a thickness of 1 μm formed by low-temperature sputtering of AlN material.
4. The MEMS actuation cooling chip according to claim 2, characterized in that: The first silicon substrate (21) and the second silicon substrate (23) are CMOS standard wafers; a TGV (22a) is disposed on the first glass layer (22), and a TSV (21a) electrically connected to the TGV (22a) is disposed on the first silicon substrate (21); the first silicon substrate (21) is bonded to the first glass layer (22) by a low-temperature bonding process, and the second silicon substrate (23) is bonded to the first glass layer (22) by a CMOS anodic bonding process, and the output terminal of the CMOS driving circuit on the second silicon substrate (23) is electrically connected to the upper electrode assembly (12) and the lower electrode assembly (14) through the TGV (22a) and the TSV (21a).
5. The MEMS actuation cooling chip according to claim 4, characterized in that: The TGV (22a) and TSV (21a) have the same structure, including an electrical connection hole opened on the first glass layer (22) or the first silicon substrate (21) and a composite conductive layer deposited in the electrical connection hole. The composite conductive layer consists of an inner layer made of Au and an outer layer made of TiW materials from the center of the hole to the wall of the hole.
6. The MEMS actuation cooling chip according to claim 1, characterized in that: The packaging structure (30) includes a third glass layer (33), a third silicon substrate (34), and a second glass layer (35) arranged from top to bottom. The second cavity (31) penetrates the packaging structure (30) along the stacking direction of the packaging structure (30). The second glass layer (35) is bonded to the first silicon substrate (21) using a CMOS anodic bonding process. The second glass layer (35) is bonded to the third silicon substrate (34) using a low-temperature bonding process. The third silicon substrate (34) is bonded to the third glass layer (33) using a CMOS anodic bonding process. The chip body (32) is mounted on top of the third glass layer (33).
7. The MEMS actuation cooling chip according to claim 2, characterized in that: The size of the first cavity (24) formed on the first silicon substrate (21) and the first glass layer (22) is smaller than the size of the actuator (10) so that the silicon-based component (15) of the actuator (10) is bonded to the first silicon substrate (21) by a low-temperature bonding process.
8. The MEMS actuation cooling chip according to claim 6, characterized in that: The third glass layer (33), the third silicon substrate (34), and the second glass layer (35) have lateral openings communicating with the second cavity (31), and the opening directions of the third glass layer (33), the third silicon substrate (34), and the second glass layer (35) are consistent.
9. The MEMS actuation cooling chip according to claim 6, characterized in that: The first glass layer (22), the second glass layer (35) and the third glass layer (33) are all borosilicate glass.
10. The MEMS actuation cooling chip according to claim 1, characterized in that: The central through hole (11) is a through hole formed by ICP etching process.