Optoelectronic semiconductor chip

Abstract

Optoelectronic semiconductor chip with: - a plurality of active regions (1) arranged at a distance from one another, and - a carrier (2) arranged on a bottom side (1a) of the active regions (1), wherein - each of the active regions (1) has a main extension direction (R), - each active region (1) has a core region (10) formed with a first semiconductor material, - each active region (1) has an active layer (11) which covers the core region (10) at least in directions (x, y) transverse to the main extension direction (R) of the active region (1), - each active region (1) has a cover layer (12) which is formed with a second semiconductor material and covers the active layer (11) at least in directions (x, y) transverse to the main extension direction (R) of the active region (11), - on the upper side (1b) of the active regions (1) facing away from the carrier (2), the core region (10) is free of the active layer (11) and is in direct contact with an electrically conductive contact layer (6), each active region (1) having traces of material removal on its upper side (1b) facing away from the carrier (2), and - the contact layer (6) is in direct contact with the core regions (10) of at least a majority, in particular all, of the active regions (1), and extends in places in a plane which runs parallel or substantially parallel to the outer surface (2a) of the carrier facing the plurality of active regions (1).

Description

[0001] An optoelectronic semiconductor chip is specified.

[0002] The documents DE 10 2010 012 711 A1, US 2008 / 0 036 038 A1, US 2011 / 0 240 099 A1, US 2008 / 0 157 057 A1, JP H10 - 321 910 A and US 2003 / 0 017 633 A1 describe optoelectronic semiconductor chips.

[0003] One problem to be solved is to provide an optoelectronic semiconductor chip that can be operated particularly efficiently.

[0004] This object is achieved by an optoelectronic semiconductor chip according to claim 1.

[0005] The optoelectronic semiconductor chip described here is, in particular, a radiation-emitting optoelectronic semiconductor chip. For example, it is an optoelectronic semiconductor chip that emits UV radiation, visible light, or infrared radiation during operation. The optoelectronic semiconductor chip is, in particular, a light-emitting diode chip. Furthermore, it is possible for the semiconductor chip to be a radiation-receiving optoelectronic semiconductor chip, for example, a solar cell or a photodiode.

[0006] The optoelectronic semiconductor chip comprises at least one active region. In particular, the optoelectronic semiconductor chip comprises a plurality of active regions arranged at a distance from one another. During operation of the optoelectronic semiconductor chip, electromagnetic radiation, in particular light, is generated in the active regions, which at least partially leaves the semiconductor chip. Alternatively, it is possible for electromagnetic radiation to be converted into charge carriers in the active regions.

[0007] In extreme cases, it is also possible for the optoelectronic semiconductor chip to comprise a single active region. Such a semiconductor chip can be used particularly in communications technology.

[0008] The optoelectronic semiconductor chip comprises a plurality of active regions, each arranged at a distance from one another. It is possible for the active regions to be connected to one another at a bottom and / or a top by an additional element. In this case, the active regions are spaced apart from one another in a region between their bottom and top sides and are not connected to one another there.

[0009] The active regions can, for example, be arranged in the manner of a regular grid. This means that the active regions are arranged at predetermined distances from one another. For example, a plan view of the top surfaces of the active regions reveals a regular grid structure, such as a rectangular or triangular grid. However, a random distribution of the active regions is also possible.

[0010] In the following, we will usually refer to one active region among the multitude of active regions. Preferably, a majority of the active regions, in particular all active regions, exhibit the properties described for one region.

[0011] The optoelectronic semiconductor chip comprises a carrier. The carrier is arranged on an underside of the plurality of active regions. The carrier is the element of the optoelectronic semiconductor chip that mechanically carries and supports the plurality of active regions. For example, the carrier can also be the element of the optoelectronic semiconductor chip that connects the plurality of active regions to one another.

[0012] The carrier can, for example, be a growth substrate for at least parts of the active regions. The carrier can be formed, for example, from GaAs, silicon, glass, or sapphire. Furthermore, it is possible for the carrier to contain at least one of the materials mentioned. If the carrier is a growth substrate, the growth substrate remains in the semiconductor chip and, in particular, is not removed. However, thinning the growth substrate, i.e., reducing its thickness, for example, by grinding, etching, or chemical-mechanical polishing, is possible.

[0013] The carrier can be radiation-permeable, for example transparent, radiation-reflecting, or diffusely scattering. This means that electromagnetic radiation generated or to be detected in the active areas during operation of the semiconductor chip, for example, can pass through the carrier or be reflected or scattered by it.

[0014] Additionally, it is possible for the carrier to be electrically insulating. For example, the carrier can be formed from a radiation-transparent, electrically insulating material such as sapphire, which serves as a growth substrate for a semiconductor material of the plurality of active regions.

[0015] The active region has a main extension direction. This means that the active region does not extend equally in every spatial direction, but rather there is a preferred direction, the main extension direction, in which the active region has its greatest extension.

[0016] For example, the active region can have the shape of a cylinder, the shape of a truncated cone, the shape of a pyramid, or the shape of a prism, in particular with a hexagonal or triangular base. The main extension direction is then the direction in which the height of the cylinder, the truncated cone, or the prism is determined. In other words, the at least one active region is formed by an elongated, three-dimensional body and does not, for example, have the shape of a planar layer. Furthermore, the active region is not a continuous, unstructured layer that has, for example, a flat outer surface.

[0017] The at least one active region has a core region formed with a first semiconductor material. The first semiconductor material has a first conductivity type. For example, the first semiconductor material is n-conductive. The first semiconductor material can be based, for example, on an n-doped III / V semiconductor material system. For example, the first semiconductor material is based on an n-doped nitride semiconductor material system. In particular, the first semiconductor material can then be based on n-conductive GaN, InGaN, AlGaN, or AlInGaN.

[0018] For example, at least the first semiconductor material is deposited directly onto the outer surface of the carrier facing the active regions. An undoped growth layer can also be deposited as the first layer, onto which the n-conducting material is subsequently applied.

[0019] The core region of the active region extends in particular along the main extension direction and can have the same shape as the active region. If the active region is formed, for example, in the shape of a cylinder or prism, the core region can also have the shape of a cylinder or prism. The core region can then be formed in particular as a solid body consisting of the first semiconductor material.

[0020] The at least one active region comprises an active layer that covers the core region at least in directions transverse to the main extension direction of the active region. The core region has, for example, a lateral surface that can be partially or, in particular, completely covered with the material of the active layer. An end face can also be covered at least in places. The core region can directly border the active layer. During operation of the optoelectronic semiconductor chip, the radiation generated by the optoelectronic semiconductor chip is generated in the active region and, there, in particular, in the active layer. Within the manufacturing tolerance, the active layer preferably has a uniform thickness, which can, however, vary along the main extension direction.

[0021] The at least one active region has a cover layer formed with a second semiconductor material and covering the active layer at least in directions transverse to the main extension direction of the active region. For example, the active layer is then arranged between the cover layer and the core region. The cover layer can partially or completely cover the active layer. Within the manufacturing tolerance, the cover layer preferably has a uniform thickness, which can, however, vary along the main extension direction.

[0022] The second semiconductor material is a semiconductor material of a second conductivity type that differs from the first conductivity type. In particular, the second semiconductor material can be based on the same semiconductor material system as the first semiconductor material, but with a different doping. For example, if the first semiconductor material is n-conductive, the second semiconductor material is p-conductive. For example, the second semiconductor material is based on p-GaN, p-InGaN, p-AlGaN, or p-AlInGaN, or a stack of two or more layers of two or more of the specified materials.

[0023] The semiconductor chip comprises a plurality of active regions arranged at a distance from one another. Furthermore, the optoelectronic semiconductor chip comprises a carrier arranged on an underside of the plurality of active regions. At least one of the active regions has a main extension direction. The active region has a core region formed with a first semiconductor material. The active region has an active layer covering the core region at least in directions transverse to the main extension direction of the active region. The active region has a cover layer formed with a second semiconductor material and covering the active layer at least in the direction transverse to the main extension direction of the active region.

[0024] The optoelectronic semiconductor chip preferably comprises a plurality of active regions, which, for example, are constructed in a similar manner. Within the manufacturing tolerance, these active regions can then be designed identically. This means that each of the active regions then comprises a core region, an active layer, and a cover layer, each of which has the same material composition within the manufacturing tolerance. In particular, it is possible for all active regions of the optoelectronic semiconductor chip to be designed identically within the manufacturing tolerance. However, it is also possible for the optoelectronic semiconductor chip to comprise a plurality of active regions that are at least partially designed differently.For example, the active regions can differ from one another in terms of thickness (i.e., extent in directions perpendicular to the main extension direction), and / or length (i.e., extent parallel to the main extension direction), and / or composition. This allows different active regions to emit light of different colors, so that the semiconductor chip as a whole emits white light, for example.

[0025] The efficiency of GaN-based light-emitting diodes, in particular, is limited under operating current conditions by the so-called "droop" effect. This effect describes a significant decrease in efficiency with increasing current or charge carrier density. Typical operating currents therefore lie well beyond the maximum of the efficiency curve. To achieve higher efficiencies at a constant current, a reduction in the local charge carrier density is advantageous. This could be achieved, for example, by increasing the cross-sectional area of ​​the optoelectronic semiconductor chip or by increasing the number of active layers. However, both approaches have problems.

[0026] For many applications, such as the use of optoelectronic semiconductor chips in projection devices, increasing the cross-sectional area is impractical because this enlargement would entail an increase in etendue. Furthermore, this solution is always associated with an increase in cost, which is usually disproportionate to the increase in the cross-sectional area of ​​the semiconductor chip.

[0027] In the optoelectronic semiconductor chip described here, the active regions are formed, for example, as "core-shell nanorods" or microrods. By dividing the radiation-emitting region of the optoelectronic semiconductor chip into a plurality of active regions, for example, a plurality of core-shell rods, the active volume in which electromagnetic radiation is generated during operation is increased compared to an optoelectronic semiconductor chip with a single active region, which is, for example, unstructured. This increases the efficiency of the semiconductor chip.

[0028] Due to the fact that an optoelectronic semiconductor chip described here has a large number of active regions, a significant increase in the active area and thus an increase in efficiency under operating current conditions with a reduced charge carrier density is achieved. Furthermore, the epitaxial growth of the spaced-apart active regions can reduce stresses in the semiconductor material of the active regions compared to a closed two-dimensional layer.

[0029] In particular, it is possible for an optoelectronic semiconductor chip described here to comprise one, more than two, more than 100, preferably more than 1000, in particular more than 10,000, or more than 100,000 active regions. For example, the active regions are electrically isolated from one another in the region of their lateral surfaces. It is possible for the active regions to be controlled jointly, in groups, or individually.

[0030] According to at least one embodiment of the optoelectronic semiconductor chip, the growth direction of the first semiconductor material runs substantially parallel to the main extension direction. This means that, within the manufacturing tolerance, the growth direction of the first semiconductor material runs parallel to the main extension direction. The first semiconductor material of the core region of the at least one active region is thus grown in the main extension direction. The active layer and the cover layer of the active region cover the core region in directions that run transversely and in the same direction as the growth direction of the semiconductor material of the core region.

[0031] According to at least one embodiment of the optoelectronic semiconductor chip, the active region has a length that is determined in the main extension direction. This means that the length of the active region is measured along the main extension direction. Furthermore, the active region has a diameter or a thickness that is determined in a direction perpendicular to the main extension direction, i.e., in a plane to which the main extension direction is perpendicular. The diameter can vary along the main extension direction. The ratio of length to maximum diameter of the active region, preferably of all active regions of the optoelectronic semiconductor chip, is at least one, in particular at least five, for example, between at least five and at most 100.

[0032] The diameter, i.e. the thickness, of the active region can be between at least 20 nm and at most 25 µm. With regard to improving material quality, in particular with regard to reducing dislocations in the semiconductor material of the active region, active regions with a diameter of at least 100 nm and at most 3 µm, in particular at most 1 µm, prove to be particularly advantageous. In such thin active regions, dislocations generally do not penetrate the active region along its entire length, but due to the small thickness end after relatively short distances at a lateral surface of the active region without extending over the entire active region. Furthermore, it is possible for the dislocations to extend along the entire length of the core region of the active region, but not to penetrate the active layer on the outer surface of the core region.

[0033] The active regions are preferably arranged in high density, i.e., with a high fill factor. The fill factor corresponds to the ratio of the area of ​​the side of the carrier adjacent to the active regions to the total area of ​​the top side of the carrier assigned to the active regions. The fill factor is preferably at least 20%, in particular at least 50%, for example at least 75%. This achieves a particularly significant increase in the active area of ​​the optoelectronic semiconductor chip.

[0034] According to at least one embodiment of the optoelectronic semiconductor chip, the active region has a current spreading layer that covers the cover layer at least in directions transverse to the main extension direction, wherein the current spreading layer can be permeable to electromagnetic radiation generated in the active layer during operation. The current spreading layer serves to distribute an electric current particularly evenly across the cover layer. The current spreading layer is in particular in direct contact with the cover layer and can partially or completely cover it. If the cover layer is formed, for example, with a p-conducting nitride compound semiconductor material, it has a relatively low transverse conductivity. The current spreading layer therefore leads to a more even current flow to the active layer of the active region.The current spreading layer covers the cover layer, for example, as a layer that can have a uniform thickness within the manufacturing tolerance.

[0035] According to at least one embodiment of the optoelectronic semiconductor chip, the current spreading layer is designed to be permeable to electromagnetic radiation generated in the active region. This means that the current spreading layer is permeable to radiation in this case.

[0036] Here and below, the term "radiation-permeable" means that the radiation-permeable component allows at least 75% of the electromagnetic radiation passing through it from the active layer to pass through without absorbing this radiation. The radiation-permeable component can be milky, opaque, or clear, transparent.

[0037] According to at least one embodiment of the optoelectronic semiconductor chip, the current spreading layer is formed with a transparent conductive oxide (TCO). Materials such as ITO or ZnO are suitable for forming the current spreading layer, for example.

[0038] According to at least one embodiment of the optoelectronic semiconductor chip, the current spreading layer extends over at least a large part of the length of the active region. In particular, it is possible for the current spreading layer to cover the capping layer uniformly over the entire length of the active region, thereby completely covering it.

[0039] According to at least one embodiment of the optoelectronic semiconductor chip, an insulating material is arranged between the plurality of active regions, wherein the insulating material can be permeable to electromagnetic radiation generated in the active layer during operation, and the insulating material surrounds the plurality of active regions at least in directions transverse to the main extension direction. In other words, the insulating material is filled into the spaces between the active regions, and the insulating material can fill these spaces, in particular completely fill them. The insulating material is electrically insulating and optionally radiation-permeable. For example, materials such as aluminum oxide (AlOx), silicon dioxide, silicon nitride, diamond-like carbon, or polymers are suitable as insulating materials.

[0040] The insulation material is particularly permeable to radiation if the current spreading layer is also permeable to radiation. If the current spreading layer is designed, for example, as a radiation-opaque metal layer, the insulation material can also be radiation-opaque.

[0041] In addition to electrically decoupling the individual active areas, the insulation material protects the active areas from mechanical damage, atmospheric gases and moisture.

[0042] According to at least one embodiment of the optoelectronic semiconductor chip, it is possible, as an alternative or in addition to the insulating material, for a functional material to be arranged between the plurality of active regions, wherein the functional material surrounds the active regions at least in directions transverse to the main extension direction, and the functional material comprises at least one luminescence conversion substance and / or at least one ESD protection material. For example, particles of these materials can also be incorporated into the insulating material, so that the filled insulating material forms the functional material. The luminescence conversion substance is suitable, for example, for converting at least a portion of the electromagnetic radiation generated in the active regions into electromagnetic radiation of longer wavelengths. The semiconductor chip then emits, for example, mixed radiation, in particular white light.

[0043] According to at least one embodiment of the optoelectronic semiconductor chip, the insulating material directly borders the outer surface of the active region, at least in places. For example, the insulating material completely covers the lateral surface of each active region and directly borders the outermost layer of the active region, in particular the current spreading layer. In this case, the insulating material embeds the active regions.

[0044] According to at least one embodiment of the optoelectronic semiconductor chip, a mask layer is arranged on the side of the carrier assigned to the plurality of active regions, wherein the mask layer has an opening for each of the active regions, which opening is penetrated by the first semiconductor material. To produce the active regions, for example, a mask layer is applied to a layer of first semiconductor material or the carrier. The mask layer has openings towards the layer of first semiconductor material or the carrier. The first semiconductor material, which forms the core region of each active region, then grows onto the layer of first semiconductor material or the carrier only in the region of the openings. The position of the opening determines the position of the active region. The mask layer can remain in the finished optoelectronic semiconductor chip. Its openings are penetrated by the first semiconductor material.

[0045] If the mask layer is not radiation-transparent, it can also be removed from the semiconductor chip. Alternatively, self-organized growth of the core regions without a mask is also possible. In this case, the mask is omitted.

[0046] According to at least one embodiment of the optoelectronic semiconductor chip, the mask layer is permeable to electromagnetic radiation generated in the active layer during operation. For this purpose, the mask layer can be formed, for example, from the same material as the insulation layer.

[0047] At the top side of the active region facing away from the carrier, the core region is free of the active layer and is in direct contact with an electrically conductive contact layer. This means that the tip of the active region, which faces away from the carrier, is partially removed, leaving the cover layer and the active layer removed. In this way, the core region, in particular the first semiconductor material of the active region, is exposed and can be brought into direct electrical contact with an electrically conductive contact layer.

[0048] For example, the core region is n-conductive. This means that n-sided contacting of the active region is possible using the electrically conductive contact layer. To suppress short circuits or current leakage paths, the cover layer and, if applicable, the current spreading layer are separated from the electrically conductive contact layer by passivation. The passivation can be in direct contact with the core region of the active region and is then located on the side of the active region facing away from the carrier, on its lateral surface, for example in direct contact with the cover layer and, if applicable, the current spreading layer. There, the passivation can be flush with the top side of the core region facing away from the carrier and can be in direct contact with the electrically conductive contact layer on its side facing away from the carrier.

[0049] The passivation can be carried out, for example, by covering the cover layer and, if applicable, the current spreading layer with an electrically insulating material or by passivating the semiconductor material of the cover layer, for example by ion implantation or by electrically deactivating the doping species, for example in a hydrogen plasma step or by generating surface defects by a back-sputtering step.

[0050] The contact layer is in direct contact with the core regions of at least a large portion, in particular all active regions, of the optoelectronic semiconductor chip. This means that all core regions, or at least a large portion of all core regions, are electrically connected via a single, common contact layer.

[0051] The contact layer can, in particular, extend at least in places in a plane that runs parallel or substantially parallel to the outer surface of the carrier facing the plurality of active regions. The active regions are then enclosed between the carrier and the contact layer.

[0052] At least a majority of the active regions refers to at least 75%, preferably at least 85%, in particular at least 95% of the active regions of the optoelectronic semiconductor chip. Essentially parallel means that the contact layer extends, at least in places, in a plane that, within the manufacturing tolerance, runs parallel to the outer surface of the carrier facing the active regions.

[0053] According to at least one embodiment of the optoelectronic semiconductor chip, the contact layer is designed to be permeable or reflective to the electromagnetic radiation generated in the active region during operation. A permeable contact layer can be formed, for example, with a transparent, conductive oxide as described above. A reflective contact layer can be formed, for example, with a reflective metal such as silver, Au, Ti, Pt, Pd, Wf, Os, and / or aluminum. In the case of a reflective contact layer, the carrier is preferably designed to be radiation-permeable; at least a large portion of the electromagnetic radiation emitted by the optoelectronic semiconductor chip during operation is then emitted through the carrier.

[0054] The active region exhibits traces of material removal on its upper side facing away from the carrier. This means that the core region of the active region has been removed, for example, by a material-removing process. At least the core region then exhibits traces of this material removal. For example, the material removal can be etching, chemical-mechanical polishing (CPM), or sawing. The technique used for material removal creates characteristic traces in the material of the active region, which can be detected as traces of material removal on the finished component.

[0055] It is possible that, due to the material removal, i.e., the traces, the surface area of ​​the core region available for contacting the contact layer is increased. For example, the side of the core region facing away from the carrier has a facet or roughening, which increases the contact area compared to a flat surface. This allows for lower contact resistance.

[0056] An optoelectronic semiconductor chip described here is characterized by the following advantages, among others: The semiconductor chip can be manufactured particularly cost-effectively because the number of process steps and processes required to manufacture the optoelectronic semiconductor chip with three-dimensional crystal structures, for example, three-dimensional core-shell structures, is possible. Furthermore, the contacting of the three-dimensional crystal structures can be achieved using standardized processes, since the contacting itself does not require nanometer-range resolution but is possible using a contact layer that extends across all active regions. Since no planar epitaxial structure is required to create the active regions described here, epitaxial growth is also possible on unusual and / or large-area foreign substrates. In particular, electrically insulating growth substrates can be used. Furthermore, GaN-based semiconductor material grown in the N-face direction can also be used as the semiconductor material.Differences in the length of the active regions along the main extension direction can be compensated for by a planarization step without compromising the properties of the p-type region used for contact to the p-side. However, it is also possible to forgo planarization in order to utilize the available active area of ​​each active region particularly efficiently.

[0057] In the following, the optoelectronic semiconductor chips described here and methods for their production are explained in more detail in conjunction with exemplary embodiments and the associated figures. In connection with the Fig. 1A to 1G illustrate method steps for producing an embodiment of an optoelectronic semiconductor chip described here in more detail using schematic sectional views. In connection with the Fig. 2A to 2H illustrate method steps for producing a further embodiment of an optoelectronic semiconductor chip described here in more detail using schematic sectional views. In connection with the Fig. 3A to 3F illustrate method steps for producing an embodiment of a further optoelectronic semiconductor chip described here in more detail using schematic sectional views. In connection with the Fig. 4A to 4C illustrate method steps for producing a further embodiment of an optoelectronic semiconductor chip described here in more detail using schematic sectional views.

[0058] Identical, similar, or functionally identical elements are provided with the same reference numerals in the figures. The figures and the relative sizes of the elements depicted in the figures are not to be considered to scale. Rather, individual elements may be exaggerated for clarity and / or clarity.

[0059] In connection with the Fig. 1A to 1G illustrate process steps for manufacturing an optoelectronic semiconductor chip described here in more detail using schematic sectional views. The schematic sectional views of the Fig. 1F and Fig. 1G show embodiments of optoelectronic semiconductor chips described here.

[0060] According to the Fig. 1A, a carrier 2, which may be, for example, a radiation-transparent, electrically insulating growth substrate such as sapphire or glass, is first provided with a mask layer 5. The active regions 1 are grown on the mask layer 5. Each active region, in this case, has the shape of a cylinder, for example. Each active region 1 extends along the main extension direction R. The active regions 1 are arranged, for example, at the lattice points of a regular lattice, in this case, for example, a triangular lattice.

[0061] Each of the active regions 1 comprises a core region 10. In this case, the core region 10 is formed from an n-doped GaN-based first semiconductor material. The core region 10 also has the shape of a cylinder. The outer surface of this cylinder is completely covered by the active layer 11, in which, for example, electromagnetic radiation is generated during operation of the optoelectronic semiconductor chip. The side of the core region 10 facing away from the carrier 2 is also initially covered with material of the active layer 11.

[0062] The active layer 11 has the shape of a hollow cylinder, the inner surface of which is completely covered with the first semiconductor material of the core region 10. The outer surface of the active layer 11 is completely covered by a cover layer 12, which in the embodiment of the Fig. 1 may be formed with a p-doped GaN-based second semiconductor material.

[0063] In the following process step, Fig. 1B, the outer surface of the cover layer 12 facing away from the active layer 11 is completely covered with the current spreading layer 13. The current spreading layer 13 is permeable to electromagnetic radiation generated in the active layer 11 and consists, for example, of a TCO material such as ITO. Alternatively, it is also possible for the cover layer 12 to be covered with a contact material, in particular a radiation-reflecting material, for example a metal such as silver and / or aluminum, as the current spreading layer 13. Furthermore, it is possible for the current spreading layer 13 to fill the intermediate regions between the core regions 10. In this case, the current spreading layer 13 is therefore not formed as a thin layer, in particular of uniform thickness, but rather forms a filler material between the core regions.

[0064] In a subsequent process step, Fig. 1C, the spaces between the active regions 1 are filled with an insulating material 4. The insulating material 4 completely covers the active regions 1, even on their side facing away from the carrier 2. The insulating material 4 can directly border the outer surface of the current spreading layer 13 of each active region 1 facing away from the core region 10. The insulating material 4 is preferably permeable to electromagnetic radiation generated in the active layer 11 and is electrically insulating. For example, the insulating material 4 consists of silicon dioxide. The insulating material 4 can be applied, for example, by spin-coating, vapor deposition, sputtering, ALD, or CVD.

[0065] Optionally, the spaces between the active regions 1 can also be filled with a functional material, which, for example, serves to protect the optoelectronic semiconductor chip against ESD or converts the electromagnetic radiation generated in the active zone into electromagnetic radiation of a different wavelength. The functional material can therefore also be a material that comprises at least one luminescence conversion substance.

[0066] Below, Fig. 1D, planarization is performed, for example, by means of chemical-mechanical polishing or a dry-chemical process. During planarization, the current spreading layer 13, the cover layer 12, and the active layer 11 are removed on the side of each active region 1 facing away from the carrier 2. This means that the core region 10 of each active region is exposed. The core region 10 of each active region has traces of material removal, for example, from the chemical-mechanical polishing or the dry-chemical process, on its side facing away from the carrier 2.

[0067] Below, Fig. 1E, passivations 3 are created for the cover layers 12 exposed at the edges of the active regions 1, for example, by deactivating the p-doped cover layers using a hydrogen plasma. In the present case, the current spreading layer 13 is also covered by the passivation on its side facing away from the carrier 2.

[0068] Due to the passivation 3, the subsequent contacting through the contact layer 6, compare the Fig. 1F or Fig. 1G, contact between the contact layer 6 and the p-type region and the current spreading layer of each active region is prevented.

[0069] In the event that the current spreading layer 13 fills the intermediate regions between the core regions 10, the passivation 3 can run on the current spreading layer 13 and thus covers the regions between the core regions 10.

[0070] According to the Fig. 1F, a full-surface reflective contact layer is used for contacting. In this case, the electromagnetic radiation generated in the active regions 1 is preferably coupled out through the carrier 2. Alternatively, it is possible for the contact layer 6 to comprise a dielectric mirror and an electrically conductive region. The electrically conductive region can be formed, for example, with a radiation-transmissive, conductive oxide.

[0071] The contact layer 6 is electrically insulated from the current spreading layer 13 by the passivation 3.

[0072] In an alternative embodiment, see the Fig. 1G, the contact layer 6 is formed with a radiation-permeable, conductive material, for example, a TCO material such as ITO. The coupling-out of electromagnetic radiation is then also possible, for example, through the side of the contact layer 6 facing away from the carrier 2. A volume emitter can be created in this way. To improve the coupling-out, the side of the contact layer 6 facing away from the carrier 2 can contain roughened portions that reduce the probability of total internal reflection.

[0073] Contact can be made as described in the Fig. 1F and Fig. 1G, from the side or also from the side of the contact layer 6 facing away from the carrier 2.

[0074] In the Fig. 2A to 2I, a further method for producing an optoelectronic semiconductor chip described here is explained in more detail. In conjunction with the Fig. 2H and Fig. 2I, embodiments of an optoelectronic semiconductor chip described here are described in more detail using sectional views.

[0075] In contrast to the connection with the Fig. 1A to 1G, the embodiment of the Fig. 2 the insulation material 4 is etched back until the active regions 1 on the side of the insulation material 4 facing away from the carrier 2 are exposed again, compare the Fig. 2D. Alternatively, it is possible that filling with the insulating material 4 in step 2C does not take place beyond the side of the active regions 1 facing away from the carrier 2, but rather only up to a certain filling height, which is projected above by the active regions 1.

[0076] Subsequently, the tip of each active region 1 is removed wet-chemically, for example, by etching with hot KOH. Due to the crystal structure of the first semiconductor material used, this leads to faceting and thus to an enlarged contact area at the core region 10 of each active region 1. For example, the upper sides 1b of the active regions 1 in the region of the core region each have a pyramid-shaped tip after the wet-chemical process.

[0077] In process step 2F, passivations 3 are again produced, either as described above by passivating the p-conducting semiconductor material or by re-applying insulation material 4 (compare the Fig. 2F and Fig. 2G). Fig. 2H and Fig. 2I contacting is done by means of contact layers as in connection with the Fig. 1F and Fig. 1G already explained. Due to the increased contact area caused by the faceting, a particularly high-density current can be impressed into each core area.

[0078] In connection with the Fig. 3A to 3F, a further method for producing an optoelectronic semiconductor chip described here is explained in more detail. In this method, no planarization step is carried out, i.e., the length of the active regions 1 is not adapted to one another. In this way, the naturally occurring different lengths of the individual active regions are utilized, i.e., efficient use is made of the largest possible portion of the active layer 11 of each active region 1. In method step 3c, therefore, in contrast to the method described above, the application of an insulating material 4 is not carried out in an overmolding manner, but as a thin layer of high conformity, for example, by an ALD method. In addition, a layer of further insulating material 7 can be introduced between the active regions, which layer does not protrude beyond the active regions 1 in the main extension direction R. Below, compare the Fig. 3E, the insulating material 4, 7 is removed by etching. Due to the increased thickness of the insulating material between the active regions 1, the core regions 10 can be exposed on the upper sides 1b of the active regions 1 without completely removing the passivation material 7 between the active regions 1. Alternatively, it would be conceivable to etch the upper sides 1b of the active regions at an increased etching rate. In any case, the core region 10 of each active region 1 is exposed on the upper side 1b facing away from the carrier 2.

[0079] The exposure is carried out by dry chemical or wet chemical processes, for example by plasma etching, for example with ICP RIE (Inductively Coupled Plasma Reactive Ion Etching), or KOH, which can additionally lead to faceting and thus an enlarged contact area in the region of the core region 10 of each active region 1.

[0080] Subsequently, a passivation 3 is produced, for example in connection with the Fig. 2F or Fig. 2G described.

[0081] Finally, a contact layer 6 is applied to the side of the active regions 1 facing away from the carrier 2. This contact layer 6 can be designed to be radiation-transmissive or radiation-reflecting, as described above.

[0082] In connection with the Fig. 4A to 4C illustrates a further embodiment of a method described here, which can be used as a modification to the methods described above. Fig. 4C shows a correspondingly manufactured optoelectronic semiconductor chip in a schematic sectional view.

[0083] In contrast to the methods described above, in this exemplary embodiment, the current spreading layer 13 is not applied directly to the mask layer 5. Instead, before applying the current spreading layer 13, the stumps of the active regions 1 are passivated with an insulating material 4. The insulating material 4 can be applied, for example, by a spin-coating process. The active regions 1 project beyond the insulating material 4 in the direction of the main extension direction R (compare the Fig. 4B). Further processing then takes place, for example, as in connection with the Fig. 1B to 1G. Passivation at the stump results in an optoelectronic semiconductor chip with a reduced likelihood of leakage currents.

Claims

[1] Optoelectronic semiconductor chip with: - a plurality of active regions (1) arranged at a distance from one another, and - a carrier (2) arranged on a bottom side (1a) of the active regions (1), wherein - each of the active regions (1) has a main extension direction (R), - each active region (1) has a core region (10) formed with a first semiconductor material, - each active region (1) has an active layer (11) which covers the core region (10) at least in directions (x, y) transverse to the main extension direction (R) of the active region (1), - each active region (1) has a cover layer (12) which is formed with a second semiconductor material and covers the active layer (11) at least in directions (x, y) transverse to the main extension direction (R) of the active region (11), - on the upper side (1b) of the active regions (1) facing away from the carrier (2), the core region (10) is free of the active layer (11) and is in direct contact with an electrically conductive contact layer (6), each active region (1) having traces of material removal on its upper side (1b) facing away from the carrier (2), and - the contact layer (6) is in direct contact with the core regions (10) of at least a majority, in particular all, of the active regions (1), and extends in places in a plane which runs parallel or substantially parallel to the outer surface (2a) of the carrier facing the plurality of active regions (1). [2] Optoelectronic semiconductor chip according to the preceding claim, wherein at least the first semiconductor material is deposited epitaxially on the carrier (2). [3] Optoelectronic semiconductor chip according to the preceding claim, wherein a growth direction (z) of the first semiconductor material is parallel to the main extension direction (R). [4] Optoelectronic semiconductor chip according to one of the preceding claims, in which at least one of the active regions (1) has a length (L) which is determined in the main extension direction (R), and the active region (1) has a diameter (D) which is determined in a plane perpendicular to the main extension direction (R), the ratio of length (L) to diameter (D) being at least 1. [5] Optoelectronic semiconductor chip according to one of the preceding claims, in which at least one of the active regions (1) has a current spreading layer (13) which covers the cover layer (12) at least in directions (x, y) transverse to the main extension direction (R). [6] Optoelectronic semiconductor chip according to the preceding claim, wherein the current spreading layer (13) is permeable to electromagnetic radiation generated in the active layer (11) during operation. [7] Optoelectronic semiconductor chip according to one of the two preceding claims, in which the current spreading layer (13) extends over at least a major part of the length (L) of the active region (1). [8] Optoelectronic semiconductor chip according to one of the preceding claims, wherein an insulating material (4) is arranged between the plurality of active regions (1), wherein the insulating material (4) surrounds the active regions (1) at least in directions (x, y) transverse to the main extension direction (R). [9] Optoelectronic semiconductor chip according to the preceding claim, in which the insulating material (4) borders at least in places directly on the outer surface of the active region. [10] Optoelectronic semiconductor chip according to one of the preceding claims, in which a mask layer (5) is arranged on the side of the carrier facing the plurality of active regions (1), wherein the mask layer (5) has for each of the active regions (1) an opening (5a) towards the carrier (2) which is penetrated by the first semiconductor material. [11] Optoelectronic semiconductor chip according to the preceding claim and one of claims 8 and 9, in which the mask layer (5) borders directly on the insulation material (4) in places. [12] Optoelectronic semiconductor chip according to one of the preceding claims, in which a functional material is arranged between the plurality of active regions (1), wherein the functional material surrounds the active regions (1) at least in directions (x, y) transverse to the main extension direction (R) and the functional material comprises at least one luminescence conversion substance and / or at least one ESD protection material.

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