Implementation of improved performance with read-before-write in phase-change memory to avoid write interruptions.

Abstract

Methods for implementing data writing in phase-change memory (PCM), comprising: Starting a data write (200); Reading a data block (202) from a pre-fetched read data region from the PCM before performing the data write to the PCM; and Retaining (206) a cache copy of the read data block in a controller for the duration of the data write operation, furthermore showing Receiving (208) a read request from the pre-fetched read data region during the write operation, Performing (210) the read request from the cache-stored data copy into the controller, thereby preventing read interruption during the data write operation, Receiving (208) a second read request from the pre-fetched read data region during the write operation, and Performing (210) the second read request from the cache-stored copy of data in the controller, thereby preventing read interruption during the data write operation.

Description

Technical field

[0001] The present invention relates generally to the field of data storage and in particular to a method, a device and a storage device for implementing improved performance with read-before-write in phase-change memory (PCM) to avoid write interruptions during urgent read operations from nearby memory locations. State of the art

[0002] Phase-change material (PCM) is a promising medium for next-generation non-volatile semiconductor storage. One of the characteristics of PCM is that writing a bit takes much longer than reading it; write operations are about fifty times slower than read operations.

[0003] While a write operation is in progress, a larger region of the chip's memory, such as a chip region known as a partition, is blocked from read or write access. This means that a read request from a partition being written to must wait until the write operation is complete, which can take up to fifty times longer than typical read latency. Otherwise, the write operation must be aborted to allow the read operation to proceed in a timely manner, and the write operation will be attempted again later.

[0004] An effective and efficient mechanism is needed to implement the performance required for data writing to solid-state drives (SSDs), such as phase-change memory (PCM).

[0005] In the following description and claims, the term phase-change memory (PCM) should be understood generally as encompassing storage devices that exhibit a large asymmetry between read and write latency, wherein read operations are faster than write operations.

[0006] US 2004 / 0117572A1 describes the creation and maintenance of a persistent snapshot in accordance with a novel method and system over extended periods of time, using only a portion of a computer-readable medium from which the snapshot is created.

[0007] Qureshi, MK, Gurumurthi, S., & Rajendran, B. (2011). Phase change memory: From devices to systems. Synthesis Lectures on Computer Architecture, 6(4), Ch 7 contains lectures on computer architecture.

[0008] US 2007 / 0 255 891 A1 describes the storage of data in non-volatile phase-change memory (PCM). Summary of the invention

[0009] Aspects of the present embodiments include the provision of a method, a device, and a storage device for implementing improved performance with read-before-write operation in phase-change memory (PCM). Other important aspects are the provision of such a method, device, and storage device essentially without adverse effects, thereby overcoming certain disadvantages of previously known arrangements.

[0010] In short, a method, a device and a storage device for implementing data writing in the phase change memory according to the independent claims are provided. Brief description of the drawings

[0011] The present invention, together with the above and other problems and advantages, is best understood from the following detailed description of the preferred embodiments of the invention, which are illustrated in the drawings. These show: Fig. 1 a block representation of a system for implementing methods for improved performance with read-before-write in phase-change memory, for example for solid-state drives (SSDs) according to preferred embodiments; Fig. 2. A flowchart of exemplary operations of the system of Fig. 1 for the implementation of phase-change memory with read-before-write with improved performance, for example for solid-state drives (SSDs) according to preferred embodiments; Fig. 3 a typical, previously known data write to certain known storage devices; Fig. 4. a data write to phase change memory according to preferred embodiments; Fig. 5 a block representation of a computer program product according to preferred embodiments. Detailed description of the preferred embodiments

[0012] In the following detailed description of embodiments of the invention, reference is made to the accompanying drawings, which illustrate exemplary embodiments by which the invention can be implemented. It is understood that other embodiments can be used and structural modifications made without deviating from the scope of protection of the invention.

[0013] According to features of preferred embodiments, a method, a device, and a storage device are provided for implementing improved performance, including, for example, improved data writing to phase-change memory for solid-state drives (SSDs). The improved data writing is implemented using a read operation prior to writing data to the phase-change memory of preferred embodiments.

[0014] According to features of the preferred embodiments, each write to the phase-change memory (PCM) is preceded by a read, which is held in the controller for the duration of the write, so that a read request is provided from the pre-called region from the cache-stored copy, thereby avoiding read interruption of the write operation.

[0015] Now, with reference to the drawings, it is in Fig. Figure 1 shows an exemplary system for implementing improved data writing methods for phase-change memory (PCM), for example for solid-state drives (SSDs) with the general designation by reference numeral 100, according to preferred embodiments. The system 100 comprises a solid-state drive 102 and a host computer 104. The SSD 102 comprises a controller central processing unit (CPU) 106 with a cache 107 for storing pre-accessed read data blocks according to preferred embodiments. The SSD 102 comprises the controller CPU 106 coupled with main memory or dynamic random-access memory (DRAM) 108, a phase-change memory (PCM) control code 110, and a phase-change memory (PCM) interface controller 112.

[0016] The SSD 102 comprises several phase-change memory or PCM devices or chips 114, which are coupled to the PCM interface controller 112, which is coupled to the controller 106. The SSD 102 includes a host interface 116, coupled between the host computer 104 and the controller 106 and the phase-change memory or PCM interface controller 112.

[0017] Although the exemplary embodiment of System 100 is described here in the context of the semiconductor drive 102, it is understood that principles of the preferred embodiments may advantageously be applied to other types of data storage devices, including phase-change memory (PCM) and various storage arrangements with storage devices exhibiting a large asymmetry between read and write latency.

[0018] System 100 is shown in a simplified form sufficient to understand preferred embodiments. For example, the controller 106 can be manufactured on one or more integrated circuit chips and is suitably programmed to implement methods according to preferred embodiments.

[0019] The SSD 102 implements improved data writing for phase-change memory (PCM) using a read-before-write operation according to preferred embodiments. The controller CPU 106 of the SSD 102 includes firmware, such as PCM control code 110 according to preferred embodiments, and is coupled to a PCM interface control block 112. Information regarding the PCM interface control block 112, for example from PCM control code 110, is provided to the firmware of the controller 106 of the SSD 102.

[0020] Now with reference to Fig. 2 shows a flowchart illustrating exemplary operations of the system of Fig. 1 represents the implementation of improved performance, including improved data writing, for example for solid-state drives (SSDs) according to preferred embodiments.

[0021] As specified in Block 200, a data write operation begins according to preferred embodiments, such as in response to a received write request. Prior to writing data to the PCM, a large data block is read from a pre-accessed data region of the PCM, as specified in Block 202.

[0022] The large data block read from the pre-called data region is stored in the controller for the PCM, as specified in Block 204. As specified in Block 206, the read large data block is retained for the duration of the write operation. As specified in Block 208, one or more read requests for the pre-called data region are received, optionally during the write operation, while the data write operation is being performed. Each such received request is supplied from the cache-stored copy of the data from the pre-called data region in the controller without interrupting the write, as specified in Block 210 according to features of the preferred embodiments.

[0023] Now with reference to Fig. Figure 3 shows a typical, previously known data write operation to certain known storage devices. A nearby read interrupts the typical data write operation, and after the nearby read, another write operation is performed.

[0024] Now with reference to Fig. Figure 4 shows a data write operation to phase-change memory, generally designated by reference numeral 400, according to preferred embodiments. Prior to the data write operation, more data is read, as indicated in line 402, including a large data block. During the write operation, a nearby read operation, as indicated in line 404, does not interrupt the write operations.

[0025] Now with reference to Fig. Figure 5 is a manufactured article or computer program product 500 of preferred embodiments. The computer program product 500 comprises a computer-readable recording medium 502, such as a floppy disk, a high-capacity read-only memory in the form of an optically read compact disk or CD-ROM, a tape, or another similar computer program product. The computer-readable recording medium 502 stores program means or control code 504, 506, 508, 510 on the medium 502 for executing the methods for implementing improved performance for data writing to phase-change memory (PCM), including read-before-write according to preferred embodiments in the system 100 of Fig. 1.

[0026] A sequence of program instructions or logical assembly of one or more interrelated modules, defined by the recorded program means or control code 504, 506, 508, 510, directs the SSD controller 106 of the system 100 to implement improved performance with data writing to PCM preferred embodiments.

[0027] Although the present invention has been described with reference to the details of the embodiments of the invention shown in the drawing, these details are not intended to limit the scope of protection of the invention as claimed in the attached claims.

Claims

[1] A method for implementing data writing in phase change memory PCM, comprising: Starting a data write (200); Reading a data block (202) from a prefetched read data region from the PCM before performing the data write to the PCM; and Maintaining (206) a cache copy of the read data block in a controller for the duration of the data write operation, further comprising Receiving (208) a read request from the prefetched read data region during the write operation, Performing (210) the read request from the cached data copy into the controller, thereby preventing read interruption during the data write operation, Receiving (208) a second read request from the prefetched read data region during the write operation, and Performing (210) the second read request from the cached data copy in the controller, thereby preventing read interruption during the data write operation. [2] The method of implementing data writing according to claim 1, wherein initiating a data write comprises receiving a write request [3] A method for implementing data writing according to claim 2, wherein reading the data block from the prefetched read data region from the PCM comprises reading an entire partition of the PCM in response to the received write request [4] Apparatus for implementing data writing in phase change memory PCM, comprising: a controller (106); wherein the controller begins a data write; wherein the controller reads a data block from a prefetched read data region from the PCM before performing the data write to the PCM; and wherein the controller (112) maintains a cache copy of the data block for the duration of the data write operation, further comprising the controller receiving a read request from the prefetched read data region during the write operation and the controller performing the read request from the cached copy in the controller, thereby preventing read interruption during the data write operation, wherein the controller receiving a second read request from the prefetched read data region during the write operation and the controller performing the second read request from the cached copy in the controller, thereby preventing read interruption during the data write operation. [5] The apparatus for implementing data writing according to claim 4, comprising control code (110) stored on a non-transitory computer-readable medium, and wherein the controller uses the control code to implement data writing. [6] The apparatus for implementing data writing according to claim 4, comprising the controller receiving a write request and starting data writing. [7] The apparatus for implementing data writing as recited in claim 4, wherein reading the data block from the prefetched read data region from the PCM by the controller comprises the controller reading an entire partition from the PCM in response to the received write request. [8] Data storage device comprising: a phase change memory PCM (114); a controller (106) for implementing data writing to the phase change memory PCM; wherein the controller begins a data write; wherein the controller reads a data block from a prefetched read data region from the PCM before performing the data write to the PCM; and wherein the controller maintains a cache copy of the data block for the duration of the data write operation, comprising: the controller receiving a read request from the prefetched read data region during the write operation and the controller performing the read request from the cached copy in the controller, thereby preventing read interruption during the data write operation; wherein the controller receiving a second read request from the prefetched read data region during the write operation and the controller performing the second read request from the cached copy in the controller, thereby preventing read interruption during the data write operation. [9] The data storage device of claim 8, comprising control code (110) stored on a non-transitory computer-readable medium, and wherein the controller uses the control code to implement data writing. [10] The data storage device of claim 8, comprising: the controller receiving a write request and starting data writing. [11] The data storage device of claim 8, wherein reading the data block from the prefetched read data region from the PCM by the controller comprises the controller reading an entire partition from the PCM in response to the received write request.

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