Component with a metallic support and method for manufacturing components

Abstract

Component (100) comprising a support (1), a semiconductor body (2) and a wiring structure (8) arranged at least partially in a vertical direction between the support (1) and the semiconductor body (2), wherein: - the wiring structure (8) is configured for electrical contacting the semiconductor body (2) and has a first contact surface (31) and a second contact surface (32) which adjoin the support (1) and are assigned to different electrical polarities of the component (100); - the support (1) has a metallic substrate layer (4) and a first through-contact (61), wherein the first through-contact (61) extends vertically through the substrate layer (4), is electrically insulated from the substrate layer (4) by an insulating layer (5) and is in electrical contact with one of the contact surfaces (31, 32) on a front face (11) of the support (1) facing the wiring structure (8).- the component (100) is designed to be electrically contactable externally via the carrier (1), - the carrier (1) has a metal content of at least 60 percent by volume and / or weight, - the metallic carrier layer (4) is an electroplated layer applied to the wiring structure (8), and - the component (100) has cut support arms (40) that project laterally beyond a side surface of the carrier layer (4), wherein the cut support arms (40) have the same material as the carrier layer (4) and a lateral width that is at least five times smaller than a lateral width of the carrier layer (4).

Description

[0001] A component with a metallic support and a method for manufacturing a plurality of components are described.

[0002] An optoelectronic component with a substrate containing a plastic molded body exhibits insufficient mechanical stability, at least in some areas. With regard to thermal resistance and cycle stability, particularly concerning cyclic temperature changes, the plastic molded body, such as one made from a potting compound, poses a potential risk.

[0003] One task is to specify a component with high mechanical and thermal stability. Another task is to specify a cost-effective method for manufacturing one or more components.

[0004] According to at least one embodiment of the component, it comprises a substrate and a semiconductor body arranged on the substrate. The substrate has a front side facing the semiconductor body and a back side facing away from the semiconductor body. In particular, the substrate is manufactured directly on the semiconductor body, for example, on a semiconductor composite at the wafer level. This means that the substrate is not manufactured in a production step separate from the semiconductor body and attached to it, for example, by means of a bonding layer, but is produced directly on the semiconductor body, i.e., in the presence of the semiconductor body. For example, the substrate contains a plurality of layers that are applied sequentially to the semiconductor body.

[0005] The semiconductor body comprises, for example, a first semiconductor layer of a first charge carrier type facing away from the front of the substrate, a second semiconductor layer of a second charge carrier type facing the front of the substrate, and an active layer arranged vertically between the first and second semiconductor layers. In particular, the active layer is a pn junction region configured as a single layer or as a sequence of multiple layers. The active layer is preferably configured to emit electromagnetic radiation, for example in the visible, ultraviolet, or infrared spectral range, or to absorb electromagnetic radiation and convert it into electrical signals or electrical energy. The semiconductor body can be deposited layer by layer onto a growth substrate using an epitaxial process.However, the growth substrate can be removed from the semiconductor body in a subsequent process step, so that the component is, in particular, free of a growth substrate.

[0006] A vertical direction is understood to be a direction that is perpendicular to a principal extensional surface of the semiconductor body. In particular, the vertical direction is the growth direction of the semiconductor layers of the semiconductor body. A lateral direction is understood to be a direction that runs approximately parallel to the principal extensional surface of the semiconductor body. In particular, the vertical direction and the lateral direction are perpendicular to each other.

[0007] According to at least one embodiment of the component, it has a wiring structure that is arranged, at least partially, between the substrate and the semiconductor body in the vertical direction. The wiring structure is configured for electrical contact with the semiconductor body. On a surface of the wiring structure facing the substrate, the wiring structure can have a first contact surface and a second contact surface, which are assigned to, for example, different electrical polarities of the component. The front face of the substrate abuts, in particular, the first and / or the second contact surface of the wiring structure.

[0008] According to at least one embodiment of the component, the substrate has a metallic support layer. In particular, the support layer forms a major component of the substrate, mechanically supporting and stabilizing the substrate and the entire component. At least 50%, approximately 60%, or at least 70% of the substrate's volume and / or weight can be attributed to the support layer. For electrical contacting of the semiconductor body, the substrate can have a first through-contact that extends vertically, in particular through the support layer. The first through-contact can be completely surrounded by the support layer in lateral directions and electrically insulated from the support layer by an insulating layer. At the front face of the substrate, the first through-contact is in physical and thus electrical contact with one of the terminal pads, for example.The metallic substrate can be electrically connected to one of the contact surfaces or electrically insulated from both the first and second contact surfaces. The component can be designed such that it can be electrically contacted externally via the substrate.

[0009] According to at least one embodiment of the component, the support has a metal content of at least 60% by volume and / or weight. This means that the support is predominantly made of metal. Such a support exhibits particularly high mechanical stability. Furthermore, a support consisting essentially of metal is especially suitable for heat dissipation. The metal content of the support can be at least 70%, approximately at least 80%, and preferably at least 90% or 95% by volume and / or weight. In particular, the support or component is free of a molded body made of a casting compound, such as epoxy, resin, or silicone.

[0010] In at least one embodiment of the component, it comprises a substrate, a semiconductor body, and a wiring structure arranged at least partially between the substrate and the semiconductor body in the vertical direction. The wiring structure is configured for electrical contact with the semiconductor body and has a first contact surface and a second contact surface. The contact surfaces of the wiring structure are assigned to different electrical polarities of the component and border the substrate. The substrate has a metallic support layer and a first through-contact, the first through-contact extending vertically through the support layer. The first through-contact is electrically insulated from the support layer by an insulating layer and is in electrical contact with one of the contact surfaces on a front face of the substrate facing the wiring structure.The component is designed to be externally electrically contactable via the substrate. The substrate has a metal content of at least 60% by volume and / or weight.

[0011] Such a component has a support that consists mainly of metal, which makes the component particularly mechanically stable and particularly promotes heat dissipation through the support.

[0012] According to at least one embodiment of the component, the support layer is formed in one piece and can be manufactured in a single process step. The support layer is particularly self-supporting. It can have a vertical thickness of approximately 0.02 mm to 1 mm, 0.02 mm to 0.5 mm, or, for example, 0.02 mm to 0.2 mm. The support layer comprises a metal, such as nickel, copper, or aluminum, or consists of one of these metals. The support layer can also comprise a different metal. Preferably, the support layer comprises or consists of nickel, since nickel has a particularly high modulus of elasticity and is therefore particularly hard compared to other metals. Furthermore, nickel can be applied to the wiring structure in a simplified, structured or unstructured manner, for example, by means of an electroplating process.

[0013] Due to the single-piece construction and high thickness of the support layer, the component receives large-area mechanical support and can withstand high bending loads.

[0014] According to at least one embodiment of the component, the support layer extends along the lateral direction over at least 80% of a lateral edge length of the semiconductor body. In particular, the support layer, viewed from above, can cover at least 60%, approximately at least 70%, or at least 80% of a main surface of the semiconductor body facing the support. The support layer can be configured such that it extends along two adjacent edges or along all lateral edges of the semiconductor body over at least 70%, approximately at least 80%, preferably at least 90% of the respective corresponding lateral edge lengths of the semiconductor body.

[0015] According to at least one embodiment of the component, the substrate layer has a vertical thickness. In particular, the first through-contact projects vertically beyond the substrate layer by a vertical height, wherein the vertical thickness of the substrate layer can be at least three times, approximately at least five times, or at least ten times the vertical height. The substrate layer can have an opening through which the first through-contact extends. The first through-contact can be configured such that, in a top view of the semiconductor body, it completely covers or fills the opening of the substrate layer. For electrical insulation of the first through-contact, an insulating layer can be arranged between the substrate layer and the first through-contact. Preferably, the insulating layer is an oxidized metal layer and / or a nanoceramic layer.Such insulating layers exhibit particularly high thermal conductivity, up to 7 or 8 W / (m·K). A nanoceramic layer is an electrically insulating layer consisting of crystalline powders containing metals or metal oxides, with grain sizes in the nanometer range, for example, between 5 nm and 100 nm, or between 20 nm and 40 nm. For instance, the insulating layer could be an aluminum oxide-containing nanoceramic layer. Alternatively, the insulating layer could be composed of other inorganic dielectrics such as silicon nitride or silicon dioxide.

[0016] According to at least one embodiment of the component, the carrier has a second through-contact in addition to the first. The first and second through-contacts are electrically contactable, in particular, on a rear side of the carrier opposite the front side. It is also possible that the first and second through-contacts are each completely covered by a first contact layer or a second contact layer. Thus, the through-contacts are electrically contactable via the contact layers on the rear side of the carrier. The contact layers can be designed such that they each form a solderable surface on the rear side of the carrier. The component can therefore be designed as a surface-mountable component that can be externally electrically contacted, for example, via a rear side of the component, which can be the rear side of the carrier.The heat generated during operation of the component can be transferred directly into the carrier via the wiring structure and effectively dissipated into the environment via the carrier.

[0017] In the vertical direction, the second contact extends approximately through the substrate layer and may be electrically insulated from it by the insulating layer. At the front of the substrate, the first and second through-contacts are in electrical contact with their first and second contact surfaces, respectively. The substrate and the interconnection structure can thus share a common interface where the through-contacts of the substrate are in electrical contact with the contact surfaces of the interconnection structure. The first and / or second through-contact can be made of a highly electrically and thermally conductive metal such as copper, aluminum, silver, or another metal. The substrate can have multiple first and multiple second through-contacts.

[0018] According to at least one embodiment of the component, the first and / or second through-contact are formed from an electrically conductive and solderable material. The substrate layer can have multiple openings, with the first or second contact surface of the wiring structure exposed in each opening. The openings in the substrate layer can be filled with a solderable material, for example, in the form of solder balls. After a remelting step, the openings in the substrate layer can be completely filled with the solderable material.If the through-holes are formed from a solderable material, particularly as solder balls protruding above the substrate layer, then for connecting the component to be manufactured, for example on a printed circuit board, it is sufficient to provide a flux, since the component, once completed, already incorporates a solder reservoir for potential assembly via the through-holes. Therefore, the application of additional solderable contact layers is unnecessary.

[0019] According to at least one embodiment of the component, the carrier has an additional contact. This additional contact is in electrical contact with the carrier layer. This means that the carrier layer, in this case, is configured for electrical contacting the semiconductor body. The additional contact can be electrically connected to the second terminal surface via the carrier layer. In particular, the carrier layer can directly adjoin the second terminal surface of the wiring structure at the front of the carrier and thus be in physical and electrical contact with it.

[0020] According to at least one embodiment of the component, the substrate is formed exclusively by metal layers and the insulating layer or layers. The metal layers can be the substrate layer, the through-holes, the further contact, the contact layers, and / or also seed layers, wherein the seed layers are provided, for example, for the application of the substrate layer, the through-holes, or the contact layers by means of an electroplating process. The insulating layer or the multiple insulating layers are formed, for example, from a metal oxide or metal oxides. Preferably, the insulating layer or the multiple insulating layers consist of a metal oxide or metal oxides.The insulating layer, or multiple insulating layers, can consist of a single metal layer converted into a metal oxide layer, or of multiple metal layers converted into metal oxide layers. For example, an aluminum layer can be converted into an aluminum oxide layer to form the insulating layer. In particular, the substrate can consist entirely of metal layers and a metal oxide layer, or multiple metal oxide layers. This means that the substrate can be 100% metal and metal oxide. The substrate can also contain different metals and / or different metal oxides.According to at least one embodiment of a method for manufacturing one or more components, the substrate, comprising the substrate layer, the insulating layer, and the first through-contact, is formed on the semiconductor body or on a semiconductor composite, which can be separated into a plurality of semiconductor bodies. For example, the substrate layer is first applied to the semiconductor body, in particular to the wiring structure. The substrate layer can be applied in a structured manner or applied in a planar manner and subsequently structured, such that the substrate layer has one or more openings. The first contact surface or the second contact surface of the wiring structure is exposed in the opening or openings.The insulating layer can then be formed on the substrate layer before the through-hole or multiple through-holes are formed in the respective openings of the substrate layer. The substrate is thus not manufactured separately from the semiconductor body and attached to it, for example, by means of a bonding layer. Rather, the substrate is formed in the presence of the semiconductor body, i.e., directly on the semiconductor body. The formation of such a substrate can take place at the wafer level, i.e., within the wafer stack, before the wafer stack is isolated into multiple components. The manufacturing costs of components can therefore be reduced overall by forming substrates at the wafer level.

[0021] According to at least one embodiment of the method, the carrier layer is deposited onto the wiring structure by means of an electroplating process. In particular, the carrier layer is applied to the wiring structure in a structured manner using a structured lacquer layer or a photoresist layer. First, a starter layer can be applied to the wiring structure. The starter layer is then covered by a lacquer layer, which can be structured, for example, photostructured, in a subsequent process step so that the lacquer layer remains, in particular, only in the areas intended for the openings of the carrier layer. The carrier layer can then be electroplated onto the starter layer, and the lacquer layer is removed in a subsequent process step to expose the openings of the carrier layer.It is also conceivable that the carrier layer is initially applied over a large area to the starting layer and, in a subsequent process step, is selectively removed or etched to create openings.

[0022] According to at least one embodiment of the method, the insulating layer is formed on the substrate by an electrochemical process. In this electrochemical process, a metal oxide layer is formed as the insulating layer. This can involve converting a metal layer into a metal oxide layer, or depositing a metal oxide layer directly onto a metal layer. In particular, the substrate and the insulating layer can be made of the same material. For example, the substrate may be aluminum or consist of aluminum. If aluminum is deposited to form the substrate, it can be converted into aluminum oxide by an electrochemical process. Furthermore, aluminum oxide can be deposited directly onto an aluminum layer.Since aluminum oxide, such as Al2O3, can normally only be converted or deposited onto aluminum, no additional photographic technique is needed in this case to form the insulating layer of aluminum oxide on an aluminum substrate.

[0023] It is also conceivable that the substrate layer is a nickel layer and the insulating layer a nickel oxide layer, with the nickel oxide layer being formed on the nickel layer by means of an electrochemical process. Alternatively, other inorganic dielectric materials can be applied to the substrate layer to form the insulating layer using a coating process such as chemical vapor deposition or physical vapor deposition.

[0024] According to at least one embodiment for manufacturing a plurality of components, a wafer composite is provided. The wafer composite can comprise a semiconductor composite and a plurality of metallic support layers. A plurality of separation trenches are formed, thereby dividing the semiconductor composite into a plurality of semiconductor bodies, each associated with one of the support layers. The wafer composite is then separated along the separation trenches into a plurality of components such that each component contains a semiconductor body and a support with the associated support layer.

[0025] The wafer assembly can include a growth substrate onto which the semiconductor assembly is deposited layer by layer, for example, using an epitaxial process. The growth substrate can be removed from the semiconductor assembly or from the semiconductor bodies before the wafer assembly is singulated, so that the finished devices are preferably free of a growth substrate. The through-contact or multiple through-contacts are preferably created before singulation, so that the devices each have a substrate with at least one through-contact immediately after singulation.

[0026] According to at least one embodiment of the method for producing a plurality of components, the support layers are formed before singulation such that they are mechanically connected to one another by support bars. The support bars can connect two adjacent support layers. In particular, the support bars are produced after the separation trenches have been formed, so that, in plan view, each support bar laterally bridges one of the separation trenches. Specifically, the support bars are cut during the singulation of the wafer composite. The support bars mechanically connect the support layers to one another, so that, for example, after the removal of the growth substrate, the wafer composite continues to be mechanically supported by a continuous structure, namely by the continuous support layers. The support bars and the support layers can be made of the same materials and / or be formed in the same process step.

[0027] According to at least one embodiment of a method, a converter layer is deposited onto the semiconductor body of the component to be manufactured. The converter layer particularly comprises a converter material configured to convert electromagnetic radiation of a first wavelength into electromagnetic radiation of a second wavelength, wherein the second wavelength is particularly greater than the first wavelength. In particular, the active layer is configured to emit electromagnetic radiation of a first wavelength. The converter layer can be formed on the semiconductor assembly or on the semiconductor body before or after the singulation step.

[0028] The method described above is particularly suitable for manufacturing the component described here. Features described in connection with the component can therefore also be applied to the method, and vice versa.

[0029] Further advantages, preferred embodiments and further developments of the method and the component will result from the following in conjunction with the Fig. 1A to Fig. 11 illustrated examples. They show:

[0030] Fig. 1A to Fig. Six different process stages of an exemplary embodiment of a method for manufacturing one or more components in schematic sectional views,

[0031] Fig. 7 an exemplary embodiment of a component in schematic sectional view,

[0032] Fig. 8A to Fig. 9B Various process stages of further embodiments of a method for manufacturing one or more components in schematic sectional views, and

[0033] Fig. 9C to Fig. 11 further examples of the embodiment of a component in schematic sectional views.

[0034] Identical, similar, or similarly functioning elements are marked with the same reference symbols in the figures. The figures are schematic representations and therefore not necessarily to scale. Rather, comparatively small elements, and especially layer thicknesses, may be exaggerated for clarity.

[0035] In Fig. 1A is a network 200 depicted. In particular, the network 200 a wafer composite. The composite 200 features a semiconductor composite 20 on. The semiconductor complex 20 is on a substrate 9arranged. In particular, the substrate 9 a growth substrate, such as a sapphire substrate, wherein the semiconductor composite 20 preferably by means of an epitaxy process applied layer by layer to the substrate 9 is grown. The growth direction is, in particular, perpendicular to a main plane of extension of the substrate. 9 directed. In particular, the growth direction is perpendicular to a first principal surface. 201 and / or a second main area 202 of the semiconductor complex 20 . In the Fig. 1A is the first main area 201 the substrate 9 facing and the second main area 202 the substrate 9 turned away.

[0036] The semiconductor composite 20It can be formed from a III / V compound semiconductor material. A III / V compound semiconductor material contains one element from group 3, such as B, Al, Ga, In, and one element from group 5, such as N, P, As. In particular, the term "III / V compound semiconductor material" includes the group of binary, ternary, or quaternary compounds that contain at least one element from group 3 and at least one element from group 5, for example, nitride and phosphide compound semiconductors. Such a binary, ternary, or quaternary compound may also contain, for example, one or more dopants as well as additional components. The semiconductor compound may also 20 be formed from a II / VI compound semiconductor material.

[0037] The semiconductor composite 20 has a first semiconductor layer 21 , a second semiconductor layer 22and an active layer arranged vertically between the semiconductor layers 23 on. The first main area 201 can pass through a surface of the first semiconductor layer 21 and the second main area 202 through a surface of the second semiconductor layer 22 be formed. For example, the first semiconductor layer 21 n-type and the second semiconductor layer 22 p-type conductive, or vice versa.

[0038] On the side of the second main area 202 of the semiconductor complex 20 A wiring structure will be created. 8 trained. The wiring structure 8 is particularly useful for electrically contacting the semiconductor assembly 20 set up, with the wiring structure 8 for example, directly or indirectly with different semiconductor layers of the semiconductor composite 20They can be electrically connected. The wiring structure can have electrically isolated substructures (not explicitly shown here), each connected to one of the semiconductor layers. 21 and 22 are electrically connected.

[0039] In the Fig. 1A shows the wiring structure 8 a first connection surface 31 and a second connection surface 32 in particular the wiring structure 8 in a vertical direction with the connecting surfaces 31 and 32 ab. That is, the connecting surfaces 31 and 32 limit the wiring structure 8 in sections in the vertical direction. For example, the first connection surface 31 and the second connection surface 32 for electrical contacting of the first semiconductor layer 21 or the second semiconductor layer22 intended, or vice versa. The wiring structure 8 can a plurality of such first connection surfaces 31 and / or a plurality of such second connection surfaces 32 exhibit the connecting surfaces 31 and 32 can be sealed with a precious metal, such as gold.

[0040] Fig. 1B shows the one in the Fig. 1A shown composite 200 Top view. The first connection surface 31 and the second connection surface 32 lie on a semiconductor composite 200 far side of the wiring structure 8 free and therefore directly electrically contactable. The first connection surface 31 and the second connection surface 32 are specifically assigned to different electrical polarities of a component being manufactured. For example, the first contact surface 31the cathode and the second connection layer 32 assigned to the anode of the component, or vice versa. In the Fig. 1B are the connection surfaces 31 and 32 shown in a circular shape. The connecting surfaces can differ from this. 31 and 32 each have any shape, such as square, elliptical, striped, polygonal or other shapes.

[0041] The one in Fig. The embodiment shown in 1C essentially corresponds to that shown in the Fig. 1A, the embodiment shown. In contrast, the wiring structure 8 A more detailed schematic representation. The first connection surface 31 can be in electrical contact with a via 81 the wiring structure 8 stand. In particular, the first connection surface can 31 a surface of the via 81It is also possible that the first connection surface 31 The surface of another layer is the one with the through-hole plating. 81 It is electrically connected. The via extends in the vertical direction. 81 at least from the second main area 202 through the second semiconductor layer 22 and the active layer 23 through into the first semiconductor layer 21 In the lateral direction, the through-hole connection is 81 thus from the semiconductor assembly 20 Completely enclosed. For electrical insulation of the via. 81 from the second semiconductor layer 22 and from the active layer 23 is the through-hole plating of a passivation layer 83 laterally enclosed. Via the through-contact 81 Thus, the first semiconductor layer can 21 approximately at the first connection surface 31be electrically contacted.

[0042] The wiring structure 8 has a connection layer 82 on. The connection layer 82 is for the electrical contacting of the second semiconductor layer 22 provided for. The connecting layer can be used in this process. 82 to the second semiconductor layer 22 adjacent. The second connecting surface 32 can a surface of the connection layer 82 or be the surface of another layer, for example, connected to the bonding layer 81 adjacent to or connected to the connecting layer 82 is electrically connected.

[0043] Contrary to the Fig. 1C can handle the wiring structure 8 a plurality of such vias 81 and / or a plurality of such connection layers 82exhibit. It is also possible that the wiring structure has a radiation-reflecting layer, such as a mirror layer, located on the second main surface. 202 of the semiconductor complex 20 is arranged. The reflective layer is particularly suitable for reflecting electromagnetic radiation emitted during the operation of the component being manufactured in the direction of the first main surface. 201 of the semiconductor complex 20 to reflect. The reflective layer of the wiring structure. 8 It can be electrically conductive. In particular, the reflective layer can be connected to a plurality of contact layers for lateral current spreading. 82 or with multiple vias 81 be electrically conductive. The wiring structure 8The component can have multiple reflective layers, each associated with one of the components being manufactured. It is also possible for the component to be designed as a multi-junction chip. Such a component can have a segmented semiconductor body and more than two contact pads for electrically connecting different segments of the semiconductor body.

[0044] The one in Fig. The embodiment shown in 1D essentially corresponds to one of the ones described in the Fig. 1A to Fig. The embodiments shown in 1C are examples of this. In contrast, the connection is made with a plurality of first connection surfaces. 31 and a plurality of second connection surfaces 32 depicted. The network 200 exhibits a majority of dividing ditches 60 on, through which the network 200is divided into a plurality of sub-areas, with each sub-area of ​​the network 200 a wiring structure 8 with at least one initial connection surface 31 and a second connection surface 32 exhibits. The dividing ditches 60 extend at least partially into the semiconductor assembly in the vertical direction 20 into or through the semiconductor assembly 20 through it. The semiconductor composite 20 This can result in a plurality of semiconductor bodies 2 be subdivided. The dividing trenches are preferred. 60 before forming the wiring structure 8 trained. However, it is also conceivable that the dividing ditches 60 only after the wiring structure has been formed 8 to be trained. In a subsequent process step, the network can 200 along the dividing ditches 60 into a plurality of building elements 100become isolated.

[0045] It will be in Fig. 2A a carrier layer 4 on the side of the wiring structure 8 on the semiconductor compound 20 trained. The carrier layer 4 It can contain one or more metals, for example in the form of a metal alloy. The [contents] in the Fig. 2A shown support layer 4 is, for example, a sub-area of ​​the network 200 , whereby the sub-area is assigned to one of the components to be manufactured. The carrier layer 4 is formed in a particularly coherent, almost single-piece manner. The part in the Fig. 2A shown support layer 4 It is structured and has two openings. Each opening contains a connection surface. 31 or 32 the wiring layer 8 exposed. In particular, the connecting surfaces are 31 and 32 from the carrier layer 4 electrically insulated.

[0046] The carrier layer 4 It can be formed as an electroplated layer within a structured lacquer layer, such as a photoresist layer. In the Fig. 2A does not show the structured coating layer. However, such a structured coating layer can cover areas of the openings in the substrate layer. 4 as well as side surfaces of the carrier layer 4 cover. It is also conceivable that the carrier layer 4 first, a large area is examined of the wiring structure. 8 The substrate is applied and then, in a subsequent process step, partially removed or etched to create openings. The substrate layer is preferably used. 4 by means of an electroplating process applied to the wiring structure 8 applied as material for the carrier layer 4Particularly suitable are metals such as nickel, copper, aluminum, silver, gold, or other electroplatable metals. The substrate layer 4 has a vertical thickness D4 which is approximately between 0.02 mm and 1 mm, in particular between 0.02 mm and 0.5 mm, for example between 0.02 mm and 0.2 mm.

[0047] Contrary to the Fig. 2A it is possible that a plurality of carrier layers 4 on the semiconductor compound 20 is trained. For example, the sub-areas of the network can 200 , as they are in the Fig. Each layer is represented in 1D, along with its corresponding support layer. 4 with at least one opening.

[0048] The one in Fig. The embodiment shown in 2B essentially corresponds to the one described in the Fig. 2A shows the exemplary embodiment in top view. In particular, the Fig. 2B a section or part of the network200 shown, whereby the section or part of the network 200 a component to be manufactured 100 corresponds to the carrier layer. 4 It is formed in one piece. In top view, the wiring structure shows... 8 an edge area that is frame-shaped and the carrier layer 4 laterally encloses the edge of the wiring structure. 8 is therefore free from being covered by the carrier layer 4 In particular, the area of ​​the edge region shall be at most 20%, more specifically at most 10%, preferably at most 5% of the total area of ​​the associated wiring structure. 8 . In the Fig. 2B shows the wiring structure 8 in the respective opening of the carrier layer 4 an area that is free from being covered by the carrier layer 4 is and the first or second connection surface 31 or 32surrounds this area of ​​the wiring structure. 8 The opening in the carrier layer may contain or be covered by an electrically insulating material.

[0049] It will be in the Fig. 3A an insulating layer 5 on the carrier layer 4 trained. In particular, the insulation layer 4 Produced by an electrochemical process. Aluminum is preferred as the substrate material. 4 on the wiring structure 8 Electroplated. The aluminum can be converted into aluminum oxide through an electrochemical process. Aluminum oxide can also be deposited onto a substrate. 4The aluminum oxide layer can be deposited directly onto the existing aluminum layer. Since aluminum oxide typically only deposits reliably onto aluminum, no additional photographic technique is required in this case. It is also possible that the substrate layer contains nickel. In this case, nickel can be deposited onto the wiring structure, for example, via an electroplating process. 8 nickel can be applied. In a subsequent process step, nickel can be partially converted into nickel oxide. It is also conceivable that nickel oxide could be applied directly to the substrate layer via an electrochemical process. 4 The metal oxide layer, which contains nickel, is deposited. It is also conceivable that the metal oxide layer is formed from magnesium, titanium, zirconium, tantalum, or beryllium, particularly through an electrochemical process. Alternatively, inorganic dielectrics can be deposited onto the substrate layer, for example, by chemical or physical vapor deposition. 4 be applied.

[0050] The use of electrochemically deposited metal oxides, such as aluminum oxide or nickel oxide, results in a particularly mechanically stable bond between a metal layer and a metal oxide layer, for example, between an aluminum layer and an aluminum oxide layer. This achieves, on the one hand, exceptionally high thermal conductivity throughout the entire substrate and, on the other hand, high adhesive strength compared to conventional metal-dielectric bonds. Furthermore, the deposition process ensures that, due to the comparatively large vertical thickness D4 of the substrate layer, 4 formed stages of the support layer 4They can be formed in a way that ensures insulation. An electrochemically produced metal oxide layer typically has a higher porosity than a corresponding metal layer. The porosity of the metal oxide layer can be used to determine whether it was produced by an electrochemical process. It is also possible that the insulating layer is formed using other methods. 5 the carrier layer 4 ceramic coated (English: ceramic coated). In ceramic coating, a surface of the substrate layer can be coated. 4They can also be partially oxidized. Both ceramic coatings and aluminum oxide layers exhibit particularly high thermal conductivity. In particular, the thermal conductivity of a metal oxide layer can range from approximately 4 to 8 W / (K∙m). A ceramic coating can also have a thermal conductivity between 4 and 8 W / (K∙m). For example, an insulating layer 5 The insulating layer, made of aluminum oxide or aluminum nanoceramics, has a thermal conductivity greater than 7 W / (K∙m). Preferably, the insulating layer has... 5 a thermal conductivity of at least 4, at least 6 or at least 7 W / (K∙m). Fig. 3B shows this in the Fig. 3A shows an exemplary embodiment in top view. In top view, the insulation layer covers 5 the carrier layer 4 Complete. The insulation layer 5is in particular formed in a continuous manner and has at least one opening in which the first connecting surface 31 or the second connection surface 32 is exposed. Compared to the metal layer 4 The insulation layer 5 a smaller thickness, so that the insulation layer 5 the carrier layer 4 overshaped and in particular a contour of the support layer 4 replicates.

[0051] In Fig. 4A will be a first through contact 61 and a second through contact 62 trained. The through contacts 61 and 62 fill the respective openings of the carrier layer 4 out. The first contact 61 and / or the second through contact 62 extend vertically through the support layer 4 through and are in the area of ​​the openings in the carrier layer 4with the first connection surface 31 or with the second connection surface 32 Electrically conductive connection. The through-contacts 61 and 62 can be applied to the substrate layer by means of a coating process, such as an electroplating or electroless process. 4 can be applied. The through-contacts can also be used. 61 and 62 They can be produced by means of physical or chemical vapor deposition. The support layer 4 and the through-contacts 61 and 62 They can be made of the same material, such as the same metal like aluminum, copper, nickel, gold, or silver. The substrate layer exhibits... 4 and the through-contacts 61 and 62 If the same material is used, a carrier formed from it can be created. 1 They exhibit a particularly high thermal resistance due to expansion.

[0052] The first boiling 61and the second through contact 62 protrude vertically beyond the support layer 4 beyond a vertical height D6. In particular, the support layer 4 and the through-contacts 61 and 62 designed such that the vertical thickness D4 of the carrier layer 4 The vertical height D6 is at least three times, preferably at least five times or at least ten times greater. The vertical height D4 is approximately between 0.001 mm and 0.5 mm inclusive, in particular between 0.001 mm and 0.3 mm, for example between 0.001 mm and 0.15 mm.

[0053] In the Fig. 4A are both the through-contacts 61 and 62 as well as the connecting surfaces 31 and 32 through the insulating layer 5 from the carrier layer 4 electrically insulated. In such a design, the carrier layer bears 4not for electrical contacting of the semiconductor assembly 20 at.

[0054] Fig. 4B and Fig. Figure 4C shows different design variations of the through-contacts. 61 and 62 Top view. The through-contacts 61 and 62 cover the respective openings of the carrier layer 4 Complete. The through-contacts 61 and 62 can be designed such that, in plan view, they comprise a total of approximately at least 30%, at least 50%, at least 60% or at least 80% of an area of ​​the associated wiring structure 8 cover the through-contacts. 61 and 62 can, as in the Fig. 4B shows the insulation layer along a lateral direction. 5 completely cover the contacts. 61 and 62be designed in such a way that they have a lateral width that is smaller than the lateral width of the insulation layer 5 In top view, the through-contacts show 61 and 62 both inside and outside the openings of the carrier layer 4 Overlaps with the insulation layer 5 on.

[0055] In the Fig. 4A indicates the openings in the carrier layer 4 Each cross-section increases in size with increasing distance from the wiring structure. 8 increases. Such a design simplifies the formation of the through-contacts and the application of the insulating layer. 5 on the carrier layer 4 Alternatively, it is also possible that the cross-section increases with increasing distance from the wiring structure. 8 decreases or remains the same.

[0056] It will be in the Fig. 5A Contact Layers 71 and 72formed. The contact layers can be applied to the through-holes using a galvanic or electroless deposition process. 61 and 62 are applied. For example, the contact layers 71 and 72 a metal such as nickel, palladium, or gold. In particular, the contact layers exhibit 71 and 72 Each component has a surface facing away from the through-holes, which is designed to be solderable and electrically contactable. In particular, the component to be manufactured has a mounting surface that provides solderable and electrically contactable surfaces for the contact layers. 71 and 72 The contact layers can be ENEPIG layers (Electroless Nickel Electroless Palladium Immersion Gold). The component to be manufactured is specifically designed for surface mounting.

[0057] The in the Fig. 5B and Fig. The embodiments shown in 5C essentially correspond to the embodiments in the Fig. 4B and Fig. 4C. In contrast, the contact layers are 71 and 72 shown. In top view, a first contact layer can be seen. 71 the first contact 61 completely cover. A second contact layer 72 can see the second through contact in a top view 62 completely cover.

[0058] In the Fig. Figure 6 shows that the growth substrate 9 from the semiconductor complex 20 or from the semiconductor bodies 2 for example, by a mechanical process, an etching process, or a laser lifting process. Separation of the growth substrate 9 can be before or after the singulation of the group 200 into a plurality of building elements 100 be performed.

[0059] To increase the coupling or uncoupling efficiency, a surface exposed by removing the growth substrate, such as the first main surface, can be used. 201 of the semiconductor complex 20 or of the semiconductor body 2 , can be structured. The structured surface can then serve as the radiation transmission surface of the component. 100 be trained. A converter layer 7 It can be applied to the radiation transmission surface of the component. The converter layer 7 It can mimic the contour of the structured radiation transmission surface and thus also be structured. In contrast to the Fig. 6 can the converter layer 7 are unstructured.

[0060] After removing the growth substrate 9 will the remaining group 200 , primarily through the carrier layer 4, mechanically supported. After removal of the growth substrate. 9 can the network 200 into a plurality of building elements 100 be separated in such a way that the separated components 100 each one carrier 1 and one on the carrier 1 arranged semiconductor bodies 2 exhibiting the semiconductor body 2 a part of the semiconductor assembly 20 contains and the carrier 1 a carrier layer 4 with at least one through contact 61 contains. The network 200 can be done along the dividing ditches 60 , which is located in the Fig. The 1D representations are shown separately. In particular, the dividing ditches are 60 free from the carrier layer 4 It is also possible that the dividing ditches 60are at least partially covered by an electrically insulating layer, with the electrically insulating layer being approximately part of the wiring structure 8 or part of the insulation layer 5 may be, with the electrically insulating layer in the area of ​​the separation trenches 60 for example, side surfaces of the semiconductor body 2 partially or completely cover.

[0061] The one in Fig. 7 illustrated embodiment of a component 100 This essentially corresponds to a building element that, according to the Fig. 1A to Fig. The process described in section 6 is used.

[0062] The component 100 has a radiation transmission surface 101 on, which is formed, for example, by a surface of the converter layer 7 is formed. The component 100 exhibits one of the radiation transmission surfaces 101 reverse side 102on. In particular, the back. 102 of the component 100 through a back 12 of the carrier 1 formed. The carrier 1 one of the backs 12 far-facing front 11 on. The front 11 of the carrier, in particular, is a boundary surface between the carrier 1 and the wiring structure 8 of the component 100 In other words, the carrier limits 1 and the wiring structure 8 on the front 11 directly adjacent to each other. The first contact 61 and the second through contact 62 borders at the front 11 especially directly adjacent to the first connecting surface 31 or directly adjacent to the second connection surface 32 the wiring structure 8 .

[0063] The back 12is partially penetrated by a surface of the insulation layer 5 and in some areas through the surfaces of the contact layers 71 and 72 formed. The building element 100 is over the back 12 of the carrier 1 or via the reverse side 102 of the component 100 Designed to be mountable, for example solderable, and electrically contactable.

[0064] In particular, the carrier points out 1 It contains a metal content of at least 60, approximately at least 80, or at least 90% by volume and / or weight. Is the insulating layer... 5 a metal oxide layer, all layers of the substrate 1 It may contain metals. In particular, the metal content of the carrier may be 1 between 90 and 98% by volume and / or weight, inclusive. In particular, the carrier 1 or the component 100free from a molded body made of a potting compound, such as epoxy, resin, or silicone. This significantly improves heat spreading along the lateral direction between the first and second through-contact points.

[0065] The one in Fig. The embodiment shown in 8A essentially corresponds to the one described in the Fig. 5A illustrates an embodiment of a method for manufacturing one or more components. In contrast, the composite has a plurality of support arms. 40 such support arms 40 are particularly in the Fig. 8B and Fig. 8C shown in top view. Through the support arms 40 will the support layers 4 , the various components to be manufactured 100 are assigned to each other and mechanically connected. In particular, the support layers form 4 together with the support arms 40a coherent structure. Such a coherent structure can form a network. 200 , for example after the removal of the growth substrate 9 , stabilize mechanically.

[0066] The support arms 40 can be made of the same material as the carrier layers 4 exhibit. In particular, the support arms can 40 and the support layers 4 They are manufactured in a single process step. The support arms 40 project in lateral directions approximately over a side surface or over the side edges of the support layers 4 outwards and can each be about two adjacent support layers 4 connect them. In a top view, a support arm can be seen. 40 one between two adjacent support layers 4 arranged dividing trench 60 Lateral bridging. The support arms 40They can have a lateral width that is approximately at least five times, approximately at least ten times, at least 15 times or preferably at least 20 times smaller than a corresponding lateral width of the support layer. 4 . During the separation of the group 200 The support arms will be used, particularly in the area of ​​the separation trenches. 60 severed, for example, sawn through. In a top view, the support arms are... 40 from the insulation layer 5 Preferably completely covered. Complete coverage of the support arms. 40 through the insulating layer 5 This can lead to a reduction in potential metal contamination, for example on the radiation transmission surface. 101 of the component to be manufactured 100 lead.

[0067] The one in Fig. The embodiment shown in 9A essentially corresponds to the one described in the Fig. 5A, the embodiment shown. In contrast, the openings in the carrier layer 4 for the formation of the through contacts 61 and 62 for example, filled with a solderable material. In particular, the solderable material, for example in the form of solder balls, can be inserted into the openings of the substrate layer. 4 The solder balls can be pre-made and inserted into the corresponding openings in the carrier layer. 4 to be set. The carrier layer 4 It can have more than two openings, for example three or four, or more than four openings. Because of the three-point support, it is preferred that each support layer 4 has at least three openings that are filled with a solderable material.

[0068] Fig. 9B shows this in the Fig. 9A shows an exemplary embodiment in top view. The support layer 4has two openings, each containing a connection surface 31 is exposed, with the openings for the formation of the through contacts. 61 be filled with a solderable material. The carrier layer 4 It also features two further openings, which are used to form the second through-contacts. 62 also be filled with a solderable and electrically conductive material.

[0069] Fig. Figure 9C shows another embodiment of a component, which is designed approximately according to a design described in the Fig. The embodiment shown in 9A is used to produce a process. This embodiment essentially corresponds to the one described in the Fig. 7 illustrated embodiment. In contrast, the component 100 free from the contact layers 71 and 72 The through contacts 61 and 62They are made of an electrically conductive and solderable material. The through-contacts 61 and 62 can after a remelting step of the in the Fig. The solder balls shown in 9A are formed. After remelting, the through-contacts can be... 61 and 62 the corresponding openings in the carrier layer 4 Fill completely. In top view, the through-contacts point 61 and 62 exclusively within the openings of the carrier layer 4 Overlaps with the insulation layer 5 on. However, it is also conceivable that the through contacts 61 and 62 even outside the openings of the carrier layer 4 Overlaps with the insulation layer 5 exhibit. That in the Fig. The component shown in 9C has a substrate 9 , in particular a growth substrate 9for example, a sapphire substrate, which is particularly transparent to radiation.

[0070] Contrary to the Fig. 9C it is possible that the component 100 a structured radiation transmission surface 101 has and / or a converter layer 7 on the radiation transmission surface 101 is arranged. It is also possible that the substrate 9 from the component 100 is completely removed, so that the component 100 is free of any growth substrate.

[0071] The one in Fig. 10 illustrated embodiment of a component 100 This essentially corresponds to the one in Fig. 7. In contrast, the wiring structure is... 8 with the connection layer 82 , the through-hole 81 as well as the passivation layer 83 analogous to Fig. 1C is shown schematically. Furthermore, the carrier 1 designed in such a way that the carrier layer 4 for electrical contacting the semiconductor body 2 contributes. In the Fig. The carrier indicates 10 1 one or more initial contacts 61 Instead of the second contact, the carrier has another contact. 62 on, which is on the carrier layer 4 trained. Further contact 62 is particularly related to the carrier layer 4 Electrically conductive connection. On the front. 11 The support layer 4 with the second connection surface 32 in the electrical contact. The further contact 62 can therefore be accessed via the carrier layer 4 with the second connection surface 32 and thus with the connection layer 82 and the second semiconductor layer 22be electrically conductive. Compared to Fig. 5A is the insulation layer 5 in the Fig. 10 structured training, so that further contact 62 for example, in direct electrical contact with the substrate layer 4 stands.

[0072] Contrary to the Fig. The carrier can carry 10 1 be designed so that the carrier layer 4 on the front 11 with the first connection surface 31 is in electrical contact and is connected to the second contact surface 32 is isolated.

[0073] Fig. Figure 11 shows an embodiment of a component 100 Top view of the radiation transmission surface 101 The component 100 can have multiple vias 81 exhibit features that are used for electrical contacting of the first semiconductor layer 21 approximately from the second main area 202of the semiconductor body through the second semiconductor layer 22 and through the active layer 23 through into the first semiconductor layer 21 extend.

[0074] The invention is not limited to the description of the invention by reference to the exemplary embodiments. Rather, the invention encompasses every new feature as well as every combination of features, which in particular includes every combination of features in the claims, even if that feature or combination itself is not explicitly specified in the claims or exemplary embodiments.

Claims

[1] Component ( 100 ), which has a carrier ( 1 ), a semiconductor body ( 2 ) and a wiring structure arranged at least partially in a vertical direction between the support and the semiconductor body ( 8 ) exhibits – the wiring structure for electrical contacting the semiconductor body is set up and a first connection surface ( 31 ) and a second connection surface ( 32 ) exhibits, which are adjacent to the carrier and are assigned to different electrical polarities of the component, – the carrier is a metallic carrier layer ( 4 ) and an initial contact ( 61 ) exhibits, wherein the first through contact extends vertically through the carrier layer, from the carrier layer through an insulating layer ( 5 ) is electrically insulated and on a front side facing the wiring structure ( 11) of the carrier with one of the connection surfaces ( 31 , 32 ) is in electrical contact, – the component is designed to be electrically contactable externally via the carrier, and – the carrier has a metal content of at least 60 percent by volume and / or weight. [2] Component according to the preceding claim, wherein the support layer ( 4 ) is formed in one piece. [3] Component according to one of the preceding claims, wherein the support layer ( 4 ) along a lateral direction over at least 80% of a lateral edge length of the semiconductor body ( 2 ) extends. [4] Component according to one of the preceding claims, wherein the support layer ( 4 ) in top view of the semiconductor body ( 2 ) at least 70% of the carrier ( 1 ) facing main surface ( 202 ) of the semiconductor body. [5] Component according to one of the preceding claims, wherein the support ( 1 ) has a metal content of at least 90 percent by volume and / or weight. [6] Component according to one of the preceding claims, wherein the support layer ( 4 ) has a vertical thickness (D4), the first through contact ( 61 ) projects in the vertical direction beyond the support layer by a vertical height (D6), wherein the vertical thickness (D4) is at least three times the vertical height (D6). [7] Component according to one of the preceding claims, wherein the insulating layer ( 5 ) is an oxidized metal layer or a nanoceramic layer. [8] Component according to one of the preceding claims, wherein the support ( 1 ) a second through contact ( 62 ) exhibits – the first and second through contact ( 61 , 62 ) on one of the front sides ( 11) opposite back side ( 12 ) of the carrier are electrically contactable, – the second through contact ( 62 ) in the vertical direction through the support layer ( 4 ) extends through and through the insulating layer ( 5 ) from the carrier layer ( 4 ) is electrically insulated, and – the first contact ( 61 ) on the front ( 11 ) with the first connection surface ( 31 ) and the second through-contact ( 62 ) on the front ( 11 ) with the second connection surface ( 32 ) is in electrical contact. [9] Component according to claim 8, wherein the first through-contact ( 61 ) and the second through-contact ( 62 ) are made of an electrically conductive and solderable material. [10] Component according to any one of claims 1 to 7, wherein the support ( 1 ) another contact ( 62) exhibits, which is on the carrier layer ( 4 ) is formed and is in electrical contact with the carrier layer, whereby the further contact ( 62 ) over the carrier layer ( 4 ) with one of the connection surfaces ( 31 , 32 ) is electrically connected. [11] Component according to one of the preceding claims, wherein the support ( 1 ) exclusively through metal layers ( 4 , 61 , 62 , 71 , 72 ) and the insulating layer ( 5 ) is formed from metal oxide. [12] Method for manufacturing a component ( 100 ) according to one of claims 1 to 11, wherein the carrier ( 1 ) with the carrier layer ( 4 ), the insulating layer ( 5 ) and the first through contact ( 61 ) on the semiconductor body ( 2 ) is trained. [13] Method according to claim 12, wherein the carrier layer (4 ) by means of a galvanic process on the wiring structure ( 8 ) is separated. [14] Method of one of claims 12 to 13, wherein the insulating layer ( 5 ) through an electrochemical process on the substrate layer ( 4 ) is trained. [15] Method according to the preceding claim, wherein the carrier layer ( 4 ) and the insulating layer ( 5 ) have the same metal, whereby the metal of the insulating layer is oxidized by the electrochemical process. [16] Method according to any one of claims 12 to 15 for producing a plurality of components, in which a wafer composite ( 200 ) is provided, which includes a semiconductor composite ( 20 ) and a plurality of metallic support layers ( 4 ) exhibits – a plurality of dividing ditches ( 60) is formed, whereby the semiconductor composite is divided into a plurality of semiconductor bodies ( 2 ) is subdivided, each of which is one of the carrier layers ( 4 are assigned, and – the wafer composite into a plurality of building elements ( 100 ) along the dividing ditches ( 60 ) is so isolated that each component ( 100 ) a semiconductor body ( 2 ) and a carrier ( 1 ) with the associated carrier layer ( 4 ) contains. [17] Method according to the preceding claim, wherein the support layers ( 4 ) before singulation by support arms ( 40 ) are mechanically connected to each other, with the support arms ( 40 ) connect each of two adjacent support layers, in plan view one of the separation trenches ( 60 ) bridge laterally and are cut during singulation.

Images