Schottky-Diode

Abstract

Schottky diode, which has: an n-type layer (200) disposed on a first surface of an n+ type silicon carbide substrate (100); a region (400) of type p+ and several regions (500) of type p arranged on the layer (200) of type n-, an anode (600) disposed on the n-type layer (200), the p+ type region (400) and the plurality of p-type regions (500); a cathode (700) disposed on a second surface of the n+ type silicon carbide substrate (100), and where each of the regions (500) of type p has a hexagonal shape in a plane and the plurality of regions (500) of type p are arranged in a matrix in the plane, and wherein on the plane, the n-type layer (200) has a plurality of hexagonally shaped sections which are spaced apart from one another and which are arranged between the p+ type region (400) and the plurality of p-type regions (500), wherein the p+ type region (400) is arranged between the plurality of hexagonally shaped sections of the n-type layer (200) and the plurality of hexagonally shaped sections of the n-type layer (200) each surround the plurality of p-type regions (500), wherein at the level the region (400) of type p+ is a completely continuous region which completely surrounds the plurality of hexagonally shaped sections, the p+ type region (400) and the plurality of p-type regions (500) are each in contact with the n- type layer (200), and on the plane, an area in which the region (400) of type p+ and the layer (200) of type n- are in contact is larger than an area in which the plurality of regions (500) of type p and the layer (200) of type n- are in contact, wherein an ion doping concentration of the p+ type region (400) is higher than an ion doping concentration of the plurality of p-type regions (500), also with: an n-type layer (300) provided between the anode (600) and the n-type layer (200), and wherein the ion doping concentration of the n-type layer (300) is greater than the ion doping concentration of the n-type layer (200).

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a Schottky diode comprising silicon carbide (SiC) and a method of manufacturing the same. BACKGROUND

[0002] A Schottky diode (SBD), unlike a conventional PN diode, uses a Schottky junction where a metal and a semiconductor are connected instead of a PN junction, offers fast switching characteristics and has a lower turn-on voltage characteristic than the PN diode.

[0003] In a conventional Schottky diode, a Schottky contact barrier (JBS) structure is adopted in which a p+ region is formed at a lower end of a Schottky junction portion to improve leakage current reduction, thereby obtaining an effect of blocking leakage current and improving a breakdown voltage by overlapping barrier layers of the PN diode that diffuse upon application of a reverse voltage.

[0004] A p+ type region and a p- type region having different ion doping concentrations are formed to reduce an electric field of the Schottky junction region so that a leakage current can be reduced when a reverse voltage is applied.

[0005] The above information disclosed in this Background section is provided solely to enhance the understanding of the background of the invention and thus may contain information that is not part of the prior art already known to a person skilled in the art in this country.

[0006] WO 2016 / 091488 A1 is prior art, which describes a junction barrier Schottky diode. JP 2010-40857 A and US 2012 / 0056197 A1 describe other prior art Schottky diodes. SUMMARY

[0007] The present disclosure increases a current density of a Schottky diode.

[0008] The invention is defined by the independent claims.

[0009] As described above, according to an exemplary embodiment of the present disclosure, by making the contact area of ​​the p+ type region and the n- type layer larger than the contact area of ​​the p-type region and the n- type layer, the current density of the Schottky diode can be increased when a forward voltage is applied.

[0010] Consequently, the footprint of the Schottky diode can be reduced, thereby increasing the number of Schottky diodes per unit wafer and their yield. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a layout showing an example of a Schottky diode according to an exemplary embodiment of the present disclosure. Fig. 2 is a cross-sectional view taken along a line II-II of the Fig. 1 is taken. Fig.3 is a layout view partially showing a Schottky diode according to an exemplary embodiment of the present disclosure. Fig. 4 is a layout view partially showing a Schottky diode according to a comparative example. Fig. 5 to Fig. 8 are views showing an example of a manufacturing method of a Schottky diode according to an exemplary embodiment of the present disclosure. This manufacturing method is not claimed. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0011] Exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. As will be apparent to those skilled in the art, the described embodiments may be modified in various ways without departing from the spirit or scope of the present disclosure. The exemplary embodiments disclosed herein are presented so that the disclosed contents are accurate and complete, and the subject matter of the present disclosure will be sufficiently understood by those skilled in the art.

[0012] In the drawings, the thicknesses of the layers and regions are exaggerated for clarity. Furthermore, when a layer is referred to as being provided "on" another layer or substrate, the layer may be formed directly on the other layer or substrate, or a third layer may be provided in between. The same reference numerals refer to like components throughout this specification.

[0013] Fig. 1 is a layout showing an example of a Schottky diode according to an exemplary embodiment of the present disclosure. Fig. 2 is a cross-sectional view taken along a line II-II of the Fig. 1 is taken.

[0014] As it is in Fig. 1 and Fig.2, the Schottky diode according to an exemplary embodiment comprises an n+ type 100 silicon carbide substrate, an n- type 200 layer, an n- type 300 layer, a p+ type 400 region, a p- type 500 region, an anode 600, and a cathode 700.

[0015] According to the layout of the Fig. 1, the layer of type n 300 and the anode 600 are omitted. With reference to Fig.1, the p-type region 500 is formed in a hexagonal shape in the plane and separated from the p+ type region 400. The n-type layer 200 is provided between the p-type region 500 and the p+ type region 400. The n-type layer 200, which is provided between the p-type region 500 and the p+ type region 400, is formed in a hexagonal shape. That is, in the plane, the n-type layer 200 of the hexagonal shape surrounds the p-type region 500 in the hexagonal shape, and the p+ type region 400 is provided in the remaining portion. Here, the layer of type n- 200 and the region of type p 500, provided between the region of type p 500 and the region of type p+ 400, have the shape of a regular hexagon in a plane.

[0016] The p-type 500 region is provided in multiple ways and is arranged in a matrix. The plurality of p-type 500 regions are arranged in a zigzag shape in a column direction, so that a horizontal line passing through a center point of the p-type 500 region does not meet a horizontal line passing through the center point of the p-type 500 region provided in the plane adjacent to it in the column direction.

[0017] Next, the detailed structure of the semiconductor device according to an exemplary embodiment of the present disclosure will be described.

[0018] The n-200 type layer and the n-300 type layer are provided one above the other on the first surface of the n+100 type silicon carbide substrate. The ion doping concentration of the n-300 type layer is higher than the ion doping concentration of the n-200 type layer.

[0019] A first trench 350 and a second trench 360 are formed in the n-type layer 300, and the first trench 350 and the second trench 360 are provided adjacent to each other and separated from each other. The first trench 350 and the second trench 360 may have the same depth.

[0020] The p+ type region 400 is provided under a lower surface of the first trench 350, and the p-type region 500 is provided under a lower surface of the second trench 360. The ion doping concentration of the p+ type region 400 is greater than the ion doping concentration of the p-type region 500.

[0021] The p+ type region 400 surrounds a corner of the lower surface of the first trench 350 and is in contact with the n- type layer 200. The p- type region 500 surrounds a corner of the lower surface of the second trench 360 and is in contact with the n- type layer 200.

[0022] The anode 600 is provided on the n-type layer 300 in the first trench 350 and the second trench 360. The anode 600 may comprise a Schottky metal. The anode 600 includes a first anode 610 provided in the first trench 350 and the second trench 360, and a second anode 620 provided on the first anode 610 and the n-type layer 300. The first anode 610 is in contact with the p+ type region 400 and the p-type region 500.

[0023] The cathode 700 is provided on the second surface of the n+ 100 type silicon carbide substrate. The cathode 700 may comprise the ohmic metal. Here, the second surface of the n+ 100 type silicon carbide substrate is provided on the side opposite the first surface of the n+ 100 type silicon carbide substrate.

[0024] Since the ion doping concentration of the p+ 400 type region is larger than the ion doping concentration of the p 500 type region, a hole current density in a portion where the p+ 400 type region and the n- type layer are connected or adjacent to each other is larger than a hole current density in a portion where the p 500 type region and the n- type layer are connected or adjacent to each other when a forward bias is applied.

[0025] As described above, the n-200 type layer in the hexagonal shape surrounds the p 500 type region in the hexagonal shape in the plane, the p+ 400 type region is provided in the remaining portion, and the p+ 400 type region and the p 500 type region are each in contact with the n- 200 type layer. Consequently, the area in which the p+ 400 type region and the n- 200 type layer are in contact is larger than the area in which the p 500 type region and the n- 200 type layer are in contact.

[0026] That is, the area where the p+ 400 type region and the n- 200 type layer are in contact is increased so that the hole current density of the Schottky diode increases, thereby increasing the total current density of the Schottky diode.

[0027] Due to the increase in the current density of the Schottky diode, the footprint or dimension of the Schottky diode can be reduced so that the number of Schottky diodes per unit wafer or wafer unit (unit wafer) and the yield can be improved.

[0028] Next, a characteristic of the Schottky diode according to an exemplary embodiment of the present disclosure will be described with reference to Fig. 3, Fig. 4 and Table 1.

[0029] As it is in Fig. 3 and Fig. 4, a Schottky diode according to an exemplary embodiment of the present disclosure and a Schottky diode according to a comparative example are manufactured.

[0030] Fig. 3 is a layout view partially showing a Schottky diode according to an exemplary embodiment of the present disclosure.

[0031] Fig.4 is a layout view partially showing a Schottky diode according to a comparative example.

[0032] With reference to Fig. 3, as described above, the Schottky diode according to an exemplary embodiment of the present disclosure has a structure in which, viewed in the plane, the n-type 200 layer of the hexagonal shape surrounds the p-type region 500 in the hexagonal shape, and the p+ type 400 region is provided in the remaining portion. Here, a triangle can be formed including lines each connecting the center of the p-type region 500 and two adjacent vertices of the p-type region 500 in the hexagonal shape, and a line connecting center portions of two adjacent p-type regions 500 as one side, and this triangle is referred to as a unit cell.

[0033] With reference to Fig.4, the Schottky diode according to a comparative example has a structure in which the p+ type region and the p-type region are formed in a rod shape, and the n- type layer is provided between the p+ type region and the p-type region. In this case, a quadrilateral can be formed that includes exactly one p-type region and exactly one p+ type region, which quadrilateral is referred to as a unit cell.

[0034] In the unit cell of the Schottky diode according to an exemplary embodiment of the present disclosure, it can be confirmed that the area occupied by the p+ type region is larger than the area occupied by the p type region. In the unit cell of the Schottky diode according to the comparative example, it can be confirmed that the area occupied by the p+ type region and the area occupied by the p type region are equal.

[0035] Table 1 shows a simulation result of the Schottky diode according to an exemplary embodiment of the present disclosure and the Schottky diode according to the comparative example when a forward bias is applied. [Table 1] outline Electron current density per unit cell (A / µm 2 ) Hole current density per unit cell (A / µm 2 ) Total current density per unit cell (A / µm 2 ) Area of ​​the conductive section (cm 2 at 100A) Comparative example 124 162 286 0,350 Example embodiment 124 203 327 0,306

[0036] Referring to Table 1, it can be confirmed that the electron current density per unit cell of the Schottky diode according to the present exemplary embodiment is equal to the electron current density per unit cell of the Schottky diode according to the comparative example. However, the hole current density per unit cell of the Schottky diode according to the present exemplary embodiment is approximately 25% higher than the hole current density per unit cell of the Schottky diode according to the comparative example. Thus, it can be confirmed that the total current density per unit cell of the Schottky diode according to the present exemplary embodiment is approximately 14% higher than the total current density per unit cell of the Schottky diode according to the comparative example.

[0037] Based on the same current amount of 100 A, it can be confirmed that the area of ​​the Schottky diode according to the present exemplary embodiment is approximately 13% smaller than that of the Schottky diode according to the comparative example. Thus, a larger number of Schottky diodes according to the present exemplary embodiment can be included per unit wafer compared to the Schottky diodes according to the comparative example, thereby reducing costs.

[0038] Next, a manufacturing method of a semiconductor element according to an exemplary embodiment of the present disclosure will be described with reference to Fig. 5 to Fig. 8 described.

[0039] Fig. 5 to Fig. 8 are views showing an example of a manufacturing method of a Schottky diode according to an exemplary embodiment of the present disclosure.

[0040] With reference to Fig. 5, an n+ 100 type silicon carbide substrate is provided, and an n- 200 type layer and an n- 300 type layer are sequentially formed on a first surface of the n+ 100 type silicon carbide substrate. The ion doping concentration of the n- 300 type layer is greater than the ion doping concentration of the n- 200 type layer.

[0041] Here, the n- 200 type layer is formed by epitaxial growth on the first surface of the n+ 100 type silicon carbide substrate, and the n 300 type layer is formed by epitaxial growth on the n- 200 type layer.

[0042] The n-200 type layer is formed by epitaxial growth on the first surface of the n+100 type silicon carbide substrate, and the n-300 type layer can be formed by introducing or injecting n-type ions into the surface of the n-200 type layer.

[0043] With reference to Fig. 6, the n-type layer 300 is etched to form a first trench 350 and a second trench 360. The first trench 350 and the second trench 360 are arranged adjacent to each other and separated from each other. The first trench 350 and the second trench 350 may have the same depth.

[0044] With reference to Fig.7, p+ type ions are introduced or injected into a lower surface of the first trench 350 to form the p+ type region 400. The p+ type region 400 is formed under the lower surface of the first trench 350, surrounds the corner of the lower surface of the first trench 350, and is in contact with the n- type layer 200.

[0045] With reference to Fig. 8, p-type ions are introduced or injected into the lower surface of the second trench 360 to form the p-type region 500. The p-type region 500 is formed below the lower surface of the second trench 360, surrounds the lower surface of the second trench 360, and is in contact with the n-type layer 200. Here, the ion doping concentration of the p-type region 500 is lower than the ion doping concentration of the p+ type region 400.

[0046] Furthermore, as stated in Fig.As shown in Figure 1, the p-type region 500 has a hexagonal shape in the plane and is separated from the p+ type region 400, and the n-type layer 200 is provided between the p-type region 500 and the p+ type region 400. The n-type layer provided between the p-type region 500 and the p+ type region 400 has a hexagonal shape. That is, the n-type layer of the hexagonal shape, viewed in the plane, surrounds the p-type region 500 of the hexagonal shape, and the p+ type layer 400 is provided in the remaining portion.

[0047] The p-type 500 region is provided in a multiple manner and arranged in a matrix. The plurality of p-type 500 regions are provided in a zigzag pattern in the column direction, so that the horizontal line passing through the center of the p-type 500 region does not intersect with a horizontal line passing through the p-type 500 region provided adjacent to it in the column direction in the plane.

[0048] With reference to Fig. 2, the anode 600 is formed on the n-type layer 300 in the first trench 350 and the second trench 360, and the cathode 700 is formed on the second surface of the n+ type silicon carbide substrate 100.

[0049] Here, the anode 600 includes a first anode 610 provided in the first trench 350 and the second trench 360, and a second anode 620 provided on the first anode 610 and the n-type layer 300. The first anode 610 is in contact with the p+ type region 400 and the p-type region 500.

[0050] The anode 600 may comprise the Schottky metal, and the cathode 700 may comprise the ohmic metal.

[0051] On the other hand, according to the manufacturing method of the semiconductor element according to the present exemplary embodiment, the p+ type region 400 and the p type region 500 are formed after the first trench 350 and the second trench 360 are formed simultaneously, but this is not limited to this, but the first trench 350 may be formed first, the p+ type region 400 may be formed under the bottom surface of the first trench 350, and then the second trench 360 may be formed, the p type region 500 may be formed under the bottom surface of the second trench 360.

Claims

[1] Schottky diode, which has: an n-type layer (200) disposed on a first surface of an n+ type silicon carbide substrate (100); a region (400) of type p+ and several regions (500) of type p arranged on the layer (200) of type n-, an anode (600) disposed on the n-type layer (200), the p+ type region (400) and the plurality of p-type regions (500); a cathode (700) disposed on a second surface of the n+ type silicon carbide substrate (100), and where each of the regions (500) of type p has a hexagonal shape in a plane and the plurality of regions (500) of type p are arranged in a matrix in the plane, and wherein on the plane, the n-type layer (200) has a plurality of hexagonally shaped sections which are spaced apart from one another and which are arranged between the p+ type region (400) and the plurality of p-type regions (500), wherein the p+ type region (400) is arranged between the plurality of hexagonally shaped sections of the n-type layer (200) and the plurality of hexagonally shaped sections of the n-type layer (200) each surround the plurality of p-type regions (500), wherein at the level the region (400) of type p+ is a completely continuous region which completely surrounds the plurality of hexagonally shaped sections, the p+ type region (400) and the plurality of p-type regions (500) are each in contact with the n- type layer (200), and on the plane, an area in which the region (400) of type p+ and the layer (200) of type n- are in contact is larger than an area in which the plurality of regions (500) of type p and the layer (200) of type n- are in contact, wherein an ion doping concentration of the p+ type region (400) is higher than an ion doping concentration of the plurality of p-type regions (500), also with: an n-type layer (300) provided between the anode (600) and the n-type layer (200), and wherein the ion doping concentration of the n-type layer (300) is greater than the ion doping concentration of the n-type layer (200). [2] The Schottky diode according to claim 1, wherein a horizontal line passing through a center of each of the plurality of p-type regions (500) does not intersect with a horizontal line of each of the plurality of p-type regions (500) adjacent thereto in an in-plane layer direction. [3] A Schottky diode according to claim 1 or 2, wherein the anode (600) comprises a Schottky electrode and the cathode (700) comprises an ohmic electrode. [4] A Schottky diode according to any one of the preceding claims, further comprising a first trench (350) and a second trench (360) disposed on the n-type layer (300), the first trench (350) and the second trench (360) being separated from each other. [5] The Schottky diode of claim 4, wherein the p+ type region (400) is disposed below a bottom surface of the first trench (350) and each of the p-type regions (500) is disposed below the bottom surface of the second trench (360). [6] Schottky diode according to claim 5, wherein the anode (600) comprises: a first anode (610) disposed in the first trench (350) and the second trench (360), and a second anode (620) disposed on the first anode (610) and the n-type layer (300). [7] Schottky diode, which has: an n-type layer (200) disposed on a first surface of an n+ type silicon carbide substrate (100); a single region (400) of type p+ arranged on the layer (200) of type n-, a plurality of regions (500) of type p arranged on the layer (200) of type n- and arranged in the single region (400) of type p+, an anode (600) disposed on the n-type layer (200), the single p+ type region (400) and the plurality of p-type regions (500); a cathode (700) disposed on a second surface of the n+ type silicon carbide substrate (100), and where each of the plurality of regions (500) of type p has a hexagonal shape in a plane and the plurality of regions (500) of type p are arranged in a matrix in the plane, and wherein on the plane, the layer (200) of type n- has a plurality of hexagonally shaped sections which are spaced apart from one another and which are arranged between the one single region (400) of type p+ and the plurality of regions (500) of type p, wherein the one single region (400) of type p+ is arranged between the plurality of hexagonally shaped sections of the layer (200) of type n- and the plurality of hexagonally shaped sections of the layer (200) of type n- each surround the plurality of regions (500) of type p, wherein on the plane, the one single region (400) of type p+ is a completely continuous region which completely surrounds the plurality of hexagonally shaped sections, the single region (400) of type p+ and the plurality of regions (500) of type p are each in contact with the layer (200) of type n-, and on the plane, an area in which the single region (400) of type p+ and the layer (200) of type n- are in contact is larger than an area in which the plurality of regions (500) of type p and the layer (200) of type n- are in contact, wherein an ion doping concentration of the p+ type region (400) is higher than an ion doping concentration of the plurality of p-type regions (500), also with: an n-type layer (300) provided between the anode (600) and the n-type layer (200), and wherein the ion doping concentration of the n-type layer (300) is greater than the ion doping concentration of the n-type layer (200). [8] The Schottky diode according to claim 7, wherein a horizontal line passing through a center of each of the plurality of p-type regions (500) does not intersect with a horizontal line of each of the plurality of p-type regions (500) adjacent thereto in a layer direction of the plane.

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