System and method for measuring a multitude of RF signal paths

Abstract

Method for signal path measurement, wherein the method comprises the following: Providing an initial signal at a common node coupled to a multitude of signal paths, each comprising a phase-shift circuit; Receiving a third signal comprising a frequency different from a frequency of the first signal; and Mixing the first signal in accordance with the third signal to obtain a second signal; Providing the second signal, via a first test path, to a first node that is coupled to a first signal path of the plurality of signal paths; Providing the second signal, via a second test path, to a second node coupled to a second signal path of the plurality of signal paths, wherein a difference in the phase delay between the second test path and the first test path includes a first known phase delay; Selecting a signal path from the multitude of signal paths; Transmitted, via the selected signal path, either the first signal or the second signal; and Mixing the first signal with the second signal to obtain a measurement signal of the selected signal path.

Description

[0001] The present invention relates in general to a system and method for measuring phase rotation, and, in particular embodiments, to a system and method for measuring phase rotation using signal mixing.

[0002] Phased array transmit / receive systems are desirable for many applications, such as broadcasting, radar, space probe communications, weather research, optics, radio frequency (RF) identification systems, and tactile feedback systems. These systems can also be used for gesture recognition, communication feedback, and high-speed routing in Wireless Gigabit (WiGig) or other wireless consumer systems.

[0003] A phased array is an array of antennas in which the relative phase of each signal transmitting its respective antenna channel is adjusted such that the array's effective radiation pattern is amplified in a desired direction and attenuated in undesired directions. This amplified and attenuated radiation pattern occurs due to constructive and destructive interference between the different phase signals emitted by each antenna. The phase relationships can be adjustable, for example, for beam steering. A phased array can be used to demonstrate a fixed radiation pattern or to rapidly sample an azimuth or elevation.

[0004] One type of phased array is a dynamic phased array. In a dynamic phased array, an adjustable phase shifter is integrated into each signal path carrying an antenna channel, and these adjustable phase shifters are used collectively to move the beam relative to the array side.

[0005] Patent application US 2013 / 0079060A1 discloses an active transmitter-receiver arrangement for a wireless telecommunications network. The transmitter-receiver arrangement comprises a plurality of calibratable transmitter-receiver modules. Each transmitter-receiver module includes a transmit-receive chain that can be operated to process a primary signal and generate a processed primary signal; a comparator unit that can be operated to compare the primary signal and the processed primary signal to determine a transmit-receive chain error induced by the transmit-receive chain in the processed primary signal; and a correction unit that uses the transmit-receive error to correct the primary signal to be processed by the transmit-receive chain.

[0006] The non-patent literature CAO, Z. [et al.]: “Advanced Integration Techniques on Broadband Millimeter-Wave Beam Steering for 5G Wireless Networks and Beyond”. In: IEEE Journal of Quantum Electronics, vol. 52, no. 1, January 2016, DOI: 10.1109 / JQE.2015.2509256 describes how monolithic integration based on photonic membranes can be suitable for the application of photonic millimeter-wave beam steering, especially due to the simple integration of EIC and PIC on a single chip. It combines an Electronic Integrated Circuit (EIC) with a Photonic Integrated Circuit (PIC).

[0007] A method for signal path measurement, a measurement circuit, and a measurement system are provided. Further aspects are disclosed in the accompanying claims.

[0008] In accordance with a first exemplary embodiment of the present invention, a method for signal path measurement is provided. The method comprises providing a first signal at a common node coupled to a plurality of signal paths, each of which includes a phase shift circuit. The method also comprises providing a second signal, via a first test path, to a first node coupled to the first signal path of the plurality of signal paths. The method further comprises providing the second signal, via a second test path, to a second node coupled to a second signal path of the plurality of signal paths such that a difference in the phase delay between the second test path and the first test path exhibits a first known phase delay.The procedure also includes selecting a signal path from the multitude of signal paths, transmitting either the first signal or the second signal over the selected signal path, and mixing the first signal with the second signal to obtain a measurement signal of the selected signal path.

[0009] In accordance with a second exemplary embodiment of the present invention, a measurement circuit is provided. The measurement circuit comprises a first semiconductor device. The first semiconductor device has a plurality of signal paths, each of which includes a phase-shift circuit. The first semiconductor device also has a first node coupled to a first signal path of the plurality of signal paths, a second node coupled to a second signal path of the plurality of signal paths, and a common node coupled to the plurality of signal paths.The first semiconductor device is configured to provide a first signal at the common node, to provide a second signal to the first node via a first test path, to provide the second signal to the second node via a second test path, to transmit either the first signal or the second signal via a selected signal path from the plurality of signal paths, and to mix the first signal with the second signal to obtain a measurement signal of the selected signal path. A difference in the phase delay between the second test path and the first test path exhibits a known phase delay.

[0010] In accordance with a third exemplary embodiment of the present invention, a measurement system is provided. The measurement system comprises a first semiconductor device. The first semiconductor device has a plurality of signal paths coupled to one another at a common node, and a plurality of test paths, each comprising a first test path and a second test path. The first semiconductor device also comprises a reference node coupled between the first test path and a first signal path of the plurality of signal paths, a non-reference node coupled between the second test path and a second signal path of the plurality of signal paths, and a first frequency mixer having an input coupled either to the reference node or to the common node.The first semiconductor circuit also features a measurement output node, which is coupled to an output of the first frequency mixer such that a difference in the phase delay between the second test path and the first test path results in a first known phase delay. Each of the multiple signal paths has its own phase shift circuit.

[0011] The independent claims define different aspects of the invention. The dependent claims describe embodiments according to different aspects of the invention.

[0012] For a more comprehensive understanding of the present invention and its advantages, reference is now made to the following description in conjunction with the accompanying drawings. First, the drawings will be briefly described. Fig. Figure 1A is a block diagram illustrating a transmission-configured integrated multi-channel beam steering circuit (Integrated Circuit, IC) in accordance with the exemplary embodiments described herein; Fig. Figure 1B is a block diagram illustrating a receiver-configured integrated multi-channel beam steering IC in accordance with the exemplary embodiments described herein; Fig. 1C is a block diagram showing an alternative embodiment of the IC of Fig. 1A is illustrated in accordance with the exemplary embodiments described herein; Fig. 1D is a block diagram showing an alternative embodiment of the IC of Fig. 1B is illustrated in accordance with the exemplary embodiments described herein; Fig. 2A is a block diagram showing a step-down mixer circuit, which in the embodiments of Fig. 1A and Fig. 1B can be used, in accordance with the exemplary embodiments described here; Fig. 2B is a block diagram showing an alternative embodiment of the down-converting mixer circuit of Fig. 2A is illustrated in accordance with the exemplary embodiments described herein; Fig. 3A is a block diagram illustrating a passive coupling circuit, which in the embodiment of Fig. 1A can be used in accordance with the exemplary embodiments described herein; Fig. 3B is a block diagram in which a passive coupling circuit, in the embodiment of Fig. 1B can be used, in accordance with the exemplary embodiments described here; Fig. 4A is a block diagram in which an adjustable phase shift circuit, which in the embodiment of Fig. 1A and Fig. 1B can be used, in accordance with the exemplary embodiments described here; Fig. 4B is a block diagram showing a vector-modulating phase-shifting circuit, which is part of the adjustable phase rotation circuit of Fig. 4A can be used, in accordance with the exemplary embodiments described here; Fig. 4C is a graphical representation in which vector addition is performed using the vector-modulating phase-shifting circuit of Fig. 4B is illustrated in accordance with the exemplary embodiments described herein; Fig. Figure 5A is a block diagram illustrating a system with numerous multi-channel beam steering ICs used together to form a large phased transmission array in accordance with the exemplary embodiments described herein; Fig. Figure 5B is a block diagram illustrating a system with numerous multi-channel beam steering ICs used together to form a large phased receiver array in accordance with the exemplary embodiments described herein; Fig. 5C is a block diagram showing an alternative embodiment of the phased receiving array system of Fig. 5B is illustrated; Fig. Figure 6 is a block diagram illustrating an alternative system with numerous multi-channel beam steering ICs used together to form a large phased receiver array, in accordance with the exemplary embodiments described herein; Fig. Figure 7 is a curve diagram illustrating a resulting decrease in a receive phase error with increasing array gain due to the calibration of a transmit or receive arrangement in accordance with the embodiments described herein; Fig. Figure 8 is a flowchart illustrating a method for obtaining a phase measurement signal from a beam steering IC in accordance with the exemplary embodiments described herein; and Fig. Figure 9 is a block diagram of a processing system that can be used to implement some of the devices and methods disclosed herein in accordance with embodiments of the present invention.

[0013] Next, illustrative embodiments are described in detail. In particular, the manufacture and use of the currently preferred embodiments are discussed in detail below. However, it should be noted that the present invention provides a multitude of applicable inventive concepts that can be implemented in a wide variety of specific contexts. The specific embodiments described here merely illustrate some specific possibilities for the manufacture and use of the invention and are not to be understood as limiting the scope of protection of the invention.

[0014] The present invention is described with reference to preferred embodiments in a specific context, a system, and a method for measuring the phase shift and / or gain of a channel transmission / receiving path for use by an RF transmission / receiving system, such as a millimeter-wave MIMO system supporting a scalable number of phased channels. Further embodiments may be applied to other frequency bands or to other transmitter / receiver systems requiring phase or amplitude measurement to support beam steering applications, such as gesture recognition, communication feedback, high-speed path steering in WiGig or other wireless consumer systems, etc.

[0015] In various embodiments, an RF IC has numerous transmit and / or receive signal paths, each connected to a corresponding RF interface port. For testing purposes, groups of RF interface ports are connected in series via delay circuits, which can be implemented, for example, using RF transmission lines. In some embodiments, the delays are selected such that an RF signal of a known frequency propagates through the various delay circuits in such a way that the RF signal has essentially the same relative phase at each port.During calibration, a first RF test signal of a first frequency is introduced into this network of interface ports and delay circuits, while a second RF test signal of a second frequency is summed at a common port opposite the RF interface port. For example, in the case of a transmitter, the second RF test signal is introduced at a common input of the numerous transmission paths, and in the case of a receiver, the second RF test signal is summed at a common output of the numerous receiving paths.In various embodiments, the relative phase shift of each of the numerous transmit and / or receive signal paths is determined by successively activating each of the numerous transmit and / or receive signal paths, down-converting the first and second RF test signals, and measuring the relative phases of the down-converted first and second RF test signals corresponding to the different transmit and / or receive signal paths. Based on these relative phase measurements, the phase adjustment circuit arrangement in the numerous transmit paths can be fine-tuned to calibrate the phase shift in each individual transmit and / or receive signal path.

[0016] In various embodiments, a beam steering IC consists of a semiconductor device capable of phase-aligning numerous RF signals. During normal operation, these RF signals are either output from IC terminals to phase-aligned transmitting antennas or input from terminals connected to receiving antennas. The beam steering IC also supports calibration operation by providing a measurement signal for its internal signal path, through which the RF signal is transmitted to or received from a group of first nodes located on the IC near each terminal.In a transmit-configured IC, each channel transmit path is connected to originate at a common node on the IC and terminate at a single node of the first node, which is an output node of the channel transmit path. In a receive-configured IC, each channel receive path originates at a single node of the first node, which is an input node of the channel receive path, and terminates at a common node of all channel receive paths on the IC. The measurement signal contains the phase information for a single selectable channel transmit or receive path. This phase information can be used to measure the relative phase setting of the selected channel transmit / receive path relative to a single channel transmit / receive path used as a reference.The measurement signal can measure the amplitude of the selected path.

[0017] In various embodiments, the measurement signal can be provided by mixing / down-converting two RF test tones together, one of these RF test tones being transmitted through the phase-shift circuit arrangement of the selected transmit / receive path. One of these RF test tones has a frequency that lies within the band of signals transmitted or received via an antenna of the phased array during normal operation, and such a test tone is referred to in this disclosure as an array frequency signal or array frequency test tone. The other RF test tone is an up-converted test tone with a frequency that differs from the array frequency test tone by a frequency offset amount.This up-converted test tone can be generated by up-converting the array frequency test tone by mixing it with a lower frequency test tone having a frequency equivalent to the frequency offset. In some embodiments, the lower frequency test tone is an intermediate frequency (IF) test tone generated by an external source and provided to the beam steering IC. The array frequency test tone can be generated either by a voltage-controlled oscillator (VCO) located on the IC or provided by an external RF source. The up-converted test tone can be passively coupled to a first IC-to-channel output and can also be coupled to any other IC-to-channel output via transmission line segments of known length.If the length of the transmission line segments is known, then the phase shift of the up-converted test tone propagating from one IC-to-channel output to another is also known. This known propagation phase shift can be used during calibration to correct any comparison of the measurement signal of the selected channel transmission / receive path with that of any other channel transmission / receive path.

[0018] In various embodiments where the channel transmission paths are measured, the measurement signal of the channel transmission path can be provided by sending the array frequency test tone through the phase shift circuit arrangement of the selected channel transmission path, and the up-converted test tone can then be down-converted by mixing it with the array frequency test tone. In various embodiments where the receive channel transmission paths are measured, the measurement signal of the channel transmission path can be provided by sending the up-converted test tone through the phase shift circuit arrangement of the selected channel transmission path, and can then be down-converted by mixing it with the array frequency test tone.

[0019] In various embodiments where numerous multi-channel beam-guiding ICs are used together to form an even larger phased array, an array frequency test tone, generated by a transmitter / receiver IC mounted on the same printed circuit board (PCB), can be provided to each beam-guiding IC along a respective transmission line that has the same propagation phase shift as that of the transmission line to any other beam-guiding IC in the array. Similarly, an IF test tone generated by a modem can be provided to the numerous beam-guiding ICs using such signal paths that have the same phase shift.

[0020] In an alternative embodiment, where numerous receive-configured beam-guiding ICs are used together, an oscillator (e.g., a VCO) on a first IC is used for all of the ICs and can be used to directly calibrate the first IC. To calibrate the remaining ICs, an RF transmission over-the-air, received by the array, can then be used in combination with phase deflection of the channels of the remaining ICs.

[0021] Fig. Figure 1A shows an embodiment of a transmission-configured multi-channel beam steering IC. An array frequency signal RF afThe externally generated array frequency signal is received by IC 100A. This signal is then fed to a power divider 108, which could, for example, be a Wilkinson power divider. The power divider 108 divides the array frequency signal into numerous channel signals, which are then distributed to the numerous channel transmission paths 1101 to 110. n provided, which are distributed from the power divider 108 to the respective output nodes 1071 to 107 n the channel transmission paths 1101 to 110 n The routes are as follows: Nodes 1071 to 107 n are located near individual IC-to-channel transmission terminals 1061 to 1061 of IC 100A. The channel transmission paths 1101 to 110 n They have a similar construction to that of channel transmission path 1101, but may exhibit different phase shift and amplitude attenuation characteristics. Each of the channel transmission paths 1101 to 110n features an adjustable phase rotation circuit 112 which receives the channel signal and rotates its phase by an adjustable amount before it is sent to the IC transmission terminals 1061 to 106 n is provided. In some embodiments, the IC 100A has a number of transmission terminals, which is, for example, a power of two, such as four transmission terminals or eight transmission terminals.

[0022] Again with reference to the embodiment of Fig. In 1A, a calibration switch 150 switches the beam steering IC 100A from normal operating mode to calibration mode. When the beam steering IC 100A is in calibration mode, the externally generated array frequency signal is also received by a calibration circuit 101A along with an externally generated IF test tone. The calibration circuit 101A includes an up-conversion mixer 102. In various embodiments, the up-conversion mixer 102 can be a single-sideband mixer. The up-conversion mixer 102 up-converts the IF test tone by mixing it with the externally generated array frequency signal to provide an up-converted test tone. This up-converted test tone is provided to a passive coupler 104. The passive coupler 104, for example, can be a directional coupler.The passive coupler 104 provides the up-converted test tone to a node 1071, which is located near the IC-to-channel output terminal 1601, which provides the up-converted test tone to additional passive couplers 104, each connected to nodes 1072 to 107. n are coupled, located near each of the other IC-to-channel output terminals 1062 to 106 n This transmission of the up-converted test tone to each additional output node i (= 2 to n) takes place along a respective transmission line, which has a known phase change in accordance with a known transmission length x. i λ has, where λ is the wavelength of the up-converted test tone, and x i a known constant multiple for the path to the output node i. In some embodiments, x ian integer. These transmission lines can, for example, provide the same relative phase for each of the output nodes 1072 to 1072 at a specific frequency.

[0023] A down-converting mixer 1141, coupled to the output node 1071, down-converts the up-converted test tone by mixing it with the phase-inverted channel signal output by the channel transmission path 1101. In various embodiments, these two signals each have frequencies of f1 and f2, and the down-converting mixer 1141 can be implemented using a circuit with second-order nonlinearity such that the down-converting mixer 1141 produces an output signal with a frequency f0, which is the difference between the frequencies of the two signals, i.e., f0 = f1 - f2. This output signal is a first measurement signal containing information about the effect of the channel transmission path 1101 on the phase and amplitude of its channel signal. The downward-converting mixers 1142 to 114 nThey can also output measurement signals containing phase and amplitude information via channel transmission paths 1102 to 110. nThese measurement signals from the various channel transmission paths are received by a switch 117, which can select one of these measurement signals for output by IC 100A after amplification by the operational amplifier 115. This measurement signal can be stored and then compared with the measurement signal for any of the other transmission paths of IC 100A. In some embodiments, this measurement signal passes through an external analog-to-digital converter (ADC), which is, for example, mounted on the same printed circuit board (PCB) as IC 100A or integrated into IC 100A. The resulting digital measurement signal is then stored in a digital memory or digitally compared with a stored signal by an external semiconductor device, such as a modem, mounted on the same PCB.In some embodiments, the switch 117 can also be coupled with one or more other sensors on the IC 100A, such as a temperature sensor, and the switch 117 can select either a transmission path measurement signal or a sensor output signal from the IC 100A as its output.

[0024] Fig. Figure 1B shows an embodiment of a receive-configured multi-channel beam steering IC 100B. When the IC 100B is in a calibration mode, an array frequency signal RF can be used. af The array frequency signal HF can be generated on the IC 100B by an oscillator 118 of a calibration circuit 101B. In some millimeter-wave versions, the array frequency signal can be HF. af exhibiting a frequency in the range of 57 to 64 GHz. The calibration circuit 101B also receives an externally generated IF test tone.

[0025] The IC 100B also features an input terminal that can receive an externally generated signal, which is to be used during calibration instead of a signal generated by the oscillator 118. This externally generated RF signal af / N It has a frequency that is N times lower than the array frequency signal. Thus, the RF can af exhibit a frequency of 60 GHz and RF af / N It can have a frequency of 15 GHz, where N equals 4. The externally generated RF signal af / N is provided to a frequency multiplier 152, which increases the frequency of the externally generated signal by N times and consequently the array frequency signal HF. af generated. The externally generated RF signal af / N is supplied to an up-converting single-sided mixer 102, which is enclosed in the calibration circuit 101B. The externally generated HF signal af / NIt is also fed to an output terminal, so that it can be made available, for example, to additional beam-guiding ICs. In some embodiments, the externally generated RF signal is af / N , before it is made available to the output terminal, buffered or amplified.

[0026] The up-converting mixer 102 converts the IF test tone upwards by combining it with the array frequency signal HF. afThe signal is mixed to provide an up-converted test tone. This up-converted test tone is provided to a passive coupler 104. The passive coupler 104 provides the up-converted test tone to an input node 1371 of the channel receive path 1241, which is located between the channel receive path 1241 and a channel-to-IC receive terminal 1361. From the input node 1371, the up-converted test tone is provided to additional passive couplers 104 along the transmission lines, which have known phase shift characteristics, with each of these additional couplers 104 being connected to respective input nodes 1372 to 1377. n from each of the other channel reception paths 1242 to 124 n is coupled, each of which is located between channel reception paths 1242 to 124. n and channel-to-IC receiver terminals 1362 to 136 nThe up-converted test tone is also made available to channel receive path 1241 from input node 1371 as a receive path test tone.

[0027] Channel receive path 1241 features an adjustable phase shift circuit 112, which receives the receive path test tone from the IC-to-channel input 1261 and shifts its phase by an adjustable amount before it is made available to a power combiner 120. Channel receive paths 1242 to 124 n They have a similar design to that of channel receive path 1241, but may exhibit different phase shift and amplitude attenuation characteristics. The channel path is selected by switching the selected path on or off from channel receive paths 1241 to 124. n Only one of these channel reception paths, 1241 to 124, is used at a time. nselected for measurement. For example, if channel receive path 1241 is selected, then receive path 1241 is the receive path selected for the measurement. The power combiner 120 provides the phase-inverted channel signal from the selected receive path to a down-converting mixer 1141.

[0028] The step-down mixer 1141 also receives the array frequency signal generated by the oscillator 118. The step-down mixer 1141 steps down the phase-inverted channel signal by mixing it with the array frequency signal to produce a measurement signal that is to be output by the IC 100B after amplification by the operational amplifier 115. This output signal contains information about the effect of the selected channel receive path on the phase and amplitude of its channel signal. In some embodiments, the IC 100B may also have a switch that is coupled to the output of the operational amplifier 115 and to one or more other sensors on the IC 100B, such as a temperature sensor. The switch can select either the receive path measurement signal or a sensor output signal from the IC 100B as its output.

[0029] Fig. Figure 1C shows an alternative embodiment of the transmission-configured multi-channel beam steering IC of Fig. 1A. The embodiment IC 100C of Fig. The 1C differs from the IC 100A. Fig. 1A by having a second power divider 109 for splitting the up-converted test tone. The power divider 109 receives the up-converted test tone from the calibration circuit 101A and divides it into numerous signals, which are made available to the numerous passive couplers 104, each of which is connected to the respective output nodes 1071 to 107. n are coupled. This transmission of the up-converted test tone to each output node i (= 1 to n) takes place along a respective transmission line, which has a known phase change in accordance with a known transmission length x. i λ, where λ is the wavelength of the up-converted test tone, and x ia known constant multiple for the path to the output node i.

[0030] Fig. Figure 1D shows an alternative embodiment of the receiver-configured multi-channel beam steering IC of Fig. 1C. The embodiment IC 100D of Fig. The 1D differs from the IC 100B. Fig. 1B by having a power divider 109 for splitting the up-converted test tone. The power divider 109 receives the up-converted test tone from the calibration circuit 101B and divides it into numerous signals, which are made available to the numerous passive couplers 104, each of which is connected to the respective input nodes 1371 to 1377. n are coupled. This transmission of the up-converted test tone to each input node i (= 1 to n) takes place along a respective transmission line, which has a known phase change in accordance with a known transmission length x.i λ, where λ is the wavelength of the up-converted test tone, and x i a known constant multiple for the path to the input node i.

[0031] Fig. Figure 2A shows an embodiment of the step-down mixer circuit 200A, which is one of the step-down mixers 1141 to 114. n the Fig. 1A to 1D can be used. The step-down mixer circuit 200A has a linear time-varying mixer 202A and capacitors 204 and 206. For the array frequency signal HF af This is an input signal from capacitor 206, and the up-converted test tone is HF. upThis is an input signal of capacitor 204. Each of capacitors 204 and 206 capacitively couples the AC component of its respective capacitor input signal to the linear time-varying mixer 202A, which generates a step-down converted signal. This step-down converted signal has a linear relationship to the input signals of the linear time-varying mixer 202A, so that the phase information contained in each of the array frequency signal HF af and the up-converted test tone HF up are contained within, which can be recovered after the down-conversion. Nevertheless, in some embodiments, the mixer 202A is implemented using a diode.

[0032] Again with reference to Fig. 2A, a down-converted signal is used as an output signal ZF outThe down-converting mixer circuit 200A is provided. The frequency of this down-converted signal is the difference between the frequency of the RF. up -signal and the RF af -signals. For example, when the RF up -signal has a frequency of 60.01 GHz, and the RF af The signal has a frequency of 60 GHz, the down-converted signal has a frequency of 10 MHz.

[0033] Fig. Figure 2B shows an alternative embodiment of the down-converting mixer circuit 200B, which is one of the down-converting mixers 1141 to 114. n the Fig. 1A to 1D can be used. The step-down mixer circuit 200B differs from the step-down mixer circuit 200A by Fig. 1A by not containing capacitor 206, but instead the array frequency signal HF af and the up-converted test tone HF upThe signals are added at a connection terminal to form an input signal for capacitor 204. Capacitor 204 couples the AC component of this capacitor input signal to a linear time-varying mixer 202B, which generates the step-down signal. This step-down signal has a linear relationship to the input signal of the linear time-varying mixer 202B, so that the phase information contained in each of the array frequency signal HF is af and the up-converted test tone HF up are contained within, which can be recovered after the down-conversion. Nevertheless, in some embodiments, the mixer 202B is implemented using a diode.

[0034] Fig. Figure 3A shows an embodiment of the passive coupler circuit 300, which is used in the transmission beam steering IC 100A from Fig. 1A can be used during calibration. A signal line 302 is coupled to a contact island 308, which can be used as an IC-to-channel output terminal of the IC 100A. The signal line 302 receives the RF af -Signal. A buffer 306 is connected in series with the signal line and upstream of the contact island 308. This buffer 306 can be configured such that a similar reference impedance is provided to all channel transmission paths of the IC 100A. A passive coupling element 304 runs below the signal line at a point upstream of the buffer 306. When the IC 100A is in calibration mode, the passive coupling element 304 couples the RF signal. upThe signal is passively coupled to output node 1071 of signal line 302, which is an outermost point of signal line 302 next to buffer 306. Capacitor 204 of a step-down mixer circuit is coupled to output node 1071 and receives both the RF signal and the output node 302. af -signal as well as the RF up -Signal. Capacitor 204 couples the AC component of these signals to diode 202 of the step-down mixer circuit.

[0035] Fig. Figure 3B shows the embodiment of the passive coupler circuit 300, as used in the receive beam steering IC 100B of Fig. 1B is configured during calibration. The contact island 308 is used as a channel-to-IC input terminal for the IC 100B. In one embodiment, when the IC 100B is in calibration mode, no signal is input to the IC 100B via the contact island 308, and the buffer 306 is deactivated, i.e., configured to provide an isolating input impedance between the IC 100B and the contact island 308. The passive coupling element 304 couples the RF up -Signal passive with the input node 1371 of the signal line 302, which is an outermost point of the signal line 302 next to the buffer 306, and which provides the signal to an adjustable phase rotation circuit 112 of the IC 100B.

[0036] Fig. Figure 4A shows an embodiment of the adjustable phase rotation circuit 400, which is referred to as the adjustable phase rotation circuit 112 of Fig. 1A and Fig. 1B can be used. The phase shift circuit 400 comprises a low-noise amplifier (LNA) 402, a vector-modulating phase shifter 404 coupled to a digital-to-analog converter (DAC) 406, and a programmable gain amplifier (PGA) 408 coupled to another DAC 410. The LNA 402 amplifies an RF signal received by the circuit 400 and provides this amplified RF signal to the phase shifter 404. The phase shifter 404 inverts the phase of the RF signal according to a digital phase shift setting received at the DAC 406, which may consist, for example, of a 5-bit digital word.The phase-inverted RF signal is then amplified by the PGA 408 according to a digital gain setting received by the DAC 410, which can consist, for example, of a 5-bit digital word. The RF signal is output by the PGA 407, which is provided as an output by circuit 400.

[0037] Fig. Figure 4B shows a vector-modulating phase shifter 404, which is used in the adjustable phase rotation circuit 400 of Fig. 4A can be used. Upon entering the phase shifter 404, an RF input signal is present. in A difference signal, which can be considered as two component signals: one component means the part of the RF. in -Signal from the point of zero degree phase (relative to the total RF) in-signal) up to the point of relative 180-degree phase, but not including this point, and one component, meaning the remaining part of the RF in -Signals from the point of 180 degrees phase. These two component signals are provided to a multiphase filter 414. The multiphase filter 414 outputs four component signals of RF. in from: A “zero degree” component of [0,90) degrees of relative phase, a “90 degree” component of [90, 180) degrees of relative phase, a “180 degree” component of [180, 270) degrees of relative phase, and a “270 degree” component of [270, 360) degrees of relative phase, all relative to the total phase of HF inThe zero-degree phase and the 180-degree phase are both provided to an adjustable amplifier 412A and an adjustable amplifier 412B, respectively, which both receive a gain setting from the DAC 406I. The 90-degree phase and the 270-degree phase are both provided to an adjustable amplifier 412C and an adjustable amplifier 412D, respectively, which both receive a gain setting from the DAC 406Q.

[0038] The DAC 406I sets the amplifiers 412A and 412B in accordance with a digital gain setting for the I-component of RF. in The DAC 406I receives the digital setting via a serial programming interface (SPI) connection. The DAC 406Q adjusts the amplifiers 412C and 412D according to a digital gain setting for the Q component of RF. inone, where the digital setting is also received via an SPI connection. After amplification, the zero-degree signal, amplified by amplifier 412A, is combined with the 180-degree signal, amplified by amplifier 412B, the 90-degree signal, amplified by amplifier 412C, and the 270-degree signal, amplified by amplifier 412D, to produce the 0- to 180-degree component of the output RF signal. out to form. The 180-degree signal, amplified by amplifier 412A, is combined with the zero-degree signal, amplified by amplifier 412B, with the 270-degree signal, amplified by amplifier 412C, and with the 90-degree signal, amplified by amplifier 412D, to form the remaining part of the output RF signal RF. out to further develop from 180 degrees.

[0039] Fig. 4C is a graphical representation which uses the unit of a circle to illustrate how the relative gain of the I-component of RF out (parallel to the horizontal axis) versus the Q component of RF out (parallel to the vertical axis) the phase angle φ of the entire RF signal vector out can change. Again with reference to Fig. 4B, therefore, the digital gain settings for the I and Q components can be set such that a desired phase angle is achieved at RF. out in relation to the entire phase of HF in is applied.

[0040] Fig. Figure 5A shows an embodiment of the system with numerous multi-channel beam-guiding ICs 500A, which are transmission-configured and used together to form an even larger phased transmission array. The beam-guiding ICs 500A are mounted on a PCB 501. An IF test tone, generated by a modem 504, is provided to the numerous beam-guiding ICs 500A along a respective transmission line, which has the same propagation phase shift as that of the transmission line to any other beam-guiding IC 500A. The modem 504 also receives an IF measurement signal from the numerous beam-guiding ICs 500A, for example, using the same transmission lines. The modem 504 also has a separate control channel for the beam-guiding ICs 500A to provide control information and receive control feedback.This control channel can be, for example, an SPI channel.

[0041] In the embodiment of Fig. 5A will be an array frequency signal RF af The signal generated by a transmitter / receiver IC 502 is provided by the transmitter / receiver IC 502 to a power divider 509. The power divider 509 divides the array frequency signal HF. af into numerous signals, each of which is made available to each beam-guiding IC 500A along a respective transmission line, which has the same propagation phase shift as that of the transmission line to each other beam-guiding IC 500A. In other embodiments, RF af by an oscillator on a single one of the 500A ICs and can be supplied to the other 500A ICs in a similar manner to that of Fig. 5A will be provided using the signal paths which have the same phase change.

[0042] Fig. Figure 5B shows an embodiment of the system with numerous receive-configured beam-guiding ICs 500B, each with numerous channels, which are used together to form an even larger phased-array receiver array. An IF test tone, measurement signals, and control signals are generated for each of the ICs 500B in a similar manner to that already described for Fig. 5A described. Instead of the array frequency signal HF. af To generate this, however, an RF signal is required. af / N , which has a frequency N times lower than that of HF af The signal is generated by the transmitter / receiver IC 502 and is supplied by the transmitter / receiver IC 502 to a power divider 509. The power divider 509 divides the RF signal. af / Ninto numerous signals, each of which is provided to each beam steering IC 500B along a respective transmission line, which has the same propagation phase change as that of the transmission line to each other of the beam steering ICs 500B.

[0043] Fig. Figure 5C shows an alternative embodiment of the phased multi-IC receiver array from Fig. 5B, which does not have a power divider 509. Instead, the transmitter / receiver IC 502 provides the RF signal. af / N a first beam-guiding IC 500B1 is provided. The IC 500B1 then provides the RF signal. af / N The IC 500B2 is available along a transmission line that has a known propagation phase shift y2λ, which then transmits the RF signal. af / N the IC 500B3 provides along a transmission line which has a known propagation phase change y nλ exhibits, and so on, such that the signal HF af / N all of the ICs 500B1 to 500B n is provided. These transmission lines can, for example, have the same relative phase for each of the ICs 500B1 to 500B. n to provide at a specific frequency.

[0044] Fig. Figure 6 shows an alternative embodiment of the system with numerous receiver-configured beam steering ICs 6001 to 600 n An IF test tone is generated by the 504 modem and sent to ICs 6001 to 600. n provided in a similar manner as already provided for Fig. As described in Section 5B, an oscillator 602 (e.g., a VCO) on a single IC 6001 can be used to generate the array frequency signal and calibrate all channel receive paths for this IC in a similar manner to that already described with reference to Fig. 1B described.

[0045] For the IC 6001, the phase information of a first channel receive path is used as a reference phase to calibrate the phase shift of non-reference channel receive paths of the IC 6001 using the selected receive path measurement signal. Calibrating each of these channel receive paths of the IC 6001 during calibration mode results in a phase correction value. This phase correction value is intended for use during normal operation, in which RF received at the antennas is phase-adjusted by the receive paths and supplied to the transmitter / receiver IC 502. In particular, the phase correction value can be used during normal operating mode to adjust the phase control signals sent by the modem 504 to the IC 6001 such that the phase change across each of the channel receive paths of the IC 6001 is at their common node (as for the IC 100B in Fig. (shown in Figure 1B) by a constant phase angle from channel to channel. The phase correction value of the last channel receive path of IC 6001, i.e., the receive path with the greatest propagation distance from the reference receive path, is then used when calibrating the other ICs 6002 to 600. n used.

[0046] An alternative calibration method can be based on an array frequency signal transmitted over the air to be received by the group of antennas coupled to the IC 6002. The system deflects the phase shift value of the reference (e.g., first) channel receive path of the IC 6001 while simultaneously monitoring the signal strength of the measurement signal of the reference channel receive path of the IC 6002. The system determines a signal peak of this measurement signal and uses the corresponding phase shift value for the phase correction value of the reference receive path of the IC 6001 and to calibrate other channel receive paths. In some embodiments, the deflected boost is controlled in the digital domain and applied to the phase shifters of the IC 6001 using one or more DACs.

[0047] Again with reference to Fig. 6. The system can then determine the phase correction values ​​for any of the non-reference receive paths for the IC 6002 either using an array frequency signal generated within the system in the same way as for the non-reference receive paths of the IC 6001, or using the array frequency signal over the air. Once the IC 6002 has been calibrated, the IC 6003 can be calibrated in the same way as the IC 6002, and so on for all of the ICs 6003 through 600. n .

[0048] Fig. Figure 7 shows the resulting reduction in receive phase error with the increased array gain that can occur when the phase measurement signals are used to calibrate a transmit or receive array with the appropriate phase corrections for each channel. For a phased transmit array, an incorrect phase setting of a single channel can result in a wider antenna beam that is not properly focused in the expected direction. Therefore, lower gain can be expected when this signal is received. For a phased receive array, an incorrect phase setting of a single channel can also result in lower gain of the received signal. Conversely, if the channels of the phased receive or transmit array are correctly set using the appropriate phase correction values, the normalized gain of the received signal is increased. As shown in Figure 7, the phase correction values ​​are used to calibrate the received signal. Fig. As shown in Figure 7, such increased amplification reduces the maximum phase error of symbols in the received constellation.

[0049] Fig. Figure 8 shows a flowchart of an embodiment of a method for obtaining a phase measurement signal from a beam steering IC. In step 802, a test tone signal (Sig) is generated. af with a frequency that would lie within the band of signals transmitted or received at an antenna of the phased array during normal operation, i.e., an array frequency test tone, obtained by a beam steering IC. The signal Sig af It can be generated either externally or by an oscillator on the IC. In step 804, a lower frequency test tone is obtained by the IC and is up-converted by combining it with the signal Sig. af is mixed to create an upward-converted test tone signal (Sig). upto obtain. For example, in the case of Sig af The test tone may be a 60 GHz tone, the low-frequency test tone may be a 10 MHz tone, and in the case of Sig up It could be a 60.01 GHz test tone. At step 806, Sig up a first input or output node of a beam steering IC is provided. This first node is located between a first external antenna and a first signal path, which is a channel receive path or a channel transmit path and which has an adjustable phase shift circuit. At step 808, the up-converted test tone Sig upfrom the first node, via one or more paths exhibiting the known propagation phase changes, to one or more additional nodes of the IC located between external antennas and channel receive or transmit paths, each featuring an adjustable phase shift circuit. In step 810, a signal path is selected from one of the channel transmit or receive paths. In step 812, either the signal path is... up or the signature af transmitted via the selected signal path. In step 814, the up-converted test tone Sig is transmitted. up by converting it backwards using the array frequency test tone Sig af The signals are mixed to obtain a measurement signal that contains the phase information of the selected signal path and may also contain amplitude information for the selected signal path. For example, a 60.01 GHz signal... upThe test tone is downconverted by using a 60 GHz signal. af The test tone is mixed to obtain a 10 MHz measurement signal.

[0050] Fig.Figure 9 shows a block diagram of a processing system that can be used to implement some of the devices and methods disclosed herein. Specific devices may use all of the components shown or only a subset of the components, and the levels of integration may vary from device to device. Furthermore, a device may contain numerous instances of a component, such as numerous processing units, processors, memory, transmitters, receivers, etc. In one embodiment, the processing system comprises a computer workstation. The processing system may include a processing unit equipped with one or more input / output devices, such as a loudspeaker, a microphone, a mouse, a touchscreen, a keypad, a keyboard, a printer, a display, and the like.The processing unit can comprise a CPU, memory, mass storage device, video adapter, and an I / O interface, all connected via a bus. In one embodiment, numerous processing units in a single processing system or in numerous processing systems can form a distributed processing pool or a distributed processing pool.

[0051] The bus can consist of one or more bus architectures of any type, including a memory bus or memory control unit, a peripheral bus, a video bus, or the like. The CPU can comprise any type of electronic data processor. The memory can comprise any type of system memory, such as random access memory (RAM), static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), read-only memory (ROM), a combination thereof, or the like. In one embodiment, the memory can include ROM for use during booting and DRAM for program and data storage for use while programs are running.

[0052] The mass storage device can comprise any type of storage device to store data, programs, and other information and to make that data, programs, and other information available over the bus. For example, the mass storage device can include one or more flash memory devices, hard disk drives, magnetic disk drives, optical disk drives, or the like.

[0053] The video adapter and I / O interface provide interfaces for connecting external input and output devices to the processing unit. As illustrated, examples of input and output devices include the display, which is connected to the video adapter, and the mouse / keyboard / printer, which is connected to the I / O interface. Other devices can be connected to the processing unit, and additional or fewer interface cards can be used. For example, a serial interface, such as the (not shown) Universal Serial Bus (USB), can be used to provide an interface for a printer.

[0054] The processing unit also has one or more network interfaces, which may include wired connections, such as an Ethernet cable or the like, and / or wireless connections for accessing nodes or different networks. The network interface enables the processing unit to communicate with remote units over the networks. For example, the network interface may provide wireless communication via one or more transmitting antennas and one or more receiving antennas. In one embodiment, the processing unit is connected to a local area network or a wide area network for data processing and communication with remote devices, such as other processing units, the internet, remote storage facilities, or the like.The network interface can be designed to have various connection-specific virtual or physical ports that are communicatively coupled to one or more of these remotely located devices.

[0055] Illustrative embodiments of the present invention have the advantage of providing precise measurement of the phase setting of channel transmission or reception paths to enable the accurate calibration and beam steering of phased arrays. One embodiment of a system can support a phased array in which a large number of antennas are used to narrow the beamwidth and to reduce the output power that must be radiated by each antenna, while achieving the same maximum equivalent isotropically radiated power.

[0056] The following additional exemplary embodiments of the present invention are also provided. In accordance with a first exemplary embodiment of the present invention, a method for signal path measurement is provided. The method comprises providing a first signal at a common node coupled to a plurality of signal paths, each of which has a phase shift circuit. The method also comprises providing a second signal, via a first test path, to a first node coupled to a first signal path of the plurality of signal paths.The method also includes providing the second signal, via a second test path, to a second node, which is coupled to a second signal path from the plurality of signal paths such that a difference in the phase delay between the second test path and the first test path results in a first known phase delay. The method also includes selecting a signal path from the plurality of signal paths, transmitting either the first signal or the second signal via the selected signal path, and mixing the first signal with the second signal to obtain a measurement signal of the selected signal path.

[0057] The preceding first exemplary embodiment can also be implemented to include one or more of the following additional features. The method can also be implemented such that the measurement signal contains the phase information of the selected signal path, that the first node has an output node of the first signal path, and that the method further includes the rotation of the first signal by means of a phase rotation circuit of the selected signal path.The method can also be implemented such that the measurement signal has the phase information of the selected signal path, that the first node has an input node of the first signal path, that providing the first signal involves generating the first signal by a voltage-controlled oscillator, and that the method further involves rotating the second signal by means of a phase-rotation circuit of the selected signal path.

[0058] The method can also be implemented such that the second test path includes the first test path, and that the second node includes a plurality of second nodes, each coupled to the first node by a respective intermediate node path, each of which has a unique phase delay from a plurality of known phase delays to accommodate the first known phase delay. In such an embodiment, each of the plurality of second nodes is coupled to a unique signal path from a plurality of signal paths, and each of the plurality of signal paths terminates at the common node.

[0059] The method can also be implemented such that the selected signal path differs from the first signal path, and that the method further comprises obtaining the stored phase information of a measurement signal of the first signal path and selecting a propagation delay from one of the plurality of known phase delays in accordance with the selected signal path. In such an embodiment, the method further comprises measuring a phase difference between the first signal path and the selected signal path in accordance with the stored phase information, the phase information of the measurement signal of the selected signal path, and the selected propagation delay.

[0060] The method can also be implemented such that a first phase difference has a difference between a phase delay via the second signal path relative to a phase delay via the first signal path, a second phase difference has a difference between a phase delay via a third signal path of the plurality of signal paths relative to a phase delay via the second signal path, and the method further comprises setting a phase rotation circuit of the second signal path and a phase rotation circuit of the third signal path such that the first phase difference is the same as the second phase difference.

[0061] The method can also be implemented such that a measurement signal of the first signal path further includes amplitude information, that the selected signal path is not the first signal path, and that the measurement signal of the selected signal path further includes amplitude information. In such an embodiment, the method further comprises obtaining stored amplitude information of the measurement signal of the first signal path and measuring a difference between an amplitude change of the first signal path and an amplitude change of the selected signal path in accordance with the stored amplitude information and the amplitude information of the measurement signal of the selected signal path.

[0062] The method can also be implemented to include receiving a third signal to have a frequency different from the frequency of the first signal, and mixing the first signal with the third signal to obtain the second signal.

[0063] The method can also be implemented such that a first semiconductor device has the plurality of signal paths, a second semiconductor device has a construction identical to the first semiconductor device, and a first transmission path from a third semiconductor device to the first semiconductor device has the same phase delay as a second transmission path from the third semiconductor device to the second semiconductor device. In such an embodiment, the process comprises providing the first signal at the first node, generating the first signal by the third semiconductor device, and transmitting the first signal from the third semiconductor device to the first semiconductor device via the first transmission path.In such an embodiment, the method further comprises the transmission of the first signal from the third semiconductor device to the second semiconductor device via the second transmission path.

[0064] The method can also be implemented such that a third transmission path from a fourth semiconductor device to the first semiconductor device has the same phase delay as a fourth transmission path from the fourth semiconductor device to the second semiconductor device. In such an embodiment, the method further comprises generating the third signal by the fourth semiconductor device, transmitting the third signal from the fourth semiconductor device to the first semiconductor device via the third transmission path, and transmitting the first signal from the fourth semiconductor device to the second semiconductor device via the fourth transmission path.

[0065] The method can also be implemented such that a second semiconductor device has a fourth signal path, that the second semiconductor device differs from a semiconductor device having the first signal path, and that a fourth node is coupled to the fourth signal path and an external antenna of the second semiconductor device. In such an embodiment, the method further comprises receiving, at the fourth node, a fourth signal received at the external antenna of the second semiconductor device, and setting a phase shift value of the first signal path. In such an embodiment, the method further comprises determining a measurement signal of the fourth signal path in order to establish the phase information of the fourth signal path in accordance with the third signal, the fourth signal, and the phase shift value of the first signal path.In such an embodiment, the method further comprises increasing the phase rotation value of the first signal path to a phase rotation value that maximizes a signal amplitude of the measurement signal of the fourth signal path.

[0066] The following additional exemplary embodiments of the present invention are also provided. In accordance with a second exemplary embodiment of the present invention, a measuring circuit is provided. The measuring circuit comprises a first semiconductor device. The first semiconductor device has a plurality of signal paths, each of which includes a phase-shift circuit. The first semiconductor device also has a first node coupled to a first signal path of the plurality of signal paths, a second node coupled to a second signal path of the plurality of signal paths, and a common node coupled to the plurality of signal paths.The first semiconductor device is configured to provide a first signal at the common node, to provide a second signal to the first node via a first test path, to provide the second signal to the second node via a second test path, to transmit either the first signal or the second signal via a selected signal path from the plurality of signal paths, and to mix the first signal with the second signal to obtain a measurement signal of the selected signal path. A difference in the phase delay between the second test path and the first test path exhibits a known phase delay.

[0067] The preceding second exemplary embodiment can also be implemented to include one or more of the following additional features. The measurement circuit can also be implemented such that the first semiconductor device is further configured to receive a third signal having a third frequency different from a frequency of the first signal, and to mix the first signal with the third signal to obtain the second signal. The measurement circuit can also be implemented such that the measurement signal of the selected signal path contains the phase information of the selected signal path, that the first node has an output node of the first signal path, and that a phase-inversion circuit of the selected signal path is configured to invert the first signal.The measurement circuit can also be implemented such that the measurement signal of the selected signal path has the phase information of the selected signal path, that the first node has an input node of the first signal path, that the first semiconductor device furthermore has a voltage-controlled oscillator designed to generate the first signal, and that a phase-shifting circuit of the selected signal path is designed to shift the second signal.

[0068] The measurement circuit can also be implemented such that the second test path includes the first test path, and the first semiconductor device further comprises a second node, which includes a plurality of second nodes coupled to the first node by a respective intermediate node path, each of which has a unique phase delay from a plurality of known phase delays, all of which have the first known phase delay. In such an embodiment, each of the plurality of second nodes is coupled to a unique signal path from the plurality of signal paths, and each of the plurality of signal paths terminates at the common node of the first semiconductor device.

[0069] The measurement circuit can also be implemented to include a second semiconductor device coupled to the plurality of signal paths of the first semiconductor device. In such an embodiment, the second semiconductor device is configured to obtain the stored phase information of a measurement signal of the first signal path and to measure a phase difference between the first signal path and the selected signal path in accordance with the stored phase information, the phase information of the measurement signal of the selected signal path, and a phase delay selected from a plurality of known phase delays in accordance with the selected signal path.

[0070] The measurement circuit can also be implemented such that a measurement signal of the first signal path furthermore contains amplitude information, that the selected signal path differs from the first signal path, and that the measurement signal of the selected signal path furthermore contains amplitude information. In such an embodiment, the first semiconductor device is further configured to obtain stored amplitude information of the measurement signal of the first signal path and to measure a difference between an amplitude change of the first signal path and an amplitude change of the selected signal path in accordance with the stored amplitude information and the amplitude information of the measurement signal of the selected signal path.

[0071] The measurement circuit can also be implemented to include a second semiconductor device coupled to the plurality of signal paths of the first semiconductor device. In such an embodiment, a first phase difference is a difference between a phase delay across the second signal path relative to a phase delay across the first signal path; a second phase difference is a difference between a phase delay across a third signal path of the plurality of signal paths relative to a phase delay across the second signal path; and the second semiconductor device is further configured to adjust a phase shift circuit of the second signal path and a phase shift circuit of the third signal path such that the first phase difference is the same as the second phase difference.

[0072] The following additional exemplary embodiments of the present invention are also provided. In accordance with a third exemplary embodiment of the present invention, a measurement system is provided. The measurement system comprises a first semiconductor device. The first semiconductor device has a plurality of signal paths coupled to one another at a common node and a plurality of test paths, each comprising a first test path and a second test path.The first semiconductor device also includes a reference node coupled between the first test path and a first signal path of the plurality of signal paths, a non-reference node coupled between the second test path and a second signal path of the plurality of signal paths, and a first frequency mixer having an input coupled to either the reference node or the common node. The first semiconductor circuit also includes a measurement output node coupled to an output of the first frequency mixer such that a difference in phase delay between the second test path and the first test path results in a first known phase delay. Each of the plurality of signal paths has a corresponding phase shift circuit.

[0073] The preceding third exemplary embodiment can also be implemented to include one or more of the following additional features. The measurement system can also be implemented such that the first semiconductor device further comprises a voltage-controlled oscillator, a first input node coupled to a first input of a second frequency mixer, and a plurality of passive coupler circuits, including a first passive coupler circuit coupled between an output of the second frequency mixer and the reference node.In such an embodiment, the first semiconductor device further comprises the second frequency mixer, which includes a single-sideband mixer, the second test path comprises the first test path and a first intermediate node path, the phase delay of the first intermediate node path comprises the first known phase delay, and the first intermediate node path comprises a second passive coupling circuit of the plurality of passive coupler circuits.

[0074] The measurement system can also be implemented in such a way that each of the multitude of passive coupler circuits has a respective buffer that has the same reference impedance.

[0075] The measurement system can also be implemented in such a way that the reference node is coupled to the input of the first frequency mixer, that the reference node has a first output node of the plurality of signal paths, that the non-reference node has a second output node of the plurality of signal paths, and that the plurality of signal paths furthermore has a third signal path which is coupled to a third output node of the plurality of signal paths.In such an embodiment, the first semiconductor device further comprises the third output node, which is coupled to the reference node by a second intermediate node path having a second known phase delay, a power divider coupled to the second input node (the power divider is said to have a common node), a third frequency mixer (having an input coupled to the second output node), and a fourth frequency mixer. In such an embodiment, the fourth frequency mixer has an input coupled to the third output node, an output coupled to the measurement output node, and a switch having a plurality of inputs that are coupled to the output of the first frequency mixer, an output of the third frequency mixer, and an output of the fourth frequency mixer.

[0076] The measurement system can also be implemented such that the reference node has a receiving node of the first semiconductor device, and that the first semiconductor device further comprises a power combiner coupled to the input of the first frequency mixer, the power combiner being the common node. In such an embodiment, the voltage-controlled oscillator has an output coupled to the input of the first frequency mixer and the second input of the second frequency mixer.

[0077] The measurement system can also be implemented to include an analog-to-digital converter (ADC) with an output coupled to the measurement output node. In such an embodiment, the measurement system further includes a digital storage circuit coupled to the output of the ADC.

[0078] The measurement system can further be implemented to include a second semiconductor device having a construction identical to the first semiconductor device. In such an embodiment, the measurement system further includes a third semiconductor device, a first transmission path coupled between the third semiconductor device and the second input node of the first semiconductor device, and a second transmission path coupled between the third semiconductor device and a frequency mixer contained in the second semiconductor device. In such an embodiment, the second transmission path has a phase delay that is the same as the phase delay of the first transmission path.

[0079] The measurement system can also be implemented such that the respective phase shift circuit comprises a first adjustable amplifier, a second adjustable amplifier, a multiphase filter, a first digital-to-analog converter (which has an input coupled to a serial programming interface and an output coupled to the first adjustable amplifier), and a second digital-to-analog converter (which has an input coupled to the serial programming interface and an output coupled to the second adjustable amplifier). In such an embodiment, the multiphase filter has a first output coupled to the first adjustable amplifier and a second output coupled to the second adjustable amplifier.

[0080] Although the present invention has been described with reference to exemplary embodiments, this description is not to be understood as limiting. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be obvious to those skilled in the art with reference to the description. It is therefore intended that the appended claims cover all such modifications or embodiments.

Claims

[1] A method for signal path measurement, the method comprising: Providing a first signal at a common node coupled to a plurality of signal paths each comprising a respective phase rotation circuit; Receiving a third signal comprising a frequency different from a frequency of the first signal; and Mixing the first signal in accordance with the third signal to obtain a second signal; Providing the second signal, via a first test path, to a first node coupled to a first signal path of the plurality of signal paths; Providing the second signal, via a second test path, to a second node coupled to a second signal path of the plurality of signal paths, wherein a difference in phase delay between the second test path and the first test path comprises a first known phase delay; Selecting a signal path from the plurality of signal paths; Transmitting, via the selected signal path, either the first signal or the second signal; and Mixing the first signal with the second signal to obtain a measurement signal of the selected signal path. [2] The method of claim 1, wherein: the measurement signal includes the phase information of the selected signal path, the first node comprises an output node of the first signal path, and the method further comprises rotating, by a phase rotation circuit of the selected signal path, the first signal. [3] A method according to claim 1 or 2, wherein: the measurement signal includes the phase information of the selected signal path, the first node comprises an input node of the first signal path, providing the first signal comprises generating the first signal by a voltage-controlled oscillator, and the method further comprises rotating, by a phase rotation circuit of the selected signal path, the second signal. [4] A method according to any one of claims 1 to 3, wherein: the second audit trail includes the first audit trail, the second node comprises a plurality of second nodes each coupled to the first node by a respective inter-node path having a respective one of a plurality of known phase delays comprising the first known phase delay, each of the plurality of second nodes is coupled to a respective one of the plurality of signal paths, and each of the plurality of signal paths ends at the common node. [5] The method of claim 4, wherein: the selected signal path differs from the first signal path; and the method further comprises Obtaining the stored phase information of a measurement signal of the first signal path, Selecting a propagation delay from a single one of the plurality of known phase delays in accordance with the selected signal path, and Measuring a phase difference between the first signal path and the selected signal path in accordance with the stored phase information, the phase information of the measurement signal of the selected signal path, and the selected propagation delay. [6] A method according to any one of claims 1 to 5, wherein: a first phase difference comprises a difference between a phase delay across the second signal path relative to a phase delay across the first signal path; a second phase difference comprises a difference between a phase delay across a third signal path of the plurality of signal paths relative to a phase delay across the second signal path; and the method further comprises adjusting a phase rotation circuit of the second signal path and a phase rotation circuit of the third signal path such that the first phase difference is the same as the second phase difference. [7] A method according to any one of claims 1 to 6, wherein: a measurement signal of the first signal path further comprises amplitude information; the selected signal path is not the first signal path; the measurement signal of the selected signal path further comprises amplitude information; and The procedure further includes: Obtaining stored amplitude information of the measurement signal of the first signal path, and Measuring a difference between an amplitude change of the first signal path and an amplitude change of the selected signal path in accordance with the stored amplitude information and the amplitude information of the measurement signal of the selected signal path. [8] A method according to any one of claims 1 to 7, wherein: a first semiconductor device comprising the plurality of signal paths; a second semiconductor device comprises a construction identical to the first semiconductor device; a first transmission path from a third semiconductor device to the first semiconductor device has the same phase delay as a second transmission path from the third semiconductor device to the second semiconductor device; providing the first signal at the first node comprises: Generating, by the third semiconductor device, the first signal, and Transmitting the first signal from the third semiconductor device to the first semiconductor device via the first transmission path; and the method further comprises transmitting the first signal from the third semiconductor device to the second semiconductor device via the second transmission path. [9] The method of claim 8, wherein: a third transmission path from a fourth semiconductor device to the first semiconductor device has the same phase delay as a fourth transmission path from the fourth semiconductor device to the second semiconductor device; and the procedure further includes: Generating, by the fourth semiconductor device, the third signal, Transmitting the third signal from the fourth semiconductor device to the first semiconductor device via the third transmission path; and Transmitting the first signal from the fourth semiconductor device to the second semiconductor device via the fourth transmission path. [10] A method according to any one of claims 1 to 9, wherein: a second semiconductor device comprises a fourth signal path; the second semiconductor device is different from a semiconductor device including the first signal path; a fourth node is coupled to the fourth signal path and an external antenna of the second semiconductor device; and the procedure further includes: Receiving at the fourth node a fourth signal received at the external antenna of the second semiconductor device, Setting a phase shift value of the first signal path, Determining a measurement signal of the fourth signal path comprising the phase information of the fourth signal path in accordance with the third signal, the fourth signal and the phase rotation value of the first signal path, and Increasing the phase rotation value of the first signal path to a phase rotation value that maximizes a signal amplitude of the measurement signal of the fourth signal path. [11] A measuring circuit comprising a first semiconductor device, wherein: the first semiconductor device comprises a plurality of signal paths, each comprising a respective phase rotation circuit, a first node coupled to a first signal path of the plurality of signal paths, a second node coupled to a second signal path of the plurality of signal paths, a common node coupled to the plurality of signal paths; the first semiconductor device is designed to to provide a first signal at the common node, to receive a third signal comprising a third frequency different from a frequency of the first signal; and mixing the first signal in accordance with the third signal to obtain a second signal; to provide the second signal to the first node via a first test path, to provide the second signal to the second node via a second test path, Transmitting, over a selected signal path of the plurality of signal paths, either the first signal or the second signal, and Mixing the first signal with the second signal to obtain a measurement signal of the selected signal path; and a difference in phase delay between the second test path and the first test path comprises a first known phase delay. [12] A measuring circuit according to claim 11, wherein: the measurement signal of the selected signal path includes the phase information of the selected signal path; the first node comprises an output node of the first signal path; and a phase rotation circuit of the selected signal path is configured to rotate the first signal. [13] A measuring circuit according to any one of claims 11 to 12, wherein: the measurement signal of the selected signal path includes the phase information of the selected signal path; the first node comprises an input node of the first signal path; the first semiconductor device further comprises a voltage-controlled oscillator configured to generate the first signal; and a phase rotation circuit of the selected signal path is configured to rotate the second signal. [14] A measuring circuit according to any one of claims 11 to 13, wherein: the second audit trail includes the first audit trail; the first semiconductor device further comprises a second node comprising a plurality of second nodes coupled to the first node by a respective inter-node path having a respective one of a plurality of known phase delays comprising the first known phase delay; each of the plurality of second nodes is coupled to a respective one of the plurality of signal paths; and each of the plurality of signal paths terminates at the common node of the first semiconductor device. [15] The measurement circuit of claim 14, further comprising a second semiconductor device coupled to the plurality of signal paths of the first semiconductor device, the second semiconductor device being configured to: to obtain the stored phase information of a measurement signal of the first signal path; and a phase difference between the first signal path and the selected signal path in accordance with the stored phase information, the phase information of the measurement signal of the selected signal path, and a phase delay selected from a single one of the plurality of known phase delays in accordance with the selected signal path. [16] A measuring circuit according to claim 14 or 15, wherein: a measurement signal of the first signal path further comprises amplitude information; the selected signal path differs from the first signal path; the measurement signal of the selected signal path further comprises amplitude information; and the first semiconductor device is further configured to to obtain stored amplitude information of the measurement signal of the first signal path, and to measure a difference between an amplitude change of the first signal path and an amplitude change of the selected signal path in accordance with the stored amplitude information and the amplitude information of the measurement signal of the selected signal path. [17] The measurement circuit of any one of claims 11 to 16, further comprising a second semiconductor device coupled to the plurality of signal paths of the first semiconductor device, wherein: a first phase difference comprises a difference between a phase delay across the second signal path relative to a phase delay across the first signal path; a second phase difference comprises a difference between a phase delay across a third signal path of the plurality of signal paths relative to a phase delay across the second signal path; and the second semiconductor device is further configured to adjust a phase rotation circuit of the second signal path and a phase rotation circuit of the third signal path such that the first phase difference is the same as the second phase difference. [18] A measurement system comprising a first semiconductor device, the first semiconductor device comprising: a plurality of signal paths each coupled to a common node; a plurality of audit trails comprising a first audit trail and a second audit trail; a reference node coupled between the first test path and a first signal path of the plurality of signal paths; a non-reference node coupled between the second test path and a second signal path of the plurality of signal paths; a first frequency mixer comprising an input coupled to either the reference node or the common node; a second frequency mixer comprising a single sideband mixer; a first input node coupled to a first input of the second frequency mixer; a signal source coupled to a second input of the second frequency mixer, the signal source being either a second input node of the first semiconductor device, or a voltage-controlled oscillator; and a plurality of passive coupler circuits comprising a first passive coupler circuit coupled between an output of the second frequency mixer and the reference node, wherein the second audit path includes the first audit path and an intermediate node path, a phase delay of the first intermediate node path comprises the first known phase delay, and the first intermediate node path comprises a second passive coupling circuit of the plurality of passive coupler circuits; and a measurement output node coupled to an output of the first frequency mixer, wherein a difference in phase delay between the second test path and the first test path comprises a known phase delay, and each of the plurality of signal paths comprises a respective phase rotation circuit. [19] The measurement system of claim 18, wherein each of the plurality of passive coupler circuits comprises a respective buffer comprising the same reference impedance. [20] A measurement system according to claim 18 or 19, wherein: the reference node is coupled to the input of the first frequency mixer; the reference node comprises a first output node of the plurality of signal paths; the non-reference node comprises a second output node of the plurality of signal paths; the plurality of signal paths further comprise a third signal path coupled to a third output node of the plurality of signal paths; and the first semiconductor device further comprises the third output node coupled to the reference node by a second intermediate node path having a known phase delay, a power splitter coupled to the second input node, the power splitter including the common node, a third frequency mixer comprising an input coupled to the second output node, a fourth frequency mixer comprising an input coupled to the third output node, and a switch comprising the following: a plurality of inputs coupled to the output of the first frequency mixer, an output of the third frequency mixer, and an output of the fourth frequency mixer, and an output coupled to the measurement output node. [21] A measurement system according to any one of claims 18 to 20, wherein: the reference node comprises a receiving node of the first semiconductor device; and the first semiconductor device further comprises a power combiner coupled to the input of the first frequency mixer, the power combiner comprising the common node, and the voltage-controlled oscillator comprises an output coupled to the input of the first frequency mixer and the second input of the second frequency mixer. [22] A measurement system according to any one of claims 18 to 21, further comprising: an analog-to-digital converter having an output coupled to the measurement output node; and a digital memory circuit coupled to the output of the analog-to-digital converter. [23] A measurement system according to any one of claims 18 to 22, further comprising: a second semiconductor device comprising a structure identical to the first semiconductor device; a third semiconductor device; a first transmission path coupled between the third semiconductor device and the second input node of the first semiconductor device; and a second transmission path coupled between the third semiconductor device and a frequency mixer included in the second semiconductor device, the second transmission path including a phase delay that is the same as a phase delay of the first transmission path. [24] A measurement system according to any one of claims 18 to 23, wherein the respective phase rotation circuit comprises: a first adjustable amplifier; a second adjustable amplifier; a multiphase filter comprising: a first output coupled to the first adjustable amplifier, and a second output coupled to the second adjustable amplifier; a first digital-to-analog converter having an input coupled to a serial programming interface and an output coupled to the first adjustable amplifier; and a second digital-to-analog converter having an input coupled to the serial programming interface and an output coupled to the second adjustable amplifier.

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