Optoelectronic component
Patent Information
- Application Number
- DE102017107957
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2017-04-12
- Publication Date
- 2026-09-03
- Estimated Expiration
- 2037-04-12
Smart Images

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Abstract
Description
The invention relates to an optoelectronic component. The following publications disclose optoelectronic devices: CN 1 01 621 106 A, WO 2015 / 044 529 A1, WO 2015 / 161 961 A1, US 2013 / 0 210 178 A1, US 2012 / 0 161 176 A1, EP 2 423 989 A2. Furthermore, Guo, H. et al., in Optics Express, Vol. 21, 2013, No. 18, pp. 21456–21465, disclose high-power GaN-based LEDs on a structured sapphire substrate with structured passivation layers of a SiO2 / Al2O3 composite material and a TiO2 / Al2O3 DBR backside reflector. Saraf, M. et al. revealed in Conference on Exploring Basic and Applied Sciences for Next Generation Frontiers (EBAS), 2014, p. 281-283 , optical filters based on alternating layered TiO2 / Al2O3 multilayers, produced by electron beam evaporation. Semiconductor chips used in optoelectronic devices such as light-emitting diodes (LEDs) must be protected from moisture. This is often achieved by applying a barrier layer of SiO2 over the semiconductor chip and its housing. Additionally, the semiconductor chips are frequently encapsulated with silicone. However, the combination of a SiO2 barrier layer with a silicone encapsulation results in poor light transmission due to the difference in refractive indices between the semiconductor chip layers, SiO2, and silicone. The object of at least one embodiment of the present invention is therefore to provide an optoelectronic component that has a good and improved light efficiency compared to the prior art. The problem is solved by an optoelectronic component having the features of claim 1. Advantageous developments and further developments of the present invention are specified in the dependent claims. An optoelectronic component, in particular a light-emitting diode (LED), is described. The optoelectronic component comprises a semiconductor chip configured to emit electromagnetic radiation. The semiconductor chip has a radiation-emitting surface over which a protective layer is arranged. The protective layer comprises at least a first layer comprising an aluminum oxide and at least a second layer comprising a silicon oxide. The protective layer can also consist of the first layer and the second layer. The refractive index of the protective layer according to this embodiment is, in particular, between 1.55 and 1.75. It is also described that the protective layer comprises at least a first layer consisting of aluminum oxide and at least a third layer consisting of titanium oxide. The protective layer can also consist of the first layer and the third layer. The refractive index of the protective layer according to this embodiment is, in particular, between 1.8 and 2.4. It is also described that the protective layer comprises at least a second layer consisting of silicon oxide and at least a third layer consisting of titanium oxide. The protective layer can also consist of the third layer and the second layer. The refractive index of the protective layer according to this embodiment is, in particular, between 1.55 and 2.4. The fact that a layer or element is arranged or applied "on" or "over" another layer or element can mean, here and in the following, that the layer or element is in direct mechanical and / or electrical contact with the other layer or element. It can also mean that the layer or element is arranged indirectly on or over the other layer or element. In this case, further layers and / or elements may be arranged between the layer or element. According to at least one embodiment, the protective layer comprises at least two first layers comprising an aluminum oxide and at least two second layers comprising a silicon oxide. The first and second layers are arranged alternately. An alternating arrangement means that a second layer is arranged over a first layer and a first layer is arranged over the second layer, or that a first layer is arranged over a second layer and a second layer is arranged over the first layer. The protective layer can also consist of the first layers and the second layers. The refractive index of the protective layer according to this embodiment is, in particular, between 1.55 and 1.75. According to at least one embodiment, the protective layer comprises at least two first layers comprising an aluminum oxide and at least two third layers comprising a titanium oxide. The first and third layers are arranged in an alternating pattern. The refractive index of the protective layer according to this embodiment is, in particular, between 1.8 and 2.4. According to at least one embodiment, the protective layer comprises at least two second layers comprising silicon oxide and at least two third layers comprising titanium oxide. The second and third layers are arranged in an alternating pattern. The refractive index of the protective layer according to this embodiment is, in particular, between 1.55 and 2.4. According to at least one embodiment, the second layer comprises SiO2 or consists of SiO2. According to at least one embodiment, the first layer comprises Al2O3 or consists of Al2O3. According to at least one embodiment, the third layer comprises TiO2 or consists of TiO2. According to at least one embodiment, the semiconductor chip comprises a sequence of layers. In this context, "layer sequence" refers to a sequence of layers comprising more than one layer, for example a sequence of a p-doped and an n-doped semiconductor layer, wherein the layers are arranged on top of each other and wherein at least one active layer is included that emits electromagnetic radiation. According to at least one embodiment, the semiconductor chip comprises an epitaxial layer sequence, in particular an epitaxially grown semiconductor layer sequence. The layer sequence can, for example, be based on InGaAlN. InGaAlN-based semiconductor chips and semiconductor layer sequences are, in particular, those in which the epitaxially fabricated semiconductor layer sequence comprises a sequence of different individual layers, including at least one layer made of a material from the III-V compound semiconductor material system InxAlyGa1-x-yN with 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and x + y ≤ 1. Semiconductor layer sequences that include at least one active layer based on InGaAlN can, for example, emit electromagnetic radiation in the ultraviolet to green wavelength range. Furthermore, the semiconductor layer sequence can, for example, be based on AlGaAs. AlGaAs-based semiconductor chips and semiconductor layer sequences include, in particular, those in which the epitaxially fabricated semiconductor layer sequence typically comprises a sequence of different individual layers, containing at least one layer made of a material from the III-V compound semiconductor material system AlxGa1-xAs with 0 ≤ x ≤ 1. Specifically, an active layer comprising an AlGaAs-based material can be capable of emitting electromagnetic radiation with one or more spectral components in the red to infrared wavelength range. Furthermore, such a material can additionally or alternatively contain In and / or P in addition to the aforementioned elements. Furthermore, the layer sequence can, for example, be based on InGaAlP. InGaAlP-based semiconductor chips and semiconductor layer sequences are, in particular, those in which the epitaxially fabricated semiconductor layer sequence comprises a layer sequence of different individual layers, including at least one layer made of a material from the III-V compound semiconductor material system InxAlyGa1-x-yP with 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and x+y ≤ 1. Semiconductor layer sequences that include at least one active layer based on InGaAlN can, for example, emit electromagnetic radiation in a red wavelength range. The active semiconductor layer sequence can comprise, in addition to the active layer, further functional layers and functional regions, such as p- or n-doped charge carrier transport layers (i.e., electron or hole transport layers), undoped or p- or n-doped confinement, cladding, or waveguide layers, barrier layers, planarization layers, buffer layers, protective layers, and / or electrodes, as well as combinations thereof. Furthermore, one or more mirror layers may be deposited on the side of the semiconductor layer sequence facing away from the growth substrate. The structures described here, concerning the active layer or the further functional layers and regions, are known to those skilled in the art, particularly with regard to their structure, function, and composition, and are therefore not explained in more detail here. In this and the following, a radiation emission surface of a semiconductor chip refers to a principal surface of the semiconductor chip or its layer sequence. The radiation emission surface extends, in particular, parallel to a principal plane of extension of the semiconductor layers of the layer sequence; for example, at least 85% or 90% of the radiation exiting the layer sequence exits the layer sequence via the radiation emission surface. The protective layer has a refractive index nDα between 1.55 and 2.4, preferably between 1.55 and 1.75, and particularly preferably between 1.60 and 1.70, for example, about 1.7. The refractive index nDα of SiO2 is 1.46, the refractive index nDα of Al2O3 is 1.77, and the refractive index nDα of TiO2 is above 2.45, depending on the modification. The layer sequence of the semiconductor chip, based, for example, on InxAlyGa1-x-yN, AlxGa1-xAs, or InxAlyGa1-x-yP, typically has a refractive index above 2, for example, about 2.4. It has been shown that the radiation emitted by the semiconductor chip can be best coupled out via the radiation exit surface if the refractive index of the layers, starting with the semiconductor layer sequence, remains the same or preferably decreases successively, i.e. step by step.In a protective layer made of SiO2 with a refractive index nDα of 1.46, as known from the prior art, the refractive index jump is high, resulting in a loss of radiation coupled outwards. With the protective layer according to the invention, which, by selecting the composition of the protective layer from first, second, and / or third layers, has a refractive index nDα of 1.55 to 2.4, for example, of about 1.7, the refractive index jump can be significantly reduced, thus increasing the light output. Furthermore, the protective layer according to the invention also provides sufficient protection for the semiconductor chip against the penetration of moisture and / or oxygen, which do not penetrate the protective layer or do so only minimally. The protective layer according to the invention thus increases both the light output and the lifetime of the optoelectronic component. According to at least one embodiment, the protective layer comprises at least two first layers comprising an aluminum oxide and at least two second layers comprising a silicon oxide. Preferably, the protective layer according to this embodiment is arranged such that the second layers are each positioned above the first layers. In other words, the protective layer is arranged such that the first layer is positioned in front of the second layer in the radiation path of the semiconductor chip. If, for example, the protective layer has two first layers and two second layers, then a first layer, a second layer, a first layer, and a second layer can be arranged above the radiation-emitting surface in the aforementioned order. In particular, the first layers can have a thickness of 40 nm and the second layers a thickness of 20 nm.The refractive index of the protective layer according to this embodiment is particularly between 1.55 and 1.7. This arrangement has surprisingly proven to be particularly advantageous with regard to improving light transmission. According to at least one embodiment, the protective layer comprises at least two first layers comprising an aluminum oxide and at least two third layers comprising a titanium oxide. The refractive index of the protective layer according to this embodiment is, in particular, between 1.8 and 2.4. According to at least one embodiment, the protective layer comprises at least two second layers comprising silicon oxide and at least two third layers comprising titanium oxide. The refractive index of the protective layer according to this embodiment is, in particular, between 1.55 and 2.4. According to at least one embodiment, the protective layer comprises at least a first layer comprising an aluminum oxide, at least a second layer comprising a silicon oxide, and at least a third layer comprising a titanium oxide. The protective layer can also consist of the first layer, the second layer, and the third layer. The refractive index of the protective layer according to this embodiment is, in particular, between 1.55 and 2.4. The protective layer comprises at least two first layers comprising an aluminum oxide, at least two second layers comprising a silicon oxide, and at least two third layers comprising a titanium oxide. The protective layer can consist of the first layers, the second layers, and the third layers. The refractive index of the protective layer according to this embodiment is, in particular, between 1.55 and 2.4. According to at least one embodiment, the protective layer is arranged such that the third layers are positioned above the second layers, and the second layers are positioned above the first layers. In other words, the protective layer is arranged such that the first layer is positioned in front of the second layer in the radiation path of the semiconductor chip, and the second layer is positioned in front of the third layer. According to at least one embodiment, the first, second, and / or third layer each have a thickness between 20 nm and 120 nm inclusive. The first, second, and / or third layer may each have the same or different thicknesses. If the layers have a thickness below 20 nm, they are no longer sufficiently thick to have a moisture- or oxygen-repellent effect, and they also do not exhibit any optical effect with regard to improved light extraction. For example, the first layer may have a thickness of 30 nm to 100 nm inclusive (e.g., 40 nm), the second layer may have a thickness of 20 nm to 100 nm inclusive (e.g., 20 nm), and the third layer may have a thickness of 20 nm to 100 nm inclusive.The refractive index of the protective layer can be adjusted by varying the layer thickness, in particular so that the refractive index of the layers decreases successively, starting with the semiconductor layer sequence and progressing through the protective layer. According to the invention, it is therefore possible to optimize the refractive index by varying the layer thicknesses and composition of the protective layer in order to ensure optimal coupling of the electromagnetic radiation. According to at least one embodiment, the protective layer comprises between two and 50 first layers, and between two and 50 second layers, or between two and 50 first layers, between two and 50 second layers, and between two and 50 third layers. Preferably, the protective layer comprises between two and 10 first layers, and between two and 10 second layers, or between two and 10 first layers, between two and 10 second layers, and between two and 10 third layers.Particularly preferably, the protective layer has between inclusive two and inclusive six first layers and between inclusive two and inclusive six second layers, or between inclusive two and inclusive six first layers, between inclusive two and inclusive six second layers, and between inclusive two and inclusive six third layers. According to at least one embodiment, the protective layer comprises between two and 50 first layers and between two and 50 third layers, or between two and 50 second layers and between two and 50 third layers. Preferably, the protective layer comprises between two and 10 first layers and between two and 10 third layers, or between two and 10 third layers and between two and 10 second layers.Particularly preferably, the protective layer comprises between inclusive two and inclusive six first layers and between inclusive two and inclusive six third layers, or between inclusive two and inclusive six third layers and between inclusive two and inclusive six second layers. According to at least one embodiment, the protective layer is arranged over the side surfaces of the semiconductor chip. This embodiment is particularly advantageous if the radiation is also emitted via the side surfaces of the semiconductor chip. According to at least one embodiment, the semiconductor chip has a substrate, in particular a sapphire substrate. In particular, the semiconductor layer sequence is arranged above the substrate. The substrate is preferably arranged on the main surface of the layer sequence opposite the radiation emission surface, so that the protective layer and the substrate are located on opposite main surfaces of the layer sequence. A current-expansion layer is arranged between the radiation-emitting surface and the protective layer. The current-expansion layer comprises one or more transparent, conductive oxides or can consist of one or more such oxides. The current-expansion layer may additionally be doped. In particular, the current-expansion layer, or the transparent, conductive oxide of the current-expansion layer, has a refractive index nDα between 2.0 and 1.8. According to this embodiment of the component, the protective layer has a refractive index between 1.55 and 1.7. Preferably, the protective layer comprises one or more first layers comprising an aluminum oxide and one or more second layers comprising a silicon oxide, or one or more third layers comprising a titanium oxide and one or more second layers comprising a silicon oxide, or consists of these layers.This means that the refractive index of the current-expansion layer lies between the refractive index of approximately 2.4 of the semiconductor layer sequence and the refractive index of approximately 1.55 to 1.75 of the protective layer. This gradual reduction in the refractive index of the layers through which the radiation passes results in less light loss, thereby improving the light output. The fact that a layer or element is arranged "between" two other layers or elements can mean, here and in the following, that the layer or element is in direct mechanical and / or electrical contact or in indirect contact with one of the other two layers or elements and in direct mechanical and / or electrical contact or indirect contact with the other of the two layers or elements. In the case of indirect contact, further layers and / or elements may be arranged between the layer and at least one of the other two layers, or between the layer and at least one of the other two elements. According to at least one embodiment, the refractive index of the layers arranged above the semiconductor chip decreases gradually. By reducing the refractive index of the layers through which the radiation passes, particularly gradually, the light output is improved. According to at least one embodiment, the refractive index nDα of the protective layer is between 0.1 and 0.3 smaller than the refractive index nDα of the current-expansion layer. This reduction in the refractive index has proven to be particularly advantageous with regard to light output. In a preferred embodiment, the current-expansion layer comprises or consists of indium tin oxide. Indium tin oxide has a refractive index nDα of 1.9. Thus, the refractive index of the indium tin oxide in the current-expansion layer lies between the refractive index of approximately 2.4 of the semiconductor layer sequence and the refractive index of approximately 1.55 to 1.75 of the protective layer. A successive reduction of the refractive index from approximately 2.4 to approximately 1.9 and then to approximately 1.55 to 1.75, perpendicular to the principal plane of extension of the semiconductor layer sequence, can thus advantageously be guaranteed, thereby improving the light output and light extraction. According to at least one embodiment, the current expansion layer is arranged directly on the semiconductor chip, in particular on the radiation emission surface of the semiconductor chip, and is in direct mechanical contact with it. It is particularly preferred that the radiation emission surface is completely or fully covered by the current expansion layer. According to at least one embodiment, the protective layer is arranged directly on the current expansion layer and is in direct mechanical contact with it. In particular, in this embodiment, the current expansion layer is arranged directly on the semiconductor chip, especially the radiation emission surface of the semiconductor chip, and is in direct mechanical contact with it. According to at least one embodiment, a potting compound is arranged above the protective layer. In particular, the potting compound material has a refractive index nDα between 1.4 and 2.4, preferably between 1.4 and 1.6. Specifically, the refractive index of the potting compound or the potting compound material is lower than the refractive index of the protective layer. The radiation from the semiconductor chip thus first passes through the sequence of semiconductor layers with a refractive index nDα of approximately 2.4, then through the protective layer with a refractive index of approximately 1.55 to 2.4, and subsequently through the potting compound with a refractive index nDα between 1.4 and 2.4, before being coupled outwards. In particular, the refractive index of the protective layer is adapted such that there is a gradual decrease in the refractive index of the layers in the direction of radiation emitted by the semiconductor chip.In particular, no further layer is arranged between the semiconductor chip and the protective layer and / or between the protective layer and the potting compound, so that the radiation only passes through the protective layer and the potting compound before being emitted to the outside. According to at least one embodiment, the component comprises a protective layer, a current-expansion layer, and a potting compound. In this embodiment, the radiation from the semiconductor chip first passes through the sequence of semiconductor layers with a refractive index nDα of approximately 2.4, then through a current-expansion layer with a refractive index nDα between 2.0 and 1.8, then through the protective layer with a refractive index of approximately 1.55 to 1.75, and subsequently through the potting compound with a refractive index nDα between 1.4 and 2.4, preferably between 1.4 and 1.6, before being coupled outwards. This stepwise reduction of the refractive index in the direction of radiation emitted by the semiconductor chip further improves light coupling.To achieve a refractive index of approximately 1.55 to 1.75 for the protective layer, the protective layer preferably comprises one or more first layers comprising an aluminum oxide and one or more second layers comprising a silicon oxide, or consists of these layers. In particular, no further layer is arranged between the semiconductor chip and the current expander layer, between the current expander layer and the protective layer, and / or between the protective layer and the encapsulation, so that the radiation only passes through the current expander layer, the protective layer, and the encapsulation before being emitted to the outside. According to at least one embodiment, the refractive index nDA of the encapsulation is between 0.1 and 0.3 smaller than the refractive index nDA of the protective layer. This reduction has proven particularly advantageous with regard to light transmission. It is also particularly preferred that the refractive index nDA of the protective layer be between 0.1 and 0.3 smaller than the refractive index nDA of the current-expanding layer. According to at least one embodiment, the refractive index nDα of the potting compound is between 0.1 and 0.3 smaller than the refractive index nDα of the protective layer, and the refractive index nDα of the protective layer is between 0.1 and 0.3 smaller than the refractive index nDα of the current-expansion layer. According to at least one embodiment, the potting compound comprises or consists of: silicone or silsesquioxane. In particular, the potting compound comprises a high-refractive-index silicone with a refractive index greater than 1.51, for example, 1.52. This has proven to be particularly advantageous for light extraction. For example, poly(dimethyl)siloxane can be used as a high-refractive-index silicone with a refractive index of about 1.52, in which a maximum of 50 percent of the methyl groups can be replaced by phenyl groups. Silsesquioxanes can have the formula [RSiO3 / 2]n, where R = H, alkyl, aryl, or alkoxy. Preferably, the alkyl group is a methyl, ethyl, or propyl group, and the alkoxy group is a methoxy, ethoxy, or propoxy group. Silsesquioxanes exhibit, for example, cage structures or polymeric structures with Si-O-Si bonds and silicon atoms at the vertices of a tetrahedron. Silsesquioxanes preferably have a refractive index nα greater than 1.55. According to at least one embodiment, the semiconductor chip is arranged on a conductor frame. The semiconductor chip is electrically contacted via the conductor frame. This can be achieved, for example, by means of bond pads arranged on the current-expansion layer. Conductor frames age very rapidly, for example, due to exposure to oxygen and / or moisture, which leads, among other things, to browning. This shortens the lifespan of the optoelectronic component, making it impossible to meet market requirements for many applications. In addition, the reflective properties of the conductor frame are reduced by the aging process, which decreases the luminous efficacy of the component over time. According to at least one embodiment, the conductor frame can comprise copper, steel, or a ceramic made of Al₂O₃ and / or AlN. The conductor frame is designed to be reflective with respect to the radiation from the semiconductor chip.According to at least one embodiment, the protective layer is arranged over the conductor frame. In particular, the protective layer is arranged over a main surface of the conductor frame facing the semiconductor chip. Preferably, the portion of the main surface of the conductor frame facing the semiconductor chip, over which the semiconductor chip is arranged, is free of the protective layer. The main surface of the conductor frame extends, in particular, parallel to the radiation emission surface of the semiconductor chip. Advantageously, according to this embodiment, the conductor frame can be protected from premature aging and the associated loss of reflectivity for the radiation emitted by the semiconductor chip. The protective layer protects the conductor frame, in particular, from oxidation, since oxygen and / or moisture cannot penetrate the protective layer to reach the conductor frame, or can only do so to a limited extent.According to this embodiment, the protective layer, which is arranged over the conductor frame and over the radiation emission surface of the semiconductor chip, can both increase the light output and protect the conductor frame from premature aging, thereby keeping the light output constant or nearly constant throughout the entire lifetime of the component. According to at least one embodiment, the semiconductor chip is arranged in a recess of a housing comprising the conductor frame. The recess has, in particular, side walls that are reflective to the radiation emitted by the semiconductor chip. This can be achieved by the housing material or a reflective coating on the side walls of the housing. According to at least one embodiment, the protective layer is arranged over a surface of the housing recess facing the semiconductor chip. In particular, the protective layer is arranged on the side walls of the housing recess. This makes it possible to protect the housing from premature aging and to maintain its reflectivity for the radiation emitted by the semiconductor chip throughout the component's lifetime. According to at least one embodiment, the potting compound is arranged above the protective layer and in the recess of the housing. Further advantageous embodiments and developments of the invention will become apparent from the exemplary embodiments described below in conjunction with the figures. Figures 1 to 3 and 6 to 8 show schematic side views of an optoelectronic component, and Figures 4 and 5 show schematic side views of a protective layer. The embodiment of an optoelectronic component 100 shown in Fig. 1 comprises a semiconductor chip 2 that emits radiation during operation. The semiconductor chip is based, for example, on a semiconductor layer sequence 3 based on gallium nitride, which has a refractive index of approximately 2.4. Furthermore, the semiconductor chip 2 has a substrate 1, for example, made of sapphire. The semiconductor chip 2 is mounted on a conductor frame 6 via the substrate 1 and electrically contacted with the conductor frame 6 by means of bond pads 7 and bond wires 7a. The conductor frame 6 comprises, for example, copper and is reflective to the radiation from the semiconductor chip 2. The conductor frame 6 is arranged in an opaque, for example, prefabricated, housing 10 with a recess 8.Prefabricated means that the housing 10 is already formed on the conductor frame 6, for example by injection molding, before the semiconductor chip 2 is mounted on the conductor frame 6. The housing comprises, for example, an opaque plastic. A current expansion layer 4 made of indium tin oxide is arranged in direct mechanical contact with the radiation emission surface A of the semiconductor chip 2. Two bond pads 7 are arranged on the current expansion layer 4 and are electrically contacted with the conductor frame 6 via the bond wires 7a. A protective layer 5 is arranged over the current expansion layer 4. The recess 8 of the housing 10 is formed with a potting compound 9, for example, made of a high-refractive-index silicone with a refractive index of 1.52. Unless otherwise claimed, the protective layer 5 consists of one to 50 second layers 5a made of SiO2 and one to 50 first layers 5b made of Al2O3 (not shown). If several first and second layers are encompassed by the protective layer, they are preferably arranged alternately. In the alternating arrangement, it is possible that a first layer 5a and a second layer 5b are arranged above the current-expansion layer 4, or that a second layer 5b and a first layer 5a are arranged first. The first layers 5a and the second layers 5b each have a thickness between 20 nm and 120 nm inclusive. Alternatively, the protective layer 5 can consist of one to 50 second layers 5a made of SiO2 and one to 50 third layers 5c made of TiO2. If several second and third layers are encompassed by the protective layer 5, they are preferably arranged alternately. The protective layer 5 consists of one to 50 second layers 5a consisting of SiO2, one to 50 first layers 5b consisting of Al2O3, and one to 50 third layers 5c consisting of TiO2. If several first, second, and third layers are encompassed by the protective layer 5, they are preferably arranged alternately. The protective layer 5 has a refractive index nDα of 1.55 to 1.75. The radiation emitted by the semiconductor chip 2 is coupled outwards via the semiconductor layer sequence 3 with a refractive index nDα of approximately 2.4, the current expansion layer 4 with a refractive index nDα of approximately 1.9, the protective layer 5 with a refractive index nDα of 1.55 to 1.75, and the encapsulation 9 with a refractive index nDα of approximately 1.52. This gradual reduction in the refractive index of the layers through which the radiation passes results in no or only minimal radiation losses due to reflection, thus achieving a particularly high light yield. Furthermore, the protective layer 5 protects the semiconductor chip 2 from moisture and oxygen, thereby preventing premature failure of the component 100 caused by moisture. The protective layer 5 of the component 100 of Fig. 1 can be applied before the semiconductor chips are separated.A wafer with the grown or deposited semiconductor layer sequence can first be coated with the current expansion layer 4. Subsequently, the protective layer 5 is applied to the current expansion layer 4, for example, by atomic layer deposition (ALD) or chemical vapor deposition (CVD), preferably at low temperatures. Only then is the wafer separated into individual semiconductor chips 2. By applying the protective layer 5 before separating the wafer into the semiconductor chips 2, the manufacturing process is very efficient and time-saving. In the embodiment of an optoelectronic component 100 shown in Fig. 2, the protective layer 5 is additionally arranged over the side surfaces S of the semiconductor chip 2, compared to the component in Fig. 1. In particular, as shown in Fig. 2, the protective layer 5 is also arranged over the side surfaces of the current-expansion layer 4. Radiation emerging from the semiconductor layer sequence 3 with a refractive index nDα of approximately 2.4 via the side surfaces S thus first passes through the protective layer 5 with a refractive index nDα of 1.55 to 1.75, for example approximately 1.7, and then through the encapsulation 9 with a refractive index nDα of approximately 1.52. This gradual reduction of the refractive index of the layers improves the light transmission even with respect to the radiation emitted through the side surfaces S and also protects the semiconductor chip 2 from moisture at the side surfaces S.The application of the protective layer 5 of the component 100 of Fig. 2 takes place after the semiconductor chips 2 have been separated from a wafer. In particular, the bond pads 7 are first applied to the current expansion layer 4. The protective layer 5 can be applied to the current expansion layer 4 and the bond pads 7, whereby the bond pads 7 can be subsequently freed of the protective layer 5, for example, by etching. Alternatively, the protective layer 5 can also be applied over a mask to keep the surface of the bond pads 7 free of the protective layer 5. This method proves to be more time-consuming than the method for manufacturing the component 100 of Fig. 1. However, the component 100 according to the embodiment of Fig. 2 is characterized by a further optimization of the light yield as a result of coating the side surfaces S of the semiconductor chip 2 with the protective layer 5. In the embodiment of an optoelectronic component 100 shown in Fig. 3, the protective layer 5 is additionally arranged over a main surface of the conductor frame 6A facing the semiconductor chip 2, in comparison to the optoelectronic component 100 of Fig. 2. The portion of the main surface of the conductor frame 6A facing the semiconductor chip, over which the semiconductor chip 2 is arranged, is free of the protective layer 5. The main surface of the conductor frame 6A extends, in particular, parallel to the radiation emission surface A of the semiconductor chip 2. Furthermore, according to this embodiment, the protective layer 5 is arranged over the side walls of the recess in the housing 10A. The side walls of the recess in the housing 10A are designed to reflect the radiation emitted by the semiconductor chip 2.For this purpose, the housing material can be reflective or a reflective coating can be applied to the side walls of the recess in housing 10A (not shown here). In this way, the conductor frame 6 and the housing 10 can be protected from premature aging and their reflectivity for the radiation emitted by the semiconductor chip 2 can be maintained throughout the operating lifetime of the component 100. The protective layer 5 of the component 100 of Fig. 3 is applied after the semiconductor chip 2 is positioned in the recess 8 of the housing 10. Specifically, the bond pads 7 are first applied to the current expansion layer 4. The protective layer 5 can be applied to the current expansion layer 4 and the bond pads 7, with the bond pads 7 subsequently being freed of the protective layer 5, for example, by etching. Alternatively, the protective layer 5 can also be applied over a mask to keep the surface of the bond pads 7 free of the protective layer 5. The protective layer 5 is also applied over the side walls of the recess of the housing 10A. Fig. 4 shows a protective layer 5 as it can be formed in the components 100 of Figs. 1, 2 to 3. The protective layer 5 comprises four first layers 5a and four second layers 5b, arranged alternately. The first layers 5a consist of Al₂O₃ and the second layers 5b consist of SiO₂. The first layers 5a and the second layers 5b each have a thickness of 20 nm to 120 nm. Particularly preferably, the first layers 5a have a thickness of 40 nm and the second layers 5b a thickness of 20 nm. Thus, the protective layer has a refractive index of approximately 1.7. This has proven to be particularly efficient for light transmission, especially with a current-expansion layer made of ITO with a refractive index of 1.9 and a silicone encapsulation with a refractive index of 1.52.A second layer 5b arranged above a first layer 5a completely covers the underlying first layer 5a, and vice versa. Particularly preferably, the protective layer 5 is arranged on the radiation-emitting surface A of a semiconductor chip 2 such that the second layers 2b are each arranged above the first layers 2a. In other words, the protective layer 5 is arranged such that the first layer 5a is positioned in the radiation path of the semiconductor chip 2 in front of the second layer 5b. With this arrangement of the protective layer 5, a particularly high light efficiency can be achieved. Alternatively, the protective layer can also consist of a first layer 5a made of Al₂O₃ and a second layer 5b made of SiO₂.Particularly preferably, the first layer 5a has a thickness of 40 nm and the second layer 5b a thickness of 20 nm. Thus, the protective layer has a refractive index of approximately 1.7. Fig. 5 shows a protective layer 5 as it can be formed in the components 100 of Figs. 1, 2 to 3. The protective layer 5 comprises two first layers 5a, two second layers 5b, and two third layers 5c, arranged alternately. The first layers 5a consist of Al₂O₃, the second layers 5b consist of SiO₂, and the third layers 5c consist of TiO₂. The first layers 5a, the second layers 5b, and the third layers 5c each have a thickness of 20 nm to 120 nm inclusive, for example, 30 nm. Particularly preferably, the protective layer 5 is arranged on the radiation-emitting surface A of a semiconductor chip 2 such that the third layers 2c are arranged above the second layers 5b, and the second layers 2b are arranged above the first layers 2a. In comparison with the components 100 of Fig. 1, Fig. 2 to Fig. 3, the components 100 of Fig. 6, Fig. 7 and Fig. 8 do not have a current expansion layer 4. As an alternative to the protective layers described in Figures 1, 2, 3, 4 to 5, the protective layer 5 in the components of Figures 6, 7 and 8 can consist of one to 50 first layers 5a consisting of Al₂O₃ and one to 50 third layers 5c consisting of TiO₂, arranged alternately. Thus, the protective layer 5 has a refractive index of between 1.8 and 2.4. Reference symbol list 100 Optoelectronic component 1 Substrate 2 Semiconductor chip 3 Semiconductor layer sequence 4 Current expansion layer 5 Protection layer 5a First layer 5b Second layer 5c Third layer 6 Conductor frame 6A Main surface of the conductor frame facing the semiconductor chip 7 Bond pad 7a Bond wire 8 Recess 9 Potting compound 10 Package 10A Side walls of the recess of the package A Radiation emission surface S Side faces of the semiconductor chip
Claims
Optoelectronic device (100) comprising a semiconductor chip (2) configured to emit electromagnetic radiation, wherein the semiconductor chip (2) has a radiation emission surface (A) and a protective layer (5) is arranged above the radiation emission surface (A) and the protective layer (5) comprises at least two first layers (5a) comprising an aluminum oxide, at least two second layers (5b) comprising a silicon oxide and at least two third layers (5c) comprising a titanium oxide, wherein the first layers (5a), the second layers (5b) and the third layers (5c) are arranged alternately and wherein a current expansion layer (4) comprising one or more transparent conductive oxides is arranged between the radiation emission surface (A) and the protective layer (5). Optoelectronic component (100) according to claim 1, wherein the protective layer (5) has a refractive index nDα between 1.55 and 2.
4. Optoelectronic component (100) according to one of the preceding claims, wherein the protective layer (5) is arranged such that a second layer (5b) of the at least two second layers is arranged above the first layer (5a) of the at least two first layers. Optoelectronic component (100) according to one of the preceding claims, wherein the at least two first layers and / or the at least two second layers (5b) and / or the at least two third layers (5c) each have a layer thickness between inclusive 20 nm and inclusive 120 nm. Optoelectronic component (100) according to one of the preceding claims, wherein the second layers (5a) comprise or consist of SiO2 and / or the first layers (5b) comprise or consist of Al2O3 and / or the third layer (5c) comprise or consist of TiO2. Optoelectronic component (100) according to one of the preceding claims, wherein the protective layer (5) is arranged over the side surfaces (S) of the semiconductor chip (2). Optoelectronic component (100) according to one of the preceding claims, wherein the refractive index nDα of the protective layer (5) is between 0.1 and 0.3 smaller than the refractive index nDα of the current expansion layer (4). Optoelectronic component (100) according to one of the preceding claims, wherein the semiconductor chip (2) is arranged on a conductor frame (6) and the protective layer (5) is arranged over a main surface (6A) of the conductor frame (6) facing the semiconductor chip (2). Optoelectronic component (100) according to claim 8, wherein the semiconductor chip (2) is arranged in a recess (8) of a housing (10) comprising the conductor frame (6) and the recess (8) has side walls (10A) which are designed to reflect the radiation emitted by the semiconductor chip (2) and wherein the protective layer (5) is arranged on the side walls (10A) of the recess (8) of the housing (10). Optoelectronic component (100) according to one of the preceding claims, wherein a potting compound (9) is arranged above the protective layer (5) and wherein the refractive index nDα of the potting compound (9) is between 0.1 and 0.3 smaller than the refractive index nDα of the protective layer (5). Optoelectronic component (100) according to claims 9 and 10, wherein the potting compound (9) is arranged above the protective layer (5) and in the recess (8) of the housing. Optoelectronic component (100) according to one of the preceding claims, wherein the refractive index of the layers arranged on the semiconductor chip (2) decreases stepwise.
Citation Information
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