Imaging devices, systems and movable imaging objects

Abstract

Imaging device comprising: a plurality of pixels arranged in a matrix comprising a first row and a second row, each of the first row and the second row comprising a light-receiving pixel and a reference pixel; a first voltage supply line extending over the first row and the second row; an output control circuit configured to output voltages to the reference pixel arranged in the first row and the reference pixel arranged in the second row via the first voltage supply line, the light-receiving pixel being configured to receive incident light and output a pixel signal based on the incident light, and the reference pixel being configured to output a pixel signal based on one of the voltages output by the output control circuit to form an address signal indicating a position of a row.to which the reference pixel belongs, and wherein a signal value of the address signal output by the first row and a signal value of the address signal output by the second row are different from each other.

Description

BACKGROUND OF THE INVENTION Area of ​​the invention

[0001] The present invention relates to imaging devices, imaging systems, movable objects and methods for operating such systems. Description of the state of the art

[0002] An imaging device discussed in Japanese patent application no. 2009-118427 comprises an effective pixel area and a non-effective pixel area. The effective pixel area is configured to receive external light and is used to capture an image. Pixels arranged within the effective pixel area each include a photodiode that generates an electrical signal through photoelectric conversion. The entire surface of the non-effective pixel area is covered with a light-blocking film. The non-effective pixel area includes a reference area and an error detection pattern area. Pixels located within the reference area generate a signal that serves as a reference for the image signal level.Pixels equipped with a photodiode (PD pixels) and pixels without a photodiode (PD pixels) are arranged in the fault detection pattern area. Signals are acquired from the fault detection pattern area according to a pattern in which these PD pixels and PD pixels are arranged. A fault is determined based on these signals. SUMMARY OF THE INVENTION

[0003] An imaging device as an exemplary embodiment according to one aspect of the present invention comprises a plurality of pixels arranged in a matrix with at least a first row and a second row, wherein each of the first row and the second row comprises a light-receiving pixel and a reference pixel, wherein the light-receiving pixel is configured to receive incident light and output a pixel signal based on the incident light, and the reference pixel is configured to output a pixel signal to form an address signal indicating a position of the row to which the reference pixel belongs, and wherein a signal value of the address signal output by the first row and a signal value of the address signal output by the second row are different from each other.

[0004] An imaging device as an exemplary embodiment according to another aspect of the present invention comprises a plurality of pixels arranged in a matrix having at least a first column and a second column, each of the first column and the second column comprising a light-receiving pixel and a reference pixel, wherein the light-receiving pixel is configured to receive incident light and output a pixel signal based on the incident light, and the reference pixel is configured to output a pixel signal to form an address signal indicating a position of the column to which the reference pixel belongs, and wherein a signal value of the address signal output by the first column and a signal value of the address signal output by the second column are different from each other.

[0005] An imaging device as an exemplary embodiment according to a further aspect of the present invention comprises a plurality of pixels, comprising at least a first light-receiving pixel and a second light-receiving pixel, each light-receiving pixel being configured to receive incident light and output a pixel signal based on the incident light, a first reference pixel configured to provide a pixel signal in parallel with the pixel signal from the first light-receiving pixel, and a second reference pixel configured to provide a pixel signal in parallel with the pixel signal from the second light-receiving pixel, and an output control circuit configured to control a level of the pixel signal from each of the first reference pixel and the second reference pixel, such that the pixel signal provided by the first reference pixel and the pixel signal,which is provided by the second reference pixel, exhibit different levels.

[0006] An imaging system as an exemplary embodiment according to a further aspect of the present invention comprises a signal processing unit configured to process a pixel signal output by a light-receiving pixel of the imaging device and to provide an image signal based on the pixel signal, wherein the signal processing unit receives a plurality of address signals output by the imaging device, the plurality of address signals having different signal values, and wherein the signal processing unit determines whether the pixel signal of the light-receiving pixel is output normally by the imaging device, based on the plurality of address signals.

[0007] Further features of the present invention will become apparent from the following description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Fig. Figure 1 schematically represents an overall configuration of an imaging device.

[0009] Fig. 2A and Fig. 2B each represent a substitute circuit for a pixel of the imaging device.

[0010] Fig. Figure 3 is a time sequence diagram that schematically represents an operation of the pixel of the imaging device.

[0011] Fig. Figure 4 schematically represents an address signal that is output by the imaging device.

[0012] Fig. Figure 5 is a flowchart that illustrates a procedure for determining an operation of the imaging device.

[0013] Fig. 6A, Fig. 6B and Fig. Each of the 6C symbols schematically represents an address signal that is output by the imaging device.

[0014] Fig. Figure 7 schematically represents an address signal output by an imaging device.

[0015] Fig. Figure 8 is a flowchart that illustrates a procedure for determining an operation of the imaging device.

[0016] Fig. Figure 9 schematically represents an address signal output by an imaging device.

[0017] Fig. Figure 10 schematically represents the address signal output by the imaging device.

[0018] Fig. Figure 11 is a block diagram that represents an exemplary embodiment of a mapping system.

[0019] Fig. 12A and Fig. Figures 12B are each a block diagram representing an exemplary embodiment of a movable object.

[0020] Fig. Figure 13 schematically represents a planar configuration of the pixel of the imaging device.

[0021] Fig. Figure 14 schematically represents a planar configuration of the pixel of the imaging device.

[0022] Fig. 15A and Fig. Figures 15B each schematically represent a cross-sectional configuration of the pixel of the imaging device. DESCRIPTION OF THE EXAMPLES OF EXECUTION

[0023] According to several exemplary implementation examples, an error can be correctly detected.

[0024] According to the technique discussed in Japanese Patent Application No. 2009-118427, it is determined whether the signals obtained from the fault detection pattern area match a predetermined pattern. However, this method has a problem: it is unable to accurately detect faults and malfunctions of the imaging device. For example, a pixel signal might not be read normally by a specified pixel in the effective pixel area due to a fault in the imaging device's control circuitry. Conversely, if the pixels in the fault detection pattern area are normal, the signals obtained from the fault detection pattern area indicate that the imaging operation is functioning normally. In other words, despite the occurrence of a fault in the imaging device, it might not be possible to detect that fault.

[0025] An exemplary embodiment according to the present invention is an imaging device. The imaging device comprises a plurality of pixels arranged to form a matrix. The plurality of pixels includes a light-receiving pixel and a reference pixel. External light is incident on the light-receiving pixel from the outside. The light-receiving pixel outputs a pixel signal according to the incident light – that is, the light-receiving pixel is arranged to provide a light signal in response to the reception of light. The reference pixel outputs a pixel signal to form an address signal.

[0026] The address signal contains information regarding the position of a row or column. Address signals with different signal values ​​are assigned to at least two rows or two columns. An address signal is formed by a pixel signal from a reference pixel or pixel signals from a multitude of reference pixels. Thus, at least one first address signal is formed based on the pixel signals from the first row / column of the matrix, and a second address signal is formed based on the pixel signals from the second row / column of the matrix. In this way, the first address signal is associated with the first row, and the second address signal is associated with the second row.

[0027] In an exemplary embodiment where an address signal is formed by a pixel signal from a reference pixel, at least one reference pixel is provided for each row. Reference pixels in different rows output a multitude of pixel signals at levels that are distinct from each other. The level represents a current or voltage value of the pixel signal. The level of the reference pixel's pixel signal indicates a signal value of the address signal. That is, a signal value of an address signal can be based on the pixel signal—for example, a signal value of an address signal can correspond to the level(s) of one or more pixel signals. In one example, a reference pixel is provided in each row, and a reference pixel in an odd-numbered row outputs a pixel signal at a high level, while a reference pixel in an even-numbered row outputs a pixel signal at a low level.This configuration can be used, for example, to determine whether the imaging device reads the signal in the even-numbered row or the signal in the odd-numbered row. Alternatively, the reference pixel outputs a pixel signal for each row at a level that is unique for the row to which the reference pixel belongs. In a case where the imaging device comprises pixels from 4000 rows, the reference pixels output pixel signals at 4000 levels. This configuration can be used, for example, to determine from which row the imaging device reads the signal.

[0028] In another exemplary embodiment, a plurality of reference pixels is arranged for each row. In this exemplary embodiment, an address signal is formed by the pixel signals from the plurality of reference pixels. For example, each of the reference pixels outputs either the high-level pixel signal or the low-level pixel signal. In a case where N reference pixels are arranged, an address signal is formed as a digital signal with N bits, based on a combination of the high-level pixel signal and the low-level pixel signal. The high-level pixel signal corresponds to a "1" in each bit, and the low-level pixel signal corresponds to a "0" in each bit. In this case, a pattern of the digital signal in which 0s and 1s are arranged specifies the signal value of the address signal.Providing 12 reference pixels allows an address signal with a unique signal value to be generated for each of the 4096 rows. The unique address signal does not need to be generated for all rows. The number of reference pixels in each row for the pixels in the 4096 rows can be less than 12. In this case, the address signal, which has the same signal value, is assigned to a multitude of rows.

[0029] In each of the exemplary embodiments described above, each reference pixel can output at least two pixel signals at different levels. Alternatively, each of the exemplary embodiments described above can be configured such that each reference pixel outputs only one pixel signal at one level. Furthermore, the imaging device in which each row contains the reference pixel has been cited as an example in the preceding description, but the exemplary embodiments can likewise be applied to an imaging device in which each column contains the reference pixel by replacing the term "row" with the term "column" in the present disclosure.

[0030] An exemplary embodiment according to the present invention is an imaging system. The imaging system comprises a signal processing unit that processes a pixel signal output by an imaging device to obtain an image signal. The signal processing unit further receives an address signal output by the imaging device and determines whether the pixel signal is output normally by the imaging device. The address signal can be any of the address signals described herein—for example, it can be the same address signal described in the exemplary embodiments of the imaging device described above. For example, using the methods described herein can detect a defect in a readout circuit or circuits that provide control signals for reading the pixel signal or signals.This allows for a more accurate determination of whether a pixel signal is being output normally by the light-receiving pixel.

[0031] In one exemplary embodiment, the signal processing unit determines whether the pixel signals of a multitude of rows are output in a predetermined sequence. The signal processing unit determines whether a multitude of address signals, output sequentially along with the reading of the pixel signals from the multitude of rows, change as expected. For example, in the case where the address signals with the different signal values ​​are assigned to the odd-numbered rows and the even-numbered rows, the signal processing unit determines whether these address signals with the different signal values ​​are output alternately. This configuration allows the unit to determine whether the pixel signals of the multitude of rows are output in the predetermined sequence.

[0032] Alternatively, the signal processing unit determines whether the pixel signal is output appropriately in a specified row. The signal processing unit determines whether the signal value of the address signal output along with the pixel signal matches the signal value assigned to the specific row—that is, whether it matches the signal value(s) that the reference pixel(s) in a specified row is intended to provide. This configuration determines whether the pixel signal is output normally in the predetermined row.

[0033] In the present exemplary embodiment, it is determined that the imaging device is operating normally or outputting a signal normally, while an address signal outputs an expected signal value. If a signal value of an address signal differs from the expected signal value, the signal processing unit determines that the imaging device is not operating normally or that a fault has occurred in the imaging device. Thus, for example, a determination as to whether a light signal is output normally can be made based on whether a signal value of an address signal matches an expected signal value (that is, a signal value corresponding to a pixel signal intended to provide a reference pixel).

[0034] In the present exemplary embodiment, the signal processing unit, which is provided outside the imaging device, determines whether the imaging device outputs the pixel signal normally. Conversely, in an exemplary embodiment of the imaging device, a circuit provided inside the imaging device can determine whether the signal is output normally. Thus, the determination can be made by a processing arrangement located either inside or outside the imaging device.

[0035] The imaging device and imaging system described above are used for a camera, a surveillance device, a robot, and the like. Alternatively, the imaging device and imaging system described above are used for a moving object. Specifically for a moving object used to transport a person, such as a vehicle, an aircraft, or a ship, it is desirable that any device attached to it be highly reliable. Therefore, the term "moving object" will be understood to mean a moving object such as an automobile, a boat, an aircraft, a bicycle, or any other type of vehicle or robot. Preferably, the moving object may be an autonomous vehicle. More generally, the moving object may also be, for example, a vehicle for transporting goods or people.Based on the imaging device and imaging system of the exemplary embodiments described above, it can be determined whether the pixel signal is being output normally by the imaging device. Therefore, if a fault has occurred in the imaging device, an imaging operation can be stopped and / or a warning can be issued to indicate the occurrence of the fault.

[0036] In several exemplary embodiments, the imaging device or imaging system includes a unit configured to detect an abnormality in the reference pixel. More precisely, if a signal value of an address signal output by the reference pixel does not match the expected signal value, it is determined whether this mismatch is caused by an abnormality or fault in the reference pixel, or whether this mismatch indicates that the signal is being read from a light-receiving pixel that was not intended. Such a device can further improve the reliability of the imaging device or imaging system, or of the moving object that uses it.

[0037] The following description details exemplary embodiments of the present invention with reference to the drawings. The present invention is not limited to the exemplary embodiments described below. The exemplary embodiments of the present invention also include a modification in which a portion of the configurations of the exemplary embodiments described below is changed within a range that does not deviate from the spirit of the invention. Furthermore, the exemplary embodiments of the present invention also include an example in which a portion of the configuration from any of the following exemplary embodiments is added to another exemplary embodiment or replaced by a portion of the configuration from another exemplary embodiment.

[0038] A first exemplary implementation is described. Fig. Figure 1 schematically represents a configuration of an imaging device according to the first exemplary embodiment. The imaging device comprises a plurality of pixels. 305 , 306 and 307 , which are arranged to form a matrix. The multitude of pixels includes a light-receiving pixel as the pixel 305 , an optically black pixel (hereinafter referred to as an OB pixel) than the pixel 306 and a reference pixel as the pixel 307 The imaging device further includes a vertical scanning circuit. 301 , a column circuit 302 , a horizontal scanning circuit 303 , an output control circuit 304 , output lines 305 , control lines 309 and output control lines 310 .

[0039] The multitude of pixels305 , 306 and 307 , which are contained in a series, are connected to the common control line 309 connected. The vertical sampling circuit 301 sends a control signal to each of the multitude of pixels 305 , 306 and 307 via the control line 309 A pixel signal is transmitted in parallel with the output line. 308 from each of the multitude of pixels 305 , 306 and 307 , which are contained in a series, are output based on the control signal. The multitude of pixels 305 , 306 and 307 , which are contained in a column, are connected to the common output line 308 connected. The pixel signal that goes to the output line 308 The output is entered into the column layout. 302 entered. A column layout 302 is for the individual output lines 308arranged. The column arrangement 302 It performs operations such as amplifying the pixel signal, converting the pixel signal from an analog signal to a digital signal, preserving the pixel signal, and removing noise from the pixel signal. The pixel signal is processed by the column array. 302 through the horizontal scanning circuit 303 Read out sequentially.

[0040] The light reception pixel 305 is configured to receive light from outside. The light-receiving pixel 305 It outputs a pixel signal according to the incident light. The OB pixel 306 is covered with a light-blocking film (not shown). The light-blocking film is arranged such that the light-receiving pixel 305 exposed. The OB pixel 306It outputs a pixel signal at a level corresponding to a state where no light is incident, that is, at a dark level. The pixel signal that originates from the OB pixel 306 The output signal can contain a noise component that is different for each pixel. Therefore, the pixel signal originating from the OB pixel can... 306 The output signal can vary depending on the position. However, the amount of the noise component depends, for example, on manufacturing variations and thermal noise, and is therefore random. Therefore, the pixel signal from the OB pixel 306 No information to identify a position in the row or column.

[0041] The reference pixel 307Outputs a pixel signal to generate an address signal. Any one of the address signals described above is used in this exemplary embodiment. In this exemplary embodiment, the output control circuit controls... 304 a level of the output signal that is taken from the reference pixel 307 The output is displayed. More precisely, the output control circuit performs the following actions: 304 a predetermined voltage to the output control line 310 to. The reference pixel 307 Outputs a pixel signal at a level corresponding to the voltage of the output control line. 310 out. The reference pixel 307 may be covered by the light-blocking film not shown. Alternatively, the reference pixel may be 307 be exposed because the reference pixel 307 does not include a photodiode.

[0042] The following is a configuration of each of the light-receiving pixels. 305, of the OB pixel 306 and the reference pixel 307 described. Fig. 2A represents a substitute circuit for each of the light-receiving pixels. 305 and the OB pixel 306 dar. Fig. 2B represents a substitute circuit for the reference pixel. 307 dar.

[0043] As in Fig. The light reception pixel shown in 2A comprises 305 and the OB pixel 306 each a photodiode (hereinafter referred to as a PD) 401 The PD 401 It converts incident light into a charge through a photoelectric conversion. In other words, the PD is 401 An example of a photoelectric conversion unit. Since the external light hits the PD 401 from the light reception pixel 305 When this occurs, charges generated by the photoelectric conversion are stored in the PD. 401 of the light reception pixel 305 accumulated. On the other hand, the PD is 401of the OB pixel 306 shielded from the light. Therefore, charges that would become noise, such as dark current, are not detected in the PD. 401 of the OB pixel 306 accumulated. The PD 401 of the OB pixel 306 can be omitted.

[0044] As in Fig. The reference pixel shown in 2B includes the reference pixel. 307 the PD 401 No. Instead, the reference pixel is... 307 with the output control lines 310 connected. In the present exemplary embodiment, the output control line is 310 , which supplies a voltage Va, and the output control line 310 , which supplies a voltage Vb that differs from the voltage Va, with the reference pixel 307 connected. The output control circuit 304 selects one of the second output control lines 310to supply it with voltage. Such a configuration allows the reference pixel to 307 Optionally output a pixel signal at a level corresponding to voltage Va and a pixel signal at a level corresponding to voltage Vb. In the case where the reference pixel 307 If the multitude of pixel signals at the different levels is not output, the reference pixel must be used. 307 with just any of the output control lines 310 , which supplies the voltage Va, and the output control line 310 , which supplies the voltage Vb, are connected.

[0045] The light reception pixel 305 , the OB pixel 306 and the reference pixel 307 Each includes a transmission transistor 402 The transmission transistor 402 from each of the light-receiving pixels 305 and the OB pixel 306 transfers the charge in the PD 401to a floating-diffusion node (FD node). On the other hand, the transmission transistor transmits 402 of the reference pixel 307 The voltage Va or the voltage Vb at the FD node. A gate of the transmission transistor. 402 is connected to the control line 309 connected, which supplies a control signal TX. The transmission transistor 402 It is controlled by the control signal TX.

[0046] The light reception pixel 305 , the OB pixel 306 and the reference pixel 307 Each includes an amplification transistor 404 The FD node is connected to a gate of the amplification transistor. 404 connected. The amplification transistor 404 outputs a pixel signal to the output line based on the voltage of the FD node. 308 from. For example, the amplification transistor 404 and a power source not shown, connected to the output line 308It is connected to a source-follower circuit.

[0047] The light reception pixel 305 , the OB pixel 306 and the reference pixel 307 Each includes a reset transistor 403 The reset transistor 403 Resets the voltage of the FD node. One drain of the reset transistor. 403 is connected to a node that supplies a reset voltage Vres. In the present exemplary embodiment, a power source voltage VDD is used as the reset voltage Vres. A gate of the reset transistor 403 is connected to the control line 309 connected, which supplies a control signal RES. The reset transistor 403 It is controlled by the control signal RES to be switched on and off.

[0048] The light reception pixel 305 , the OB pixel 306 and the reference pixel 307 Each includes a selection transistor 405The selection transistor 405 is in an electrical path between the amplification transistor 404 and the issuing management 308 arranged. A gate of the selection transistor 405 is connected to the control line 309 electrically connected, which supplies a control signal SEL. The selection transistor 405 It is controlled according to the control signal SEL to be switched on and off. When the selection transistor 405 When switched on, the pixel signal is amplified by the corresponding gain transistor. 404 to the issuing line 308 A pixel that outputs a pixel signal is selected by turning on the selection transistor. 405 of some of the pixels among the multitude of pixels that are connected to an output line 305 are connected, and switching off the selection transistors 405 The remaining pixels below these were selected. Two or more pixels connected to an output line.308 If connected, they can be selected simultaneously.

[0049] Such a configuration allows the light-receiving pixel to be 305 Output the pixel signal according to the incident light. The OB pixel. 306 The pixel signal can be output at the dark level. Furthermore, the reference pixel... 307 Optionally, the pixel signal at the level corresponding to the voltage Va and the pixel signal at the level corresponding to the voltage Vb.

[0050] The configuration of each of the light-receiving pixels 305 and the reference pixel 307 will be described in detail. Fig. Figure 13 schematically represents a planar configuration of each of the light-receiving pixels. 305 and the reference pixel 307 the imaging device. In Fig. 13. The same reference symbols will be used as the reference symbols used in Fig. 2A and Fig. 2B can be used, as well as to create elements with the same functions as the elements that are in Fig. 2A and Fig. 2B are shown, to be specified.

[0051] A power source wiring 201 is a wiring connection that transmits a power source voltage VDD to the pixel for image generation. The light-receiving pixel 305 includes a semiconductor area 203 , which is part of the PD 401 is the semiconductor sector 203 This is a charge accumulation section where the charges generated by the photoelectric conversion are accumulated. In the present example, the conductivity of the semiconductor region is assumed to be... 203 It is n-type conductive. Furthermore, it is assumed that the charges that are in the semiconductor region 203 They are accumulated electrons.

[0052] The light reception pixel 305 includes a transmission gate 204of the transmission transistor 402 and a floating diffusion area 205 , which is part of the FD node. Fig. 13 represents a configuration in which two light-receiving pixels 305 a gaining transistor 404 share among themselves. Therefore, Fig. 13 a pair of semiconductors 203 and the floating diffusion area 205 , which are located in the first light-receiving pixel 305A are included, and a pair of semiconductors. 203 and the floating diffusion area 205 , which are located in a second light-receiving pixel 305B are included.

[0053] The light reception pixel 305 includes a gate 206 of the selection transistor 405 (a selection gate), a gate (amplification gate) 207 of the amplification transistor 404 and a gate 208 of the reset transistor 403(a reset gate). Furthermore, the light reception pixel includes 305 an FD connection contact 209 , a first FD connection wiring 210 and a second FD connection wiring 211 The contact will be referred to as CNT below.

[0054] The semiconductor sector 203 is with the floating diffusion area 205 via the transmission gate 204 connected. The charges that are in the semiconductor area 203 accumulated, are transferred to the floating diffusion area 205 via the transmission gate 204 transferred. The floating diffusion area 205 is with the amplification gate 207 via the FD connection CNT 209 and the FD connection wiring 210 and 211 tied together.

[0055] The floating diffusion area 205 is connected to the reset transistor 403 via the FD connection CNT 209and the FD connection wiring 210 and 211 tied together.

[0056] Part of the reference pixel configuration 307 is similar to the light reception pixel 305 Sections in a similar configuration to the light-receiving pixel 305 are represented by the same reference symbols as in the light reception pixel 305 The descriptions are provided. Redundant descriptions are omitted here. Fig. 13 represents a configuration in which two reference pixels 307 a gaining transistor 404 share among themselves. Therefore, Fig. 13 a pair of semiconductors 302 and the floating diffusion area 205 , which are in a first reference pixel 307A are included, and a pair of semiconductors. 203 and the floating diffusion area 205 , which are located in a second reference pixel 307B are included.

[0057] The semiconductor sector 203 , the PD 401 in the reference pixel 307 forms, is connected to a first power supply line 212 or a second power supply line 213 connected. The first power supply line 212 or the second power supply line 213 is a wiring configuration that includes the output control line 310 forms. The connection between the semiconductor sector 203 and the first power supply line 212 or the second power supply line 213 will be via a CNT 215 , a wiring 214 and a through hole 216 manufactured. The through hole 216 connects the power supply line 212 or 213 and the wiring 214 each other.

[0058] The first power supply line 212 and the power supply line 213are above the PD 401 in the reference pixel 307 arranged. In other words, the first power supply line overlaps. 212 and the PD 401 mutually and overlap the second power supply line 213 and the PD 401 mutually in a planar view with respect to a light-receiving surface.

[0059] In the reference pixel 307 This will unlock potential that is linked to the semiconductor sector 203 via the first power supply line 212 or the second power supply line 213 is applied to the floating diffusion area 205 via the transmission transistor 402 issued.

[0060] The configuration of each of the light-receiving pixels 305 and the reference pixel 307 , which relate to Fig. As described in section 13, the focus will continue to be on the PD. 401 with reference to Fig. 14 described. Fig. 14 represents the light reception pixel 305 , the PD 401 in the reference pixel 307 and the transmission transistor 402 in Fig. 14. The same reference numerals will be used as the reference numerals used in Fig. 13 can be used, as well as to represent the same elements as the elements that are in Fig. 13 are shown, to be specified.

[0061] First, the light-receiving pixel is selected. 305 described. The semiconductor sector 203 , in which the charges accumulate, overlaps a p-type semiconductor region in a planar view 220 As below with reference to Fig. 15A and Fig. As described in 15B, the p-type semiconductor region serves this purpose. 220 as a surface protection layer that protects a surface of the semiconductor area 203 protects. The semiconductor area can be found below. 220which is referred to as the surface protective layer.

[0062] Next, the reference pixel will be 307 described. A p-type semiconductor region 221 is between a section of the semiconductor area 203 , with which the CNT 215 is connected, and the transmission gate 204 provided in a flat view.

[0063] Fig. Figure 15A schematically shows a cross-sectional configuration of the pixel along a line CD, which is in Fig. 14 is shown. Fig. Figure 15B schematically shows a cross-sectional configuration of the pixel along a line AB, which is in Fig. 14 is shown.

[0064] The first step is the light reception pixel. 305 (the cross-section corresponding to line CD), which in Fig. 15A is shown, described. The semiconductor area 203 , in which the charges accumulate, is below the p-type semiconductor region 220formed. This configuration enables the p-type semiconductor region to function. 220 as the surface protective layer that protects the surface of the semiconductor area 203 protects. The p-type semiconductor region 220 is between a main surface 250 a semiconductor substrate and the semiconductor area 203 educated.

[0065] Next, the reference pixel will be 307 (the cross-section corresponding to line AB), which in Fig. The CNT is described in section 15B. 215 is related to a sub-area of ​​the semiconductor industry 203 connected, in which the charges accumulate. The p-type semiconductor region. 221 is not under this CNT 215 formed. Furthermore, the p-type semiconductor region is 221 between the section of the semiconductor area 203 , with which the CNT 215 is connected, and the transmission gate 204provided. Furthermore, regarding a section in which the p-type semiconductor region is located. 221 and the semiconductor sector 203 The semiconductor area overlaps mutually in the planar view. 203 below the p-type semiconductor region 221 provided. The p-type semiconductor region 221 is between the main surface 250 of the semiconductor substrate and the semiconductor area 203 educated.

[0066] In the case where the conductivity of the semiconductor area 203 Being n-type is a conductivity characteristic of the semiconductor region. 221 p-type. Therefore, the p-type semiconductor region exhibits 221 a lower potential than the semiconductor sector 203A In other words, a potential of the p-type semiconductor region is being explored. 221 on a potential between a potential of the transmission gate 204 , if the transmission gate204 is switched off, and a potential of the semiconductor area 203 adjusted. If the p-type semiconductor region 221 If no field is formed, an electric field corresponding to a potential difference between the transmission gate is generated. 204 and the semiconductor sector 203 to the transmission gate 204 installed. On the other hand, the provision of the p-type semiconductor area enables 221 In the present exemplary embodiment, the electric field applied to the transmission gate 204 is applied to an electric field corresponding to a potential difference between the transmission gate 204 and the p-type semiconductor region 221 reduced. This reduction can cause a fault in the transmission transistor. 204 in the reference pixel 307less likely to occur. In other words, according to the pixel configuration of the present exemplary embodiment, it may be less likely that an error will occur in the reference pixel. 307 occurs.

[0067] A semiconductor area with the same conductivity as the semiconductor area 203 and a higher impurity concentration than the semiconductor sector 203 can be between the semiconductor area 203 and the CNT 215 It must be provided. According to such a configuration, connection resistance can be reduced.

[0068] Next, an operation will be performed on each of the light-receiving pixels. 305 , of the OB pixel 306 and the reference pixel 307 described. Fig. Figure 3 is a timing diagram of the control signal SEL, the control signal RES, and the control signal TX. When the control signal is at a high level, the corresponding transistor is switched on. When the control signal is at a low level, the corresponding transistor is switched off. Fig. 3 continues to indicate the voltage of the FD node.

[0069] At time T1, the selection transistor 405 switched on. At the same time, the reset transistor is also switched on. 403 switched on. Therefore, the voltage of the FD node is the reset voltage Vres. After the selection transistor 405 When switched on, the reset transistor 403 switched off. The amplification transistor 404 outputs a pixel signal (a noise signal) at a level corresponding to the reset voltage Vres to the output line. 308 out of.

[0070] At time T2, the transmission transistor 402switched on. The charges in the PD 401 are located at the FD nodes in each of the light reception pixels 305 and the OB pixel 306 transmitted. The voltage of the FD node changes from the reset voltage Vres to a signal voltage Vsig. The amplification transistor 404 outputs a pixel signal at a level corresponding to a voltage Vsig to the output line. 308 out of.

[0071] In the reference pixel 307 , if the transmission transistor 402 When switched on, the voltage Va or the voltage Vb, which is supplied by the output control circuit, is 304 The output voltage is supplied to the FD node. When voltage Va is applied, the voltage of the FD node changes from the reset voltage Vres to voltage Va. When voltage Vb is applied, the voltage of the FD node changes from the reset voltage Vres to voltage Vb. The amplification transistor404 The pixel signal is sent to the output line at the level corresponding to the voltage Va or the voltage Vb. 308 out. The pixel signal that originates from the reference pixel 307 The output signal forms the address signal.

[0072] At time T3, the reset transistor is activated. 403 switched on and the selection transistor is switched on. 405 Subsequently, it is switched off. As a result, an operation of reading the pixel signal from each multitude of pixels is performed. 305 , 306 and 307 , which are contained in a series, is finished.

[0073] The column layout 302 It performs a subtraction process on the pixel signal using the noise signal output at reset time. This processing yields the pixel signal with the noise reduced. The column array 302continues to perform processing such as maintaining the pixel signal and converting the analog signal to the digital signal as needed.

[0074] In the present exemplary embodiment, the light reception pixels are 305 , the OB pixel 306 and the reference pixel 307 , which are contained in the same series, with the common control line 309 tied together.

[0075] Therefore, the pixel signal is taken from the reference pixel 307 parallel with the pixel signal that is emitted from each of the light-receiving pixels 305 and the OB pixel 306 is read out, read out. As described above, the pixel signal is formed from the reference pixel. 307 the address signal that specifies the series to which the reference pixel belongs 307belongs. Therefore, such a configuration can determine whether the pixel signal is output normally from the specified series. The light-receiving pixel 305 , the OB pixel 306 and the reference pixel 307 Pixels in the same row can be connected with electrically isolated individual control lines. The connection of the light-receiving pixel 305 , of the OB pixel 306 and the reference pixel 307 in the same series as the common control line 309 This is an example of a configuration that reads these pixel signals in parallel.

[0076] The address signal, which is formed by the pixel signal, that originates from the reference pixel 307The output process is described in detail. A digital signal is used as the address signal according to the present exemplary embodiment. In other words, the pixel signal corresponds to the reference pixel. 307 a signal value in each bit of the digital signal. As in Fig. Figure 3 indicates the pixel signal at the level corresponding to voltage Va “0”, and Figure 3 indicates the pixel signal at the level corresponding to voltage Vb “1”. A symbol D(m, n) is added to the pixel signal to allow the pixel signals to be distinguished from each other. In this symbol, m represents a row number and n represents a column number.

[0077] Fig. Figure 4 schematically represents the signal value of the address signal according to the present exemplary embodiment. Fig. 4 represents the pixel signals of the reference pixels 307For example, as 16 rows × 12 columns. However, the number of reference pixels 307 not limited to that.

[0078] Twelve reference pixels 307 are contained in a series. In other words, in the present exemplary embodiment, the address signal is expressed as a 12-bit digital signal. The address signal, which is derived from the pixel signals of the reference pixel, 307 When formed in a series, it comprises three sets of sub-signals that have the same signal value. For example, the reference pixels 307 A sub-signal with a signal value of "0001" is displayed in columns 0 to 3 of the first row. The reference pixels 307 Columns 4 to 7 in the first row output a sub-signal with the same signal value “0001”. Then the reference pixels output 307 A sub-signal with the same signal value “0001” appears in columns 8 to 11 in the first row.

[0079] Furthermore, the address signal has a different value for each row. For example, the sub-signal of the address signal for the first row has the value "0001". The sub-signal of the address signal for the second row has the value "0010". "0001" and "0010" are different signal values.

[0080] The following describes a method for determining whether the imaging device is outputting the pixel signal normally, based on the address signal. Fig. Figure 5 is a flowchart for determining an operation of the imaging device. This determination process is performed, for example, by a signal processing unit located outside the imaging device. Alternatively, this determination process is performed by a signal processing circuit located inside the imaging device.

[0081] In step S200, the signal processing unit or circuit obtains the address signal for an Nth row. The address signal comprises the three sets of sub-signals, as described above.

[0082] In step S201, the signal processing unit or circuit determines whether the signal values ​​of three sets of sub-signals match. If the signal values ​​of all three sets of sub-signals match, the signal processing unit or circuit determines that there is no abnormality in the reference pixel. 307 There is (NO in S201). In this case, processing proceeds to the next step, step S203. In a case where any of the three sets of sub-signals has a signal value different from the other signal values, the signal processing unit or circuit determines that there is an abnormality in a part of the reference pixels. 307If (YES in step S201), processing proceeds to step S202.

[0083] In step S202, the signal processing unit or circuit uses the signal value of the majority of the sub-signals as the address signal that specifies this series. In other words, in step S202, the signal processing unit or circuit performs the determination by majority vote using the three sub-signals. For example, in a case where the signal values ​​of the three sub-signals are "0001", "0001", and "0101", the signal processing unit or circuit uses "0001" as the signal value of the address signal that specifies the Nth series.

[0084] In step S203, the signal processing unit or circuit generates the address signal with the signal value obtained in the preceding step, as the address signal that specifies the Nth series. If all signal values ​​of the three sets of sub-signals are identical (NO in step S201), the address signal is generated with this matching signal value. If any of the sub-signals has a signal value different from the other signal values ​​(YES in step S201), the address signal is generated with the signal value selected by majority vote in step S202.

[0085] In step S204, the signal processing unit or circuit compares the generated address signal with an expected value of the address signal for the Nth row. If the signal value of the address signal matches the expected value (YES in step S204), the processing proceeds to step S205. In step S205, the signal processing unit or circuit determines that the imaging device is operating normally. The processing then proceeds to an operation of reading an N + 1th row.

[0086] In a case where the signal value of the address signal does not match the expected value in step S204 (NO in step S204), processing proceeds to step S207. In step S207, the signal processing unit or circuit determines that there is an abnormality in the operation of the imaging device. In other words, the signal processing unit or circuit determines that a fault has occurred in the imaging device. In this case, in step S208, the signal processing unit or circuit stops the operation of the imaging device or issues a warning indicating that a fault has occurred in the imaging device.

[0087] In the exemplary embodiment described above, the pixel signals originating from the reference pixels form the following: 307The output signal specifies the position of the row to which the reference pixels belong. This configuration allows verification that the pixel signal is being output correctly from the specified row. As a result, errors in the imaging device can be accurately detected.

[0088] Furthermore, in the present exemplary embodiment, an address signal comprises the three sets of sub-signals that have the same signal value as the others. Such a configuration allows the presence or absence of a fault in the imaging device to be correctly determined, even if an abnormality exists in a subset of the reference pixels. 307 has occurred. In other words, the multitude of reference pixels serves as a means of representation. 307 , which are contained in a series, as a detection unit configured to detect an abnormality in the reference pixel as a whole.

[0089] The address signal for each row was cited as an example in the preceding description, but the operation of the mapping device can be determined using the address signal for each column. In this case, the present exemplary embodiment can be realized by replacing the term “row” with the term “column” in the present disclosure.

[0090] A second exemplary embodiment is described. The structure of the address signal differs from that in the first exemplary embodiment. Therefore, the following description focuses on the second exemplary embodiment, primarily highlighting differences from the first exemplary embodiment, while omitting descriptions of features similar to the first exemplary embodiment.

[0091] Fig. 6A, Fig. 6B and Fig. Figures 6C each schematically represent a signal value of the address signal according to the present exemplary embodiment. In an imaging device, which is in Fig. As shown in 6A, each row contains a reference pixel. 307 The reference pixel 307 outputs a pixel signal indicating whether the row to which the reference pixel belongs 307 belongs to whether it is an even-numbered series or an odd-numbered series. For example, the reference pixel gives 307 In the even-numbered row, a pixel signal is emitted at a level that indicates "0". The reference pixel 307 In the odd-numbered row, a pixel signal is output at a level indicating "1". The other configuration is similar to the first exemplary implementation and therefore a description of it is omitted here.

[0092] Such a configuration allows you to determine whether the signal from the imaging device is output in the correct sequence. For example, if an operation is performed to output the pixel signals from all rows in sequence, the signal value of the output address signal alternates between "0" and "1". By detecting this change in the address signal, it can be determined whether the imaging device is outputting the pixel signal correctly.

[0093] Fig. 6B represents another exemplary embodiment. In an imaging device that is in Fig. The reference pixel shown in 6B indicates the reference pixel. 307 a pixel signal at a level that is relevant for the series to which the reference pixel belongs 307 It is clearly heard. Then the level of the pixel signal, which is from the reference pixel, is given. 307The output displays the signal value of the address signal. In other words, the address signal, according to the present exemplary embodiment, is an analog signal. More precisely, the reference pixel indicates 307 The zeroth row outputs a pixel signal at a level corresponding to a voltage V0. Similarly, the reference pixel outputs... 307 In an nth row, a pixel signal is output at a level corresponding to a voltage Vn. Each of the voltages from voltage V0 to voltage Vn has a value different from the other voltages.

[0094] Such a configuration can determine whether the pixel signal of the specified array is output appropriately. For example, if the pixel signal from each of the light-receiving pixels 305 and the OB pixel 306 The second row output determines whether the signal value of the address signal (which is based on the pixel signal from the reference pixel) is correct. 307The output signal must match a signal value assigned to the second row (for example, the signal value expected to be generated based on pixel signal settings applied to the second row's reference pixels), specifically a voltage V2 in the present example. If these do not match, a readout from each of the light-receiving pixels could result in a signal value that is not correctly generated. 305 and the OB pixel 306 failing in the second row, which can determine that a fault has occurred in the imaging device.

[0095] Fig. 6C represents another exemplary embodiment. In an imaging device that is in Fig. 6C is shown as a reference pixel. 307 arranged in a column. The reference pixel 307 outputs a pixel signal indicating whether the column to which the reference pixel belongs 307belongs to an even-numbered column or an odd-numbered column. The other configuration is similar to the content that refers to Fig. 6A is described. Furthermore, the imaging device can be configured in such a way that the reference pixel 307 Each column outputs a pixel signal at a different level, as shown in Fig. 6B.

[0096] In the manner described above, according to the present exemplary embodiment, the pixel signal originating from the reference pixel forms 307 The address signal is output, which indicates the position of the row or column to which the reference pixel belongs. 307 belongs to, indicates. Such a configuration can determine whether the pixel signal from the specified row or column is output normally. As a result, a fault in the imaging device can be correctly detected.

[0097] Furthermore, in the present exemplary embodiment, a row contains only one reference pixel. 307 or does a column contain only one reference pixel? 307 Therefore, the number of reference pixels can 307 This can be reduced, which allows the size of the imaging device to be reduced.

[0098] The present exemplary embodiment does not include the detection unit configured to detect an abnormality in the reference pixel. 307 to capture. Therefore, step 201 and step 202 in the flowchart that is in Fig. The process shown in section 5 was not carried out. The pixel signal originating from the reference pixel 307 The output signal is used directly as the address signal. As an exemplary modification of the present exemplary embodiment, the detection unit, configured to detect an abnormality in the reference pixel, can be used. 307to be captured, added, similar to the first exemplary embodiment.

[0099] A third exemplary embodiment is described. The structure of the address signal differs from that in the first exemplary embodiment. Therefore, the following description focuses on the third exemplary embodiment, highlighting differences from the first exemplary embodiment and omitting descriptions of similar features.

[0100] A configuration of the imaging device according to the present exemplary embodiment is similar to that of the first exemplary embodiment. In other words, it represents Fig. Figure 1 schematically illustrates the configuration of the imaging device according to the third exemplary embodiment. A detailed description of this is omitted here.

[0101] One configuration and one operation of each of the light-receiving pixels 305 , of the OB pixel 306 and the reference pixel 307 According to the present exemplary embodiment, they are similar to those of the first exemplary embodiment. In other words, they represent Fig. 2A and Fig. 2B each a replacement circuit of the light reception pixel 305 , of the OB pixel 306 and the reference pixel 307 as shown in the present exemplary embodiment. The configuration of each of the light-receiving pixels 305 and the reference pixel 307 is in Fig. 13 to Fig. 15A and Fig. 15B is shown. Furthermore, Fig. 3 A timing diagram of control signals used in the imaging device according to the present exemplary embodiment. Detailed descriptions thereof are omitted here.

[0102] In the present exemplary embodiment, the light reception pixels are 305 , the OB pixel 306 and the reference pixel 307 , which are contained in the same series, with the common control line 309 connected. Therefore, the pixel signal is connected to the reference pixel. 307 parallel with the pixel signal that is emitted from each of the light-receiving pixels 305 and the OB pixel 306 The pixel signal is read out in parallel. 307 forms the address signal that specifies the series to which the reference pixel belongs. 307belongs. Therefore, such a configuration can determine whether the pixel signal is output normally from the specified series. The light-receiving pixel 305 , the OB pixel 306 and the reference pixel 307 Pixels in the same row can be connected with electrically isolated individual control lines. The connection of the light-receiving pixel 305 , of the OB pixel 306 and the reference pixel 307 in the same row with the common control line 309 This is an example of a configuration that reads these pixel signals in parallel.

[0103] The address signal, which is formed by the pixel signal, that originates from the reference pixel 307The output process is described in detail. According to the present exemplary embodiment, a digital signal is used as the address signal. In other words, the pixel signal corresponds to the reference pixel. 307 a signal value in each bit of the digital signal. As in Fig. Figure 3 indicates a pixel signal at the level corresponding to voltage Va “0” and indicates the pixel signal at the level corresponding to voltage Vb “1”. The symbol D(m, n) is added to the pixel signal to allow the pixel signals to be distinguished from each other. In this symbol, m represents the row number and n represents the column number.

[0104] Fig. Figure 7 schematically represents the signal value of the address signal according to the present exemplary embodiment. Fig. 7 represents the pixel signals of the reference pixels 307This is shown as an example for 16 rows × 7 columns. However, the number of reference pixels is 307 not limited to that.

[0105] Seven reference pixels 307 are contained in a series. In other words, in the present exemplary embodiment, the address signal is expressed as a 7-bit digital signal. The address signal, derived from the pixel signals of the reference pixels, 307 When formed in a series, it includes a sub-address signal that indicates the position of the series to which the reference pixels belong. 307 belong, indicates, and a verification signal. The pixel signals that originate from the reference pixels 307 The signals output at column numbers 0 to 3 in each row form the sub-address signal. The pixel signals originating from the reference pixels 307The values ​​output in columns 4 through 6 of each row form the verification signal. The verification signal contains information for correcting an error in the address signal. According to this exemplary embodiment, the verification signal is set by calculating a Hamming coding operation with respect to the sub-address signal. In other words, a Hamming code is used in the address signal according to this exemplary embodiment. As another example, the verification signal can be generated as a parity bit.

[0106] The Hamming coding operation is described. In the present exemplary embodiment, the subaddress signal is a 4-bit digital signal. D0 to D3 are used to represent the 4 bits that constitute the subaddress signal. The verification signal is a 3-bit digital signal. P0 to P2 are used to represent the 3 bits that constitute the verification signal. The signal value in each of the bits of the verification signal can be obtained by calculating operations specified by the following equations (1) to (3). P2 = D3 + D2 + D1 (1) P1 = D3 + D1 + D0 (2) P0 = D2 + D1 + D0 (3)

[0107] In each of equations (1) to (3), “+” signifies the execution of a logical exclusive OR (EXOR) operation. If the two logical values ​​are different, the result of the operation is “1”. If the two logical values ​​are the same, the result of the operation is “0”.

[0108] The sub-address signal in the zeroth row has a signal value of "0000". Therefore, the check signal in the zeroth row has a signal value of "000". The sub-address signal in the first row has a signal value of "0001". Therefore, the check signal in the first row has a signal value of "011". The sub-address signal in the second row has a signal value of "0010". Therefore, the check signal in the second row has a signal value of "111". The signal values ​​of the check signal for the other rows are set in the same way. In this exemplary embodiment, the address signal has a different value for each row.

[0109] The following describes a method for determining whether the imaging device outputs the pixel signal normally, based on the address signal. Fig. Figure 8 is a flowchart for determining an operation of the imaging device. Steps in which operations similar to those in [reference to figure] are performed. Fig. 5 are performed using the same step numbers as in Fig. 5. This determination processing is performed, for example, by the signal processing unit provided outside the imaging device. Alternatively, this determination processing is performed by the signal processing circuit provided inside the imaging device.

[0110] In step S200, the signal processing unit or circuit obtains the address signal for the Nth row. The address signal includes the sub-address signal and the verification signal, as described above.

[0111] In step S801, the signal processing unit or circuit determines whether an abnormality is present in the reference pixel. 307The abnormality occurred using the address signal, which is encoded according to Hamming coding. More precisely, the signal processing unit or circuit performs a decoding process with respect to the address signal. This processing allows the determination of which bit among the bits of the address signal the abnormality occurred in. A known technique for decoding the Hamming code is used for the decoding process.

[0112] In a case where there is an abnormality in the reference pixel 307 If the signal is detected in step S801 (YES in step S801), the signal processing unit or circuit corrects the signal value of the address signal in step S802. More precisely, the signal processing unit or circuit inverts the signal value in the bit corresponding to the reference pixel. 307, which determines that the abnormality is present in it. The processing then proceeds to step S803. In a case where no abnormality is found in the reference pixel. 307 If the answer in step S801 is NO, processing proceeds directly to step S803.

[0113] In step S803, the signal processing unit or circuit generates the address signal, which has the signal value obtained in the previous step, as the address signal that specifies the Nth row. In a case where there is no abnormality in the reference pixel 307 If the value is NO in step S801, the address signal, which has the signal value of the sub-address signal, is generated. In a case where there is an abnormality in the reference pixel 307 If (YES in step S801) the address signal is generated with the signal value of the sub-address signal corrected in step S802.

[0114] A subsequent operation is similar to the first exemplary embodiment. In step S204, the signal processing unit or circuit compares the generated address signal with the expected value of the address signal for the Nth row. If the signal value of the address signal matches the expected value (YES in step S204), the processing proceeds to step S205. In step S205, the signal processing unit or circuit determines that the imaging device is operating normally. The processing then proceeds to the operation of reading the N + 1th row.

[0115] In a case where the signal value of the address signal does not match the expected value in step S204 (NO in step S204), processing proceeds to step S207. In step S207, the signal processing unit or circuit determines that there is an abnormality in the operation of the imaging device. In other words, the signal processing unit or circuit determines that an error has occurred in the imaging device. In this case, in step S208, the signal processing unit or circuit stops the operation of the imaging device or issues a warning indicating that the error has occurred in the imaging device.

[0116] In the exemplary embodiment described above, the pixel signals originating from the reference pixels form the following: 307 The address signal that indicates the position of the row to which the reference pixels are assigned will be output.307 This configuration allows you to determine whether the pixel signal is output normally from the specified array. As a result, a fault in the imaging device can be accurately detected.

[0117] Furthermore, in the present exemplary embodiment, the address signal includes the verification signal, which is calculated based on the Hamming coding operation. Such a configuration allows the presence or absence of a fault in the imaging device to be correctly determined, even if an abnormality exists in a subset of the reference pixels. 307 has occurred. In other words, the reference pixels serve 307 , which output the pixel signals that form the verification signal, as the detection unit configured to detect an abnormality in the reference pixel.

[0118] The address signal for each row was cited as an example in the preceding description, but the operation of the mapping device can be determined using the address signal for each column. In this case, the present exemplary embodiment can be realized by replacing the term “row” with the term “column” in the present disclosure.

[0119] A fourth exemplary embodiment is described. An imaging device according to the present exemplary embodiment differs from the first exemplary embodiment in that a reference pixel outputs a plurality of pixel signals at different levels. Furthermore, the fourth exemplary embodiment also differs from the first exemplary embodiment in the method for detecting an abnormality in the reference pixel. 307different. Therefore, the following description describes the fourth exemplary embodiment, focusing mainly on differences from the first exemplary embodiment and appropriately omitting descriptions of similar features to the first exemplary embodiment.

[0120] A configuration of the imaging device according to the present exemplary embodiment is similar to that of the first exemplary embodiment. In other words, it represents Fig. Figure 1 schematically illustrates the configuration of the imaging device according to the fourth exemplary embodiment. A detailed description of this is omitted here.

[0121] One configuration and one operation of each of the light-receiving pixels 305 , of the OB pixel 306 and the reference pixel 307According to the present exemplary embodiment, they are similar to those of the first exemplary embodiment. In other words, they represent Fig. 2A and Fig. 2B each a replacement circuit of the light reception pixel 305 , of the OB pixel 306 and the reference pixel 307 as shown in the present exemplary embodiment. The configuration of each of the light-receiving pixels 305 and the reference pixel 307 is in Fig. 13 to Fig. 15A and Fig. 15B is shown. Furthermore, Fig. 3 A timing diagram of control signals used in the imaging device according to the present exemplary embodiment. A detailed description thereof is omitted here.

[0122] The reference pixel 307According to the first exemplary embodiment, the system is configured to output the pixel signal at the level corresponding to the voltage Va and the pixel signal at the level corresponding to the voltage Vb based on control by the output control circuit. 304 to be output optionally. In the first exemplary embodiment, however, a reference pixel must be used. 307 It does not necessarily output the two pixel signals at the different levels. On the other hand, the reference pixel provides 307 According to the present exemplary embodiment, both the pixel signal at the level corresponding to the voltage Va and the pixel signal at the level corresponding to the voltage Vb, based on control by the output control circuit. 304 The presence or absence of an abnormality in the reference pixel. 307 can be determined by checking whether the level of the pixel signal coming from the reference pixel 307The output changes as expected and can be determined.

[0123] In the present exemplary embodiment, the light reception pixels are 305 , the OB pixel 306 and the reference pixel 307 , which are contained in the same series, with the common control line 309 connected. Therefore, the pixel signal is connected to the reference pixel. 307 with the pixel signal that is emitted from each of the light-receiving pixels 305 and the OB pixel 306 The pixel signal is read out in parallel. As described above, the pixel signal is derived from the reference pixel. 307 the address signal that specifies the series to which the reference pixel belongs 307 belongs. Therefore, such a configuration can determine whether the pixel signal is output normally from the specified series. The light-receiving pixel 305 , the OB pixel 306 and the reference pixel 307Pixels in the same row can be connected with electrically isolated individual control lines. The connection of the light-receiving pixel 305 , of the OB pixel 306 and the reference pixel 307 in the same row with the common control line 309 This is an example of a configuration that reads these pixel signals in parallel.

[0124] The address signal, which is formed by the pixel signal, that originates from the reference pixel 307 The output process is described in detail. A digital signal is used as the address signal according to the present exemplary embodiment. In other words, the pixel signal corresponds to the reference pixel. 307 a signal value in each bit of the digital signal. As in Fig. The symbol 3 indicates the pixel signal at the level corresponding to voltage Va “0” and the pixel signal at the level corresponding to voltage Vb “1”. The symbol D(m, n) is added to the pixel signal to allow the pixel signals to be distinguished from each other. In this symbol, m represents the row number and n represents the column number.

[0125] Fig. Figure 9 schematically represents the signal value of the address signal according to the present exemplary embodiment. Fig. 9 represents the pixel signals of the reference pixels 307 This is shown as an example for 16 rows × 4 columns. However, the number of reference pixels is 307 not limited to that. Four reference pixels 307 are contained in a series. In other words, in the present exemplary embodiment, the address signal is expressed as a digital signal with 4 bits.

[0126] Fig. Figure 9 presents an example in which the address signal for each row has a different signal value according to an operating state of the imaging device. More precisely, the address signal in an odd-numbered frame and the address signal in an even-numbered frame have signal values ​​that are inverted relative to each other. For example, the address signal for the second row has a signal value of “0010” in the odd-numbered frame. Conversely, the address signal for the second row has a signal value of “1101” in the even-numbered frame. Similarly, as in Fig. As shown in Figure 9, the signal value in each bit of the address signal is inverted between the odd-numbered frame and the even-numbered frame. The output control circuit 304 switches the voltage that goes to the reference pixel 307The voltage to be supplied is switched between the voltage Va and the voltage Vb for each frame, which allows the signal value in each of the bits of the address signal to be inverted.

[0127] Well, if there is an abnormality in the reference pixel 307 This changes the level of the pixel signal emanating from that reference pixel. 307 It is not issued. Fig. Figure 9 represents an example where there is an abnormality in the reference pixel. 307 at column number 2 in the second row. The address signal for the second row has a signal value of "0000" in the odd-numbered frame. On the other hand, the address signal for the second row has a signal value of "1101" in the odd-numbered frame. A signal value D(2, 2) is not inverted in this way, so the presence of the abnormality in the reference pixel 307 can be recorded in column number 2 in the second row.

[0128] Another example of how the signal value of the address signal changes is described. Fig. Figure 10 schematically represents the signal value of the address signal according to the present exemplary embodiment. Fig. 10 represents the pixel signals of the reference pixels 307 This is shown as an example for 16 rows × 4 columns. However, the number of reference pixels is 307 not limited to that. Four reference pixels 307 are contained in a series. In other words, in the present exemplary embodiment, the address signal is expressed as a digital signal with 4 bits.

[0129] In the example that is in Fig. Figure 10 shows the signal value of the address signal formed by the pixel signals originating from the same reference pixels. 307The output will differ between the period during which the mapping is performed and a period other than this. Then the operation of reading the pixel signal from the reference pixel is performed. 307 performed before the pixel signal from each of the light-receiving pixels 305 and the OB pixel 306 is output, or before an image is rendered according to a frame. First, the output control circuit executes 304 The voltage Va corresponds to the signal value “0” at all reference pixels 307 to. In this state, the pixel signals of the reference pixels are 307 The data is read out. This read operation is referred to as the operation of reading a pre-image frame 1. Next, the output control circuit performs the following steps. 304 the voltage Vb corresponding to the signal value “1” to all reference pixels 307 to. In this state, the pixel signals of the reference pixels are 307The data is read out. This readout operation is referred to as the operation of reading a pre-image frame 2. If there is no abnormality in the reference pixel 307 There are all pixel signals that originate from the individual reference pixels. 307 The output will alternate between “0” and “1”.

[0130] Then, if there is an abnormality in the reference pixel 307 This changes the level of the pixel signal emanating from that reference pixel. 307 It is not issued. Fig. Figure 10 represents an example where there is an abnormality in the reference pixel. 307 at column number 2 in the second row. It can be noted that when the operation of reading pre-image frame 1 and the operation of reading pre-image frame 2 described above are performed, the signal value D(2, 2) is not inverted, as in Fig. 10 is shown. In other words, the presence of the abnormality in the reference pixel can be determined. 307 recorded in column number 2 in the second row.

[0131] Then, when the mapping is performed, the output control circuit selects 304 any of the voltage Va and the voltage Vb to assign these to the reference pixels 307 to supply in such a way that the address signal for each row has a signal value that is unique for the row to which the address signal belongs.

[0132] In this way, according to the imaging device of the present exemplary embodiment, an abnormality in the reference pixel can be detected. 307 through the in Fig. 9 or Fig. The 10 described procedures are recorded. Then, for example, it is possible to refrain from comparing the address signal and the expected value (i.e., not to compare it) (in contrast to step S204, which is described in Fig. 5 and Fig. 8 is shown), when the address signal, which is the pixel signal of the reference pixel 307 The signal exhibiting the abnormality is received. This processing can reduce the possibility of incorrectly determining that a fault has occurred in the imaging device. In other words, in the present exemplary embodiment, the output control circuit serves this purpose. 304 as the detection unit that is configured to detect an abnormality in the reference pixel.

[0133] A fifth exemplary embodiment describes an imaging system. Examples of the imaging system include a digital camera, a digital camcorder, a camera head, a photocopier, a fax machine, a mobile phone, a vehicle-mounted camera, and a surveillance satellite. Fig. Figure 11 presents a block diagram of the digital camera as an example of the imaging system.

[0134] In Fig. 11 serves as a cover 1001 to protect a lens. A lens 1002 enables an optical image of a subject to be projected onto an imaging device 1004 is formed. An aperture 1003 It serves to reduce the amount of light passing through the lens. 1002 The method of transmission varies. The imaging device described in one of the above-described individual exemplary embodiments is referred to as the imaging device. 1004 used.

[0135] A signal processing unit 1007 performs processing such as correction and data compression with respect to a pixel signal received from the imaging device 1004 is output to obtain an image signal. Then, in Fig. 11, provides a time control generation unit 1008 different types of timing signals to the imaging device 1004 and the signal processing unit 1007 out, and an overall control unit 1009 It controls the entire digital camera. A frame memory unit 1010 It is used for the temporary storage of image data. A recording medium control interface unit. 1011 It is used to record data to or read data from a recording medium. A detachable recording medium. 1012An interface unit, such as a semiconductor memory, serves to record or read image data from it. 1013 It is used to communicate with an external computer or similar device.

[0136] The imaging system must at least include the imaging device. 1004 and the signal processing unit 1007 exhibiting the pixel signal that is transmitted by the imaging device 1004 The output is processed. In this case, the other configuration is located outside the mapping system.

[0137] In the present exemplary embodiment, the signal processing unit determines 1007 , whether the pixel signal from the imaging device 1004 It is output normally. Therefore, the signal processing unit receives it. 1007 a multitude of address signals from the imaging device 1004The address signals output by the imaging device 1004 The output signals are similar to the address signals described in one of the individual exemplary embodiments described above. Furthermore, a method is described by which the signal processing unit 1007 an operation of the imaging device 1004 determined, similar to the procedure used in Fig. 5 or Fig. Figure 8 is shown and described in the description of this flowchart. In other words, the descriptions of the first to fourth exemplary embodiments are fully included in the present exemplary embodiment.

[0138] Furthermore, the signal processing unit can 1007 determine if there is an abnormality in the reference pixel 307 , which is in the imaging device 1004 It is included, based on the address signal. More precisely, as in Fig. As shown in Figure 5, the signal processing unit compares 1007 the signal values ​​of the three sub-signals contained in each of the address signals, and then determines the operation of the imaging device. 1004 based on the two or more sub-signals that have signal values ​​that are consistent with each other or with each other.

[0139] Alternatively, as in Fig. As shown in section 8, the signal processing unit corrects 1007 The address signal is determined using the verification signal contained in each of the address signals. Then the signal processing unit determines... 1007 the operation of the imaging device 1004 based on the sub-address signal contained in the address signal after correction. The sub-signal and the verification signal are similar to those described in the third exemplary embodiment.

[0140] The signal processing unit 1007 It does not necessarily have to detect that there is an abnormality in the pixel. For example, in the case where the imaging device is used according to the second exemplary embodiment, the signal processing unit detects 1007 not whether there is an abnormality in the pixel.

[0141] In the exemplary embodiment of the imaging system described above, the imaging device according to one of the first to fourth exemplary embodiments is referred to as the imaging device. 1004 used. According to such a configuration, a fault in the imaging device can occur. 1004 be recorded correctly.

[0142] In a sixth exemplary embodiment, a movable or moving object is described. The movable object according to this exemplary embodiment is a car equipped with a vehicle-mounted camera. Fig. 12A schematically represents an external appearance and a main internal configuration of an automobile. 100 The automobile 100 includes imaging devices 102 , an integrated circuit of an imaging system, in particular an application-specific integrated circuit (ASIC) 103 , a warning device 112 and a main control unit 113 .

[0143] Any one of the imaging devices described in the first to fourth exemplary embodiments described above shall be referred to as any of the imaging devices 102 used. The warning device 112It issues a warning to a driver when it receives a signal indicating an abnormality from a mapping system, vehicle sensors, control units, or similar. The main control unit 113 It comprehensively controls operations of the imaging system, vehicle sensors, control units, and similar components. The automobile 100 must the main control unit 113 not included. In this case, the imaging system, the vehicle sensors and the control units each include individual communication interfaces and each transmit and receive a control signal via a communication network (for example, the CAN standard).

[0144] Fig. 12B is a block diagram showing a system configuration of the automobile. 100 represents the automobile 100 comprises a first imaging device 102 , and a second imaging device102 In other words, the vehicle-mounted camera according to the present exemplary embodiment is a stereo camera. An image of a subject is projected onto each of the imaging devices. 102 through an optical unit 114 formed. The pixel signal, which is generated by each of the imaging devices. 102 The output is processed by an image preprocessing unit. 115 processed and then connected to the integrated circuit 103 of the imaging system. The image preprocessing unit 115 performs processing such as signal-to-noise ratio (SN) calculation and the addition of a synchronization signal.

[0145] The integrated circuit 103 The imaging system includes an image processing unit. 104 , a storage 105 , an optical distance measuring unit 106 , a parallax calculation unit 107 , an object recognition unit108 , an abnormality detection unit 109 and an external interface unit (I / F unit) 116 The image processing unit 104 The image processing unit processes the pixel signal to generate an image signal. Furthermore, it corrects... 104 the image signal and completes an abnormal pixel. The memory 105 It temporarily stores the image signal. Furthermore, the memory can 105 including the position of a known abnormal pixel in the imaging devices 102 Save. The optical distance measuring unit 106 focuses the imaging devices 102 The parallax calculation unit focuses on the subject or measures a distance to the subject using the image signal. 107 It performs subject adjustment (stereo adjustment) between parallax images. The object recognition unit 108It analyzes the image signal to identify the subject, such as a car, a person, a sign, or a road. The abnormality detection unit. 109 detects a fault or malfunction of any of the imaging devices 102 The abnormality detection unit 109 transmits a signal indicating that an abnormality has been detected to the main control unit 113 , when the fault or malfunction is detected. The external I / F unit 116 mediates the supply and reception of information between each of the units in the integrated circuit. 103 of the imaging system and, for example, the main control unit 113 or various control units.

[0146] The automobile 100 includes a vehicle information acquisition unit 110 and a driver assistance unit 111 The vehicle information acquisition unit110 includes vehicle sensors such as a speed / acceleration sensor, an angular velocity sensor, a steering angle sensor, a distance measuring radar and a pressure sensor.

[0147] The driver assistance unit 111 It includes a collision detection unit. The collision detection unit determines whether the automobile 100 can collide with an object, based on information from the optical distance measuring unit 106 , the parallax calculation unit 107 and / or the object recognition unit 108 The optical distance measuring unit 106 and the parallax calculation unit 107This is an example of a distance information acquisition unit that obtains distance information to a target. In other words, the distance information relates to information regarding parallax, defocus, distance to the target, and / or similar parameters. The collision detection unit can determine a collision possibility using any of these elements of the distance information. The distance information acquisition unit can be implemented by hardware specifically designed for this purpose or by a software module.

[0148] The present exemplary embodiment was described based on the example in which the driving assistance unit 111 the automobile 100 controls to prevent the automobile 100collides with another object, but can also refer to the control of an automatic driving system of the automobile. 100 , to follow another vehicle, a control system for an automatic driving system of the automobile 100 , to avoid the automobile 100 deviates from a lane, and similar measures can be applied.

[0149] The automobile 100 It also includes driving units to be used when the automobile 100 The automobile includes components such as an airbag, accelerator, brake, steering wheel, and transmission. Furthermore, the automobile comprises 100 Control units for these. The control units each control the corresponding drive unit based on the control signal from the main control unit. 113 .

[0150] In the present exemplary embodiment, the abnormality detection unit determines 109 the integrated circuit 103of the imaging system, whether the pixel signal from each of the imaging devices 102 The output is normal. Therefore, the abnormality detection unit receives... 109 a multitude of address signals from each of the imaging devices 102 are output. The address signals that are output by each of the imaging devices 102 The output signals are similar to the address signal described in one of the individual exemplary embodiments described above. Furthermore, a method is described by which the abnormality detection unit 109 one operation of each of the imaging devices 102 determined, similar to the procedure used in Fig. 5 or Fig. Figure 8 is shown and described in the description of this flowchart. In other words, the descriptions of the first to fourth exemplary embodiments are fully included in the present exemplary embodiment.

[0151] Furthermore, the abnormality detection unit can 109 determine whether it is in the reference pixel 307 , which is present in each of the imaging devices 102 It contains an abnormality based on the address signal. More precisely, as in Fig. Figure 5 shows the abnormality detection unit. 109 the signal values ​​from the three subpixels contained in each of the address signals, and then determines the operation of each of the imaging devices. 102 based on two or more sub-signals that have signal values ​​that match each other.

[0152] Alternatively, as in Fig.As shown in figure 8, the abnormality detection unit corrects 109 The address signal is determined using the verification signal contained in each of the address signals. Then the abnormality detection unit determines... 109 the operation of each of the imaging devices 102 based on the sub-address signal contained in the address signal after correction. The sub-signal and the verification signal are similar to those described in the third exemplary embodiment.

[0153] The abnormality detection unit 109 It does not necessarily have to detect whether there is an abnormality in the pixel. In the case, for example, where the imaging device is used according to the second exemplary embodiment, the abnormality detection unit detects 109It is not possible to determine whether there is an abnormality in the pixel. Furthermore, the detection of the error and the detection of the reference pixel are not possible. 307 , which exhibits the abnormality in the image preprocessing unit 115 and / or the image processing unit 104 be performed.

[0154] The imaging system used in the present exemplary embodiment can be applied not only to the automobile, but also to a movable or moving object (a movable or moving device) such as a ship, an aircraft, or an industrial robot. Furthermore, the imaging system used in the present exemplary embodiment can be applied not only to the moving object, but also to a device using object recognition, such as an intelligent transportation system (ITS).

[0155] In the manner described above, in the exemplary embodiment of the automobile, any one of the imaging devices according to the first to fourth exemplary embodiments is designated as any one of the imaging devices. 102 used. According to such a configuration, a fault in the imaging device can be correctly detected.

[0156] While the present invention has been described with reference to exemplary embodiments, it is understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be interpreted in the broadest possible way, so that all such modifications and equivalent structures and functions are included.

[0157] An imaging arrangement comprising: a plurality of pixels arranged in a matrix; and a signal processing arrangement. A first and a second row of the matrix each comprise a light-receiving pixel and a reference pixel, wherein the light-receiving pixels each receive incident light and output a light signal based on the incident light, and each reference pixel outputs a pixel signal for forming an address signal. The processing arrangement provides a first address signal and a second address signal, wherein: the first address signal specifies the position of the first row and has a signal value based on the pixel signal from the first row; and the second address signal specifies the position of the second row and has a signal value based on the pixel signal from the second row; and the signal value of the first address signal is different from the signal value of the second address signal. QUOTES INCLUDED IN THE DESCRIPTION

[0158] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0159] JP 2009-118427 [0002, 0024]

Claims

[1] Imaging device, with: a large number of pixels arranged in a matrix that includes at least a first row and a second row, wherein each of the first row and the second row contains a light-receiving pixel and a reference pixel, wherein the light-receiving pixel is configured to receive incident light and output a pixel signal based on the incident light, and the reference pixel is configured to output a pixel signal to form an address signal indicating a position of the row to which the reference pixel belongs, and where a signal value of the address signal output by the first row and a signal value of the address signal output by the second row are different from each other. [2] Imaging device according to claim 1, further comprising a detection unit configured to detect an abnormality in the reference pixel. [3] Imaging device according to claim 1 or 2, wherein each of the first row and the second row comprises a plurality of reference pixels, and wherein the address signal comprises at least three sub-signals having the same signal value. [4] Imaging device according to claim 1 or 2, wherein each of the first row and the second row comprises a plurality of reference pixels, and wherein the address signal comprises a verification signal based on a Hamming coding operation. [5] Imaging device according to any one of claims 1 to 4, wherein each of the first row and the second row outputs a plurality of address signals with signal values ​​that are different from each other. [6] Imaging device according to claim 5, wherein the reference pixel is configured to change the pixel signal output according to each frame of the imaging operation, such that the signal value of the address signal changes according to each frame of the imaging operation. [7] Imaging device according to claim 5, wherein the signal value of the address signal within a first period during which the pixel signal is read from the light receiving pixel is different from the signal value of the address signal within a second period which is different from the first period. [8] Imaging device according to any one of claims 1 to 7, wherein the reference pixel is configured to output a plurality of pixel signals having different voltages. [9] Imaging device according to any one of claims 1 to 8, further comprising a control line connected to both of the light receiving pixel and the reference pixel positioned in the first row. [10] Imaging device according to any one of claims 1 to 9, further comprising a light-blocking film which is configured to cover the reference pixel and expose the light-receiving pixels with respect to incident light. [11] Imaging device according to one of the preceding claims, wherein the reference pixel in the first row is configured to provide the pixel signal in parallel with the pixel signal from the light receiving pixel in the first row, and the reference pixel in the second row is configured to provide the pixel signal in parallel with the pixel signal from the light receiving pixel in the second row. [12] Imaging device according to one of the preceding claims, wherein the reference pixel is configured to output a plurality of different pixel signals at different levels, and the imaging device comprises a control unit configured to provide a control signal to the reference pixel for controlling the level of the pixel signal. [13] Imaging device according to one of the preceding claims, if dependent on claims 2 and 3, wherein the detection unit of the device is configured to: to compare the signal values ​​in the three sub-signals of the address signal; and to determine if there is an abnormal reference pixel based on one of the sub-signals that is different from the other sub-signals. [14] Imaging device according to one of the preceding claims, depending on claims 2 and 4, wherein the detection unit of the device is configured to determine whether there is an abnormal reference pixel, based on the verification signal. [15] Imaging device according to claim 14, wherein the detection unit of the device is configured to correct the signal values ​​of the first address signal based on the verification signal. [16] Imaging device, with: a large number of pixels arranged in a matrix that includes at least a first column and a second column, wherein each of the first column and the second column contains a light-receiving pixel and a reference pixel, wherein the light-receiving pixel is configured to receive incident light and output a pixel signal based on the incident light, and the reference pixel is configured to output a pixel signal to form an address signal indicating a position of the column to which the reference pixel belongs, and where a signal value of the address signal output from the first column and a signal value of the address signal output from the second column are different from each other. [17] Imaging device according to claim 16, further comprising a detection unit configured to detect an abnormality in the reference pixel based on the address signal. [18] Imaging device according to claim 16 or 17, wherein each of the first column and the second column outputs a plurality of address signals with signal values ​​that are different from each other. [19] Imaging device according to any one of claims 16 to 18, wherein the reference pixel is configured to output a plurality of pixel signals with different voltages. [20] Imaging device, with: a multitude of pixels, which include at least: a first light-receiving pixel and a second light-receiving pixel, each light-receiving pixel being configured to receive incident light and output a pixel signal based on the incident light; a first reference pixel configured to provide a pixel signal in parallel with the pixel signal from the first light-receiving pixel; and a second reference pixel configured to provide a pixel signal in parallel with the pixel signal from the second light-receiving pixel; and an output control circuit configured to control a level of the pixel signal from each of the first reference pixel and the second reference pixel, such that the pixel signal provided by the first reference pixel and the pixel signal provided by the second reference pixel have different levels. [21] Imaging device according to claim 20, wherein the plurality of pixels comprises: a plurality of first reference pixels, each of the first reference pixels being configured to provide a corresponding pixel signal in parallel with the pixel signal from the first light-receiving pixel, and a plurality of second reference pixels, each of the second reference pixels being configured to provide a corresponding pixel signal in parallel with the pixel signal from the second light-receiving pixel. [22] Imaging device according to claim 21, wherein the first reference pixels are each configured to provide a pixel signal at a high level or a pixel signal at a low level, and wherein the plurality of pixel signals provided by the plurality of first reference pixels form a plurality of signals having the same value as specified by the same combination of the pixel signal at a high level and the pixel signal at a low level. [23] Imaging device according to one of claims 20 to 22, wherein the first light-receiving pixel and the first reference pixel are connected to a first control line, and wherein the second light-receiving pixel and the second reference pixel are connected to a second control line which is electrically separated from the first control line. [24] Imaging device according to any one of claims 20 to 23, wherein each of the first reference pixel and the second reference pixel is configured to provide a plurality of pixel signals at different levels to each other. [25] Imaging device according to any one of claims 20 to 24, further comprising a detection unit configured to detect an abnormality in the reference pixel. [26] Imaging device according to one of claims 20 to 25, further comprising a light-blocking film which is configured to cover the reference pixels and expose the light-receiving pixels with respect to incident light. [27] Imaging system, with: the imaging device according to any one of claims 1 to 26; and a processing device configured to process the pixel signal output by the light receiving pixel of the imaging device and to provide an image signal based on the pixel signal. [28] Movable object, with: the imaging device according to any one of claims 1 to 26; a processing device configured to perform processing with respect to the pixel signal output by the light-receiving pixel of the imaging device; and a control unit configured to control the moving object based on a result of the processing. [29] Imaging system, with: a signal processing unit configured to process a pixel signal output by a light-receiving pixel of the imaging device and to provide an image signal based on the pixel signal, wherein the signal processing unit receives a plurality of address signals output by the imaging device, wherein the plurality of address signals have different signal values, and wherein the signal processing unit determines whether the pixel signal of the light receiving pixel is output normally by the imaging device, based on the plurality of address signals. [30] Imaging system according to claim 29, wherein each of the address signals comprises at least three sub-signals having the same signal value, and wherein, for at least one address signal, the signal processing unit compares the signal values ​​in the at least three sub-signals and determines whether the pixel signal of the light receiving pixel is output normally by the imaging device, based on two or more of the sub-signals having the same signal value. [31] Imaging system according to claim 29, wherein each of the address signals comprises a verification signal based on a Hamming coding operation, and wherein the signal processing unit is configured to correct at least one of the address signals based on the verification signal. [32] Imaging system according to any one of claims 29 to 31, further comprising a control unit configured to stop an operation of the imaging device when the signal processing unit determines that the pixel signal from the light receiving pixel is not output normally by the imaging device. [33] Movable object, with: an imaging system according to any one of claims 29 to 32; and a control unit configured to control the moving object based on the image signal. [34] Movable object according to claim 33, further comprising a warning device configured to issue a warning indicating that there is an abnormality in an operation of the imaging device when the signal processing unit determines that the pixel signal from the light receiving pixel is not being output normally by the imaging device. [35] Method for determining an abnormality in an imaging arrangement, wherein the imaging arrangement comprises a matrix of pixels, and a row of the matrix comprises a plurality of reference pixels, each configured to provide pixel signals at different levels, wherein the method comprises: Setting different sets of reference pixels to provide the same set of pixel signals; Generating an address signal that has at least three sub-signals, each sub-signal having a signal value based on the set of pixel signals from a different set of reference pixels; Comparing the signal values ​​in the three sub-signals; and Determine if there is an abnormal reference pixel in the row of the matrix, based on one of the subsignals that is different from the other subsignals. [36] Method according to claim 35, comprising: Determining the most common signal value in the address signal; Generating a new address signal with the most common signal value; Comparing the new address signal with an expected value of the address signal; Determine that the mapping device is operating abnormally if the new address signal differs from the expected value of the address signal. [37] Method for determining an abnormality in an imaging arrangement, wherein the imaging arrangement comprises a matrix of pixels, and a row of the matrix comprises a plurality of reference pixels, each configured to output pixel signals at different levels, wherein the method comprises: Generating an address signal that includes a verification signal, based on the signal values ​​in a set of reference pixels; Determine if there is an abnormal reference pixel in the set of reference pixels, based on the verification signal.

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