Method for producing an optoelectronic component and optoelectronic component

Abstract

Method for producing an optoelectronic component (100) comprising the steps: A) Providing a semiconductor layer sequence (1) on a carrier (7), wherein the semiconductor layer sequence (1) is configured for radiation emission, wherein the semiconductor layer sequence (1) has at least one n-doped semiconductor layer (11), at least one p-doped semiconductor layer (12) and an active layer (13) arranged between the n- and p-doped semiconductor layers (11, 12), B) applying a contact layer (3) directly onto the semiconductor layer sequence (1) which prevents or reduces the diffusion of the material of a mirror layer (4), the contact layer (3) having a maximum layer thickness of 10 nm, C) Applying the mirror layer (4) directly onto the contact layer (3) and D) Applying a barrier layer (5) directly onto the mirror layer (4), wherein - the contact layer (3) is formed from zinc or zinc oxide, - the mirror layer (4) is formed from silver, wherein the contact layer (3) serves as a growth layer for the mirror layer (4) and thus influences the grain size distribution and orientation of the silver mirror layer (4), and the contact layer (3) and the barrier layer (5) have different material compositions, wherein a conductive metal nitride is used for the formation of the barrier layer (5).

Description

[0001] The invention relates to methods for producing an optoelectronic component. Furthermore, the invention relates to an optoelectronic component.

[0002] Optoelectronic components, especially indium gallium nitride-based light-emitting diodes (LEDs), preferably have silver on the p-side of the epitaxial layer, which acts as both a contact and a mirror. The structure of the deposited layer determines the contact resistance and the brightness of the LED, and thus directly influences its efficiency. In addition to the deposition process, an annealing step can lead to changes in the structure of the mirror material and to diffusion processes of underlying materials, which change both the contact resistance and reflectivity to a limited extent.

[0003] DE 20 2010 017 388 U1 relates to a method for producing an optoelectronic component, in which a semiconductor structure with semiconductor layers (e.g. n- and p-doped) and an active layer is applied to a substrate, wherein a current blocking layer, a contact layer, a reflection layer and an adhesion layer are applied to the semiconductor structure for the local electrical contacting of the semiconductor layer facing away from the substrate.

[0004] US 2013 / 0 146 910 A1 relates to an LED with a semiconductor layer sequence, comprising a front light exit surface, a rear mirror layer and a functional layer for reducing corrosion and / or for improving the adhesion of the mirror layer, wherein the material composition of the functional layer has a gradient for increasing the service life of the LED.

[0005] One object of the invention is to provide methods for producing a respective optoelectronic component that has a homogeneous luminous image and / or a good forward voltage. In particular, the resulting optoelectronic component has good brightness.

[0006] This object is or these objects are achieved by a method for producing an optoelectronic component according to claim 1 and by an optoelectronic component according to claim 10. Advantageous embodiments and further developments of the invention are the subject of the dependent claims.

[0007] The method for producing an optoelectronic component comprises steps A) to D), in particular in the order given here: A) Providing a semiconductor layer sequence, B) Applying a contact layer directly onto the semiconductor layer sequence, which prevents or reduces the diffusion of the material of a mirror layer, the contact layer having a maximum layer thickness of 10 nm, C) Applying the mirror layer directly onto the contact layer, and D) Applying a barrier layer directly onto the mirror layer.

[0008] The semiconductor layer sequence is arranged on a carrier.

[0009] The semiconductor layer sequence is configured for radiation emission. The semiconductor layer sequence comprises at least one n-doped semiconductor layer, at least one p-doped semiconductor layer, and an active layer arranged between the n- and p-doped semiconductor layers.

[0010] The contact layer is formed from zinc or zinc oxide. The mirror layer is formed from silver, with the contact layer serving as an accretion layer for the mirror layer and thus influencing the grain size distribution and orientation of the silver mirror layer. The contact layer and the barrier layer have different material compositions, with a conductive metal nitride used to form the barrier layer.

[0011] In addition to preventing or reducing the diffusion of the material of a mirror layer, the contact layer can influence the growth behavior and crystal orientation of further layers and change the composition of the species involved in the contact.

[0012] The method comprises a step A), providing a semiconductor layer sequence. The semiconductor layer sequence is arranged on a carrier. The semiconductor layer sequence comprises at least one n-doped semiconductor layer, at least one p-doped semiconductor layer, and an active layer arranged between the n- and p-doped semiconductor layers. The semiconductor layer sequence is preferably based on a III-V compound semiconductor material. "Based on a III-V compound semiconductor material" in the present context means that the semiconductor layer sequence or at least one layer thereof comprises a III-nitride compound semiconductor material, preferably In x Al y Ga 1-x-yN, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1 and x + y ≤ 1. This material does not necessarily have to have a mathematically exact composition according to the above formula. Rather, it can contain one or more dopants as well as additional components that determine the characteristic physical properties of the In x Al y Ga 1-x-y N material does not change significantly. For simplicity, however, the above formula only includes the essential components of the crystal lattice (In, Al, Ga, N), even if these may be partially replaced by small amounts of other substances.

[0013] The semiconductor layer sequence includes an active layer with at least one pn junction and / or one or more quantum well structures. During operation of the component, electromagnetic radiation is generated in the active layer. The wavelength of the radiation is preferably in the ultraviolet and / or visible range, in particular at wavelengths between 420 nm and 680 nm, for example, between 440 nm and 480 nm.

[0014] According to at least one embodiment, the optoelectronic component is a light-emitting diode, or LED for short. The component is then preferably configured to emit ultraviolet, blue, yellow, green, red, orange, or white light.

[0015] According to at least one embodiment, the optoelectronic component comprises a carrier. A sapphire carrier can serve as the carrier, for example. Alternatively, the carrier can comprise silicon, silicon carbide, aluminum nitride, or gallium nitride, for example.

[0016] The carrier can be removed again in a subsequent process step. Preferably, the carrier is removed and a substrate, formed, for example, from silicon, is integrated into the optoelectronic component. The substrate is preferably arranged on the side of the semiconductor layer sequence opposite the carrier.

[0017] The method comprises a step B), applying a contact layer. The contact layer is applied directly to the semiconductor layer sequence. Preferably, the contact layer is applied directly to the p-doped semiconductor layer. "Directly" here and below refers to a direct arrangement of the contact layer on the semiconductor layer sequence, preferably on the p-doped semiconductor layer sequence. This means, in particular, that no further layers or elements are arranged between the semiconductor layer sequence and the contact layer.

[0018] According to at least one embodiment, the contact layer is applied directly to the entire surface of the semiconductor layer sequence. The contact layer leads to a modified growth of subsequent layers, which are preferably arranged on the contact layer. In this case, the contact layer changes, for example, the preferred crystal orientation and also influences the species involved in the contact and their composition.

[0019] According to at least one embodiment, the contact layer has a maximum layer thickness of 10 nm, 9 nm, 8 nm, 7 nm, 6 nm, 5 nm, 4 nm, 3 nm, 2 nm, 1 nm, 0.5 nm, 0.1 nm, 0.05 nm, or 0.01 nm. In addition, the minimum layer thickness can be at least 0.001 nm. The specified layer thickness refers, particularly for layer thicknesses of less than 0.1 nm, to an average thickness over the entire surface.

[0020] The method comprises step C), applying a mirror layer directly to the contact layer. The mirror layer can preferably be applied over the entire surface or in a structured manner. Alternatively, the mirror layer can also be applied over the entire surface and then structured. The same applies to the contact layer.

[0021] The method comprises a step D), applying a barrier layer directly onto the mirror layer. Preferably, the component comprises an arrangement of the contact layer, the directly downstream mirror layer, and the directly downstream barrier layer, arranged in a direction away from the carrier.

[0022] Preferably, the contact layer, the mirror layer and the barrier layer are arranged in a structured manner on the semiconductor layer sequence.

[0023] The contact layer and barrier layer have different materials or different material compositions.

[0024] The contact layer is formed from zinc or zinc oxide.

[0025] A conductive metal nitride is used to form the barrier layer.

[0026] According to at least one embodiment, the layer thickness of the contact layer is smaller than the layer thickness of the barrier layer.

[0027] According to at least one embodiment, the layer thickness of the contact layer is at least 1 / 20 smaller than the layer thickness of the barrier layer.

[0028] According to at least one embodiment, the layer thickness of the contact layer is between 0.05 nm and 3 nm, for example 2 nm or 2.5 nm.

[0029] According to at least one embodiment, the contact layer is formed as a monolayer or a full-surface monolayer. Here and below, "monolayer" means that the layer thickness of the contact layer is in the monolayer range. For example, the layer thickness of the monolayer is between 0.5 nm and 3 nm. In other words, "monolayer" means that the layer thickness is only one atom or one molecule.

[0030] Alternatively or additionally, the monolayer may contain gaps or islands, so that the monolayer does not form a continuous layer. This is particularly the case for small layer thicknesses d < D(atom).

[0031] "Full-surface" can mean that the monolayer is formed as a homogeneous layer without any interruptions. However, this does not preclude the possibility that the full-surface monolayer may be structured. In particular, the structured areas of the monolayer are then each formed as a homogeneous layer.

[0032] According to at least one embodiment, the contact layer is formed in a structured manner and applied directly to the p-doped semiconductor layer. The mirror layer can be arranged directly downstream of the contact layer. The mirror layer, in particular, has the same structure as the contact layer.

[0033] The mirror layer comprises a reflective material. In particular, the reflectance of the mirror layer is greater than 90%, in particular greater than 95%, preferably greater than 99%.

[0034] According to at least one embodiment, the semiconductor layer sequence comprises indium gallium nitride or gallium nitride or a combination thereof.

[0035] According to at least one embodiment, the mirror element simultaneously forms the p-connection contact for contacting the p-doped semiconductor layer and / or an element for mirroring or reflection.

[0036] According to at least one embodiment, the contact layer is produced by sputtering.

[0037] Before the silver mirror layer is deposited, the contact layer, made of zinc or zinc oxide, is deposited on the semiconductor layer sequence, which is typically made of gallium nitride. The contact layer has a maximum thickness of 10 nm, preferably between 0.05 nm and 3 nm. This allows the precise contact to be deposited in a controlled manner, just as can be achieved through diffusion processes. The direct deposition of the actual contact materials allows contact formation to be decoupled from difficult-to-control conditions, such as grain size and defect distribution within the mirror element. This process flow not only allows for more precise specification of the contact composition, but also for more targeted definition of the bonding conditions at the contact. Both of these allow for more precise control of the contact resistance.

[0038] Secondly, this approach allows for a greater decoupling of contact definition from subsequent processes and layers. These can then be better tailored to the respective requirements. For example, when depositing the silver for the mirror layer, the process can be optimized primarily with regard to reflectivity and density without negatively affecting the p-type contact. This allows forward voltage and reflectivity to be varied independently of each other in a controlled manner.

[0039] In addition, the zinc oxide previously used as a barrier layer will be replaced with more suitable materials that more reliably prevent the diffusion of silver toward the subsequent metallization and better protect the actual contact layer from subsequent process steps. A conductive metal nitride with the general composition MxNy (M = metal) with 0 < x < 1 and 0 < y < 1 will be used as a replacement material for zinc oxide. The following materials can be used: TaN, TiN.

[0040] This minimizes the complex interactions of the process chain. The contact layer, which is formed from zinc or zinc oxide, serves as a growth layer for the subsequent mirror layer and influences its properties, such as grain size distribution and orientation, and can be used as additional parameters for optimizing the mirror layer. During the deposition of the contact layer and / or barrier layer, the deposition process of the sensitive p-doped semiconductor layer, particularly gallium nitride, is particularly stress-free, as it is caused, for example, by high-energy ions.

[0041] According to at least one embodiment, evaporation or sputtering processes can be used as the deposition method.

[0042] The invention further relates to an optoelectronic component which can be produced by the method described above.

[0043] Further advantages, advantageous embodiments and further developments emerge from the exemplary embodiments described below in conjunction with the figures.

[0044] They show: The Fig. 1A to 1D show a method for producing an optoelectronic component according to an embodiment, the Fig. 2A to 2Z show a method for producing an optoelectronic component according to a further embodiment.

[0045] In the exemplary embodiments and the figures, identical, similar, or equivalent elements may be provided with the same reference numerals. The illustrated elements and their relative sizes are not to be considered to scale. Rather, individual elements, such as layers, components, structural elements, and regions, may be exaggerated for clarity and / or clarity.

[0046] The Fig. 1A to 1D show a method for manufacturing an optoelectronic component 100 according to an embodiment.

[0047] According to the Fig. 1A, a carrier 7 is provided. The carrier 7 may be made of sapphire, for example.

[0048] A semiconductor layer sequence 1 is applied to the carrier 7. The semiconductor layer sequence 1 is configured for radiation emission. The semiconductor layer sequence preferably emits radiation in the IR, UV, and / or visible wavelength range. The semiconductor layer sequence 1 comprises at least one n-doped semiconductor layer 11, at least one p-doped semiconductor layer 12, and an active layer 13 arranged between the p- and n-doped semiconductor layers 11, 12.

[0049] According to the Fig. 1B, a contact layer 3 can be applied to the semiconductor layer sequence 1. In particular, the contact layer 3 is applied directly to the semiconductor layer sequence 1. In particular, the contact layer is applied in a structured manner. This structuring can be achieved by applying the contact layer 3 over the entire surface of the semiconductor layer sequence 1 and subsequent structuring, for example, by etching, a photoresist mask, or wet-chemical lift-off.

[0050] The contact layer 3 prevents or reduces the diffusion of the material of a mirror layer 4, which according to the Fig. 1C is preferably applied directly to the contact layer 3. The contact layer 3 is formed from zinc oxide. The mirror layer 4 is formed from silver.

[0051] Alternatively or additionally, instead of preventing or reducing the diffusion of the material of a mirror layer, the contact layer can influence the growth behavior and the crystal orientation of further layers and, on the other hand, change the composition of the species involved in the contact.

[0052] In a subsequent process step, as in Fig. As shown in Figure 1D, a barrier layer 5 is applied directly to the mirror layer 4. The contact layer and the barrier layer comprise different materials. For example, the contact layer is formed from zinc oxide and the barrier layer from metal nitride. The contact layer 3, the mirror layer 4, and the barrier layer 5 form a first mirror element 9.

[0053] The Fig. 2A to 2Z show a method for producing an optoelectronic component. The inventive methods for p-contact deposition, for example the method of Fig. 1A to 1D. Alternatively, the inventive p-contact deposition processes can also be integrated into other process flows, such as a thin-film technology process.

[0054] The Fig. 2A shows the provision of a carrier 7 on which an n-doped semiconductor layer 11, an active layer 13 (not shown here) and a p-doped semiconductor layer 12 are applied.

[0055] Subsequently, a photostructuring can be carried out with a first mask 19, as in the Fig. 2B shown.

[0056] Afterwards, as in the Fig. 2C, a first mirror element 9 can be applied in areas that are not covered by the first mask 19 on the p-doped semiconductor layer 12. The first mirror element 9 can be applied, for example, using the method according to the Fig. 1B to 1D are generated.

[0057] In the subsequent process step, as in Fig. 2D, the first mask 19 can be removed by means of a lift-off process, such as resist stripping or wet chemical lift-off.

[0058] Afterwards, as in Fig. 2E, a second photomask 23 may be applied. The second photomask 23 may be used to produce the first metallization 401 (p-metallization).

[0059] The Fig. Figure 2F shows the application of the first metallization 401, which may include platinum, gold, and titanium. The first metallization 401 is applied between the second mask 23 and the first mirror element 9.

[0060] In the subsequent process step, as in Fig. 2G, the second mask 23 can be removed by means of lift-off processes such as resist stripping and wet chemical lift-off.

[0061] Afterwards, as in Fig. As shown in Figure 2H, a first insulation layer 2 is applied over the entire surface of the p-doped semiconductor layer 12. The first insulation layer 2 here typically corresponds to a double layer consisting of two insulation materials, such as silicon oxide and silicon nitride.

[0062] Then, as in Fig. As shown in Figure 2I, a next photostructuring step can be performed. For this purpose, a third mask 25 can be applied.

[0063] Afterwards, as in Fig. 2J, the areas not covered by the third photomask 25 are removed. Therefore, the p-doped semiconductor layer 12 and the n-doped semiconductor layer 11 are exposed by plasma etching.

[0064] Subsequently, the third mask 25 can be removed by means of a lift-off process, such as resist stripping or wet chemical lift-off (see Fig. 2K).

[0065] Afterwards, as in Fig. 2L, a second insulation layer 301 can be applied over the entire surface. The second insulation layer 301 can be multilayered and consist of three layer sequences, each layer of silicon nitride and silicon oxide.

[0066] In Fig. Figure 2M shows that a further photo-structuring step can be performed. For this purpose, a fourth photomask 27 can be applied. This serves to create the second mirror element 10 for the n-doped semiconductor layer 11.

[0067] The Fig. 2N shows the structuring step by etching and the Fig. 2O the application of the second mirror element 10 in the previously structured areas.

[0068] The second mirror element 10 may typically be formed from zinc oxide and silver.

[0069] Afterwards, as in Fig. 2P, the fourth mask 27 is removed again.

[0070] Afterwards, as in Fig. 2Q, a further photostructuring step can be carried out using a fifth mask 31. The structuring serves to apply a so-called combo mirror 32 (see Fig. 2R and Fig. 2S). The combo mirror 32 can be made of TiAgPtTi, for example. The combo mirror 32 is applied to the second mirror element 10 in the previously structured areas.

[0071] Then the fifth mask can be applied as shown in Fig. 2S. Removal can be achieved using lift-off techniques such as resist stripping or wet chemical lift-off.

[0072] In a subsequent process step, as in Fig. As shown in Figure 2T, the third metallization 60 can be applied over the entire surface to contact the n-doped semiconductor layer 11. The third metallization 60 can comprise titanium, platinum, gold, and nickel.

[0073] Subsequently, the contact metallization 16 can be applied as shown in Fig. 2U. The contact metallization may consist of a layered structure comprising, for example, a first layer of titanium, nickel, tin, and gold, a second layer of titanium, tungsten, and nickel, a third layer of gold, and a fourth layer of platinum.

[0074] The component may comprise a substrate 8 as shown in Fig. 2U. The substrate 8 may be formed of silicon.

[0075] The Fig. 2V differs from the Fig. 2U through their spatial orientation.

[0076] Afterwards, as in Fig. 2W, the carrier 7 must be removed.

[0077] Afterwards, as also in Fig. 2W, a knife trench 15 is introduced within the n-doped semiconductor layer 11.

[0078] The Fig. 2X shows the roughening 17 of the n-doped semiconductor layer 11 and the application of a passivation layer 18. The passivation layer 18 can be opened again (see Fig. 2Y). A contact pad 30 (pad metallization) can be inserted into this opening 29 (see Fig. 2Z).

[0079] The result is a component that is also known as the UX3 chip. List of reference symbols 100 optoelectronic components 1 Semiconductor layer sequence 2 first insulation layer 3 Contact layer 4 mirror layer 5 Barrier layer 6 Diffusion 7 carriers 8 Substrat 9 first mirror element 10 second mirror element 11 n-doped semiconductor layer 12 p-doped semiconductor layer 13 active layer 15 Trench or Mesa Trench 16 Contact metallization 17 Roughening 18 Passivation layer 19 first mask 20 Dielectric 23 second mask 25 third mask 27 fourth mask 29 Structuring / Opening 30 pad metallization 31 fifth mask 32 combo mirrors 60 third metallization 301 second insulation layer 401 first metallization (p-metallization)

Claims

[1] Method for producing an optoelectronic component (100) comprising the steps: A) Providing a semiconductor layer sequence (1) on a carrier (7), wherein the semiconductor layer sequence (1) is configured for radiation emission, wherein the semiconductor layer sequence (1) has at least one n-doped semiconductor layer (11), at least one p-doped semiconductor layer (12) and an active layer (13) arranged between the n- and p-doped semiconductor layers (11, 12), B) applying a contact layer (3) directly onto the semiconductor layer sequence (1) which prevents or reduces the diffusion of the material of a mirror layer (4), the contact layer (3) having a maximum layer thickness of 10 nm, C) Applying the mirror layer (4) directly onto the contact layer (3) and D) Applying a barrier layer (5) directly onto the mirror layer (4), wherein - the contact layer (3) is formed from zinc or zinc oxide, - the mirror layer (4) is formed from silver, wherein the contact layer (3) serves as a growth layer for the mirror layer (4) and thus influences the grain size distribution and orientation of the silver mirror layer (4), and the contact layer (3) and the barrier layer (5) have different material compositions, wherein a conductive metal nitride is used for the formation of the barrier layer (5). [2] Method according to one of the preceding claims, wherein the layer thickness of the contact layer (3) is smaller than the layer thickness of the barrier layer (5). [3] Method according to one of the preceding claims, wherein the layer thickness of the contact layer (3) is at least 1 / 20 smaller than the layer thickness of the barrier layer (5). [4] Method according to one of the preceding claims, wherein the layer thickness of the contact layer (3) is between 0.05 nm and 3 nm. [5] Method according to one of the preceding claims, wherein the contact layer (3) is formed as a full-surface monolayer. [6] Method according to one of the preceding claims 1 to 4, wherein the contact layer (3) is produced by sputtering. [7] Method according to one of the preceding claims, wherein the contact layer (3) is formed in a structured manner and is applied directly to the p-doped semiconductor layer (12), wherein the mirror layer (4) is arranged directly downstream of the contact layer (3) and the mirror layer (4) has the same structuring as the contact layer (3). [8] Method according to one of the preceding claims, wherein the semiconductor layer sequence (1) comprises indium gallium nitride or gallium nitride. [9] Method according to one of the preceding claims, wherein the mirror element (4) simultaneously forms the p-connection contact for contacting the p-doped semiconductor layer (12). [10] Optoelectronic component (100) obtainable from a method according to one of claims 1 to 9.

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