Circuit with thermal protection, corresponding device and method

DE102017130197B4Active Publication Date: 2026-07-09STMICROELECTRONICS SRL

Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
STMICROELECTRONICS SRL
Filing Date
2017-12-15
Publication Date
2026-07-09

AI Technical Summary

Technical Problem

Existing thermal protection systems for semiconductor devices, particularly embedded CPUs, fail to effectively prevent damage from sudden temperature rises due to high power dissipation from other junctions, leading to potential device corruption and shutdown.

Method used

A thermal shield concept with adjustable thermal sensors and cluster-based heat source management, allowing selective shutdown of heat sources based on priority lists and temperature thresholds to protect sensitive units like CPUs.

Benefits of technology

Effectively maintains CPU operation by selectively shutting down heat sources, preventing damage while ensuring continuous functionality and reducing unnecessary shutdowns.

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Abstract

Circuit (100) comprising: - a plurality of heat-generating units (HB1, HB2), - a heat-sensitive unit (10) exposed to heat generated by the heat-generating units (HB1, HB2), - a distribution of temperature sensors (12) along a boundary line (120) between the heat-sensitive unit (10) and the heat-generating units (HB1, HB2), wherein the sensors (12) generate at least one overtemperature signal as a function of the temperature detected at the boundary line (120), wherein the plurality of the heat-generating units comprise clusters (Th_CL1, ..., Th_CL6) of heat-generating units (HB1, HB2), wherein the clusters (Th_CL1, ..., Th_CL6) in at least one ordered sequence (W, W') of respective deactivation weights as a result of which the at least one overtemperature signal is generated by the sensors (12), a plurality of electrical contact pins (16) arranged in clusters corresponding to the clusters (Th_CL1, ..., Th_CL6) of the heat-generating units (HB1, HB2) and which are switchable between an activation state and a deactivation state to activate and deactivate the heat-generating units (HB1, HB2) coupled thereto.
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Description

[0001] The description relates to the thermal protection of electronic devices.

[0002] One or more embodiments may find application in thermal protection of semiconductor devices, e.g., for automotive applications.

[0003] Thermal shutdown protection can make it easier to prevent damage to semiconductor devices, e.g., in the junction region, due to prolonged operation at high temperatures. For example, reliable and continuous operation of integrated circuits can be facilitated by junction temperatures in a chip not exceeding values ​​of, for example, 150°C.

[0004] A semiconductor device may have integrated thermal shutdown sensors capable of sensing the chip temperature and automatically shutting off power, for example until the chip temperature returns to a level deemed safe.

[0005] Certain devices that contain sensitive circuitry (e.g., microcontrollers or logic circuitry that control units in a chip, such as driver, core, oscillator, or memory units, and the like) may experience a thermal shutdown and stop operation before For example, a core is in a position to detect an event leading to high temperature heat dissipation. The sensitive circuit can also be exposed to (very) high temperatures in an undesired manner.

[0006] In certain applications, such a unit as a CPU may be housed in a separate package or case, so heat dissipation is unlikely to affect processor performance. However, e.g. an embedded CPU can be shut down (and possibly damaged) as a result of high power dissipation from other (e.g. internal) outputs. Device logic can be corrupted by preventing a control unit, such as a microcontroller, from reaching a safe state due to it being "off".

[0007] The document US 2015 / 0208557 A1 discloses a method for switching off a subset of power stages independently. Such an arrangement includes thermal sensors that are associated with functional groups or “clusters” and have the ability to avoid complete shutdown of the device by keeping active (only) those functions that are not affected by a thermal event.

[0008] Although such an arrangement achieves an operationally satisfactory level, it is believed that such an arrangement can be further improved, e.g. by avoiding an embedded CPU being damaged as a result of a temperature rise due to high power dissipation through other junctions (e.g. device outputs) in same chip can be undesirably damaged.

[0009] A goal of one or more embodiments is to contribute to providing such an improvement.

[0010] According to one or more embodiments, this aim is achieved by a circuit having the characteristics recited in the subsequent claims.

[0011] One or more embodiments may relate to a corresponding method and a corresponding semiconductor device.

[0012] The claims form an integral part of the disclosure of the invention as described herein.

[0013] One or more embodiments may implement some sort of "thermal shield concept" in a set of thermally weighted clusters.

[0014] One or more embodiments may facilitate protecting a given device and / or circuit (e.g., a microcontroller, an oscillator, or the like) from a sudden temperature rise.

[0015] One or more embodiments may provide a tailored solution for multi-system chips (e.g., power down priorities may be assigned depending on applications).

[0016] One or more embodiments may facilitate achieving a reasonable compromise between various functionalities and CPU security.

[0017] In one or more embodiments, at a design stage, the number of thermal sensors included in a shield assembly may either be reduced (thereby saving die area) or increased (thereby improving spatial "granularity").

[0018] One or more embodiments can provide an effective thermal security solution, e.g., for multi-system chips including CPUs.

[0019] One or more embodiments may facilitate achieving satisfactory levels of performance along with thermal safety in intelligent power devices including CPUs.

[0020] A possible adoption of one or more embodiments can be determined, for example, by checking whether the outputs from a particular circuit / device are grouped into different clusters, by forcing a temperature rise on different outputs, by e.g. causing an overload on different channels and the resulting thermal protection behavior is monitored.

[0021] One or more embodiments are described below, by way of example only, with reference to the accompanying drawings; show in it: - figure 1 shows a schematic representation of a semiconductor device arrangement; - figure 2 to figure 4 exemplary representations of a possible behavior of an arrangement as shown in figure 1 is shown as an example; - figure 5 is an exemplary diagram of possible management of thermal events in one or more embodiments; - figure 6 shows an exemplary representation of a semiconductor device according to embodiments; - figure 7 is an exemplary diagram of possible management of thermal events in one or more embodiments; and - figure 8 is an exemplary flow chart of a possible operation of one or more embodiments.

[0022] In the following description, one or more specific details are set forth in order to provide a thorough understanding of example embodiments of the present description. The embodiments may also be achieved without one or more of the specific details, or by using other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not described or illustrated in detail so as not to obscure certain aspects of embodiments.

[0023] Reference throughout this specification to “one embodiment” is intended to mean that a particular configuration, structure, or characteristic described with respect to the embodiment is present in at least one embodiment. Therefore, such phrases as "in one embodiment," which may appear in one or more places throughout this specification, may not necessarily refer to the same embodiment. In addition, particular configurations, structures, or characteristics may be combined in any appropriate manner in one or more embodiments.

[0024] The references used in the present description are for explanation only and thus do not serve to define the scope or scope of the embodiments.

[0025] figure 1 shows a general exemplary representation of the possible general design of a semiconductor device 100 , in which different (e.g. two) temperature ranges can be determined. For example, the device 100 can have a first region 102 , e.g. CPU circuitry (designed to perform microcontroller and data processing functions) and a second area 104 include, which is e.g. around the first area 102can extend around. It should be understood that such a design is considered for exemplary purposes only and has no limiting effects on embodiments. Such arrangements are otherwise well known in the art and it is unnecessary to provide a detailed description here.

[0026] The first (e.g. CPU) area 102 can contain various units, such as storage, computing, conversion units, etc., as well as communication interfaces.

[0027] The second area 104 may include, for example, power outlets and voltage regulators such as may be included in a so-called Body Smart Power (BSP) device. A power device for door zone plus power management in the automotive sector may be exemplary of such an intelligent power device.

[0028] A possible / recommended temperature range for the first temperature range 102 can be, for example, -40°C to 125°C, with an (internal) acceptable rise not exceeding, for example, 25°C. The second temperature range 104 can be considered for continuous operation of e.g. up to 185°C, with higher temperatures (e.g. above 250°C) being locally acceptable for a limited period of time.

[0029] It should be understood that the above quantitative data is merely exemplary in nature and has no limiting effects on the embodiments. Also, for exemplary purposes, two heat ranges are shown 102 , 104, although one or more embodiments may include a greater number of thermal regions.

[0030] the figure 2 to figure 4 illustrate a general portion of a circuit 100 , being a thermosensitive unit 10 that needs to be protected from excessive heat (e.g. an embedded CPU) in a particular area (e.g. the "coldest" area of ​​a semiconductor chip in a device 100 , if compatible with the device design), with an array of dedicated thermal sensors 12 acting as a sort of imaginary "shield" along a boundary line 120 can be viewed between the CPU 10 and possible sources HB1, HB2 of a thermal power loss.

[0031] While two sources HB1, HB2 are shown in the drawing for exemplary purposes, there can be any number of these sources. Although in the drawing four sensors 12 are shown for exemplary purposes, so can the sensors 12 be present in any number.

[0032] In one or more embodiments, the number of sensors can be selected depending on a particular application (e.g. the number and / or the position of the sources HB1, HB2, ...), with a smaller number of sensors 12 Allows space savings on the semiconductor chip, while a higher number of sensors 12 making it easier to achieve higher "granularity" in heat detection.

[0033] The representation of figure 3 schematically shows an exemplary sensor 12 in the shield 120 (e.g. the second from the left as this one is highlighted) indicating the reaching of a "high" temperature (e.g. an excessive temperature or excess temperature above a certain - possibly adjustable - safety threshold) in the vicinity of the unit to be protected 10 detected.

[0034] In one or more embodiments, if from a sensor 12 (or multiple sensors) in the protective shield an abnormal temperature is detected, the possibility of triggering an automatic shutdown process of the heat sources that lead to the detected temperature increase (e.g. HB2), allowing the CPU 10 can be maintained at a temperature acceptable for operation.

[0035] Such a procedure is shown schematically in figure 4, in which the heat source HB2 is switched off after (at least) one of the sensors 12 in the heat shield 120has reached a certain temperature, so that (in the in figure 4 situation shown schematically) only the heat source HB1 remains in operation.

[0036] The representation of figure 5 is exemplary of one or more embodiments, wherein the in the figure 2 to figure 4 in relation to two possible heat sources HB1, HB2 is extended to a plurality of clusters of heat sources denoted by Th_CL1, Th_CL2, Th_CL3, ... etc. (where the relevant clusters may be present in any number ).

[0037] figure 6 shows an exemplary representation of a semiconductor device (e.g., an integrated circuit) including a package 14 as well as different arrangements of lines (pins) 16 has, which is different from the housing 14 extending away. In accordance with standard practice, these pins may be numbered (e.g., 1,...,64) and / or labeled (WU1, CP2M,..., SH2, GL2) depending on their functions as input and / or output lines.

[0038] For purposes of illustration, it may be assumed that a thermally sensitive unit (e.g. a CPU) 10 together with a protective shield 120 from heat sensors 12 can be housed in the housing, so that the housing 14 the first temperature range 102 the figure 1 can embody an example, while at least some of the pins 16 Connections with potential heat sources may correspond, such as the sources HB1, HB2 in the figure 2 to figure 4, the in figure 6 around the heat-sensitive unit 10 are arranged around.

[0039] As in figure 6 shown schematically, certain of the pins 16 (i.e. not necessarily all of the pins 16 ) associated with respective heat sources whose operation (i.e. the heat that can be generated by such a source during operation) affects the heat-sensitive unit to be protected 10 can influence.

[0040] Saying that such pins are "associated" with respective heat sources may mean, for example, that the operation of a particular heat source (i.e., the generation of heat from that source) may be reflected by the appearance of a signal on a particular pin.

[0041] In one or more embodiments, this may be because: - the signal on a specific pin controls the operation of a specific heat source, e.g. a specific pin "feeds" an external semiconductor device of the figure 6 located, specific heat source, or - the operation of a specific heat source coincides with a signal appearing at a specific pin, e.g. because a specific, outside (or inside) the semiconductor device of the figure 6 arranged heat source "feeds" the pin.

[0042] Whatever operating mechanism may lead to such an association, in one or more embodiments, as schematically illustrated in figure 6 illustrates that the pins in question are considered to be arranged in clusters corresponding to the clusters Th_CL1, Th_CL2, Th_CL3, Th_CL4, Th_CL5 of the associated heat sources, i.e. in an arrangement where at least some of the electrical contact pins 16 are switchable between an activation state and a non-activation state of a heat generating unit coupled thereto.

[0043] In one or more embodiments, the clusters Th_CL1, Th_CL2, Th_CL3, Th_CL4, Th_CL5 can be defined based on various factors, e.g. by grouping together those pins in a cluster that have a certain function, a certain position in a temperature range (e.g. 102 in figure 11), related energy consumption / heat production.

[0044] For example, by referring (by way of example only) to a door zone plus power management device for use in the automotive sector, the various clusters exemplified above may correspond to: - a 5 W driver + a mirror Y-axis + OUT 15(Th_CL1), - a door lock + OUT_HS (Th_CL2), - a 10 W driver + directory + mirror X-axis (Th_CL3), - high impedance channels (Th_CL4), - regulated power supplies VREG1m VREG2 (Th_CL5).

[0045] In one or more embodiments, a "global" cluster (Th_CL6) can also be defined according to the semiconductor device as a whole.

[0046] It is also understood that such a partitioning of clusters is provided here for exemplary purposes only, without this having any restrictive effects on embodiments.

[0047] The diagram of figure 5 illustrates in an exemplary manner the possibility of assigning respective weightings W to the clusters Th_CL1, Th_CL2, Th_CL3,... in an ordered sequence, such as by the binary numbers, for example 001 , 010 , 011, ... are illustrated.

[0048] For example, cluster Th_CL4 can get a "top position" by giving it a binary weight 001 (first in the list - 1ST) followed by cluster Th_CL2 with a binary weight 010 (second in the list - 2ND), followed by clusters Th_CL3, Th_CL1, Th_CL5 with a binary weight 011 , 100 respectively. 101 on the third, fourth and fifth place in the list.

[0049] In this way, the cluster Th_CL4 can based on the priority list as shown in figure 5 is exemplified, e.g. be selected as "main heat source" or as "most critical heat source" followed by clusters Th_CL2, Th_CL3, Th_CL4, Th_CL5, where the weight / position of each cluster in the list is determined by assigning respective priority bits e.g. via a serial peripheral interface (SPI) can be specified, that of the CPU 10 assigned.

[0050] As in the bottom of the figure 5 schematically, "deactivation priorities" of the various clusters, as explained above, can be provided on the basis of a thermal protection strategy (which is determined by the actual CPU 10 , i.e. managed by the thermosensitive device to be protected), where: - upon detection of an excessive temperature by one or more sensors 12 in the shield 120 (e.g. inside the housing 14 ) the system (e.g. the CPU 10 ) can turn off the first cluster 1ST in the list, e.g. cluster Th_CL4; - upon determining that an excessive temperature is still present after the first cluster in the list has been powered off, the system may proceed with powering off the second cluster 2ND in the list, e.g. cluster Th_CL2, and so on until all of the clusters in the list have been powered off.

[0051] A way of working as in figure 5 thus allows for a tailored turning off of the heat sources as represented by the clusters Th_CL1, Th_CL2, Th_CL3, ... in a flexible manner (possibly including restarting a previously turned off cluster if it is determined that the excessive temperature is no longer present).

[0052] Such a thermal management strategy can on the one hand facilitate the execution of an effective thermal protection function (possibly under the guidance of the heat-sensitive unit to be protected, e.g. an embedded CPU), while on the other hand it can avoid that certain functions are unnecessarily switched off.

[0053] One or more embodiments allow the different clusters and / or their positions in the "priority list" to be defined in an intelligent manner, e.g., as a function of the positions and / or the number of sensors 12 , which detect a particular over-temperature event, so the turn-off may involve (only) the cluster(s) located at the base of the over-temperature event.

[0054] In addition, the "global" cluster Th_CL6 can be used as a kind of safety net, so that if a rather serious overheating process is detected (e.g. as detected by many sensors 12simultaneously detected) the system (e.g. the CPU 10 ) can take a very drastic measure by immediately turning off all clusters, while in any case maintaining some basic functions (e.g. low power consumption) so that the system intelligence is not completely shut down.

[0055] figure 7 exemplifies the ability to reorder the rankings (positions) assigned to various clusters in the list in one or more embodiments.

[0056] For example, in one or more embodiments, the figure 5 weightings W shown as examples (these are shown in the upper part of the figure 7 for immediate comparison) correspond to a user-defined priority list, which can be rearranged in the form of another list W' if, for example, a sudden temperature increase (e.g. reaching 170°C within a few seconds) is detected.

[0057] In one or more embodiments, the list W' may embody a default priority, such as a "power consumption" priority scheme, in which the various clusters are arranged in a descending order of power consumption (the cluster with the highest consumption first and the cluster with the lowest consumption last) so that shutdown can take place as a result of such power consumption priority weights W' instead of a user-defined priority (e.g. based on functional priorities) as illustrated by the weights W.

[0058] The flow chart of figure 8 exemplifies a possible mode of operation of the system as explained above (this being e.g. controlled by the CPU 10 can be controlled, e.g., by means of a Serial Peripheral Interface (SPI) feature, to select / modify such priority lists as W or W'.

[0059] After a start step 1000 (switching on the device) an internal parameter (e.g. x = 1) can be specified in a step 1002, after which in a step 1004 checking whether an excessive temperature on the protective shield 120 (e.g. by one or more sensors 12 ) is detected.

[0060] If this is not the case, another check can be done in one step 1006 be performed as to whether the detected temperature is much lower than a threshold Tw (T<<Tw), where the threshold indicates a potentially dangerous temperature that warrants close monitoring.

[0061] In the presence of a positive result in the step 1006 (the detected temperature is much lower than the threshold value, which indicates safe operation of the circuit), an operating state (switch-on state) of all clusters Th_CL1, ... in one step 1008 be confirmed, after which the system goes to the step 1002 can return (e.g. by allowing a certain monitoring delay to elapse before further checking in the step 1004 is performed).

[0062] In case of a negative result in the step 1006 (the detected temperature is close to a threshold value Tw, so close monitoring is suggested), the monitoring of the step 1004 be repeated on a short-term basis.

[0063] In one or more embodiments, a positive result in step 1004 (detecting excessive temperature on the protective shield 120) to a further step 1010 result in which different strategies (i.e. priorities) for handling excessive temperature can be selected.

[0064] For example, the step 1010 include checking whether the protection is On and whether a rapid (sudden) temperature rise has been detected (e.g. reaching 170°C within a few seconds, referring to the example described above).

[0065] If no rapid / sudden temperature increase is detected (negative result of step1010 ), can do that in the step 1004 detected excessive temperature phenomenon in one step 1012 be managed depending on a first strategy (e.g. based on a user-defined priority as indicated by the weights W in the figure 5 and figure 7 is shown as an example) so that the first cluster 1ST in the list W (e.g. the cluster Th_CL4) in one step 1014 can be turned off while the parameter x in a step 1016 is increased (e.g. x = x + 1).

[0066] The check for excessive temperature can thus be performed in step 1004 be repeated so that (about the possible consequence of a positive result in the step 1006 and a negative result in step 1010) the one or more (further) heat sources in list W in step 1014 can be switched off one after the other, possibly increasing the parameter x further if necessary.

[0067] If, however, the in the step 1010 performed check yields a positive result (e.g. showing a sudden increase in the temperature at the protective shield 120 indicates), another strategy can be adopted (e.g. a "power consumption" priority as indicated by the weights W' in figure 7 is illustrated).

[0068] In this way, a possible subsequent switching off of heat sources (e.g. possibly by repeating a step 1014 ) based on the weights defined by W' in figure 7 instead of that represented by the weights W in figure 5 priority schemes shown take place.

[0069] The block 1018 in figure 7 exemplifies a possible check that is carried out to determine whether the alternative strategy (e.g. the priority on "power consumption") W' has already been taken - this being e.g. given as the default choice (positive result of step 1018 ). Alternatively, if the result of step 1018 the alternative strategy in one step 1020 with the parameter x being reset to the initial value x = 1, so that the new priority scheme W' can be used starting from the cluster that appears first in the list W' (e.g. Th_CL2).

[0070] Thus, one or more embodiments may include: - a plurality of heat generating units (e.g. HB1, HB2), - a heat-sensitive unit (e.g. 10) exposed to heat generated by the heat-generating units, - a distribution of temperature sensors (e.g. 12) along a border line (e.g. 120) between the heat sensitive unit and the heat generating units, the sensors generating at least one over-temperature signal as a function of the temperature sensed at the border line, the plurality of heat generating units being clusters (e.g. Th_CL1, ..., Th_CL6) of heat-generating units, the clusters being selectively deactivatable ( 1014 ) are that the at least one excess temperature signal is generated by the sensors.

[0071] In one or more embodiments, the ordered sequence of the respective deactivation weights may be variable (e.g., 1010) between at least a first sequence and at least a second sequence.

[0072] In one or more embodiments, the distribution of the sensors may be sensitive to a rate of change of the temperature sensed at the boundary line above a change threshold, the circuitry being configured to define the ordered sequence between the at least one first sequence and the at least one second sequence as result of the rate of change of the temperature sensed at the boundary line being varied above the change threshold.

[0073] In one or more embodiments, the thermally sensitive unit may include a processing unit (e.g., a CPU 10) configured to control selective deactivation (e.g. 1014) of the clusters of heat-generating units in the at least one ordered sequence of respective deactivation weights.

[0074] In one or more embodiments, a method may include the steps of: - providing a circuit having a plurality of heat-generating units and a heat-sensitive unit that is exposed to heat generated by the heat-generating units, - detection of at least one excess temperature signal as a function of a temperature detected at a boundary line between the processing unit and the heat-generating units, - arranging the plurality of heat-generating units into clusters of heat-generating units by assigning respective deactivation weights to the clusters in at least one ordered sequence, and - selectively deactivating the clusters of heat-generating units depending on the at least one ordered sequence as a result of the at least one over-temperature signal being generated by the sensors.

[0075] One or more embodiments may include varying the ordered sequence of the respective deactivation weights between at least a first sequence and at least a second sequence.

[0076] One or more embodiments may include: - detecting a rate of change of the temperature detected at the boundary line above a change threshold, - varying the ordered sequence between the at least one first sequence and the at least one second sequence as a result of a rate of change of the temperature sensed at the boundary above the change threshold.

[0077] One or more embodiments may include using the second sequence as the default sequence.

[0078] In one or more embodiments, the second sequence may include clusters of heat-generating units arranged in descending order of power dissipation.

[0079] One or more embodiments may include: - Capture (e.g. in one step 1004 ) an excess temperature at the limit line, - Select (e.g. in one step 1012 ) of a first cluster of heat-generating units in the ordered sequence, - Deactivate (e.g. in one step 1014 ) of the selected cluster of heat-generating units, - Check that the over-temperature stays within the limit line, and - if it is determined that the excess temperature remains at the limit line, select (e.g. in one step 1012 ) of at least one other cluster of heat-generating units in the ordered sequence, and - Deactivating the selected at least one other cluster of heat-generating units.

[0080] In one or more embodiments, a semiconductor device may include: - a substrate (e.g. 100), - a semiconductor chip on the substrate, the semiconductor chip having a thermally sensitive unit (e.g. 10), - a distribution of temperature sensors on the substrate along a boundary line in the vicinity of the heat-sensitive unit, the sensors generating at least one over-temperature signal as a function of a temperature sensed at the boundary line, - a device housing (e.g. 14) with electrical contact pins (e.g. 16; 1,..., 64 in figure 6) extending away from the housing, at least some of the electrical contact pins being switchable between an activation state and a deactivation state of a heat-generating unit coupled thereto, - a processing unit configured to bring at least some of the electrical contact pins into the deactivation state, wherein the clusters of heat-generating units in the at least one ordered sequence of respective deactivation weights are selectively deactivated with the method according to one or more embodiments.

[0081] The underlying principles notwithstanding, the details and embodiments may also vary significantly from the foregoing description, which is given by way of example only, without departing from the scope. The scope of protection is defined by the appended claims. QUOTES INCLUDED IN DESCRIPTION

[0000] This list of the documents cited by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Patent Literature Cited

[0000] US 2015 / 0208557 A1

[0007]

Claims

[1] Circuit (100), comprising: - a plurality of heat-generating units (HB1, HB2), - a heat-sensitive unit (10) that is exposed to heat generated by the heat-generating units, - a distribution of temperature sensors (12) along a boundary line (120) between the heat-sensitive unit (10) and the heat-generating units (HB1, HB2), wherein the sensors (12) generate at least one overtemperature signal as a function of the temperature detected at the boundary line (120), wherein the majority of the heat-generating units comprise clusters (Th_CL1, ..., Th_CL6) of heat-generating units, wherein the clusters (Th_CL1, ..., Th_CL6) are selectively deactivated (1014) in at least one ordered sequence (W, W) of respective deactivation weights as a result of the at least one overtemperature signal being generated by the sensors (12). [2] Circuit (100) according to claim 1, wherein the ordered sequence (W, W) of the respective deactivation weights is variable between at least a first sequence (W) and at least a second sequence (W) (1010). [3] Circuit (100) according to claim 2, wherein the distribution of the sensors (12) is sensitive to a rate of change of the temperature detected at the boundary line (120) above a change threshold, wherein the circuit (100) is configured (1010) to vary the ordered sequence (W, W') between the at least one first sequence (W) and the at least one second sequence (W) as a result of the rate of change of the temperature detected at the boundary line (120) above the change threshold. [4] Circuit (100) according to one of the preceding claims, wherein the heat-sensitive unit has a processing unit (10) configured to control a selective deactivation (1014) of the clusters (Th_CL1, ..., Th_CL6) of heat-generating units in the at least one ordered sequence (W, W') of the respective deactivation weights. [5] A procedure comprising the following steps: - Providing a circuit (100) with a plurality of heat-generating units (HB1, HB2) and a heat-sensitive unit (10) which is exposed to heat generated by the heat-generating units, - Detection of at least one overtemperature signal as a function of a temperature detected at a boundary line (120) between the processing unit (10) and the heat-generating units (HB1, HB2), - Arranging the majority of heat-generating units into clusters (Th_CL1, ..., Th_CL6) of heat-generating units by assigning respective deactivation weights to the clusters in at least one ordered sequence (W, W'), and - selective deactivation (1014) of the clusters (Th_CL1, ..., Th_CL6) of heat-generating units depending on the at least one ordered sequence (W, W') as a result of the at least one overtemperature signal being generated by the sensors (12). [6] Method according to claim 5, which includes varying the ordered sequence (W, W') of the respective deactivation weights between at least a first sequence (W) and at least a second sequence (W'). [7] The method of claim 6, comprising the following steps: - Detecting a rate of change of the temperature measured at the boundary line (120) above a change threshold value, - Variation of the ordered sequence (W, W) between the at least one first sequence (W) and the at least one second sequence (W') as a result of a rate of change of the temperature recorded at the boundary line (120) above the change threshold. [8] Method according to claim 6 or 7, which includes the use of the second sequence (W') as the standard sequence. [9] Method according to any one of claims 6 to 8, wherein the second sequence (W') comprises clusters of heat-generating units arranged in a descending order of power loss. [10] Method according to any one of claims 5 to 9, comprising the following steps: - Detection (1004) of an excess temperature at the boundary line (120), - Selecting (1012) a first cluster of heat-generating units in the ordered sequence (W, W'), - Deactivating (1014) the selected cluster of heat-generating units (1012), - Check (1004) whether the excess temperature remains at the boundary line (120), and - if it is determined that the excess temperature remains at the boundary line (120), select (1012) at least one further cluster of heat-generating units in the ordered sequence (W, W'), and - Deactivating (1014) the selected (1012), at least one other cluster of heat-generating units. [11] Semiconductor device comprising: - a substrate (100), - a semiconductor chip on the substrate (100), wherein the semiconductor chip has a heat-sensitive unit (10), - a distribution of temperature sensors (12) on the substrate (100) along a boundary line (120) near the heat-sensitive unit (10), wherein the sensors (12) generate at least one overtemperature signal as a function of a temperature detected at the boundary line (120), - a device housing (14) with electrical contact pins (16; 1,..., 64) extending away from the housing (14), wherein at least some of the electrical contact pins are switchable between an activation state and a deactivation state of a heat-generating unit (Th_CL1, ..., Th_CL6) coupled thereto, - a processing unit (10) configured to bring at least some of the electrical contact pins into the deactivation state, wherein the clusters (Th_CL1, ..., Th_CL6) of heat-generating units in the at least one ordered sequence (W, W') of respective deactivation weights are selectively deactivated by the method according to one of claims 5 to 10.