Semiconductor arrangement

DE102017207117B4Active Publication Date: 2026-07-16MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
DE102017207117
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2016-07-19
Filing Date
2017-04-27
Publication Date
2026-07-16
Estimated Expiration
2037-04-27

AI Technical Summary

Technical Problem

Existing semiconductor devices face issues with thermal stress causing the sealing resin to peel off and crack due to poor adhesion between the connecting member and the sealing resin, while grooves near the semiconductor chip hinder heat diffusion.

Method used

A semiconductor assembly with a groove around the semiconductor chip, where the distance between the chip and the groove is equal to or greater than the groove's depth, and the connecting member is absent in the area between the chip and the groove, using a solder resist to limit the contact area between the sealing resin and the connecting element.

Benefits of technology

This design effectively reduces thermal stress on the sealing resin, preventing peeling and cracking while maintaining efficient heat dissipation, enhancing the reliability of the semiconductor device.

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Abstract

Semiconductor arrangement (100, 300) comprising: ▪ a heat spreader (24); ▪ a semiconductor chip (28) attached to a mounting surface (23) of the heat spreader (24) via a connecting element (26); and ▪ a sealing resin (32) covering the heat spreader (24) and the semiconductor chip (28), ▪ a groove (34, 334) formed on the mounting surface (23) around the semiconductor chip (28), ▪ a length between the semiconductor chip (28) and the groove (34, 334) being equal to or greater than a depth of the groove (34, 334), and ▪ the connecting element (26) being absent on at least a portion of a region of the mounting surface (23) between the semiconductor chip (28) and the groove (34, 334).
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Description

Background of the invention: Area

[0001] The present invention relates to a semiconductor arrangement which is used, for example, in a power electronics device. background

[0002] JP 2014-216459 A discloses a structure in which a semiconductor chip is arranged on a heat diffusion plate to diffuse heat generated by the semiconductor chip. The semiconductor chip is attached to the heat diffusion plate using a connecting element. The semiconductor chip and the heat diffusion plate are sealed using a sealing resin. A groove is formed around the perimeter of a region of the heat diffusion plate to which the semiconductor chip is attached. The groove allows for a reduction of the thermal stress generated at an interface between the semiconductor chip and the sealing resin.

[0003] In the semiconductor arrangement disclosed in JP 2014-216459 A, the connecting element, such as solder, is wetted and spread to one end of the groove. In this configuration, the connecting element has low adhesion to the sealing resin. This can cause the sealing resin to detach from the connecting element. To prevent this detachment, JP 2014-216459 A positions the groove close to the semiconductor chip. This reduces the contact area between the wetted and spread connecting element and the sealing resin, thus preventing detachment. However, the groove's proximity to the semiconductor chip can impede heat diffusion. Conversely, making the groove shallower to reduce its impact on heat diffusion may not sufficiently reduce the heat load acting on the sealing resin. Summary

[0004] The present invention was made to solve the above-mentioned problems, and it is an object of the present invention to provide a semiconductor arrangement that can reduce the heat load acting on the sealing resin without hindering the heat diffusion from a semiconductor chip.

[0005] The features and advantages of the present invention are summarized as follows.

[0006] According to the present invention, a semiconductor arrangement comprises a heat spreader, a semiconductor chip attached to a mounting surface of the heat spreader via a connecting element, and a sealing resin covering the heat spreader and semiconductor chip, wherein a groove is formed around the semiconductor chip on the mounting surface, a length between the semiconductor chip and the groove is equal to or greater than a depth of the groove, and the connecting element is not present on at least part of an area of ​​the mounting surface between the semiconductor chip and the groove.

[0007] Other and further tasks, features and advantages of the invention will become clearer from the following description. Brief description of the drawings

[0008] Fig. 1 to Fig. Figure 4 shows cross-sectional views of a semiconductor arrangement according to a first embodiment.

[0009] Fig. Figure 5 is a sectional view of a semiconductor arrangement according to a modification of the first embodiment. Description of exemplary implementations

[0010] A semiconductor arrangement according to an embodiment of the present invention is described with reference to the accompanying drawings. Components that are identical or equivalent are provided with the same reference numerals, and a repeated description thereof is omitted in some cases. First embodiment

[0011] Fig. Figure 1 is a cross-sectional view of a semiconductor arrangement according to a first embodiment. A semiconductor arrangement 100 According to the present embodiment, a metal base is used. 10 equipped with an insulating film. 12 is on the metal base 10 present. The insulating film is made of a resin or synthetic resin. A metal structure. 14is attached to the insulating foil 12 present. The metal base 10 , the insulating film 12 and the metal structure 14 form a base plate 16 The metal base 10 is over the insulating film 12 opposite the metal structure 14 isolated.

[0012] A case 18 is attached to the insulating foil 12 present. The case 18 is on a circumference of the insulating film 12 arranged to fit the metal structure 14 to surround. A connection 20 is on the case 18 Available. A heat spreader. 24 is above a plumb line 22 on the metal structure 14 attached. The heat spreader 24 It is made from either Mo or Cu as a material. A semiconductor chip 28 is via a connecting element 26 on a mounting surface 23 of the heat spreader 24attached. The semiconductor chip is, for example, an IGBT (insulated-gate bipolar transistor). The heat spreader 24 is provided to remove heat from the semiconductor chip 28 to efficiently dissipate wastewater. In the present embodiment, the connecting element is 26 a plumb line.

[0013] The semiconductor chip 28 and the metal structure 14 are via a wire 30 connected. The metal structure 14 and the connection 20 are over the wire 30 connected. An area separated from the housing 18 is surrounded by a sealing resin 32 sealed. Therefore, the heat spreader 24 and the semiconductor chip 28 with the sealing resin 32 covered. In the present embodiment, the sealing resin 32 an epoxy resin.

[0014] Fig. Figure 2 is a cross-sectional view of the semiconductor arrangement according to the first embodiment. Fig. Figure 2 is an enlarged view of the area around the heat spreader. 24 out of Fig. 1. A groove 34 is around the semiconductor chip 28 around the mounting surface 23 of the heat spreader 24 trained. The groove 34 is trained to work on the semiconductor chip 28 to surround. The sealing resin 32 is given to fill the groove 34 to fill.

[0015] Fig. Figure 3 is a cross-sectional view of the semiconductor arrangement according to the first embodiment. Fig. Figure 3 is an enlarged view of the area around the groove 34 out of Fig. 2. The semiconductor arrangement 100 is in an area 25 the mounting surface 23 between the semiconductor chip 28 and the groove 34 with a solder resist 236provided. For this reason, the connecting element 26 not over the solder mask 236 out to the side of the groove 34 spread out. Therefore, in the present embodiment, the connecting element 26 not on the area of ​​the mounting surface 23 between the solder resist 236 and the groove 34 available.

[0016] Fig. Figure 4 is a cross-sectional view of the semiconductor arrangement according to the first embodiment. In the present embodiment, a length A is shown between the semiconductor chip. 28 and the groove 34 equal to or greater than a depth L of the groove 34 Here, length A is a distance along the mounting surface. 23 from one end of the semiconductor chip 28 , adjacent to the groove 34 is, to one end of the groove 34 , adjacent to the semiconductor chip 28The length A is also a width of the area. 25 Therefore, the groove 34 not below a virtual line 35 trained, which at an angle of 45 Degrees with reference to the mounting surface 23 towards a base surface of the heat spreader 24 is inclined.

[0017] When a semiconductor chip is sealed with a sealing resin, a thermal stress typically acts on the sealing resin due to a difference in the coefficient of linear expansion between the semiconductor chip and the sealing resin. This thermal stress can potentially cause the sealing resin to detach from the semiconductor chip. Furthermore, cracks can form in the sealing resin. In the present embodiment, the heat spreader 24 with the groove 34 provided. The groove 34 is with the sealing resin 32 filled. That the groove 34filling sealing resin 32 It therefore serves as an anchor and can hold the sealing resin 32 firmly attached to the heat spreader 24 hold.

[0018] If the sealing resin 32 firmly attached to the heat spreader 24 The semiconductor chip adheres to the surface. 28 firmly attached to the sealing resin 32 for this reason, a heat load that occurs in a contact section between the semiconductor chip can cause 28 and the sealing resin 32 on the sealing resin 32 The effects are mitigated. In particular, the heat load in the vicinity of the end of the semiconductor chip is reduced. 28 adjacent to the groove 34 The effect is weakened. Therefore, it is possible to prevent the sealing resin from spreading. 32 from the semiconductor chip 28 detaches. It is also possible that cracks may appear in the sealing resin. 32 to prevent.

[0019] If the sealing resin 32 firmly attached to the heat spreader 24 Furthermore, a heat load is placed on a connection between the semiconductor chip. 28 and the connecting element 26 and at a connection between the connecting element 26 and the heat spreader 24 weakened. Therefore, it is possible to prevent the appearance of cracks in the connecting element. 26 to prevent.

[0020] If the groove is provided on the heat spreader, heat diffusion from the semiconductor chip can be hindered. The heat value is particularly high in a semiconductor arrangement whose rated current is equal to or greater than 100 A is. For this reason, a restriction of heat diffusion through the groove can become a problem. In contrast, in the present embodiment, the length A between the semiconductor chip 28 and the groove 34 equal to or greater than the depth L of the groove34 That is to say, in the present embodiment there is no groove. 34 within a range of less than 45 Degrees from the right below the semiconductor chip 28 This structure can be the groove 34 to prevent heat diffusion from the semiconductor chip 28 to the heat spreader 24 to hinder.

[0021] When the semiconductor chip is connected to the heat spreader using solder, the solder can spread and wet the area between the semiconductor chip and the slot. This brings the solder into contact with the sealing resin in this area. Adhesion between the solder and the sealing resin is typically weak. Therefore, it is likely that the sealing resin will detach in the contact area between the solder and the sealing resin. As a method to prevent this detachment, the contact area between the sealing resin and the solder can be reduced. Such a method can decrease the distance between the semiconductor chip and the slot.

[0022] To prevent heat diffusion through the groove 34 To prevent this, the length A between the semiconductor chip must be, as described above, 28 and the groove 34 and the length L of the groove34 A ≥ L must be satisfied. For this reason, it is necessary to shorten the distance between the semiconductor chip. 28 and the groove 34 , while the restriction of heat diffusion by the groove 34 is prevented, the groove is required 34 to flatten. This involves the effect of weakening the pressure on the sealing resin. 32 The deeper the groove, the greater the impact of the heat load. 34 is. If the groove 34 Therefore, if it is made flatter, it may be impossible to sufficiently reduce the heat load.

[0023] In contrast, in the present embodiment, the solder mask is 236 in that area 25 the mounting surface 23 between the semiconductor chip 28 and the groove 34 available. This means at least part of the area is covered. 25 an area where the connecting element 26is not present. The area in which the connecting element is located. 26 spreads and wets, is solely focused on the area between the solder mask 236 and the semiconductor chip 28 This restricts the contact area between the sealing resin and the sealant. 32 and the connecting element 26 compared to the case where the connecting element 26 across the entire area 25 It spreads and wets the surface. Therefore, it is possible to prevent the sealing resin from detaching. 32 from the connecting element 26 to prevent, even if the length A between the semiconductor chip 28 and the groove 34 is large.

[0024] As described so far, the present embodiment can determine the length A between the semiconductor chip 28 and the groove 34 enlarge, while the sealing resin detaches 32 from the connecting element 26This is prevented. By setting the length A to a large value, it is possible to prevent the groove. 34 to deepen without increasing heat diffusion from the semiconductor chip 28 to hinder. Deepening the groove 34 allows sufficient attenuation of the forces acting on the sealing resin 32 acting heat stress. This makes it possible to prevent the sealing resin from detaching. 32 and the formation of cracks in the sealing resin 32 to prevent.

[0025] As described above, the semiconductor arrangement 100 according to the present embodiment, which is applied to the sealing resin 32 sufficiently reduce the acting heat load without impairing heat diffusion from the semiconductor chip 28 to hinder. Therefore, it is possible to create a semiconductor arrangement 100 to obtain with high reliability. In order to achieve a sufficient reduction in heat load, the depth L of the groove must be 340.3 mm or more. Therefore, in the present embodiment, the length A is set to 0.3 mm or more. If the length A between the semiconductor chip 28 and the groove 34 Furthermore, the small size of the semiconductor chip affects its positioning. 28 Its assembly is difficult, taking into account the required positioning accuracy during the assembly of the semiconductor chip. 28 is the length A preferably on 0 ,3 mm or more specified.

[0026] As a variation of the present embodiment, the connecting element can be 26 It could be anything other than solder. For example, the connecting element could be... 26 It could be a material containing silver, such as silver paste. In this case, the semiconductor chip 28 via an Ag connection on the heat spreader 24 fastened. If the connecting element 26a silver paste has the connecting element 26 It has lower wettability than solder. This reduces the size of the area. 25 The area in which the fastener spreads and wets itself is smaller than when solder is used. This allows the contact area between the fastener to be reduced. 26 and the sealing resin 32 without the presence of the solder mask 236 be reduced.

[0027] In the present embodiment, the area in which the connecting element is located is 26 spreads and wets, through the use of solder resist 236 on that part of the area 25 restricted. In contrast, the connecting element 26 , which extends over the area 25 spreads and wets after the semiconductor chip is attached 28 on the heat spreader 24 be removed. In this case, the area connected to the fastener can be removed. 26of the area 25 is covered, can be reduced without the solder mask 236 is provided.

[0028] In that area 25 out of Fig. 3 is also the solder mask. 236 at a specific distance from the semiconductor chip 28 arranged. In this case, the area between the solder mask is 236 and the semiconductor chip 28 an area in which the connecting element is located 26 spreads and wets. In contrast, the solder mask can 236 must be present to make contact with the semiconductor chip 28 to come. In this case, the connecting element is 26 solely below the semiconductor chip 28 arranged. This makes the entire area 25 an area where the connecting element 26 is not available.

[0029] Furthermore, in the present embodiment, it is assumed that the groove 34is trained to work on the semiconductor chip 28 to surround. In contrast, the groove 34 on many, on one of each side of the semiconductor chip 28 be trained. In addition, the groove 34 be formed in a dual structure that forms the semiconductor chip 28 surrounds the width of the groove 34 is unchanged in the present embodiment. Furthermore, the bottom part of the groove is 34 flat and parallel to the base surface of the heat spreader 24 The shape of the groove can vary. 34 have any other shape than this one. For example, the cross-sectional shape of the groove can be different. 34 be U-shaped or V-shaped.

[0030] Fig. Figure 5 is a cross-sectional view of a semiconductor arrangement according to a modification of the first embodiment. A semiconductor arrangement 300 According to the modification, it has a groove 334provided. The shorter the distance from the mounting surface. 23 The larger the groove, the smaller its width becomes. 334 The groove 334 is with the sealing resin 32 filled.

[0031] Since the sealing resin 32 , that the groove 334 When filled, an anchor is formed, the sealing resin adheres. 32 firmly attached to the heat spreader 24 on. The groove 334 It is shaped like an octopus trap, so that the width of the groove 334 The smaller the distance from the mounting surface, the smaller it becomes. 23 is. For this reason, compared to the case where the width of the groove 334 The sealing resin is unchanging. 32 in the groove 334 firmly attached to the heat spreader 24 on. This makes the sealing resin 32 compared to the semiconductor arrangement 100 even tighter on the heat spreader 24 attached. Thus, it is possible, in comparison to the semiconductor arrangement, 100, which are based on the sealing resin 32 to further suppress the acting heat load.

[0032] Furthermore, the semiconductor chip 28 It can also be formed from a wide-bandgap semiconductor. Silicon carbide, a gallium-based nitride material, or diamond can be used as a wide-bandgap semiconductor. A semiconductor arrangement using a wide-bandgap semiconductor may need to operate under high temperature conditions. In this case, the semiconductor arrangement can 100 according to the present embodiment, so that heat diffusion from the semiconductor chip 28 not through the groove 34 is limited. In addition, the depth of the groove can 34 The size must be increased to sufficiently reduce the heat load. Therefore, the semiconductor chip can 28It can be operated under high temperature conditions. It should be noted that the features described in the present embodiment can be used appropriately in combination.

[0033] In the semiconductor arrangement according to the present invention, the length between the semiconductor chip and the groove is equal to or greater than the depth of the groove. This prevents the groove from impeding heat diffusion. Within the mounting surface between the semiconductor chip and the groove, the area in which the connecting element spreads and wets is limited. Therefore, the contact area between the connecting element and the sealing resin is limited, and resin detachment is prevented. This allows the length between the semiconductor chip and the groove to be increased. Consequently, the groove can be deepened without restricting heat diffusion from the semiconductor chip. Therefore, the thermal load can be sufficiently reduced without impeding heat diffusion from the semiconductor chip.

[0034] Obviously, many modifications and variations of the present invention are possible in light of the above teachings. It should therefore be understood that the invention can be carried out differently than specifically described, within the scope of the appended claims.

[0035] The complete disclosure of Japanese patent application No. 2016-141550, filed on July 19, 2016, comprising a description, claims, drawings and an abstract on which the priority of the present application is based, is incorporated herein by reference in its entirety. Reference symbol list 10 Metal base 12 insulating foil 14 Metal structure 16 Base plate 18 cases 20 connection 22 Lot 23 Mounting area 24 heat spreaders 25 area of 23 26 Connecting element 28 semiconductor chips 30 wire 32 Sealing resin 34 Nut 100 semiconductor arrangement 236 Solder resist 300 semiconductor arrangement 334 Nut A length L Depth QUOTES INCLUDED IN THE DESCRIPTION

[0036] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0037] JP 2014-216459 A [0002, 0003, 0003] JP 2016-141550

[0035]

Claims

[1] Semiconductor assembly ( 100 , 300 ), showing: • a heat spreader ( 24 ); • a semiconductor chip ( 28 ), which has a connecting element ( 26 ) on a mounting surface ( 23 ) of the heat spreader ( 24 ) is fastened; and • a sealing resin ( 32 ), which the heat spreader ( 24 ) and the semiconductor chip ( 28 ) covered, • where a groove ( 34 , 334 ) on the mounting surface ( 23 ) around the semiconductor chip ( 28 ) is trained around, • a length between the semiconductor chip ( 28 ) and the groove ( 34 , 334 ) equal to or greater than the depth of the groove ( 34 , 334 ) is, and • the connecting element ( 26 ) on at least part of an area of ​​the mounting surface ( 23 ) between the semiconductor chip ( 28 ) and the groove ( 34, 334 ) is not available. [2] Semiconductor assembly ( 100 , 300 ) according to claim 1, further comprising a solder resist ( 236 ), which is attached to the mounting surface ( 23 ) between the semiconductor chip ( 28 ) and the groove ( 34 , 334 ) is available. [3] Semiconductor assembly ( 100 , 300 ) according to claim 1, wherein the connecting element ( 26 ) Contains silver. [4] Semiconductor arrangement ( 100 , 300 ) according to claim 1, wherein the length between the semiconductor chip ( 28 ) and the groove ( 34 , 334 ) is equal to or greater than 0.3 mm. [5] Semiconductor arrangement ( 100 , 300 ) according to claim 1, wherein the width of the groove ( 34 , 334 ) becomes smaller the shorter the distance from the mounting surface ( 23 ) is. [6] Semiconductor arrangement ( 100 , 300) according to claim 1, wherein the semiconductor chip ( 28 ) is made from a wide bandgap semiconductor. [7] Semiconductor arrangement ( 100 , 300 ) according to claim 6, wherein the wide bandgap semiconductor is made of silicon carbide, a nitride-gallium-based material or diamond.

Citation Information

Patent Citations

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