LTHC as a load lock during info package training
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
- Filing Date
- 2018-03-21
- Publication Date
- 2026-07-30
AI Technical Summary
The increasing density of I/O pads in semiconductor dies poses challenges in packaging, leading to issues such as solder bridges and limited integration due to spacing and ball size constraints, particularly in conventional housing technologies.
The development of an integrated fan-out package (InFO) using a Light-To-Heat-Conversion (LTHC) coating material that decomposes under laser exposure, allowing for the formation of metal posts and redistribution layers, which are then used to form a dielectric barrier to prevent electrical overstress (EOS) damage.
The InFO package effectively increases I/O pad integration while reducing EOS damage by up to 98%, enhancing packaging yield and efficiency.
Abstract
Description
PRIORITY CLAIM AND CROSS-REFERENCE
[0001] This application claims priority over the following preliminary US patent application: Application serial no. 62 / 538,192, filed on July 28, 2017, entitled “LTHC as Charging Barrier in InFO Package Formation”, the application being incorporated herein by reference. STATE OF THE ART
[0002] As semiconductor technologies evolve, semiconductor chips / dies are becoming increasingly smaller. More functions now need to be integrated into these dies. Consequently, semiconductor dies must have an ever-increasing number of I / O pads integrated into smaller areas, and the density of these I / O pads is increasing rapidly. This, in turn, makes the packaging of semiconductor dies more difficult, negatively impacting the packaging yield.
[0003] Conventional die packaging technologies can be divided into two categories. In the first category, dies are packaged onto a wafer before being sawn through. This packaging technology has several advantages, such as higher throughput and lower costs. It also requires less underfill and molding compound. However, this technology also has disadvantages. As die sizes become increasingly smaller, the corresponding packages can only be fan-in type, where the I / O pads of each die are confined to an area directly above the die's surface. Due to the limited surface area of the dies, the number of I / O pads is restricted by the spacing limitations. Reducing the pad spacing can lead to solder bridges.When a fixed ball size is required, the solder balls must also have a certain size, which in turn limits the number of solder balls that can be integrated into the area of a die.
[0004] In the other packaging category, dies are sawn from wafers before packaging. An advantageous feature of this packaging technology is the ability to create fan-out packages, meaning that the I / O pads on a die can be redistributed over a larger area than the die itself, thus increasing the number of I / O pads integrated into the die area. Another advantage of this packaging technology is that "known good dies" are used, and defective dies are discarded, preventing wasted costs and effort on the defective ones. List of characters
[0005] Aspects of this disclosure are best understood from the detailed description below, when read together with the accompanying figures. It should be noted that, in accordance with industry standard practice, various features are not drawn to scale. Rather, the dimensions of the various features may have been enlarged or reduced as appropriate for clarity of discussion. Fig. 1 to Fig. Figure 18A shows the cross-sectional views of intermediate stages in forming a package according to some embodiments. Fig. Figure 18B shows the cross-sectional view of a package according to some embodiments. Fig. 19A and Fig. Figure 19B shows a top view and a cross-sectional view of a section of a solvent film in a package according to some embodiments. Fig. Figure 19B shows an enlarged view of a section of a solvent film according to some embodiments. Fig. 20A and Fig. Figure 20B schematically shows a section of the solvent film before and after laser scanning. Fig. Figure 21 shows a process flow for forming a package according to some embodiments. DETAILED DESCRIPTION
[0006] The following disclosure provides many different embodiments, or examples, for implementing various features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, forming a first feature over or on top of a second feature in the following description may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, so that the first and second features may not be in direct contact. Furthermore, the present disclosure may repeat reference numbers and / or letters in the various examples.This repetition is done for the sake of simplicity and clarity and does not in itself prescribe any relationship between the various designs and / or configurations discussed.
[0007] Furthermore, terms relating to spatial relativity, such as "underlying," "below," "lower," "above," "upper," and the like, may be used herein for the convenience of discussion to describe the relationship of one element or feature to another element or feature (or other elements or features), as illustrated in the figures. The terms relating to spatial relativity are intended to encompass various orientations of the apparatus used or operated in addition to the orientation illustrated in the figures. The apparatus may be oriented in a different way (rotated by 90 degrees or otherwise), and the terms relating to spatial relativity used herein may likewise be interpreted accordingly.
[0008] An integrated fan-out package (InFO package) and the method for forming it are provided according to various embodiments. The intermediate steps of forming the InFO package are shown according to some embodiments. Some variations of certain embodiments are discussed. The same reference numerals are used in the different views and embodiments to refer to the same elements.
[0009] Fig. 1 to Fig. Figure 18A shows cross-sectional views of intermediate stages in the formation of a package according to some embodiments. The in Fig. 1 to Fig. The steps shown in 18A are also schematically represented in the diagram in Fig. 21 process flow shown 400 depicted.
[0010] With reference to Fig. 1 becomes a carrier 20 provided, and a solution film 22 will be on the carrier 20stacked up. The corresponding step is called a step 402 in which Fig. The process flow shown in section 21 is illustrated. The carrier 20 It is formed from a transparent material and can be a glass substrate, a ceramic substrate, an organic substrate, or the like. The substrate 20 It can have a circular shape in a top view and can be the size of a silicon wafer. For example, the carrier can 20 have an 8-inch diameter, a 12-inch diameter, or the like. The solvent film 22 is aligned with the upper surface of the support 20 in physical contact. The solvent film 22 can be formed from an LTHC (Light-To-Heat Conversion) coating material. The solvent film 22 can be applied to the substrate using a coating 20can be applied. According to some embodiments of the present disclosure, the LTHC coating material is able to decompose under the heat of light / radiation (such as from a laser), and therefore it can degrade the substrate. 20 detach from the structure formed thereon. According to some embodiments of the present disclosure, an LTHC coating material comprises 22 Carbon black (carbon particles that give it its black color), a solvent, a silicone filler, and / or an epoxy. The epoxy may include acrylic or another polymer, such as polyimide. The polyimide, if incorporated into the LTHC coating material, is different from the typical polyimide used for photolithography because it is no longer photosensitive and cannot be removed by photographic exposure and development. The thickness T1 of the LTHC coating material 22The thickness can be greater than approximately 1 µm and, according to some embodiments of the present disclosure, can be in the range between approximately 1 µm and approximately 2.5 µm. T1 This will be discussed in detail in subsequent sections. It is understood that the values mentioned throughout this disclosure are examples and can be replaced by other values. The LTHC coating material 22 It can be layered in a flowable form and then cured, for example, under ultraviolet (UV) light. The LTHC coating material 22 is a homogeneous material and the upper and lower sections of the entire LTHC coating material 22 They have the same composition.
[0011] According to some embodiments, as also in Fig. 1 shows a polymer buffer layer 23 on the LTHC coating material 22trained. The corresponding step is described as a step 402 also in the Fig. The process sequence shown in Figure 21 is illustrated. According to some embodiments, the polymer buffer layer 23 manufactured from polybenzoxazole (PBO), polyimide, benzocyclobutene (BCB) or another suitable polymer.
[0012] Fig. 2 to Fig. Figure 4 shows the formation of metal posts. 32 The corresponding step is called step 404 in which Fig. The process flow shown in Figure 21 is illustrated. The metal posts are used throughout the description. 32 alternatively as vias 32 designated as such because the metal posts 32 through the subsequently distributed encapsulation material.
[0013] With reference to Fig. 2. A metal seed layer will form 24for example, formed using physical vapor deposition (PVD). The metal seed layer 24 can be used with the polymer buffer layer 23 are in physical contact. According to some embodiments of the present disclosure, the metal seed layer comprises 24 a titanium layer and a copper layer over the titanium layer. According to some alternative embodiments of the present disclosure, the metal seed layer comprises 24 a copper layer that forms the LTHC coating 22 contacted.
[0014] As also in Fig. 2 shown, a photoresist is used. 26 above the metal seed layer 24 trained. Light exposure is then applied to the photoresist. 26 This is done using a photolithographic mask (not shown). After subsequent development, openings are created. 28 in photoresist 26formed. Some sections of the metal seed layer 24 are through the openings 28 exposed.
[0015] Next, as in Fig. 3 shown, metal posts 32 formed by placing a metal material in the openings 28 The metal posts are plated. 32 These are alternatively referred to as through-hole vias or molded-in-place vias, as they pass through the subsequently formed encapsulation material (which can be a molded compound) in the finished package. The plated metal material can be copper or a copper alloy. The top surfaces of the metal posts 32 are lower than the top surface of the photoresist 26 , so that the shapes of the metal posts 32 through the openings 28 are limited. The metal posts 32 They can essentially have vertical and straight edges. Alternatively, the metal posts can 32have an hourglass shape in a cross-sectional view, with the middle sections of the metal posts 32 are narrower than the corresponding upper and lower sections.
[0016] In subsequent steps, the photoresist is applied. 26 removed, and therefore the underlying sections of the metal seed layer are exposed. 24 exposed. The exposed sections of the metal seed layer 24 They are then removed in an etching step, for example in an anisotropic or isotropic etching step. The edges of the remaining nucleus layer 24 In this way, they end together with the respective sections of the metal posts above them. 32 The resulting metal posts 32 are in Fig. Figure 4 is shown. The remaining sections of the metal seed layer are described throughout. 24 as parts of the metal posts 32The top-view shapes of the metal posts are considered and may not be shown separately. 32 They include circular shapes, rectangles, hexagons, octagons, and the like, and are not limited to them. After the formation of the metal posts 32 The polymer buffer layer 23 exposed.
[0017] Fig. Figure 5 shows the arrangement / installation of the device. 36 The corresponding step is called step 406 in which Fig. The process flow shown in section 21 is illustrated. The device-The 36 is attached to the polymer buffer layer 23 using the die fixing film (DAF) 38 attached, which is an adhesive film that is attached to the device-The 36 is pre-attached before the device-The 38 on the polymer buffer layer 23 is ordered. Accordingly, the DAF 38 and the device-The 36, before they reach the polymer buffer layer 23 to be attached, in combination as a single piece. The device-The 36 may include a semiconductor substrate that has a back surface (the downward-facing surface) in physical contact with the DAF 38 stands. The device-The 36 can include integrated circuit devices (such as active components, for example, transistors (not shown)) on the front surface (the upward-facing surface) of the semiconductor substrate. According to some embodiments of the present disclosure, the device-Die 36 A logic die, which can be a CPU die (central processing unit), a GPU die (graphics processing unit), a mobile application die, an MCU die (microcontroller unit), an IO die (input / output), a BB die (baseband), or an AP die (application processor). Since the carrier 20at the wafer level, although a device-The 36 As shown, several identical devices - this 36 above the polymer buffer layer 23 arranged, and can be provided as an array comprising multiple rows and multiple columns.
[0018] According to some embodiment examples, metal columns are 42 (such as copper columns) as sections of the device-Die 36 pre-formed, and the metal columns 42 are used with the integrated circuit devices, such as transistors (not shown), in the device die 36 electrically coupled. According to some embodiments of the present disclosure, a dielectric material, such as a polymer, fills the gap between adjacent metal columns. 42 , to form an upper dielectric layer 44 to form the upper dielectric layer 44may also include a section that contains the metal columns 42 covers and protects. The polymer layer 44 can be formed from PBO or polyimide according to some embodiments of the present disclosure.
[0019] Next, the device-The 36 and the metal posts 32 in an encapsulation material 48 encapsulated, as in Fig. 6 is shown. The corresponding step is shown as step 408 in which Fig. The process flow shown in section 21 is illustrated. The encapsulation material 48 fills the gap between adjacent vias 32 and the gap between the vias 32 and the device-The 36 The encapsulation material 48 It can include a molding compound, underfill, epoxy, and / or resin. The top surface of the encapsulation material 48is higher than the top ends of the metal columns 42 If it is made from a molding compound, the encapsulation material can 48 a base material, which may be a polymer, a resin, an epoxy or the like, and filler particles (not shown, see Fig. 19C) in the base material. The filler particles can be dielectric particles made of SiO2, Al2O3, silica, or the like, and can have spherical shapes. Furthermore, the spherical filler particles can have several different diameters. Both the filler particles and the base material in the molding compound can be combined with the polymer buffer layer. 23 in physical contact, as well as schematically in Fig. 19C shown.
[0020] In a subsequent step, as in Fig. Figure 7 shows a planarization step, such as a chemical-mechanical polishing (CMP) step or a mechanical grinding step, performed to prepare the encapsulation material. 48 and the dielectric layer 44 too thin, until the vias 32 and the metal columns 42 be exposed. The corresponding step is called step 408 also in the Fig. The process flow shown in Figure 21 is illustrated. Due to the planarization process, the upper ends of the vias are 32 with the upper surfaces of the metal columns 42 They are essentially flat (complanar) and are aligned with the upper surface of the encapsulation material. 48 essentially coplanar.
[0021] Fig. 8 to Fig. Figure 12 shows the formation of a front-side redistribution structure. Fig. 8 and Fig. Figure 9 shows the formation of a first layer of redistribution lines (RDLs) and the corresponding dielectric layer. Referring to Fig. 8 becomes a dielectric layer 50 trained. The corresponding step is described as a step 410 in which Fig. The process sequence shown in Figure 21 is illustrated. According to some embodiments of the present disclosure, the dielectric layer 50 It is formed from a polymer, such as PBO, polyimide, or the like. The formation process involves layering the dielectric layer. 50 in a flowable form and subsequent hardening of the dielectric layer 50 According to some alternative embodiments of the present disclosure, the dielectric layer 50formed from an inorganic dielectric material, such as silicon nitride, silicon oxide, or the like. The formation process may include chemical vapor deposition (CVD), atomic layer deposition (ALD), plasma-enhanced chemical vapor deposition (PECVD), or other suitable deposition methods. The openings 52 are then formed, for example, using a photolithographic process. According to some embodiments, in which the dielectric layer 50 The formation of the openings involves the creation of a structure made from a light-sensitive material, such as PBO or polyimide. 52 A photographic exposure using a lithographic mask (not shown) and a development step. The through-holes 32 and the metal columns 42 are through the openings 52 exposed.
[0022] With reference to Fig. 9 will be the next RDLs54 above the dielectric layer 50 trained. The corresponding step is described as a step 412 in which Fig. The process flow shown in section 21 is illustrated. The RDLs 54 include vias 54A , which are in the dielectric layer 50 be trained to work with the metal columns 42 and the vias 32 to be connected, and metal conductor tracks (metal wires) 54B above the dielectric layer 50 According to some embodiments of the present disclosure, the RDLs 54(which include 54A and 54B) are formed in a plating process that involves depositing a metal seed layer (not shown), forming and structuring a photoresist (not shown) over the metal seed layer, and plating a metallic material, such as copper and / or aluminum, over the metal seed layer. The metal seed layer and the plated metallic material can be formed from the same material or from different materials. The plated photoresist is then removed, followed by etching of the sections of the metal seed layer that were previously covered with the structured photoresist. Although not shown, the top surfaces of the sections of the RDLs can be 54 , which are from the openings 52 to be raised, to be left out lower than the section of the RDLs 54 , which is directly above the dielectric layer 50 lies.
[0023] With reference to Fig. 10 According to some embodiments of the present disclosure, a dielectric layer is formed. 60 above the in Fig. The structure shown in Figure 9 is formed, whereupon the formation of openings in the dielectric layer occurs. 60 This follows. Some sections of the RDLs 54 are therefore exposed through the openings. The dielectric layer 60 can be formed using a material made from the same materials as those used to form the dielectric layer 50 RDLs are selected and may include PBO, polyimide, BCB, or other organic and inorganic materials. 58 They will then be trained. The corresponding step is called step 414 in which Fig. The process flow shown in section 21 is illustrated. The RDLs 58 They also include vias that extend into the openings in the dielectric layer. 60 extend to include the RDLs 54to contact, and metal conductor sections directly above the dielectric layer 60 Training the RDLs 58 can contribute to the training of RDLs 54 to be the same, that is the formation of a germ layer, the formation of a structured mask, the plating of the RDLs 59 and subsequent removal of the structured mask and unwanted sections of the germ layer.
[0024] Fig. 11 represents the formation of a dielectric layer 62 and RDLs 64 above the dielectric layer 60 and the RDLs 58 The corresponding step is shown as step 416 in which Fig. The process sequence shown in section 21 is illustrated. The dielectric layer 62 can be formed from a material selected from the same group of eligible materials as used for forming the dielectric layers 50 and 60 The RDLs64 They can also be formed from a metal or metal alloy comprising aluminum, copper, tungsten, or alloys thereof. It is understood that the package can have any number of RDL layers, such as one layer, two layers, or more than three layers, although in the illustrated embodiments three layers of RDLs ( 54 , 58 and 64 ) are trained.
[0025] Fig. Figure 12 shows the formation of the dielectric layer 66 , the UBMs (solderable metallizations) 68 and electrical connectors 70 according to some embodiments. The dielectric layer 66 can be formed from a material selected from the same group of eligible materials as used for forming the dielectric layers 50 , 60 , 62 and 66 For example, the dielectric layer66 Openings are formed using PBO, polyimide, or BCB. 66 designed to expose the underlying metal pads, which in the illustrated embodiments form parts of the RDLs 64 represent. According to some embodiments of the present disclosure, the UBMs are 68 formed so that they fit into the openings in the dielectric layer 66 extend to the metal pads in the RDLs 64 to contact the UMBs 68 They can be made of nickel, copper, titanium, or multiple layers thereof. According to some embodiment examples, the UBMs include 68 a titanium layer and a copper layer over the titanium layer.
[0026] Electrical connectors 70 They will then be trained. The corresponding step is called step 418 in which Fig. The process flow shown in Figure 21 is illustrated. The formation of the electrical connectors. 70 Can a plumb bob arrangement be made on the exposed sections of the UBMs? 68 and subsequent melting of the solder balls, and therefore the electrical connectors 70 Solder areas. According to alternative embodiments of the present disclosure, forming the electrical connectors includes 70 Performing a plating step to apply solder layers over the UBMs 68 to form, and subsequent melting of the solder layers. The electrical connectors 70 This can also include non-solder metal columns or metal columns and solder caps over the non-solder metal columns, which can also be formed by means of plating. Throughout the description, the structure that forms the solvent film is referred to as... 22 and the overlying structure comprises, in combination as the package 100designated as a composite wafer (and hereinafter also referred to as a composite wafer) 100 (designated), which includes several device-this 36 includes.
[0027] Next, with reference to Fig. 13 a composite wafer 100 on a tape 74 arranged on a frame 76 is appropriate. According to some embodiments of the present disclosure, the electrical connectors are 70 in contact with the band 74 Next, light will be turned on. 78 (or another type of radiant source that transports heat) onto the LTHC coating material 22 projected and the light 78 penetrates the transparent carrier 20 through. According to some embodiments of the present disclosure, the light 78 a laser beam that is directed onto the LTHC coating material 22can be scanned back and forth, with each scan occurring on an unsampled section of the LTHC coating material. 22 is carried out. In the subsequent discussion, the radiation will be discussed. 78 for simplicity's sake, as a laser beam 78 It is described as such, although it could be other types of radiation.
[0028] Fig. 20A indicates the area 79 (shown in Fig. 13), before the laser scanning is performed. In the LTHC coating material 22 become carbon black particles 122A in the base material 122B , which according to some embodiments may be acrylic, is scattered. The carbon black particles 122A do not form a continuous conductive path because the carbon black particles 122A from each other through the base material 122B are isolated.
[0029] Fig. Figure 20B shows an enlarged view of the area. 79 ( Fig. 13) during and after the laser scanning was performed. The LTHC coating material 22 includes a section 22A , which is within the working area of the laser beam 78 lies. The section 22B of the LTHC coating material 22 is located outside the working area of the laser beam 78 The working area of the laser beam 78 is located in the area where the energy of the laser beam 78 suitable for decomposition of the LTHC coating material 22 is. Outside the working area, either the laser beam 78 already absorbed or blocked in the working area, or the energy of the laser beam 78 is responsible for the decomposition of the LTHC coating material 22 not suitable, even if the laser beam 78 can extend beyond the working area. Accordingly, during laser beam scanning (the base material) 122Bin the) section 22A of the LTHC coating material 22 as a response to the heat introduced by the light exposure, it decomposes and the section 2B It does not decompose.
[0030] According to some embodiments of the present disclosure, the laser beam 78 at the height 81 focus, as in Fig. 20B is shown. The height 81 is located below the interface between the support 20 and the LTHC coating material 22 The working area of the laser 78 includes both the area above the focal height 81 with a depth ΔD and the area below the focus height 81with a depth ΔD. According to some embodiments, the depth ΔD can be approximately 0.5 µm. It is understood that the working area is influenced by various factors, including the energy level of the laser beam, the scanning speed, and the absorption rate of energy by the LTHC coating material. 22 etc. include, and are not limited to. According to some embodiments of the present disclosure, the focus height 81 set to allow the top of the work area to form the interface between the LTHC coating material 22 and the carrier 20 reached, and the underside of the work area is higher than the lower surface of the LTHC coating material 22 .
[0031] During laser scanning, charges (such as electrons, as indicated by the e-symbols) are induced and are captured in carbon black particles. 122Acaptured. Furthermore, laser scanning causes carbon black particles to swell. 122A and therefore the isolated carbon black particles 122A connected to each other, creating a continuous conductive path.
[0032] As a consequence of light exposure (such as laser scanning), the carrier can 20 from the LTHC coating material 22 to be lifted off, and therefore the composite wafer 100 from the carrier 20 debonded (removed). The corresponding step is called step 420 in which Fig. The process flow shown in section 21 is illustrated. The resulting composite wafer 100 is in Fig. 14 is shown. During the light exposure, the section 22A ( Fig. 20B) of the LTHC coating material 22 decomposed. The section 22B of the LTHC coating material 22It is not decomposed and therefore remains after the carrier 20 was lifted. According to some embodiments of the present disclosure, the total depth is T1 ( Fig. 13) of the LTHC coating material 22 before decomposition occurs in the range between approximately 1.5 µm and approximately 2.5 µm. The depth T2 ( Fig. 14) of the remaining section 22B of the LTHC coating material 22 According to some embodiments, the thickness can range between approximately 0.5 µm and approximately 1.5 µm. Furthermore, the thickness ratio can vary. T2 of the decomposed section to the total thickness T1 of the LTHC coating material 22 in the range between approximately 0.4 and approximately 0.7. Furthermore, the thickness can vary. T2 the decomposed section must be larger than 5 times the diameter Dia ( Fig. 20A and Fig. 20B) of the carbon black particles 122A, to ensure that the section 22B has sufficient thickness to act as an effective dielectric barrier.
[0033] During the liftoff of the carrier 20 due to friction on the carrier 20 A large amount of static charges are generated. These static charges can combine with the charges generated in the laser scan and are carried away by the conductive path formed by the swollen carbon black particles. 122A was trained, led. If a section 22B of the LTHC coating material 22 If it is not present, sections extend 22A (thus the continuous conductive path) to the polymer buffer layer 23 The large amount of charge can pass through the polymer buffer layer. 23 penetrate and becomes part of the vias 32 guided. Through the vias 32 and the RDLs 54 ,58 etc. the charges in the device-The 36 are guided and the devices and the thin metal conductors in the device-The 36 This can cause damage. This is called electrical overstress (EOS).
[0034] According to some embodiments of the present disclosure, the sections 22B , partly due to the fact that carbon black particles 122A They do not form a continuous path within it, acting as a dielectric barrier. The dielectric barrier prevents the charges from passing through the vias. 32 This achieves the desired result. Accordingly, the probability of EOS damage is reduced. Experimental results obtained from sample wafers showed that by adapting the embodiments of the present disclosure, a large proportion of the EOS damage is eliminated, and the EOS damage can be reduced by 98 percent.
[0035] According to some embodiments of the present disclosure, the remaining, undecomposed section can 22B ( Fig. 14) of the LTHC coating material 22 a layer covering the entire surface without any opening to expose the underlying polymer buffer layer 23 be.
[0036] According to some embodiments of the present disclosure, after the carrier is lifted off 20 the remaining LTHC coating material 22 removed, thereby removing the underlying polymer buffer layer 23 is exposed. The corresponding step is called step 422 in which Fig. The process flow shown in Figure 21 illustrates the removal of the LTHC coating material. 22 This can be achieved, for example, by using a plasma cleaning step with nitrogen ( N2 ), oxygen ( O2 ), CF4 and the like. The resulting composite wafer 100is in Fig. 14 shown.
[0037] According to alternative embodiments of the present disclosure, the remaining LTHC coating material 22 not removed. The step 422 in Fig. Figure 21 is illustrated by a dashed line to indicate whether or not this step can be performed. The top surface of the LTHC coating material 22 The package can exhibit coplanarity that conforms to the manufacturing process specifications. Accordingly, no planarization of the upper surface of the LTHC coating material will occur. 22 carried out. However, if after the carrier lifts off 20 the LTHC coating material 22If the surface exhibits a roughness greater than the maximum acceptable roughness specified in the specification, and the high roughness can cause a loss of yield, planarization, such as chemical-mechanical polishing (CMP) or mechanical grinding, can be performed to flatten the top surface of the LTHC coating material. 22 to level it. Planarization removes an upper surface section of the LTHC coating material. 22 , while a comprehensive lower section remains unremoved. With reference to Fig. 15 openings will be 72 in the LTHC coating material 22 and the polymer buffer layer 23 trained and therefore through-holes 32 exposed. The corresponding step is described as step 424 in which Fig. The process flow shown in Figure 21 is illustrated. According to some embodiments of the present disclosure, the openings are72 formed using a laser drilling process, during which some sections of the LTHC coating material 22 directly above the vias 32 are burned and decomposed with a laser. According to alternative embodiments of the present disclosure, the openings are 72 formed using an etching process in a lithographic process.
[0038] According to some embodiments of the present disclosure, titanium layers are 24A exposed after laser drilling. The titanium layers 24A are the remaining sections of the metal seed layer 24 , as in Fig. Figure 3 is shown. In a subsequent step, an etching step is performed to remove the titanium layers. Since titanium has a higher electrical resistivity than copper, removing the titanium layers exposes the copper sections of the vias. 32, which have a lower resistivity than titanium layers, are exposed. Therefore, the electrical connection with the vias can be established. 32 with a lower resistivity. According to some embodiments of the present disclosure, the etching of the titanium layers is carried out by wet etching using a hydrofluoric acid (HF) solution, phosphoric acid, or a mixture of HF and phosphoric acid. The etching can also be carried out using dry etching.
[0039] During the etching of the titanium layers 24A The LTHC coating material 22 not etched. Accordingly, the material of the LTHC coating material is 22 and the etching agent of the titanium layers 24A selected in such a way that the etching agent coats the LTHC coating material 22 does not attack, while it is able to penetrate the titanium layers 24A to etch.
[0040] The composite wafer 100 includes several packages 100' (see Fig. 17), which are identical to each other, with each of the packages 100' multiple vias 32 and a device-The 36 includes the LTHC coating material. 22 extends across the entire package at the wafer level 100 . Fig. Figure 16 shows the bonding of several of the packages. 200 (where a package 200 (as shown) to the composite wafer 100 , resulting in multiple identical Package-on-Package structures / Packages (PoP) 300 ( Fig. 17) are trained. Bonding is carried out via the solder areas. 80 carried out, which involved the vias 32 with the metal pads 206 in the package above 200 connect. According to some embodiments of the present disclosure, the package comprises 200 a package substrate 204and a device-die (device-dies) 202 The memory die(s) can be, for example, SRAM dies (static random access memory), DRAM dies (dynamic random access memory), or the like. An underfill. 208 will also be in the gap between the packages 200 and the underlying composite wafer 100 It is arranged and hardened. The underfill 208 can be used with the LTHC coating material 22 be in contact.
[0041] According to alternative embodiments of the present disclosure, instead of bonding the package 200 to the composite wafer 100 directly through the openings 72 ( Fig. 15), reverse-side RDLs (not shown) formed, and the package 200Bonding occurs via the backside RDLs in the backside redistribution structure. The backside RDLs therefore include vias (not shown) that extend into the LTHC coating material. 22 extend, and metal conduits (not shown) over the LTHC coating material 22 The backside RDLs are so named because, if formed, they are located on the back side of the device die. 36 To form the backside RDLs, a carrier, instead of a ribbon, can be placed under the composite wafer. 100 as a support during the formation of the backside RDLs. Accordingly, the electrical connectors are 70 adhered to the carrier by means of an adhesive film (not shown) during the formation of the reverse-side RDLs.
[0042] Next, with reference to Fig. 17 a singulation process (die sawing) was carried out to separate the composite wafer 100into individual packages 300 to separate identical wafers. Singulation can be performed when the composite wafer 100 on the tape 74 The singulation can be carried out using a blade, or it can be carried out by using a laser beam for pre-scoring, so that grooves are formed, and then using a blade to cut through the grooves.
[0043] Fig. 18A represents the bonding of the isolated package 300 to a package component 86 over solder areas 70 that, which makes the package 302 is being trained. The corresponding step is called step 426 in which Fig. The process flow shown in Figure 21 is illustrated. According to some embodiments of the present disclosure, the package component 86a package substrate, which may be a coreless substrate or a substrate having a core. According to other embodiments of the present disclosure, the package component is 86 a printed circuit board or package. The solder areas 70 can be attached to the bond pads 88 in the package component 86 be formed.
[0044] Fig. 18B illustrates a package 302 , which is designed according to alternative embodiments of the present disclosure. These embodiments are the ones described in Fig. embodiments similar to those shown in 18A, except that after the support is lifted off 20 the remaining LTHC coating material 22 ( Fig. 14) is removed. Accordingly, as stated in Fig. 18B shown, the underfill 208 with the polymer buffer layer 23 in contact.
[0045] Fig. Figure 19A shows a top view of some sections of an example of a package. 300 , where vias 32 , the LTHC coating material 22 and the device-The 36 Some features are illustrated, while other features are omitted for the sake of simplicity. According to some embodiments of the present disclosure, the decomposition of the LTHC coating material 22 This is done using a laser that has the shape of a laser beam. The laser beam is narrower than the package. 300 and multiple laser beam scanning paths are needed to scan the entire package 300 to cover (to cover the composite wafer) 100 to cover, as in Fig. (13 shown). The paths of the multiple laser beam scans can slightly overlap to ensure complete coverage of the LTHC coating material. 22to ensure that no sections are undesirably left unscanned. The overlapping sections receive double scanning compared to the non-overlapping sections. According to some embodiments of the present disclosure, the thickness of the decomposed LTHC coating material is 22 in the doubly sampled areas greater than the thickness of the decomposed LTHC coating material 22 in the simply scanned areas. This results in the upper surface of the LTHC coating material 22 It has some sections that are more omitted than other sections. For example, it shows Fig. 19A schematic sections 222A and sections 222B , which have more than sections 222A are omitted. The sections 222B and 222A They feature an alternating layout, with the sections 222A Simply sampled sections are, and the sections 222BThese are double-scanned sections. Furthermore, the sections can 222A and 222B essentially straight on top.
[0046] Fig. Figure 19B shows a cross-sectional view of an LTHC coating material. 22 according to some embodiments of the present disclosure. The sections 222A and 222B are also shown. The thicknesses T3A of the sections 222A and T3B of the sections 222B are also shown. The thickness T3A is greater than the thickness T3B. According to some embodiments of the present disclosure, the difference (T3A - T3B) is greater than approximately 0.1 µm and can be in the range between approximately 0.1 µm and approximately 0.5 µm. Accordingly, the package 300 the LTHC coating material 22 Sections of alternating thicknesses. The sections 222A can have a substantially uniform width, and the sections222B can have an essentially uniform width, and the width of the sections 222A can be larger than the width of the sections 222B .
[0047] The sections 222B (and possibly also 222A) may exhibit bulging shapes in the cross-sectional view, with the central part of a section 222B (or a section) 222A) more than marginal sections of the section 222A / 222A It is omitted. Furthermore, the curved shapes can be curved.
[0048] Fig. Figure 19C shows an enlarged view of the area. 84 in Fig. 17. As in Fig. As shown in 19C, the encapsulation material comprises 48 a basic material 48A and filler particles 48B in the base material 48A Since the encapsulation material 48 on the polymer buffer layer 23 is encapsulated (as in Fig. 6 shown) and no planarization at the section of the encapsulation material 48 , which is the polymer buffer layer 23 contacted, is carried out, the spherical particles are 48B , which are connected to the polymer buffer layer 23 in contact, rounded, with the rounded surfaces being in contact with the polymer buffer layer 23 are in contact. Furthermore, no spherical particles are involved. 48B The interface is ground so that it has flat surfaces that align with the depicted upper surface of the base material. 48 are coplanar. For comparison, the sections of the encapsulation material were used. 48 , which are connected to the dielectric layer 50 be in contact, in which Fig. Step 7, as shown, is planarized. Accordingly, the spherical particles 48B , which are connected to the dielectric layer 50The surfaces that are in contact are partially cut during planarization, and therefore they essentially have flat bottom surfaces (and not rounded bottom surfaces) that are in contact with the dielectric layer. 50 stand.
[0049] In the exemplary embodiments described above, some example processes and features according to some embodiments of this disclosure are discussed. Other features and processes can also be included. For example, test structures can be included to support verification testing of the 3D package or the 3DIC devices. The test structures can, for example, include test pads formed in a redistribution layer or on a substrate, enabling testing of the 3D package or 3DIC, the use of needles and / or probe cards, and the like. Verification testing can be performed on intermediate structures as well as the finished structure. Furthermore, the structures and methods disclosed herein can be used in conjunction with test methodologies that include intermediate verification of known good dies to increase yield and reduce costs.
[0050] The embodiments of the present disclosure have several advantageous features. By shaping the LTHC coating material to have a thickness greater than the working area of the laser used to decompose the LTHC coating material, a remaining, non-decomposed portion of the LTHC coating material is used as a dielectric barrier layer to prevent charges from discharging in the device dies in the InFO package, and EOS damage is avoided.
[0051] According to some embodiments of the present disclosure, a method comprises: forming a solvent film over a support, forming a polymer buffer layer over the solvent film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulation material, performing planarization on the encapsulation material to expose the metal post, forming a redistribution structure over the encapsulation material and the metal post, and decomposing a first portion of the solvent film. A second portion of the solvent film remains after decomposition. An opening is formed in the polymer buffer layer to expose the metal post. In one embodiment, the method comprises: bonding a package component to the metal post, and distributing an underfill between the package component and the second portion of the solvent film.In one embodiment, the decomposition of the first section of the dissolving film is carried out by projecting a laser beam onto the dissolving film. In one embodiment, the dissolving film comprises a polymer base material and carbon black particles. In one embodiment, the method includes removing the second section of the dissolving film before the opening is formed in the polymer buffer layer. In one embodiment, the opening extends into both the polymer buffer layer and the second section of the dissolving film. In one embodiment, the first section of the dissolving film has a first thickness before decomposition, and the dissolving film has a second thickness before decomposition, with a ratio of the first thickness to the second thickness in the range of approximately 0.4 to 0.7.
[0052] According to some embodiments of the present disclosure, a method comprises: layering an LTHC coating material onto a support; forming a polymer buffer layer over the LTHC coating material; forming a metal seed layer in contact with the polymer buffer layer; forming a structured photoresist over the metal seed layer, wherein a portion of the metal seed layer is exposed through an opening in the structured photoresist; plating a metal post over the metal seed layer; removing the structured photoresist; etching the metal seed layer to expose the polymer buffer layer; projecting a laser beam onto the LTHC coating material, wherein a working area of the laser beam covers a first portion of the LTHC coating material, and a second portion of the LTHC coating material is located outside the working area; lifting the support; and forming a solder area.which passes through the second section of the LTHC coating material. In one embodiment, after the support has been lifted, the second section of the LTHC coating material remains as a continuous layer, and the continuous layer is free of any opening exposing the polymer buffer layer. In one embodiment, the method comprises: forming an opening in the second section of the LTHC coating material and the polymer buffer layer, wherein the solder area extends into the opening. In one embodiment, the method comprises removing the second section of the LTHC coating material. In one embodiment, projecting the laser beam comprises scanning the laser beam through the entirety of the LTHC coating material. In one embodiment, the method comprises, after the support has been lifted,Performing planarization on the second section of the LTHC coating. In one embodiment, the method comprises etching a portion of the remaining metal seed layer after the support has been removed and before the solder area is formed.
[0053] According to some embodiments of the present disclosure, a package comprises an encapsulation material; a via extending through the encapsulation material; a polymer buffer layer in contact with the via and the encapsulation material; an LTHC coating material in contact with the polymer buffer layer; and a solder region extending through the LTHC coating material and the polymer buffer layer. In one embodiment, the LTHC coating material is designed to decompose under the heat of a laser beam. In another embodiment, the LTHC coating material comprises a base material and carbon black particles in the base material.In one embodiment, the package further comprises: a device die; and a die-attachment film that adheres the device die to the polymer buffer layer, wherein the device die and the die-attachment film are encapsulated by the encapsulation material. In one embodiment, the LTHC coating material comprises multiple first sections and multiple second sections arranged in an alternating layout, and the multiple first sections are thinner than the multiple second sections. In one embodiment, the multiple first sections and the multiple second sections of the LTHC coating material are parallel strips.
[0054] The foregoing outlines features of several embodiments so that a person skilled in the art can better understand the aspects of the present disclosure. A person skilled in the art should recognize that they can readily use the present disclosure as a basis for designing or modifying other processes and structures to accomplish the same tasks and / or achieve the same advantages as the embodiments presented herein. A person skilled in the art should also understand that such equivalent embodiments do not deviate from the inventive concept and scope of the present disclosure, and that they can make various changes, substitutions, and modifications here without deviating from the inventive concept and scope of the present disclosure. QUOTES INCLUDED IN THE DESCRIPTION
[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature
[0000] US 62 / 538192
[0001]
Claims
[1] Procedure, encompassing: Formation of a solvent film over a carrier, Formation of a polymer buffer layer over the solvent film, Formation of a metal post on the polymer buffer layer, Capsules of the metal post in an encapsulation material, Performing planarization on the encapsulation material to expose the metal post, Forming a redistribution structure above the encapsulation material and the metal post, Decomposition of a first section of the solvent film, leaving a second section of the solvent film after decomposition, and Forming an opening in the polymer buffer layer to expose the metal post. [2] Method according to claim 1, further comprising: Bonding a package component to the metal post, and Distributing an underfill between the package component and the second section of the solvent film. [3] Method according to claim 1 or 2, wherein the decomposition of the first section of the solvent film is carried out by projecting a laser beam onto the solvent film. [4] Method according to any of the preceding claims, wherein the solvent film comprises a polymer base material and carbon black particles. [5] Method according to any of the preceding claims, further comprising removing the second section of the solvent film before the opening is formed in the polymer buffer layer. [6] Method according to one of the preceding claims, wherein the opening extends into both the polymer buffer layer and the second section of the solvent film. [7] Method according to any of the preceding claims, wherein the first section of the solvent film has a first thickness before decomposition, and the solvent film has a second thickness before decomposition, and the ratio of the first thickness to the second thickness is in a range between approximately 0.4 and 0.7t. [8] Method comprising: layering an LTHC (Light To Heat Conversion) coating material onto a substrate, Forming a polymer buffer layer over the LTHC coating material, forming a metal seed layer in contact with the polymer buffer layer, forming a structured photoresist over the metal seed layer, wherein a section of the metal seed layer is exposed through an opening in the structured photoresist, Plating a metal post over the metal seed layer, Removing the textured photoresist, Etching the metal seed layer to expose the polymer buffer layer, Projecting a laser beam onto the LTHC coating material, wherein a working area of the laser beam covers a first section of the LTHC coating material, and a second section of the LTHC coating material is located outside the working area, Lifting off the carrier, and Forming a solder area that passes through the second section of the LTHC coating material. [9] Method according to claim 8, wherein, after the carrier has been lifted, the second section of the LTHC coating material remains as a continuous layer, and the continuous layer is free of any opening exposing the polymer buffer layer. [10] The method of claim 9, further comprising: Forming an opening in the second section of the LTHC coating material and the polymer buffer layer, wherein the solder area extends into the opening. [11] Method according to claim 9 or 10, further comprising removing the second section of the LTHC coating material. [12] Method according to any one of the preceding claims 8 to 11, wherein the projection of the laser beam comprises scanning the laser beam over an entirety of the LTHC coating material. [13] Method according to any one of the preceding claims 8 to 12, further comprising, after the carrier has been lifted, performing a planarization on the second section of the LTHC coating. [14] Method according to any one of the preceding claims 8 to 13, further comprising, after the carrier has been lifted and before the solder area is formed, etching a section of a remaining section of the metal seed layer. [15] Package, encompassing: a capsule material, a via that passes through the encapsulation material, a polymer buffer layer that contacts the via and the encapsulation material, an LTHC (Light To Heat Conversion) coating material that contacts the polymer buffer layer, and a solder area that passes through the LTHC coating material and the polymer buffer layer. [16] Package according to claim 15, wherein the LTHC coating material is designed to decompose under the heat of a laser beam. [17] Package according to claim 15 or 16, wherein the LTHC coating material comprises a base material and carbon black particles in the base material. [18] Package according to any one of the preceding claims 15 to 17, further comprising: a device die, and a die-fixing film that adheres the device die to the polymer buffer layer, wherein the device die and the die-fixing film are encapsulated by the encapsulation material. [19] Package according to any one of the preceding claims 15 to 18, wherein the LTHC coating material comprises several first sections and several second sections arranged in an alternating layout, and the several first sections are thinner than the several second sections. [20] Package according to claim 19, wherein the multiple first sections and the multiple second sections of the LTHC coating material are parallel strips.