IMAGE SENSOR WITH ABSORPTION ENHANCEMENT SHELL CONDUCTOR LAYER

Abstract

Image sensor, which includes the following: a front-side semiconductor layer (110), an absorption enhancement semiconductor layer (112) and a back-side semiconductor layer stacked together, wherein the absorption enhancement semiconductor layer (112) is stacked between the front-side and back-side semiconductor layers (110, 114), and wherein the absorption enhancement semiconductor layer (112) has an energy band gap that is lower than that of the front-side semiconductor layer (110); a multitude of protrusions (124) defined by the backside semiconductor layer (114), and a photodetector (120) defined by the front-side semiconductor layer (110), the absorption enhancement semiconductor layer (112) and the back-side semiconductor layer (114), wherein the front-side semiconductor layer (110) comprises silicon, and wherein the absorption enhancement semiconductor layer (112) comprises germanium or silicon-germanium, or wherein the absorption enhancement semiconductor layer (112) comprises silicon doped with a chalcogen.

Description

STATE OF THE ART

[0001] Integrated circuits (ICs) with image sensors are used in a wide range of modern electronic devices, such as cameras and mobile phones. More recently, complementary metal-oxide-semiconductor (CMOS) image sensors have come into widespread use, largely replacing charge-coupled device (CCD) image sensors. Compared to CCD image sensors, CMOS image sensors are preferred due to lower power consumption, small size, fast data processing, direct data output, and low manufacturing costs. Some types of CMOS image sensors include front-side illuminated (FSI) image sensors and back-side illuminated image sensors.

[0002] An image sensor and a manufacturing method are known from US 2015 / 0287761 A1. BRIEF DESCRIPTION OF THE DRAWINGS

[0003] Aspects of the present disclosure are best understood from the following detailed description with reference to the accompanying figures. It is emphasized that, in accordance with standard industry practice, various elements are not drawn to scale. Indeed, the dimensions of various elements may be arbitrarily exaggerated or reduced for clarity of discussion. Fig. 1 illustrates a cross-sectional view of some embodiments of an image sensor including an absorption enhancement semiconductor layer. The Fig. 2A to 2D illustrate cross-sectional views of various more detailed embodiments of the image sensor of the Fig. 1. Fig. Figure 3 illustrates a layout plan view of some embodiments of the image sensor of the Fig. 1 and 2A to 2D. The Fig. 4A to 4B illustrate cross-sectional views of various more detailed embodiments of the image sensor of the Fig. 3. The Fig. 5 to 12 illustrate a series of cross-sectional views of some embodiments of a method for forming a front-side illuminated (BSI) image sensor with an absorption enhancement semiconductor layer. Fig. 13 illustrates a flow diagram of some embodiments of the method of Fig. 5 to 12. The Fig. 14 to 21 illustrate a series of cross-sectional views of some embodiments of a method for forming a back-illuminated (BSI) image sensor with an absorption enhancement semiconductor layer. Fig. Figure 22 illustrates a flow diagram of some embodiments of the method of Fig. 14 to 21 DETAILED DESCRIPTION

[0004] The present disclosure provides many different embodiments or examples for implementing different features of this disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. For example, forming a first feature over or on a second feature in the following description may include embodiments where the first and second features are formed in direct contact, and may also include embodiments where additional features may be formed between the first and second features such that the first and second features may not be in direct contact. Furthermore, the present disclosure may repeat reference numerals and / or reference letters in the various examples.This repetition is intended for simplicity and clarity and does not itself prescribe any relationship between the various embodiments and / or configurations discussed.

[0005] Furthermore, spatial reference terms such as "below," "under," "lower," "above," "upper," and the like may be used herein for ease of description to describe the relationship of one feature or feature to one or more other features or features as illustrated in the figures. The spatial reference terms may be intended to encompass different orientations of the device or apparatus during use or operation in addition to the orientation depicted in the figures. The apparatus may be oriented differently (rotated 90 degrees or at other orientations), and the spatial reference descriptors used herein may be interpreted accordingly. Furthermore, the terms "first," "second," "third," "fourth," and the like are merely generic identifiers and may therefore be interchanged in various embodiments.For example, while an element (e.g., an etch, a dielectric layer, or a substrate) may be called a "first" element in some embodiments, the element may be called an initial character on a "second" element in other embodiments.

[0006] A complementary metal-oxide-semiconductor (CMOS) image sensor may include a monocrystalline silicon semiconductor substrate and an array of pixel sensors disposed within the semiconductor substrate. The pixel sensors include respective photodetectors embedded within the semiconductor substrate and further include respective pixel transistors disposed on a surface of the semiconductor substrate. The photodetectors are configured to absorb incident radiation and generate an electrical signal corresponding to the incident radiation.

[0007] One challenge with CMOS image sensors is that the CMOS image sensor cannot be used outdoors for radiation with a wavelength around 850 nanometers (referred to below as 850-nanometer radiation). While the CMOS image can be used indoors for 850-nanometer radiation, solar radiation outdoors induces noise that reduces the CMOS image sensor's sensitivity to 850-nanometer radiation. Furthermore, the CMOS image sensor lacks sufficient sensitivity to 850-nanometer radiation to compensate for the noise. Another challenge with the CMOS image sensor is that monocrystalline silicon has a high energy band gap and consequently a low absorption coefficient for long-wavelength radiation. Long-wavelength radiation, for example, includes radiation with a wavelength greater than approximately 900 nanometers.Therefore, unless improved, the CMOS image sensor has poor quantum efficiency for long-wavelength radiation. Quantum efficiency (QE) is the fraction of incident photons that contribute to the electrical signal. For example, the CMOS image sensor may have a quantum efficiency below 10% for radiation with a wavelength around 940 nanometers, and / or may have a quantum efficiency around 0% for radiation with a wavelength longer than approximately 1100 nanometers.

[0008] One approach to improving CMOS image sensors is to increase the thickness of the semiconductor substrate and the depth to which the photodetectors extend into the semiconductor substrate. The higher the wavelength of the incident radiation, the greater the absorption depth. However, this is difficult with existing CMOS processes and adds cost to the manufacturing of the CMOS image sensor. Furthermore, increasing the depth to which the photodetectors extend into the semiconductor substrate increases crosstalk and die size.

[0009] In view of the above, various embodiments of the present applications relate to an image sensor having an absorption-enhancing semiconductor layer. In some embodiments, the image sensor comprises a front-side semiconductor layer, an absorption-enhancing semiconductor layer, and a back-side semiconductor layer that are stacked. The absorption-enhancing semiconductor layer is stacked between the front-side and back-side semiconductor layers and has an energy band gap that is lower than that of the front-side semiconductor layer. In some embodiments, the image sensor further comprises a plurality of protrusions and a photodetector. The protrusions are defined by the back-side semiconductor layer. The photodetector is defined by the front-side and back-side semiconductor layers and the absorption-enhancing semiconductor layer.

[0010] Because the absorption-enhancing semiconductor layer has a low energy band gap compared to the front-side semiconductor layer, the absorption-enhancing semiconductor layer has a high absorption coefficient compared to the front-side semiconductor layer. This, in turn, improves the absorption of incident radiation by the photodetector, so that the photodetector has a high QE. The high QE allows the photodetector to be used for radiation with a long wavelength greater than about 800 nanometers. For example, the photodetector can be used for radiation with a wavelength greater than about 900, 940, 1100, or 1375 nanometers. As another example, the photodetector can be used outdoors for radiation with a wavelength between about 840 and 860 nanometers, regardless of noise from solar radiation. Furthermore, the high QE allows the photodetector to be used for radiation with a long wavelength without a high intensity.Cost, die size, crosstalk or any combination of these is / are therefore low.

[0011] With reference to Fig. 1, a cross-sectional view 100 of some embodiments of an image sensor including an enhanced absorption pixel sensor 102 is provided. The image sensor may be, for example, front-side illuminated (FSI) or back-side illuminated (BSI). Further, the image sensor may be, for example, a CMOS image sensor, and / or may be, for example, an integrated circuit (IC) die or chip. The enhanced absorption pixel sensor 102 is configured to absorb incident radiation 104 (e.g., light) having a high wavelength and is defined by a composite substrate 106 and a passivation layer 108. The high wavelength may be, for example, greater than about 800, 850, 940, 1100, or 1375 nanometers, and / or may be, for example, between about 1.0 and 2.5 micrometers, between about 0.8 and 2.5 micrometers, or about 0.8 and 3.0 micrometers.

[0012] The passivation layer 108 is located on a backside surface 106b of the composite substrate 106 to protect the backside surface 106b. The passivation layer 108 may comprise, for example, silicon dioxide, silicon nitride, a high-κ dielectric, any other dielectric, or any combination of the foregoing. As used herein, a high-κ dielectric may be, for example, a dielectric with a dielectric constant κ greater than about 3.9, 5, 10, or 20. The composite substrate 106 includes a frontside semiconductor layer 110, an absorption-enhancing semiconductor layer 112, and a backside semiconductor layer 114.

[0013] The front-side semiconductor layer 110 extends along and defines a front-side surface 106f of the composite substrate 106, which lies along the back-side surface 106b of the composite substrate 106. The back-side semiconductor layer 114 lies along and defines the back-side surface 106b of the composite substrate 106. In some embodiments, the back-side semiconductor layer 114 directly contacts the passivation layer 108. The front-side semiconductor layer 110 and the back-side semiconductor layer 114 may, for example, consist of or include silicon, another semiconductor material, or any combination thereof. In some embodiments, no semiconductor atoms other than silicon atoms are present on the front-side semiconductor layer 110 and / or the back-side semiconductor layer 114.

[0014] In some embodiments, the backside semiconductor layer 114 is or comprises a semiconductor material with a systematic pore structure (i.e., a porous semiconductor material). The backside semiconductor layer 114 may be made of or comprise nanoporous silicon, another porous silicon, or another porous semiconductor material. The pores may, for example, be micrometer-sized pores, nanometer-sized pores, smaller pores, or combinations of the foregoing. In some embodiments, the pores serve as a light trap for the incident radiation 104, thereby enhancing absorption. Angled sidewalls of a pore, for example, may make it difficult for radiation to enter the pore and subsequently reflect out of the pore. Instead, the radiation is more likely to reflect within the pore until absorbed.

[0015] The absorption-enhancing semiconductor layer 112 is stacked vertically between the front-side semiconductor layer 110 and the back-side semiconductor layer 114. In some embodiments, the absorption-enhancing semiconductor layer 112 directly contacts the front-side semiconductor layer 110 at the front-side heterojunction 116 and / or directly contacts the back-side semiconductor layer 114 at the back-side heterojunction 118. The absorption-enhancing semiconductor layer 112 has a low energy band gap to enhance absorption of the incident radiation 104. In some embodiments, the low energy band gap is an energy band gap that is lower than about 1.00, 0.80, 0.60, 0.66, or 0.40 electron volts (eV). Furthermore, in some embodiments, the low energy band gap is an energy band gap that is lower than that of the front-side semiconductor layer 110 and / or the back-side semiconductor layer 114.For example, the absorption-enhancing semiconductor layer 112 may have an energetic band gap lower than about 1.0 eV, while the front-side semiconductor layer 110 may have an energetic band gap higher than about 1.1, 1.5, 2.0, or 5.0 eV. In some embodiments, a difference between an energetic band gap of the absorption-enhancing semiconductor layer 112 and an energetic band gap of the front-side semiconductor layer 110 is about 0.46 eV or less, about 0.5 eV or less, between about 0.2 and 0.5 eV, or between about 0.4 and 0.5 eV. For example, the absorption enhancing semiconductor layer 112 may have such a difference from the front side semiconductor layer 110 if the absorption enhancing semiconductor layer 112 is or comprises silicon germanium and the front side semiconductor layer 110 is or comprises silicon.In some embodiments, the absorption-enhancing semiconductor layer 112 also has a direct energetic band gap to further enhance the absorption of the incident radiation 104. The direct energetic band gap may, for example, allow photons 104p from the incident radiation 104 to be absorbed without dependence on phonons (e.g., crystal vibrations). The absorption-enhancing semiconductor layer 112 may, for example, be or include germanium, silicon-germanium, silicon (e.g., monocrystalline silicon) doped with a chalcogen, another low energetic band gap semiconductor material, or any combination of the foregoing. The chalcogen may, for example, be or include sulfur (e.g., S), selenium (e.g., Se), tellurium (e.g., Te), another chalcogen, or any combination of the foregoing.In some embodiments where the absorption-enhancing semiconductor layer 112 is made of silicon doped with or includes the chalcogen, the absorption-enhancing semiconductor layer 112 includes no semiconductor atoms other than silicon atoms. Furthermore, in some embodiments where the absorption-enhancing semiconductor layer 112 is made of silicon doped with or includes the chalcogen, the absorption-enhancing semiconductor layer 112 is doped (i.e., supersaturated) beyond the solubility limit of the chalcogen to facilitate sub-bandgap absorption of the incident radiation 104.

[0016] In some embodiments, the absorption-enhancing semiconductor layer 112 has a thickness T of approximately 1 to 300 nm (10 to 3000 angstroms), 10 to 15 nm (100 to 1500 angstroms), 150 to 300 nm (1500 to 3000 angstroms), or a combination of the foregoing. In some such embodiments, the absorption-enhancing semiconductor layer 112 is made of Si 0,8 Ge 0,2 or comprises it. In some embodiments, the absorption enhancement semiconductor layer 112 is made of Si 0,8 Ge 0,2 or comprises, and / or has a thickness of about 95 to 105 nm (950 to 1050 angstroms), about 97.5 to 102.5 nm (975 to 1025 angstroms), or about 100 nm (1000 angstroms). In some embodiments, the front-side semiconductor layer 110 has the same crystalline orientation as the back-side semiconductor layer 114.

[0017] A photodetector 120 is defined by the composite substrate 106, which includes the absorption-enhancing semiconductor layer 112. The photodetector 120 may, for example, include a p-type semiconductor region (not shown), an n-type semiconductor region (not shown), and a photojunction (not shown). The p-type semiconductor region and the n-type semiconductor region are defined by the composite substrate 106, and the photojunction is defined by the p-type semiconductor region and the n-type semiconductor region. The photojunction may, for example, include a PN junction or a PIN junction. The photodetector 120 is configured to convert the incident radiation 104 into an electrical signal. The electrical signal may, for example, result from electron-hole pairs 122 generated in response to the composite substrate 106 absorbing photons 104p of the incident radiation 104.The photodetector 120 may be, for example, a photodiode or any other photodetector.

[0018] Because the absorption-enhancing semiconductor layer 112 has a low energy band gap, the absorption-enhancing semiconductor layer 112 has a high absorption coefficient. This, in turn, improves the absorption of the incident radiation 104 by the photodetector 120, so that the photodetector 120 has a high QE. The high QE allows the photodetector 120 to be used for radiation with a high wavelength greater than about 800 nanometers. For example, the photodetector 120 can be used for radiation with a wavelength greater than about 900, 940, 1100, or 1375 nanometers. As another example, the photodetector 120 can be used outdoors for radiation with a wavelength between about 840 and 860 nanometers, regardless of noise from solar radiation. Furthermore, the high QE allows the photodetector 120 to be used for high wavelength radiation without the composite substrate 106 having a large thickness.Cost, die size, crosstalk or any combination of these is / are therefore low.

[0019] In some embodiments, a plurality of protrusions 124 are defined by the composite substrate 106, which includes the backside semiconductor layer 114. For ease of illustration, only one of the protrusions 124 is labeled 124. The protrusions 124 are located along the backside surface 106b of the composite substrate 106 and at least partially define an absorption enhancement structure 126. The protrusions 124 are configured to prevent incident radiation from being reflected away from the photodetector 120. For example, the protrusions 124 may have angled sidewalls to provide such a reflectivity. By preventing incident radiation from being reflected away from the photodetector 120, the protrusions 124 increase the amount of radiation absorbed by the photodetector 120, which increases the sensitivity of the photodetector 120.

[0020] In some embodiments, the protrusions 124 are in a periodic pattern or a periodic arrangement. In some embodiments, the protrusions 124 each have a conical shape, a pyramidal shape, or any other shape. In some embodiments, the protrusions define a sawtooth profile. In some embodiments, the protrusions 124 have a pitch P of about 0.01 to 8.0 micrometers, about 0.2 to 5.0 micrometers, about 1.0 to 3.0 micrometers, or any combination of the foregoing. In some embodiments, the protrusions 124 have a height H of about 0.2 to 20.0 micrometers, about 1.0 to 15.0 micrometers, about 5.0 to 10.0 micrometers, or any combination of the foregoing.

[0021] In some embodiments where the backside semiconductor layer 114 is made of or comprises porous semiconductor material, the protrusions 124 and therefore the absorption enhancement structure 126 are fully or partially defined by the porous semiconductor material. In some embodiments, the combination of the porous semiconductor material and the protrusions 124 results in the absorption enhancement structure 126 having a direct energetic band gap, which increases the quantum efficiency of the photodetector 120.

[0022] With reference to Fig. 2A, is a cross-sectional view 200A of some more detailed embodiments of the image sensor of the Fig. 1. As illustrated, the first front-side semiconductor layer 110 includes a front-side charge collection region (CCR) 110c, a floating diffusion region (FDR) 110f, and a front-side bulk region 110b. The front-side bulk region 110b surrounds the front-side CCR 110c and lies on opposite sides of the front-side CCR 110c. Furthermore, the front-side bulk region 110b encloses a bottom surface of the FDR 110f. The FDR 110f and the front-side CCR 110c have a first doping type, and the front-side bulk region 110b has a second doping type opposite the first doping type. The first doping type and the second doping type may be, for example, n-type and p-type, respectively, or vice versa.The front side semiconductor layer 110 may, for example, consist of or comprise monocrystalline silicon, any other crystalline semiconductor material, or any other semiconductor material.

[0023] The absorption-enhancing semiconductor layer 112 includes an absorption-enhancing CCR 112c and an absorption-enhancing bulk region 112c, and the backside semiconductor region 114 includes a backside CCR 114c and a backside bulk region 114b. The absorption-enhancing bulk region 112c surrounds the absorption-enhancing CCR 112c and lies on opposite sides of the absorption-enhancing CCR 112c. The backside bulk region 114b surrounds the backside CCR 114c and lies on opposite sides of the backside CCR 110c. The absorption-enhancing CCR 112c and the backside CCR 114c have a first doping type, and the absorption-enhancing bulk region 112b and the backside bulk region 114b have the second doping type. The absorption enhancement semiconductor layer 112 is a semiconductor material having a low energy band gap compared to the front-side semiconductor layer 110 and / or the back-side semiconductor layer 114.The backside semiconductor layer 114 may be or comprise, for example, germanium, silicon-germanium, crystalline silicon doped with a chalcogen, or any other semiconductor material. The backside semiconductor region 114 may be, for example, or comprise silicon or any other semiconductor material. In some embodiments, the backside semiconductor region 114 is made of nanoporous silicon or any other porous semiconductor material.

[0024] Photodetector 120 is defined by front-side semiconductor layer 110, absorption-enhancing semiconductor layer 112, and back-side semiconductor layer 114. Photodetector 120 includes a first semiconductor region 120f, a second semiconductor region (unnamed), and a photojunction 120p. First semiconductor region 120f has an opposite doping to the second semiconductor region. First semiconductor region 120f is defined by front-side, absorption-enhancing, and back-side CCRs 110c, 112c, 114c. In some embodiments, the first semiconductor region 120f extends continuously with a single doping type from the front surface 106f of the composite substrate 106 to the back surface 106b of the composite substrate 106. The second semiconductor region is defined by the front, absorption enhancement, and back bulk regions 110b, 112b, 114b and surrounds the first semiconductor region 120f.In some embodiments, the second semiconductor region extends continuously with a single doping type from the first semiconductor region, from the front surface 106f of the composite substrate 106 to the back surface 106b of the composite substrate 106. The photojunction 120p is defined by the first semiconductor region 120f and the second semiconductor region.

[0025] During use of the image sensor, radiation incident on the photodetector 120 is absorbed by the first semiconductor region 120f and the second semiconductor region. As discussed above, the absorption-enhancing semiconductor layer 112 and the absorption-enhancing structure 126 enhance such absorption. In response to absorbing a photon of the radiation, an electron-hole pair is generated. If the electron-hole pair is generated within a depletion region 120p of the photojunction 120 or a diffusion region of the photojunction 120p, the electron of the pair diffuses, and the hole of the pair diffuses and / or drifts apart, respectively, to the first semiconductor region 120f and the second semiconductor region. For example, the electron of the pair diffuses and / or drifts to the first semiconductor region 120f, and the hole of the pair diffuses and / or drifts to the second semiconductor region, or vice versa.Such drifting can be caused, for example, by an electric field of the photojunction 120p. Since the second semiconductor region surrounds the first semiconductor region 120f, an electron or hole that diffuses and / or drifts toward the first semiconductor region 120f is trapped in the first semiconductor region 120f, causing charge to accumulate.

[0026] One or more pixel transistors are located on the front surface 106f of the composite substrate 106 to facilitate the output of the photodetector 120. The one or more pixel transistors may include a transfer transistor 202, a source follower transistor (not shown), a row select transistor (not shown), a reset transistor (not shown), any other pixel transistor, or any combination of the foregoing. The transfer transistor 202 is configured to selectively transfer charge accumulated in the first semiconductor region 120f of the photodetector 120 to the FDR 110f. In some embodiments, the transfer transistor 202 includes a first source-drain region (not labeled), a gate electrode 204, a gate dielectric layer 206, and a second source-drain region.The first source-drain region may, for example, be defined entirely or partially by the front-side, absorption enhancement, and back-side CCRs 110c, 112c, 114c. The second source-drain region may, for example, be defined entirely or partially by the FDR 110f.

[0027] The gate electrode 204 lies between and adjoins the first and second source-drain regions and is vertically spaced above the composite substrate 106 by the gate dielectric layer 206. The gate electrode 204 may comprise, for example, copper, aluminum-copper, any other metal, doped polysilicon, any other conductive material, or a combination of the foregoing. The gate dielectric layer 206 may comprise, for example, silicon dioxide, a high-kappa dielectric, any other dielectric, or any combination of the foregoing. The first and second source-drain regions are doped semiconductor regions of the composite substrate 106 that have opposite doping types than surrounding regions of the composite substrate 106. The first and second source-drain regions may be, for example, n-type or p-type.

[0028] In some embodiments, an isolation structure 208 extends into the front surface 106f of the composite substrate 106 and laterally surrounds the absorption-enhanced pixel sensor 102 to electrically isolate the absorption-enhanced pixel sensor 102 from surrounding components (not shown). Such surrounding components may include, for example, other pixel sensors, logic components, or memory devices. Further, in some embodiments, the isolation structure 208 extends laterally into a closed path to completely enclose the absorption-enhanced pixel sensor 102. The isolation structure 208 may, for example, have a planar top layout that is annular. Note that this is not within the cross-sectional view 200A of the Fig. 2A. The isolation structure 208 may be or include, for example, a shallow trench isolation (STI) structure, a deep trench isolation (DTI) structure, an implant isolation region, or any combination of the foregoing.

[0029] An interconnect structure 210 overlies the composite substrate 106 and the one or more pixel transistors (e.g., the transfer transistor 202). Further, where the isolation structure 208 is present, the interconnect structure 210 overlies the isolation structure 208. The interconnect structure 210 includes an interfacial dielectric layer (ILD) 212, a plurality of wires 214, and a plurality of vias 216. For ease of illustration, only some of the wires 214 are labeled 214, and only some of the vias 216 are labeled 216. The wires 214 and the vias 216 are alternately stacked in the ILD layer 212 and define conductive paths that interconnect the absorption-enhanced pixel sensor 102 and surrounding components (not shown). The vias 216 provide vertical guidance for the conductive paths, and the wires 214 provide lateral guidance for the conductive paths.The wires 214 may be or include, for example, aluminum-copper, copper, aluminum, any other conductive material, or any combination of the foregoing. The vias 216 may be or include, for example, copper, tungsten, any other conductive material, or any combination of the foregoing. The ILD layer 212 may be or include, for example, silicon dioxide, silicon nitride, a low-κ dielectric (for example, fluorosilicate glass - FSG), any other dielectric, or any combination of the foregoing. As used herein, a low-κ dielectric may be, for example, a dielectric having a dielectric constant κ greater than about 3.9, 3.0, 2.0, or 1.0.

[0030] With reference to Fig. 2B, is a cross-sectional view 200B of some other more detailed embodiments of the image sensor of the Fig. 1. As illustrated, Fig. 2B a variant of the Fig. 2A, which has a front-side buffer layer 218 and a back-side buffer layer 220.

[0031] The front-side buffer layer 218 separates the front-side semiconductor layer 110 from the absorption-enhancing semiconductor layer 112 and mitigates the effects of lattice mismatch between the absorption-enhancing semiconductor layer 112 and the front-side semiconductor layer 110. Such effects may include, for example, physical stress leading to dark current and white pixels. The front-side buffer layer 218 may, for example, be the same semiconductor material as or comprise the absorption-enhancing semiconductor layer 112, the same semiconductor material as the front-side semiconductor layer 110, any other semiconductor material, or a combination of the foregoing. Further, the front-side buffer layer 218 may, for example, comprise an increased carbon concentration compared to the absorption-enhancing semiconductor layer 112 and / or the front-side semiconductor layer 110.

[0032] The backside buffer layer 220 separates the backside semiconductor layer 114 from the absorption-enhancing semiconductor layer 112 and mitigates the effects of lattice mismatch between the absorption-enhancing semiconductor layer 112 and the backside semiconductor layer 114. The backside buffer layer 220 may, for example, be or include the same semiconductor material as the absorption-enhancing semiconductor layer 112, the same semiconductor material as the frontside semiconductor layer 114, any other semiconductor material, or a combination of the foregoing. Furthermore, the backside buffer layer 220 may, for example, include an increased carbon concentration compared to the absorption-enhancing semiconductor layer 112 and / or the backside semiconductor layer 114.

[0033] The photodetector 120 is defined by the front-side semiconductor layer 110, the absorption enhancement semiconductor layer 112, and the back-side semiconductor layer 114, and is further defined by the front-side buffer layer 218 and the back-side buffer layer 220. The first semiconductor region 120f of the photodetector 120 is defined by the front-side, absorption enhancement, and back-side CCRs 110c, 112c, 114c, and is further defined by the first regions (unlabeled) of the front-side and back-side buffer layers 218, 220 adjacent to the front-side, absorption enhancement, and back-side CCRs 110c, 112c, 114c.The second semiconductor region (unnamed) of the photodetector 120 is defined by the front-side, absorption enhancement, and back-side bulk regions 110b, 112b, 114b, and is further defined by second regions (unnamed) of the front-side and back-side buffer layers 218, 220 adjacent to the front-side, absorption enhancement, and back-side bulk regions 110b, 112b, 114b.

[0034] With reference to Fig. 2C, is a cross-sectional view 200C of some other more detailed embodiments of the image sensor of the Fig. 1. As illustrated, Fig. 2C a variant of the Fig. 2A, in which the backside semiconductor layer 114 comprises a porous semiconductor layer 222 and a crystalline semiconductor layer 224.

[0035] The porous semiconductor layer 222 lies beneath the crystalline semiconductor layer 224 and defines the backside surface 106b of the composite substrate 106. The porous semiconductor layer 222 includes a porous CCR 222c and a porous bulk region 222b. The porous bulk region 222b surrounds the porous CCR 222c and lies on opposite sides of the porous CCR 222c. Furthermore, the porous bulk region 222b has an opposite doping type to the porous CCR 222c. The porous bulk region 222b has the same doping type as the front-side and absorption-enhancing bulk regions 110b, 112b, and the porous CCR 222c has the same doping type as the front-side and absorption-enhancing CCRs 110c, 112c. The porous semiconductor layer 222 is nanoporous silicon or comprises this or any other semiconductor material with a systematic pore structure.The pores can be, for example, micrometer-sized pores, nanometer-sized pores, smaller sizes, or combinations of the above.

[0036] The crystalline semiconductor layer 224 separates the porous semiconductor layer 222 from the absorption-enhancing semiconductor layer 112 and does not have a systematic pore structure. The crystalline semiconductor layer 224 may, for example, be free of a systematic structure of nanometric and / or micrometric pores. Furthermore, the crystalline semiconductor layer 224 comprises a crystalline CCR 224c and a crystalline bulk region 224b. The crystalline bulk region 224b surrounds the crystalline CCR 224c and lies on opposite sides of the crystalline CCR 224c. Furthermore, the crystalline bulk region 224b has an opposite doping type to the crystalline CCR 224c. The crystalline bulk region 224b has the same doping type as the front-side and absorption-enhancing bulk regions 110b, 112b, and the crystalline CCR 224c has the same doping type as the front-side and absorption-enhancing CCRs 110c, 112c.The crystalline semiconductor layer 224 may, for example, be monocrystalline silicon, polycrystalline silicon, or any other crystalline semiconductor material. Furthermore, the crystalline semiconductor layer 224 may, for example, have an indirect energy band gap.

[0037] The protrusions 124 and therefore the absorption enhancement structure 126 are at least partially defined by the porous semiconductor layer 222. In some embodiments, the pore size of the porous semiconductor layer 222 gradually increases or decreases from the tips of the protrusions 124 to the crystalline semiconductor layer 224. For example, the pore size may gradually decrease from an average size of about 40 nanometers at the tips to an average size of about 8 nanometers at the interface where the porous semiconductor layer 222 and the crystalline semiconductor layer 224 directly contact each other. In some embodiments, the absorption enhancement structure 126 has a direct energetic band gap due to the combination of the protrusions 124 and the porous semiconductor layer 222. This, in turn, allows the absorption enhancement structure 126 to absorb incident radiation without phonons (e.g., crystal vibrations).

[0038] The photodetector 120 is defined by the front-side semiconductor layer 110, the absorption-enhancing semiconductor layer 112, the back-side semiconductor layer 222, the porous semiconductor layer 222, and the crystalline semiconductor layer 224. The first semiconductor region 120f of the photodetector 120 is defined by the porous and crystalline front-side absorption-enhancing CCRs 110c, 112c, and 114c. The second semiconductor region (unnamed) of the photodetector is defined by the porous and crystalline front-side absorption-enhancing bulk regions 110b, 112c, 222b, and 224b. Furthermore, the photodetector 120 overlaps the absorption enhancement structure 126. Because the photodetector 120 overlaps the absorption enhancement structure 126, the quantum efficiency of the photodetector 120 is improved by the absorption enhancement structure 126. For example, the direct band gap of the absorption enhancement structure 126 improves the quantum efficiency of the photodetector 120.

[0039] Although Fig. 2C illustrates the backside semiconductor layer 114 as comprising both the porous semiconductor layer 222 and the crystalline semiconductor layer 224, the crystalline semiconductor layer 224 may be omitted in other embodiments. In some such other embodiments, the porous semiconductor layer 222 may occupy the space currently occupied by the crystalline semiconductor layer 224 in Fig. 2C is occupied.

[0040] With reference to Fig. 2D, is a cross-sectional view 200D of some other more detailed embodiments of the image sensor of the Fig. 1. As illustrated, Fig. 2D a variant of the Fig. 2A, in which the backside semiconductor layer 114 comprises the porous semiconductor layer 222 and the crystalline semiconductor layer 224, and in which the frontside buffer layer 218 and the backside buffer layer 220 separate the absorption-enhancing semiconductor layer 112 from the frontside semiconductor layer 110 and the backside semiconductor layer 114, respectively. The porous semiconductor layer 222 and the crystalline semiconductor layer 224 may, for example, as described with reference to Fig. 2C, and the front-side buffer layer 218 and the back-side buffer layer 220 may be formed, for example, as described with reference to Fig. 2B.

[0041] With reference to Fig. 3 shows a layout plan view 300 of some embodiments of the image sensor of the Fig. 1 and 2A through 2D. As illustrated, a logic region 302 laterally surrounds a pixel sensor array 304. The logic region 302 includes, for example, logic and / or memory components (not shown) configured to read and / or store data generated by the pixel sensor array 304 in response to incident radiation.

[0042] The pixel sensor array 304 consists of a plurality of absorption-enhanced pixel sensors 306 arranged in X-rows and Y-columns. For ease of illustration, only some of the absorption-enhanced pixel sensors 306 are designated 306. X and Y are integers greater than zero and may, for example, be the same or different. For example, X and Y may both be 128, 256, 512, 1024, 2048, or 4096. As another example, X and Y may be, respectively, 768 and 1024, 1024 and 2048, 256 and 1024, 512 and 128, or 4096 and 1024. The absorption-enhanced pixel sensors 306 are each individually configured like the absorption-enhanced pixel sensor 102 in any of the Fig. 1 and 2A to 2D are configured.

[0043] An isolation structure 208 laterally surrounds the pixel sensor array 304 to electrically isolate the pixel sensor array 304 from the logic region 302. Furthermore, the isolation structure 208 laterally surrounds each of the absorption-enhanced pixel sensors 306 to electrically isolate the absorption-enhanced pixel sensors 306 from one another.

[0044] With reference to the Fig. 4A and Fig. 4B, are cross-sectional views 400A, 400B of various embodiments of the image sensor of the Fig. 3. The cross-sectional views 400A, 400B may be taken, for example, along line A in Fig. 3 should be taken.

[0045] As shown in cross-sectional view 400A of Fig. 4A, the image sensor is FSI and includes a plurality of absorption-enhanced pixel sensors 306a to 306c. The absorption-enhanced pixel sensors 306a to 306c are individually configured according to the absorption-enhanced pixel sensor 102 of the Fig. 2A, but may alternatively be configured individually according to the absorption-enhanced pixel sensor 102 of any of the Fig. 1 and 2B to 2D. Further, the absorption-enhanced pixel sensors 306a to 306c are covered by the interconnect structure 210 and are each configured to receive incident radiation 104 through the front surface 106f and the interconnect structure 210. In some embodiments, the wires 214 of the interconnect structure 210 and the vias 216 of the interconnect structure 210 are confined to the photodetector 120 side of the absorption-enhanced pixel sensors 306a to 306c (i.e., they are not directly over the photodetectors 120) so that radiation is not prevented from impinging on the photodetectors 120. For ease of illustration, only some of the wires 214 are labeled 214, only some of the vias 216 are labeled 216, and only some of the photodetectors 120 are labeled 120.

[0046] In some embodiments, a support substrate 402 underlies and is bonded to the passivation layer 108. The support substrate 402 may, for example, be a bulk silicon substrate, any other bulk semiconductor substrate, or any other substrate. In some embodiments, color filters 404 cover the absorption-enhanced pixel sensors 306a-306c, respectively. The color filters 404 are configured to transmit assigned radiation wavelengths while blocking unassigned radiation wavelengths. For example, one color filter may be configured to transmit red radiation wavelengths while blocking blue radiation wavelengths, while another color filter may be configured to transmit blue radiation wavelengths while blocking red radiation wavelengths.In some embodiments, the color filters 404 are each covered by microlenses 406 configured to focus incident radiation onto the photodetectors 120 of the absorption-enhanced pixel sensors 306a-306c, respectively. For ease of illustration, only some of the color filters 404 are labeled 404, and only some of the microlenses 406 are labeled 406.

[0047] As shown in cross-sectional view 400B of Fig. 4B illustrates a variant of the Fig. 4A, where the image sensor is BSI. In contrast to Fig. 4A, the absorption-enhanced pixel sensors 306a to 306c lie above the interconnect structure 210. Furthermore, the absorption-enhanced pixel sensors 306a to 306c are each configured to receive incident radiation 104 through the backside surface 106b and the passivation layer 108. As in Fig. 2A, the absorption-enhanced pixel sensors 306a to 306c are individually configured according to the absorption-enhanced pixel sensor 102 of the Fig. 2A, but may alternatively be configured individually according to the absorption-enhanced pixel sensor 102 of any of the Fig. 1 and 2B to 2D must be configured.

[0048] With reference to the Fig. 5 to 12, a series of cross-sectional views 500 to 1200 of some embodiments of a method for forming an FSI image sensor with absorption-enhanced pixel sensors is provided. The method can be used, for example, to form the image sensor of Fig. 4A. As noted above, the image sensor of the Fig. 4A in relation to an embodiment of the Fig. 2A, but may alternatively be used with the embodiments of any of the Fig. 1 and 2B to 2D. It must therefore be understood that the method can also be used with the embodiments of any of the Fig. 1 and 2B to 2D can be used.

[0049] As can be seen from the cross-sectional view 500 of the Fig. 5, a front-side semiconductor layer 110 is provided. In some embodiments, the front-side semiconductor layer 110 is a bulk silicon substrate, a bulk semiconductor substrate, or any other semiconductor substrate. In some embodiments, the front-side semiconductor layer 110 is made of or comprises monocrystalline silicon, any other silicon, or any other porous semiconductor material. In some embodiments, the front-side semiconductor layer 110 has a single material. In some embodiments, the front-side semiconductor layer 110 has n- or p-type doping. In some embodiments, the front-side semiconductor layer 110 has a single doping type.

[0050] An absorption enhancement semiconductor layer 112 formed covering a front side semiconductor layer 110 is also shown in the cross-sectional view 500 of Fig. 5. This absorption-enhancing semiconductor layer 112 has a low energy band gap. In some embodiments, the low energy band gap is an energy band gap that is less than about 1.00 eV, 0.80 eV, 0.60 eV, 0.66 eV, or 0.40 eV. Further, in some embodiments, the low energy band gap is an energy band gap that is smaller than that of the front-side semiconductor layer 110. In some embodiments, the absorption-enhancing semiconductor layer 112 also has a direct energy band gap. As a result of the low energy band gap and / or the direct energy band gap, the absorption-enhancing semiconductor layer 112 has a high absorption coefficient, which improves the QE of photodetectors formed thereafter. In some embodiments, the absorption enhancement semiconductor layer 112 has an n- or p-type doping.In some embodiments, the absorption-enhancing semiconductor layer 112 has the same doping type as the front-side semiconductor layer 110 and / or has a single doping type. The absorption-enhancing semiconductor layer 112 may be, for example, or comprise germanium, silicon-germanium, silicon, crystalline silicon doped with a chalcogen, another low-energy band-gap semiconductor material, or a combination of the foregoing. The chalcogen may be, for example, or comprise sulfur (e.g., S), selenium (e.g., Se), tellurium (e.g., Te), another chalcogen, or any combination of the foregoing.

[0051] In some embodiments, the absorption-enhancing semiconductor layer 112 is formed by doping a bulk semiconductor substrate with the chalcogen. In such embodiments, the absorption-enhancing semiconductor layer 112 is a chalcogen-doped region of the bulk semiconductor substrate, and the front-side semiconductor layer 110 is a remainder of the bulk semiconductor substrate. The doping may also be performed, for example, by ion implantation or any other doping process. Furthermore, in some embodiments in which the absorption-enhancing semiconductor layer 112 is doped with the chalcogen, the absorption-enhancing semiconductor layer 112 is doped beyond the solubility limit of the chalcogen (i.e., supersaturated) to facilitate subband-column absorption of the photons.Supersaturation can be carried out, for example, by ion implantation followed by pulsed laser melting (for example, 1 to 7, 2 to 6, 3 to 5 or 4 laser shots).

[0052] In other embodiments, the absorption-enhancing semiconductor layer 112 is formed by epitaxy. The epitaxy may be performed, for example, by chemical vapor deposition (CVD), physical vapor deposition (PVD), any other deposition process, molecular beam epitaxy, or any other epitaxial process. In some of the epitaxial embodiments, the absorption-enhancing semiconductor layer 112 is made of or comprises silicon-germanium or germanium. Alternatively, in some of the epitaxial embodiments, the absorption-enhancing semiconductor layer 112 is made of or comprises crystalline silicon doped with the chalcogen. The doping may also be performed, for example, by ion implantation or any other doping process.Furthermore, in some of the epitaxial embodiments, the absorption enhancement semiconductor layer 112 is supersaturated with the chalcogen as described above.

[0053] As can be seen from the cross-section 500 of the Fig. 5, a backside semiconductor layer 114 is formed covering the absorption-enhancing semiconductor layer 112. In some embodiments, the backside semiconductor layer 114 has an n- or p-type doping. In some embodiments, the backside semiconductor layer 114 has a single doping type. In some embodiments, the backside semiconductor layer 114 has the same doping type as the frontside semiconductor layer 110 and / or the absorption-enhancing semiconductor layer 112. In some embodiments, the backside semiconductor layer 114 has a higher energy band gap than the absorption-enhancing semiconductor layer 112. The backside semiconductor layer 114 may be, for example, monocrystalline silicon, porous silicon, any other semiconductor material, the same semiconductor material as the frontside semiconductor layer 110, or any combination of the foregoing.In some embodiments, the backside semiconductor layer 114 has a single material. The backside semiconductor layer 114 may be formed, for example, by CVD, PVD, any other deposition process, molecular beam epitaxy, or any other epitaxial process.

[0054] In some embodiments, the thickness T of the absorption-enhancing semiconductor layer 112 is controlled such that the backside semiconductor layer 114 has the same crystalline direction as the frontside semiconductor layer 110. For example, if the thickness T of the absorption-enhancing semiconductor layer 112 is large, the backside semiconductor layer 114 may have a different crystalline direction than the frontside semiconductor layer 110. Furthermore, in some embodiments in which the absorption-enhancing semiconductor layer 112 is or comprises silicon-germanium, a germanium concentration in the absorption-enhancing semiconductor layer 112 is controlled such that the backside semiconductor layer 114 has the same crystalline direction as the frontside semiconductor layer 110. In some embodiments, the absorption-enhancing semiconductor layer 112 is Si 0,8 Ge 0,2or comprises it, and has a thickness T between about 100 nm to 300 nm (1000 to 3000 angstroms), about 90 to 110 nm (900 to 1100 angstroms), or about 50 nm to 1500 nm (500 to 1500 angstroms), so that the backside semiconductor layer 114 has the same crystalline direction as the frontside semiconductor layer 110.

[0055] The backside semiconductor layer 114, the absorption-enhancing semiconductor layer 112, and the frontside semiconductor layer 110 define a composite substrate 106. The frontside semiconductor layer 110 extends along and defines a frontside surface 106f of the composite substrate 106, and the backside semiconductor layer 114 extends along and defines a backside surface 106b of the composite substrate 106. The backside surface 106b and the frontside surface 106f lie on opposite sides of the composite substrate 106.

[0056] As can be seen from the cross-sectional view 600 of the Fig. 6, a plurality of protrusions 124 are formed in the composite substrate 106, including the backside semiconductor layer 114. For ease of illustration, only one of the protrusions 124 is labeled 124. The protrusions 124 at least partially define an absorption enhancement structure 126 and prevent incident radiation from reflecting away from the composite substrate 106. The protrusions 124 may, for example, have angled sidewalls to provide such reflectivity. As a result, the protrusions 124 enhance the sensitivity of photodetectors subsequently formed in the composite substrate 106. In some embodiments, the protrusions 124 are in a periodic patterning or array. In some embodiments, the protrusions 124 each have a cone shape, a pyramid shape, or any other shape. In some embodiments, the protrusions define a sawtooth profile.

[0057] In some embodiments, a process for forming the protrusions 124 includes dry etching the backside semiconductor layer 114. For example, a photoresist layer 602 may be formed on the backside semiconductor layer 114 and patterned with a pattern of the protrusions 124. A dry etchant may then be applied to the backside semiconductor layer 114 with the photoresist layer 602 in place to form the protrusions 124, and the photoresist layer 602 may subsequently be stripped. In some embodiments, the dry etchant damages the backside semiconductor layer 114, resulting in electron traps along the backside surface 106b of the composite substrate 106. The electron traps, in turn, may lead to leakage current, dark current, and white pixels. In some embodiments, the process for forming the protrusions 124 therefore further includes wet etching the backside semiconductor layer 114 to remove the damage.For example, a wet etchant may be applied to the backside semiconductor layer 114 before or after stripping the photoresist layer 602. The wet etchant may be, for example, tetramethylammonium hydroxide (TMAH) or any other wet etchant.

[0058] In some embodiments, a systematic pore structure is formed in the backside semiconductor layer 114. The pores may, for example, be micrometer-sized, nanometer-sized, smaller pores, or combinations of the foregoing. The pores serve as a light trap for the incident radiation, thereby improving the QE of the photodetectors formed thereafter. Furthermore, in some embodiments, the combination of the systematic pore structure and the protrusions 124 results in the absorption-enhancing structure 126 having a direct energetic band gap, which also improves the QE of the photodetectors. In some embodiments, a process for forming the systematic pore structure includes performing an etch into the backside semiconductor layer 114.The etching may be performed, for example, by applying a solution of hydrofluoric acid to the backside semiconductor layer 114 and then activating the hydrofluoric acid. The hydrofluoric acid may be activated, for example: electrochemically by applying a sufficient voltage to the solution (anodic etching), electrochemically by adding an oxidant with a sufficient standard electrode potential to the solution (stain etching), or photoelectrochemically by irradiating the solution with a laser or lamp with a sufficiently short wavelength to excite electrons in the solution to the conduction band. In some embodiments, the solution further comprises iron nitride. The process for forming the systematic pore structure may be performed before, during, or after the process for forming the protrusions 124.

[0059] As can be seen from the cross-sectional view 700 of the Fig. 7, a passivation layer 108 is formed covering the backside surface 106b of the composite substrate 106. The passivation layer 108 has an inner surface 108i facing the backside surface 106b of the composite substrate 106 and further has an outer surface 1080 opposite the inner surface 108i. In some embodiments, the inner surface 108i of the passivation layer 108 conforms to and / or directly contacts the backside surface 106b of the composite substrate 106. In some embodiments, the outer surface 1080 of the passivation layer 108 is substantially flat and / or substantially planar. The passivation layer 108 may comprise, for example, silicon dioxide, silicon nitride, a high-kappa dielectric, any other dielectric, or any combination of the foregoing.

[0060] In some embodiments, a process for forming the passivation layer 108 includes depositing the passivation layer 108 on the backside surface 106b of the composite substrate 106 and then performing planarization into the outer surface 1080 of the passivation layer 108. The deposition may be performed, for example, by thermal oxidation, CVD, PVD, sputtering, or any other deposition process. The planarization may be performed, for example, by chemical mechanical polishing (CMP) or any other planarization process.

[0061] As can be seen from the cross-sectional view 800 of the Fig. As illustrated in Figure 8, in some embodiments, the backside surface 106b of the composite substrate 106 is bonded to a support substrate 402 through the passivation layer 108. The support substrate 402 may be, for example, a monocrystalline bulk silicon substrate, any other silicon substrate, an SOI substrate, any other semiconductor substrate, or any other substrate. In some embodiments, the bonding is performed by a fusion bonding process or any other bonding process.

[0062] As can be seen from the cross-sectional view 900 of the Fig. 9 illustrates the structure of the Fig. 8 vertically flipped. Furthermore, the composite substrate 106 is thinned at the front surface 106f of the composite substrate 106, thereby reducing the thickness of the composite substrate 106 and a thickness of the front semiconductor layer 110. The thinning reduces a thickness of the composite substrate 106 from a first thickness T1 to a second thickness T2. The second thickness T2 may, for example, be smaller than a third thickness T3 of the support substrate 402. In some embodiments, the composite substrate 106 is thinned by performing an etch and / or planarization into the front semiconductor layer 110. The planarization may, for example, be performed by CMP or any other planarization process.

[0063] As can be seen from the cross-sectional view 1000 of the Fig. As illustrated in Figure 10, a plurality of absorption-enhanced pixel sensors 306a to 306c are formed on the front surface 106f of the composite substrate 106. Each of the absorption-enhanced pixel sensors 306a to 306c includes a photodetector 120 defined by the front-side semiconductor layer 110, the absorption-enhancing semiconductor layer 112, and the back-side semiconductor layer 114. For ease of illustration, only some of the photodetectors 120 are labeled 120. The photodetector 120 of the absorption-enhanced pixel sensors 306a to 306c includes a first semiconductor region 120f, a second semiconductor region (not labeled), and a photojunction 120p. For ease of illustration, only some of the first semiconductor regions 120f are named 120f, and only some of the photojunctions 120p are named 120p.The first semiconductor region 120f has a first doping type, and the second semiconductor region has a second doping type opposite to the first doping type. The first semiconductor region 120f is surrounded by the second semiconductor region, and the first semiconductor region 120f and the second semiconductor region partially or completely define the photojunction 120p. The photojunction 120p can be, for example, a PN junction, a PIN junction, or any other photojunction.

[0064] In some embodiments, the first semiconductor region 120f of the absorption-enhanced pixel sensors 306a-306c is defined entirely or partially by a front-side CCR 110c of the front-side semiconductor layer 110, an absorption-enhancing CCR 112c of the absorption-enhancing semiconductor layer 112, and a back-side CCR 114c of the back-side semiconductor layer 114. For ease of illustration, only some of the front-side CCRs 110c are labeled 110c, only some of the absorption-enhanced CCRs 112c are labeled 112c, and only some of the back-side CCRs 114c are labeled 114c.In some embodiments, the second semiconductor regions of the absorption-enhanced pixel sensors 306a to 306c are fully or partially defined by a front-side bulk region 110b of the front-side semiconductor layer 110, an absorption-enhancing bulk region 112b of the absorption-enhancing semiconductor layer 112, and a back-side bulk region 114b of the back-side semiconductor layer 114.

[0065] In some embodiments, a process for forming the photodetector 120 includes implanting dopants into the composite substrate 106 to form the first semiconductor regions 120f. In some embodiments, the semiconductor substrate 106 initially has a single doping type, so that the doping is performed using dopants of an opposite doping type. The doping may be performed, for example, using ion implantation or any other doping process, and / or may, for example, use a photoresist mask to selectively implant the dopants.

[0066] Each of the absorption-enhanced pixel sensors 306a to 306c further includes a transfer transistor 202. For ease of illustration, only some of the transfer transistors 202 are labeled 202. Each transfer transistor 202 of the absorption-enhanced pixel sensors 306a to 306c includes a gate electrode 204, a gate dielectric layer 206, a first source-drain region (unlabeled), and a second source-drain region (unlabeled). For ease of illustration, only some of the gate electrodes 204 are labeled 204, and only some of the gate dielectric layers 206 are labeled 206. The gate dielectric layer 206 overlies the front-side semiconductor layer 110, and the gate electrode 204 overlies the gate dielectric layer 206.The first and second source-drain regions are at least partially defined by the front-side semiconductor layer 110 and have the same doping type, which is opposite to that of the front-side bulk region 110b. Furthermore, the first and second source-drain regions are each located on opposite sides of the gate electrode 204, such that the gate electrode 204 is sandwiched between the first and second source-drain regions. The first source-drain region may, for example, be defined by a respective one of the first semiconductor regions 120f of the photodetectors 120. The second source-drain region may, for example, be defined by a floating diffusion region (FDR) 110f of the front-side semiconductor layer 110.

[0067] In some embodiments, a process for forming the transfer transistors 202 is performed before forming the photodetectors 120. In other embodiments, the process for forming the transfer transistors 202 is performed during the formation of the photodetectors 120. Further, in some embodiments, the process for forming the transfer transistors 202 includes forming a dielectric layer and an electrode layer stacked on the front-side semiconductor layer 110. The dielectric layer may be formed, for example, by thermal oxidation, PVD, CVD, sputtering, any other deposition process, or any combination of the foregoing. The electrode layer may be formed, for example, by electrochemical plating, electroless plating, PVD, CVD, sputtering, any other deposition or plating process, or any combination of the foregoing.Furthermore, in some embodiments, the process of forming the transfer transistors 202 includes performing an etch into the dielectric layer and the electrode layer to define the gate electrodes 204 and the gate dielectric layers 206, and then implanting dopants into the front-side semiconductor layer 110 to define the first and second source-drain regions.

[0068] Also from the cross-sectional view 1000 of the Fig. 10, an isolation structure 208 is also formed, extending into the front-side semiconductor layer 110 to separate and surround the absorption-enhanced pixel sensors 306a-306c. In some embodiments, the isolation structure 208 is formed prior to forming the absorption-enhanced pixel sensors 306a-306c. The isolation structure 208 may, for example, be formed as an STI structure, a DTI structure, an implant isolation region, or any other isolation structure. In some embodiments, the process of forming the isolation structure 208 includes etching the front-side semiconductor layer 110 to form trenches and then filling the trenches with a dielectric material.

[0069] As can be seen from the cross-sectional view 1100 of the Fig. 11, an interconnect structure 210 is formed covering the absorption-enhanced pixel sensors 306a-306c and the composite substrate 106. The interconnect structure 210 includes an ILD layer 212, a plurality of wires 214, and a plurality of vias 216. For ease of illustration, only some of the wires 214 are labeled 214, and only some of the vias 216 are labeled 216. The wires 214 are alternately stacked with the vias 216 in the ILD layer 212 to define electrically conductive paths that couple the absorption-enhanced pixel sensors 306a-306c to each other and / or other devices.

[0070] In some embodiments, a process for forming interconnect structure 210 includes repeatedly forming an ILD sublayer (i.e., a sublayer of ILD layer 212) over composite substrate 106, performing planarization into a top surface of the ILD sublayer, selectively etching the ILD sublayer to form a via opening and / or a wire opening, and filling the via opening and / or the wire opening with a conductive material. The ILD sublayer may be formed, for example, by thermal oxidation, PVD, CVD, sputtering, any other deposition process, or any combination of the foregoing. The planarization may be performed, for example, by CMP or any other planarization process. The selective etching may be performed "selectively," for example, using photolithography.The filling may be performed, for example, by CVD, PVD, electroplating, electroless plating, any other deposition or plating process, or any combination of the foregoing. In some embodiments, the process of forming the interconnect structure 210 includes repeatedly performing a dual damascene process or a single damascene process to form the wires 214 and the vias 216. The dual damascene process forms two conductive features (e.g., a wire and a via) simultaneously, while the single damascene process forms a single conductive feature (e.g., a wire or a via) at a time.

[0071] As can be seen from the cross-sectional view 1200 of the Fig. As illustrated in Figure 12, a plurality of color filters 404 are formed on the interconnect structure 210. For ease of illustration, only some of the color filters 404 are labeled 404. The color filters 404 are respectively overlying the absorption-enhanced pixel sensors 306a-306c, and each passes associated radiation wavelengths while blocking unassociated radiation wavelengths. In some embodiments, the color filters 404 are formed by forming a color filter layer for first radiation wavelengths, patterning the color filter layer, and then repeating for different radiation wavelengths.

[0072] As also shown in cross-sectional view 1200 of the Fig. As illustrated in Figure 12, a plurality of microlenses 406 are formed on the color filters 404. For ease of illustration, only some of the microlenses 406 are labeled 406. The microlenses 406 each overlie the color filters 404 and focus incident radiation onto the absorption-enhanced pixel sensors 306a-306c, respectively. In some embodiments, a process for forming the microlenses 406 includes forming a microlens layer over the color filters 404 and then patterning the microlens layer into microlens templates that are unique to the microlenses 406.

[0073] Although not illustrated, in other embodiments, an additional absorption-enhancing semiconductor layer may be formed conforming to the protrusions 124 between the passivation layer 108 and the backside semiconductor layer. The additional absorption-enhancing semiconductor layer may, for example, be formed like the absorption-enhancing semiconductor layer 112 as described with reference to Fig. 5, and / or may be, for example, like the absorption enhancement semiconductor layer 112 described with respect to Fig. 5. A challenge with these other embodiments is that other components may be mounted on the composite substrate (106) (see, for example, logic area 302 of Fig. 3) Temperatures may limit the temperatures used during formation of the additional absorption-enhancing semiconductor layer. Exceeding the temperature limit may damage these other components. As a result of the temperature limit, the additional absorption-enhancing semiconductor layer may have poor crystalline quality and / or dopants that are not fully activated, which can lead to leakage current, dark current, and white pixels. Note that because the absorption-enhancing semiconductor layer 112 is formed early in the process, the absorption-enhancing semiconductor layer 112 is not subject to any temperature limit.

[0074] With reference to Fig. 13, is a flowchart 1300 of some embodiments of the method of Fig. 5 to 12 provided.

[0075] At 1302, an absorption-enhancing semiconductor layer is formed on a front-side semiconductor layer. The absorption-enhancing semiconductor layer has an energy band gap that is lower than that of the front-side semiconductor layer. See, for example, Fig. 5. The high-absorption layer can be, for example, germanium, silicon-germanium, or monocrystalline silicon doped with a chalcogen. The high-absorption layer can also have, for example, a direct energy band gap or an indirect energy band gap.

[0076] At 1302, a backside semiconductor layer is also formed on the absorption-enhancing semiconductor layer. The frontside semiconductor layer, the absorption-enhancing semiconductor layer, and the backside semiconductor layer together define a composite substrate. See, for example, Fig. 5.

[0077] At 1304, a plurality of protrusions are formed in the backside semiconductor layer along a backside surface of the composite substrate. The protrusions at least partially define an absorption enhancement structure. See, for example, Fig. 6.

[0078] In 1306, a passivation layer is formed on the back surface of the composite substrate. See, for example, Fig. 7.

[0079] In 1308, a carrier substrate is bonded to the back surface of the composite substrate through the passivation layer. See, for example, Fig. 8.

[0080] At 1310, the composite substrate is thinned at a front surface of the composite substrate, thereby thinning a thickness of the composite substrate and a thickness of the front semiconductor layer. See, for example, Fig. 9.

[0081] At 1312, a pixel sensor is formed on the front surface of the composite substrate. The pixel sensor includes a photodetector partially defined by the absorption-enhancing semiconductor layer and the absorption-enhancing structure. See, for example, Fig. 10. Because the absorption-enhancing semiconductor layer has a low energy band gap, the absorption-enhancing semiconductor layer has a high absorption coefficient. This, in turn, improves the absorption of incident radiation by the photodetector, so that the photodetector has a high QE. The high QE allows the photodetector to be used for irradiation with long wavelengths greater than about 800 nanometers. Furthermore, the high QE allows the photodetector to be used for radiation with long wavelengths without high intensity. Cost, die size, crosstalk, or any combination of these is / are therefore low.

[0082] At 1314, an interconnect structure is formed covering the pixel sensor on the front surface of the composite substrate. The interconnect structure includes an ILD layer, wires, and vias, and the wires and vias are alternately stacked in the ILD layer. See, for example, Fig. 11.

[0083] At 1316, a color filter and a microlens are stacked on the interconnect structure. See, for example, Fig. 12.

[0084] Although the flowchart 1300 of the figure is illustrated and described herein as a series of acts or events, it will be appreciated that the illustrated sequence of such acts or events is not to be construed in a limiting sense. For example, some acts may occur in different orders and / or concurrently with other acts or events separate from those illustrated and / or described herein. Further, not all of the illustrated acts may be required to practice one or more aspects or embodiments of the description, and one or more of the acts depicted herein may be performed at one or more separate acts and / or phases.

[0085] With reference to the Fig. 14 to 21, a series of cross-sectional views 1400 to 2100 of some embodiments of a method for forming a BSI image sensor with absorption-enhanced pixel sensors is provided. The method can be used, for example, to form the image sensor of the Fig. 4B. As noted above, the image sensor of the Fig. 4B in relation to an embodiment of the Fig. 2A, but may alternatively be used with the embodiments of any of the Fig. 1 and 2B to 2D. It must therefore be understood that the method can also be used with the embodiments of any of the Fig. 1 and 2B to 2D can be used.

[0086] As can be seen from the cross-sectional view 1400 of the Fig. 14, a backside semiconductor layer 114 is provided or formed. In some embodiments, the backside semiconductor layer 114 is a bulk silicon substrate, any other bulk semiconductor substrate, or any other semiconductor substrate. The backside semiconductor layer 114 may be or include, for example, monocrystalline silicon, nanoporous silicon, any other silicon, any other semiconductor material, or any combination of the foregoing. Further, the backside semiconductor layer 114 may have, for example, an n-type or p-type doping.

[0087] In some embodiments, the backside semiconductor layer 114 comprises a first backside semiconductor sublayer 114f and a second backside semiconductor sublayer 114s covering the first backside semiconductor sublayer 114f. The first backside semiconductor sublayer 114f may be or comprise, for example, a bulk silicon substrate, a bulk semiconductor substrate, or any other substrate. The first backside semiconductor sublayer 114f and the second backside semiconductor sublayer 114s may be or comprise, for example, monocrystalline silicon, nanoporous silicon, any other semiconductor material, or any combination of the foregoing. Furthermore, the first backside semiconductor sublayer 114f and the second backside semiconductor sublayer 114s may have, for example, an n-type or p-type doping.In some embodiments, the first backside semiconductor sublayer 114f and the second backside semiconductor sublayer 114s are the same semiconductor material and have the same doping type. Furthermore, in some such embodiments, the first backside semiconductor sublayer 114f has a higher doping concentration than the second backside semiconductor sublayer 114s, or vice versa.

[0088] In some embodiments, the backside semiconductor layer 114 is formed by providing a first backside semiconductor sublayer 114f and then depositing the second backside semiconductor sublayer 114s on the first backside semiconductor sublayer 114f. The deposition may be performed, for example, by CVD, PVD, molecular beam epitaxy, or any other deposition process. In other embodiments, the backside semiconductor layer 114 is formed by providing a bulk semiconductor substrate and then doping the bulk semiconductor substrate. In such embodiments, the backside semiconductor sublayer 114s is the doped portion of the bulk semiconductor substrate, and the first backside semiconductor sublayer 114f is a remainder of the bulk semiconductor substrate. The doping may also be performed, for example, by ion implantation or any other doping process.

[0089] As can be seen from the cross-sectional view 1400 of the Fig. As illustrated in Figure 14, an absorption-enhancing semiconductor layer 112 is formed covering the backside semiconductor layer 114. The absorption-enhancing semiconductor layer 112 has a low energy band gap that improves the quantum efficiency of the photodetectors formed thereafter. In some embodiments, the low energy band gap is an energy band gap that is smaller than about 1.00 eV, 0.80 eV, 0.60 eV, 0.66 eV, or 0.40 eV. Further, in some embodiments, the low energy band gap is an energy band gap that is smaller than that of the backside semiconductor layer 114. In some embodiments, the absorption-enhancing semiconductor layer 112 also has a direct energy band gap.The absorption-enhancing semiconductor layer 112 may, for example, consist of or comprise germanium, silicon-germanium, crystalline silicon doped with a chalcogen, or any other low-energy band-gap semiconductor material. Furthermore, the absorption-enhancing semiconductor layer 112 may, for example, be formed as described with reference to FIG. Fig. 5 be described.

[0090] In some embodiments, the absorption-enhancing semiconductor layer 112 is formed by epitaxy. The epitaxy may be performed, for example, by CVD, PVD, any other deposition process, molecular beam epitaxy, or any other epitaxial process. In some embodiments, the absorption-enhancing semiconductor layer 112 is doped with the chalcogen by ion implantation or any other doping process. Furthermore, in some embodiments, the absorption-enhancing semiconductor layer 112 is supersaturated with the chalcogen. The supersaturation may be performed, for example, by ion implantation followed by pulsed laser melting (e.g., 1 to 7, 2 to 6, 3 to 5, or 4 laser shots).

[0091] As also from the cross section 1400 of the Fig. As illustrated in Figure 14, a front-side semiconductor layer 110 is formed covering the absorption-enhancing semiconductor layer 112. The front-side semiconductor layer 110 may be or comprise, for example, monocrystalline silicon, any other semiconductor material, or any combination of the above. Furthermore, the front-side semiconductor layer 110 may be formed, for example, by CVD, PVD, any other deposition process, molecular beam epitaxy, or any other epitaxial process.

[0092] In some embodiments, a thickness T of the absorption-enhancing semiconductor layer 112 is controlled such that the front-side semiconductor layer 110 has the same crystalline direction as the back-side semiconductor layer 114. For example, if the thickness T of the absorption-enhancing semiconductor layer 112 is large, the front-side semiconductor layer 110 may have a different crystalline direction than the back-side semiconductor layer 114. Furthermore, in some embodiments in which the absorption-enhancing semiconductor layer 112 is or comprises silicon-germanium, a germanium concentration in the absorption-enhancing semiconductor layer 112 is controlled such that the front-side semiconductor layer 110 has the same crystalline direction as the back-side semiconductor layer 114. In some embodiments, the absorption-enhancing semiconductor layer 112 is Si 0,8 Ge 0,2or comprises it, and has a thickness T between about 100 to 300 nm (1000 to 3000 angstroms), about 90 nm to 110 nm (900 to 1100 angstroms), or about 50 to 150 nm (500 to 1500 angstroms), such that the front-side semiconductor layer 110 has the same crystalline direction as the back-side semiconductor layer 114.

[0093] The backside semiconductor layer 114, the absorption-enhancing semiconductor layer 112, and the frontside semiconductor layer 110 define a composite substrate 106. The frontside semiconductor layer 110 extends along and defines a frontside surface 106f of the composite substrate 106, and the backside semiconductor layer 114 extends along and defines a backside surface 106b of the composite substrate 106. The backside surface 106b and the frontside surface 106f lie on opposite sides of the composite substrate 106.

[0094] As can be seen from the cross-sectional view 1500 of the Fig. As illustrated in Figure 15, a plurality of absorption-enhanced pixel sensors 306a to 306c are formed on the front surface 106f of the composite substrate 106. Each of the absorption-enhanced pixel sensors 306a to 306c includes a photodetector 120 defined by the front-side semiconductor layer 110, the absorption-enhancing semiconductor layer 112, and the back-side semiconductor layer 114. For ease of illustration, only some of the photodetectors 120 are designated 120.

[0095] The photodetector 120 of the absorption-enhanced pixel sensors 306a-306c includes a first semiconductor region 120f, a second semiconductor region (unlabeled), and a photojunction 120p. For ease of illustration, only some of the first semiconductor regions 120f are labeled 120f, and only some of the photojunctions 120p are labeled 120p. In some embodiments, the first semiconductor region 120f of the absorption-enhanced pixel sensors 306a-306c is defined entirely or partially by a front-side CCR 110c of the front-side semiconductor layer 110, an absorption-enhancement CCR 112c of the absorption-enhancement semiconductor layer 112, and a back-side CCR 114c of the back-side semiconductor layer 114.For ease of illustration, only some of the front-side CCRs 110c are labeled 110c, only some of the absorption-enhancement CCRs 112c are labeled 112c, only some of the first back-side CCRs 114c' are labeled 114c', and only some of the second back-side CCRs 114c are labeled 114c. In some embodiments, the second semiconductor regions of the absorption-enhanced pixel sensors 306a-306c are defined entirely or partially by a front-side bulk region 110b of the front-side semiconductor layer 110, an absorption-enhancement bulk region 112b of the absorption-enhancement semiconductor layer 112, a first back-side bonding region 114b' of the back-side semiconductor layer 114, and a second back-side bulk region 114b of the back-side semiconductor layer 114.For ease of illustration, only some segments of the front bulk region 110b are labeled 110b, and only some segments of the absorption enhancement bulk region 112b are labeled 112b, and only some segments of the second rear bulk region 114b are labeled 114b.

[0096] In some embodiments, a process for forming the photodetectors 120 includes implanting dopants into the composite substrate 106 to form the first semiconductor regions 120f. In some embodiments, the semiconductor substrate 106 initially has a single doping type, so that the doping is performed using dopants of an opposite doping type. The doping may be performed, for example, using ion implantation or any other doping process, and / or may, for example, use a photoresist mask to selectively implant the dopants.

[0097] Each of the absorption-enhanced pixel sensors 306a to 306c further includes a transfer transistor 202. For ease of illustration, only some of the transfer transistors 202 are labeled 202. Each transfer transistor 202 of the absorption-enhanced pixel sensors 306a to 306c includes a gate electrode 204, a gate dielectric layer 206, a first source-drain region (unlabeled), and a second source-drain region (unlabeled). For ease of illustration, only some of the gate electrodes 204 are labeled 204, and only some of the gate dielectric layers 206 are labeled 206. The first source-drain region may, for example, be defined by a respective one of the first semiconductor regions 120f of the photodetectors 120. The second source-drain region may be defined, for example, by an FDR 110f of the front-side semiconductor layer 110. The transfer transistors 202 may be configured, for example, as described with reference to Fig. 10. Furthermore, the transfer transistors 202 may be configured, for example, as described with reference to Fig. 10 be described.

[0098] From the cross-sectional view 1000 of the Fig. 10 also illustrates an isolation structure 208 formed extending into the front-side semiconductor layer 110 to separate and surround the absorption-enhanced pixel sensors 306a to 306c. The isolation structure 208 may be formed, for example, as described with reference to Fig. 10 and / or as described with reference to Fig. 10 described.

[0099] As can be seen from the cross-sectional view 1600 of the Fig. 16, an interconnect structure 210 is formed covering the absorption-enhanced pixel sensors 306a to 306c and the composite substrate 106. The interconnect structure 210 includes an ILD layer 212, a plurality of wires 214, and a plurality of vias 216. For ease of illustration, only some of the wires 214 are labeled 214, and only some of the vias 216 are labeled 216. The interconnect structure 210 may, for example, be formed as described with reference to Fig. 11. Furthermore, the interconnect structure 210 may be configured, for example, as described with reference to Fig. 11 be described.

[0100] As can be seen from the cross-sectional view 1700 of the Fig. As illustrated in Figure 17, in some embodiments, the front surface 106f of the composite substrate 106 is bonded to a support substrate 402 through the ILD layer 212. The support substrate 402 may be, for example, a monocrystalline bulk silicon substrate, any other silicon substrate, an SOI substrate, any other semiconductor substrate, or any other substrate. In some embodiments, the bonding is performed by a fusion bonding process or any other bonding process.

[0101] As can be seen from the cross-sectional view 1800 of the Fig. 18 illustrates the structure of the Fig. 17 vertically flipped. Further, the composite substrate 106 is thinned at the backside surface 106b of the composite substrate 106, thereby reducing the thickness of the composite substrate 106 and a thickness of the frontside semiconductor layer 114. In some embodiments, the thinning also removes the first backside semiconductor sublayer 114f. The thinning reduces a thickness of the composite substrate 106 from a first thickness T1 to a second thickness T2. In some embodiments, the composite substrate 106 is thinned by performing an etch and / or planarization into the backside semiconductor layer 114. The planarization may be performed, for example, by CMP or any other planarization process.

[0102] In some embodiments, the first and second backside semiconductor sublayers 114f, 114s are the same semiconductor material and have the same doping type. Furthermore, in some such embodiments, the first and second backside semiconductor sublayers 114f, 114s have different doping concentrations. The different doping concentrations define a transition at an interface between the first and second backside semiconductor sublayers 114f, 114s, which can be used as a stop for thinning, allowing a high degree of control over the thinning. For example, an etch may be performed as part of the thinning, wherein the etch uses an etchant having a high selectivity for the first backside semiconductor sublayer 114f compared to the second backside semiconductor sublayer 114s, such that the transition serves as an etch stop.Such a high selectivity can, for example, be between about 3:1 to 10:1, 10:1 to 20:1, 20:1 to 50:1 or about 3:1 to 50:1.

[0103] As can be seen from the cross-sectional view of 1900 Fig. 19, a plurality of protrusions 124 are formed in the composite substrate 106, including the backside semiconductor layer 114. For ease of illustration, only one of the protrusions 124 is labeled 124. The protrusions 124 at least partially define an absorption enhancement structure 126. The protrusions 124 and the absorption enhancement semiconductor layer 126 may be formed, for example, as described with reference to Fig. 6. Furthermore, a process for forming the projections 124 may be described, for example, as described with reference to Fig. 6. In some embodiments, the process for forming the protrusions 124 includes etching into the back surface 106b with a photoresist layer 602 in place and then removing the photoresist layer 602.

[0104] In some embodiments, a systematic pore structure is formed in the backside semiconductor layer 114. The pores may, for example, be micrometer-sized pores, nanometer-sized pores, smaller pores, or combinations of the foregoing. In some embodiments, a process for forming the systematic pore structure includes performing an etch into the backside semiconductor layer 114. The process for forming the systematic pore structure may be performed before, during, or after the process for forming the protrusions 124.

[0105] As can be seen from the cross-sectional view 2000 of the Fig. 20, a passivation layer 108 is formed covering the back surface 106b of the composite substrate 106. The passivation layer 108 may, for example, be formed as described with reference to Fig. 7, and / or a process for forming the passivation layer 108 may be described, for example, as described with reference to Fig. 7 be described.

[0106] As can be seen from the cross-sectional view 2100 of the Fig. 21, a plurality of color filters 404 and a plurality of microlenses 406 are formed on the passivation layer 108. The color filters 404 are respectively disposed over the absorption-enhanced pixel sensors 306a to 306c, and the microlenses 406 are respectively disposed over the color filters 404. The color filters 404 may be formed, for example, as described with reference to Fig. 12, and / or may be described, for example, as described with reference to Fig. 12. The microlenses 406 may, for example, be shaped as described with reference to Fig. 12, and / or may be described, for example, as described with reference to Fig. 12 described.

[0107] With reference to Fig. 22, is a flowchart 2200 of some embodiments of the method of Fig. 14 to 21 provided.

[0108] In 2202, a backside semiconductor layer is formed on a semiconductor substrate. See, for example, Fig. 14.

[0109] In 2202, the absorption-enhancing semiconductor layer is formed on a backside semiconductor layer. See, for example, Fig. 14.

[0110] At 2202, a front-side semiconductor layer is formed on the absorption-enhancing semiconductor layer. The front-side semiconductor layer has a high energy band gap compared to the absorption-enhancing semiconductor layer. The semiconductor substrate, the back-side semiconductor layer, the absorption-enhancing semiconductor layer 112, and the front-side semiconductor layer define a composite substrate. See, for example, Fig. 14.

[0111] At 2204, a pixel sensor is formed on a front surface of the composite substrate. The pixel sensor includes a photodetector partially defined by the absorption-enhancing semiconductor layer. See, for example, Fig. 15.

[0112] At 2206, an interconnect structure is formed that covers the pixel sensor on the front surface of the composite substrate. The interconnect structure includes an ILD layer, wires, and vias. The wires and vias are alternately stacked in the ILD layer. See, for example, Fig. 16.

[0113] In 2208, a carrier substrate is bonded to a front surface of the composite substrate through the ILD layer. See, for example, Fig. 17.

[0114] In 2210, the composite substrate is thinned on a backside surface of the composite substrate. The thinning removes the semiconductor substrate. See, for example, Fig. 18.

[0115] At 2212, a plurality of protrusions are formed along the backside surface of the composite substrate. The protrusions at least partially define an absorption enhancement structure. See, for example, Fig. 19.

[0116] In 2214, a passivation layer is formed on the back surface of the composite substrate. See, for example, Fig. 20.

[0117] In 2216, a color filter and a microlens are formed stacked on the interconnect structure. See, for example, Fig. 21.

[0118] Although the flowchart 2200 of the Fig.22 is illustrated and described herein as a series of acts or events, it will be appreciated that the illustrated sequence of such acts or events is not to be construed in a limiting sense. For example, some acts may occur in different orders and / or concurrently with other acts or events separate from those illustrated and / or described herein. Further, not all of the illustrated acts may be required to practice one or more aspects or embodiments of the description, and one or more of the acts depicted herein may be performed at one or more separate acts and / or stages.

[0119] In some embodiments, the present application provides an image sensor comprising: a front-side semiconductor layer, an absorption enhancement semiconductor layer, and a back-side semiconductor layer stacked, wherein the absorption enhancement semiconductor layer is stacked between the front-side and back-side semiconductor layers, and wherein the absorption enhancement semiconductor layer has an energetic band gap lower than that of the front-side semiconductor layer, wherein the front-side semiconductor layer comprises silicon, and wherein the absorption enhancement semiconductor layer comprises germanium or silicon-germanium, or wherein the absorption enhancement semiconductor layer comprises silicon doped with a chalcogen.; a plurality of protrusions defined by the backside semiconductor layer, and a photodetector defined by the frontside semiconductor layer, the absorption-enhancing semiconductor layer, and the backside semiconductor layer. In some embodiments, the backside semiconductor layer comprises or consists of a porous semiconductor material, a porous silicon, and / or a nanoporous silicon. In some embodiments, the backside semiconductor layer comprises a porous semiconductor layer and a crystalline semiconductor layer. In some embodiments, the energetic band gap of the absorption-enhancing semiconductor layer is less than about 1 electronvolt (eV), and the energetic band gap of the frontside semiconductor layer is greater than about 1 eV.In some embodiments, the front-side semiconductor layer directly contacts the absorption-enhancing semiconductor layer at a front-side heterojunction, wherein the back-side semiconductor layer directly contacts the absorption-enhancing semiconductor layer at a back-side heterojunction. In some embodiments, the image sensor further comprises: a front-side buffer layer between the front-side semiconductor layer and the absorption-enhancing semiconductor layer, and a back-side buffer layer between the back-side semiconductor layer and the absorption-enhancing semiconductor layer; wherein the front-side and back-side buffer layers comprise semiconductor material with an increased carbon concentration compared to the front-side semiconductor layer, the absorption-enhancing semiconductor layer, and the back-side semiconductor layer. In some embodiments, the plurality of protrusions has a sawtooth profile.In some embodiments, the backside semiconductor layer comprises nanoporous silicon, wherein the protrusions and the nanoporous silicon define an absorption enhancement structure with a direct energetic band gap. In some embodiments, the image sensor further comprises: a transfer transistor on and partially defined by the frontside semiconductor layer, wherein the transfer transistor is adjacent to and electrically coupled to the photodetector.

[0120] In some embodiments, the present application provides a method of fabricating an image sensor, the method comprising: providing a front-side semiconductor layer, an absorption-enhancing semiconductor layer, and a back-side semiconductor layer that are stacked, wherein the absorption-enhancing semiconductor layer is stacked between the front-side and back-side semiconductor layers, and wherein the absorption-enhancing semiconductor layer has an energy band gap lower than that of the front-side semiconductor layer, wherein the front-side semiconductor layer comprises silicon, and wherein the absorption-enhancing semiconductor layer comprises germanium, silicon-germanium, or crystalline silicon doped with a chalcogen; performing etching in the back-side semiconductor layer to form a plurality of protrusions, and forming a photodetector in the front-side semiconductor layer,the absorption-enhancing semiconductor layer and the backside semiconductor layer. In some embodiments, the etching is performed before forming the photodetector. In some embodiments, the method further comprises: thinning the frontside semiconductor layer to reduce a thickness of the frontside semiconductor layer, and, after the thinning, forming a pixel sensor on the frontside semiconductor layer, wherein the pixel sensor comprises the photodetector and a transfer transistor, and wherein the transfer transistor is partially defined by the frontside semiconductor layer. In some embodiments, the etching is performed after forming the photodetector. In some embodiments, the method further comprises: forming a pixel sensor on the frontside semiconductor layer, wherein the pixel sensor comprises the photodetector and a transfer transistor,and wherein the transfer transistor is partially defined by the front-side semiconductor layer, and, after forming the pixel sensor, thinning the back-side semiconductor layer to reduce a thickness of the back-side semiconductor layer, wherein the etching is performed after the thinning. In some embodiments, the back-side semiconductor layer comprises a first back-side semiconductor sublayer and a second back-side semiconductor sublayer, wherein the second back-side semiconductor sublayer is stacked between the first back-side semiconductor sublayer and the absorption-enhancing semiconductor layer, and wherein the thinning removes the first back-side semiconductor sublayer. In some embodiments, the first and second back-side semiconductor layers have the same material and doping type, wherein the first and second semiconductor layers have different doping concentrations.and wherein the thinning comprises etching the first backside semiconductor sublayer until the first backside semiconductor sublayer is removed. In some embodiments, a systematic pore structure is formed in the backside semiconductor layer. In some embodiments, the energy band gap of the absorption-enhancing semiconductor layer is lower than about 1 electron volt (eV), while the energy band gap of the frontside semiconductor layer is greater than about 1 eV. In some embodiments, the protrusions are in a periodic pattern or a periodic arrangement.

[0121] In some embodiments, the present application provides an image sensor comprising: a composite substrate having a front-side semiconductor layer, an absorption-enhancing semiconductor layer, and a back-side semiconductor layer stacked together, wherein the front-side semiconductor layer forms a front surface of the composite substrate, wherein the back-side semiconductor layer forms a back surface of the composite substrate opposite to the front surface of the composite substrate, wherein the absorption-enhancing semiconductor layer is stacked between the front and back semiconductor layers, and wherein the absorption-enhancing semiconductor layer has an energetic band gap lower than that of the front-side semiconductor layer, wherein the front-side semiconductor layer comprises silicon, and wherein the absorption-enhancing semiconductor layer comprises germanium, silicon-germanium,or chalcogen-doped silicon; a periodic structure of protrusions defined by the backside semiconductor layer and along the backside surface of the composite substrate; a passivation layer directly on the backside surface of the composite substrate, the passivation layer being shape-matched to the protrusions; and a pixel sensor directly on the frontside surface of the composite substrate, the pixel sensor comprising a photodetector defined by the frontside semiconductor layer, the absorption-enhancing semiconductor layer, and the backside semiconductor layer, the pixel sensor comprising a transfer transistor partially defined by the frontside semiconductor layer, and the transfer transistor being adjacent to and electrically coupled to the photodetector.

Claims

[1] Image sensor comprising: a front-side semiconductor layer (110), an absorption-enhancing semiconductor layer (112), and a back-side semiconductor layer stacked together, wherein the absorption-enhancing semiconductor layer (112) is stacked between the front-side and back-side semiconductor layers (110, 114), and wherein the absorption-enhancing semiconductor layer (112) has an energy band gap lower than that of the front-side semiconductor layer (110); a plurality of protrusions (124) defined by the backside semiconductor layer (114), and a photodetector (120) defined by the front-side semiconductor layer (110), the absorption-enhancing semiconductor layer (112), and the back-side semiconductor layer (114), wherein the front-side semiconductor layer (110) comprises silicon, and wherein the absorption-enhancing semiconductor layer (112) comprises germanium or silicon-germanium, or wherein the absorption-enhancing semiconductor layer (112) comprises silicon doped with a chalcogen. [2] The image sensor according to claim 1, wherein the backside semiconductor layer (114) comprises or consists of a porous semiconductor material, a porous silicon and / or a nanoporous silicon. [3] The image sensor according to claim 1 or 2, wherein the backside semiconductor layer (114) comprises a porous semiconductor layer and a crystalline semiconductor layer. [4] An image sensor according to any preceding claim, wherein the energy band gap of the absorption enhancement semiconductor layer (112) is lower than about 1 eV and wherein the energy band gap of the front side semiconductor layer (110) is greater than about 1 eV. [5] An image sensor according to any one of the preceding claims, wherein the front-side semiconductor layer (110) directly contacts the absorption-enhancing semiconductor layer (112) at a front-side heterojunction (116), and wherein the back-side semiconductor layer (114) directly contacts the absorption-enhancing semiconductor layer (112) at a back-side heterojunction (118). [6] An image sensor according to any preceding claim, further comprising: a front-side buffer layer (218) between the front-side semiconductor layer (110) and the absorption-enhancing semiconductor layer (112), and a backside buffer layer (220) between the backside semiconductor layer (114) and the absorption enhancing semiconductor layer (112); wherein the front-side and back-side buffer layers (220) comprise semiconductor material having an increased carbon concentration compared to the front-side semiconductor layer (110), the absorption-enhancing semiconductor layer (112), and the back-side semiconductor layer (114). [7] An image sensor according to any preceding claim, wherein the plurality of projections (124) has a sawtooth profile. [8] The image sensor of any preceding claim, wherein the backside semiconductor layer (114) comprises nanoporous silicon, and wherein the protrusions (124) and the nanoporous silicon define an absorption enhancement structure (126) having a direct energetic band gap. [9] An image sensor according to any preceding claim, further comprising: a transfer transistor (202) on and partially defined by the front-side semiconductor layer (110), the transfer transistor (202) being adjacent to and electrically coupled to the photodetector (120). [10] A method of manufacturing an image sensor, the method comprising: Providing a front-side semiconductor layer (110), an absorption-enhancing semiconductor layer (112), and a back-side semiconductor layer (114) that are stacked, wherein the absorption-enhancing semiconductor layer (112) is stacked between the front-side and back-side semiconductor layers (114), and wherein the absorption-enhancing semiconductor layer (112) has an energetic band gap that is lower than that of the front-side semiconductor layer (110), wherein the front-side semiconductor layer (110) comprises silicon, and wherein the absorption-enhancing semiconductor layer (112) comprises germanium, silicon-germanium, or crystalline silicon doped with a chalcogen; performing an etching into the backside semiconductor layer (114) to form a plurality of protrusions (124), and Forming a photodetector (120) in the front-side semiconductor layer (110), the absorption-enhancing semiconductor layer (112) and the back-side semiconductor layer (114). [11] The method of claim 10, wherein the etching is performed prior to forming the photodetector (120). [12] A method according to claim 10 or 11, further comprising: Thinning the front-side semiconductor layer (110) to reduce a thickness of the front-side semiconductor layer (110), and after thinning, forming a pixel sensor (306a, 306b, 306c) on the front-side semiconductor layer (110), wherein the pixel sensor comprises the photodetector (120) and a transfer transistor (202), and wherein the transfer transistor (202) is partially defined by the front-side semiconductor layer (110). [13] The method of any one of claims 10 to 12, wherein the etching is performed after forming the photodetector (120). [14] A method according to any one of claims 10 to 13, further comprising: Forming a pixel sensor (306a, 306b, 306c) on the front-side semiconductor layer (110), wherein the pixel sensor (306a, 306b, 306c) comprises the photodetector (120) and a transfer transistor (202), and wherein the transfer transistor (202) is partially defined by the front-side semiconductor layer (110), and after forming the pixel sensor (306a, 306b, 306c), thinning the backside semiconductor layer (114) to reduce a thickness of the backside semiconductor layer (114), wherein the etching is performed after the thinning. [15] The method of claim 14, wherein the backside semiconductor layer (114) comprises a first backside semiconductor sublayer (114f) and a second backside semiconductor sublayer (114s), the second backside semiconductor sublayer (114s) being stacked between the first backside semiconductor sublayer (114f) and the absorption enhancement semiconductor layer (112), and wherein the thinning removes the first backside semiconductor sublayer. [16] The method of claim 15, wherein the first and second backside semiconductor layers have the same material and doping type, the first and second backside semiconductor layers have different doping concentrations, and wherein the thinning comprises etching the first backside semiconductor sublayer (114f) until the first backside semiconductor sublayer (114f) is removed. [17] The method according to any one of claims 10 to 16, wherein a systematic pore structure is formed in the backside semiconductor layer (114). [18] The method of any one of claims 10 to 17, wherein the energy band gap of the absorption enhancement semiconductor layer (112) is lower than about 1 eV and wherein the energy band gap of the front side semiconductor layer (110) is greater than about 1 eV. [19] Method according to one of claims 10 to 18, wherein the projections (124) are formed in a periodic structuring. [20] Image sensor comprising: a composite substrate (106) comprising a front-side semiconductor layer (110), an absorption-enhancing semiconductor layer (112), and a back-side semiconductor layer (114) that are stacked, wherein the front-side semiconductor layer (110) defines a front-side surface of the composite substrate (106), wherein the back-side semiconductor layer (114) defines a back-side surface of the composite substrate (106) that is opposite to the front-side surface of the composite substrate (106), wherein the absorption-enhancing semiconductor layer (112) is stacked between the front-side and back-side semiconductor layers (114), and wherein the absorption-enhancing semiconductor layer (112) has an energetic band gap lower than that of the front-side semiconductor layer (110), wherein the front-side semiconductor layer (110) comprises silicon, and wherein the absorption-enhancing semiconductor layer (112) comprises germanium, silicon germanium, or chalcogen-doped silicon; a periodic structure of protrusions (124) defined by the backside semiconductor layer (114) and along the backside surface of the composite substrate (106); a passivation layer (108) directly on the back surface of the composite substrate (106), the passivation layer (108) being shaped to the projections (124), and a pixel sensor (306a, 306b, 306c) directly on the front surface of the composite substrate (106), wherein the pixel sensor (306a, 306b, 306c) comprises a photodetector (120) defined by the front-side semiconductor layer (110), the absorption-enhancing semiconductor layer (112), and the back-side semiconductor layer (114), wherein the pixel sensor (306a, 306b, 306c) comprises a transfer transistor (202) partially defined by the front-side semiconductor layer (110), and wherein the transfer transistor (202) is adjacent to and electrically coupled to the photodetector (120).

Images