Processing methods for a wafer
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- DISCO CORP
- Filing Date
- 2018-09-07
- Publication Date
- 2026-07-23
AI Technical Summary
Conventional 5S molded packing methods require laborious removal of carbon black-containing sealing material at the wafer's peripheral portion for alignment, leading to low productivity.
A processing method involving first and second cut groove formation, alignment using visible light pickup, and grinding to divide wafers into individual chips while maintaining sealing material on the front surface, utilizing inclined illumination to enhance alignment mark detection.
Enables efficient alignment and division of wafers into individual device chips without removing the sealing material, improving productivity by facilitating easy detection of alignment marks through the sealing material.
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Abstract
Description
Technical field
[0001] The present invention relates to a processing method for a wafer for processing a wafer to form a 5S-shaped pack. Description of the state of the art
[0002] As a way to achieve miniaturization and higher density of various components such as large-scale integrated circuits (LSIs) and NAND flash memory, chip-size packages (CSPs) have been widely used and implemented in mobile phones, smartphones, and similar devices. Furthermore, in recent years, CSPs have evolved into CSPs where not only the front surface but all side surfaces of a chip are sealed with a sealing material; this is known as a 5S-shaped package.
[0003] The conventional 5S-shaped package is produced by the following steps. (1) Forming components (circuit) and external interconnect terminals, called protrusions, on a front surface of a semiconductor wafer (hereinafter sometimes referred to simply as the wafer). (2) Cutting the wafer along parting lines from a front surface of the wafer to form cut grooves, each having a depth corresponding to the finished thicknesses of each of the component chips. (3) Sealing the front surface of the wafer with a sealing material containing carbon black. (4) Grinding a rear surface of the wafer to a finished thickness of each of the component chips to expose the sealing material in the cut grooves. (5) Performing an alignment in which, since the front surface of the wafer is sealed with the sealing material containing carbon black, the sealing material is removed from a large section of the front surface of the wafer to expose the alignment markings such as target patterns, and the parting lines to be cut are detected based on the alignment markings. (6) Cutting the wafer along the division lines from the front surface of the wafer based on the orientation and dividing the wafer into 5S-shaped packs, each of which has its front surface and one side surface sealed with the sealing material.
[0004] Since the front surface of the wafer is sealed with the carbon black-containing sealing material as described above, the components and the like formed in the front surface of the wafer cannot be seen with the naked eye. To enable alignment by solving this problem, the present inventor has developed a technique in which, as described in the paragraph above, 5 As described, the sealing material is removed from the perimeter section of the front surface of the wafer to expose the alignment markers such as target patterns, and based on these target patterns, the parting line to be cut is detected so that alignment is carried out (see Japanese Disclosure No. 2013-074021 and Japanese Disclosure No. 2016-015438). PRESENTATION OF THE INVENTION
[0005] However, according to the alignment process described in the aforementioned patent documents, a step is required to remove the sealing material from the perimeter section of the wafer using a wide cutting blade attached to a spindle for edge cutting, instead of a cutting blade for parting. Replacing the cutting blade and removing the sealing material from the perimeter section by edge cutting is labor-intensive, resulting in low productivity.
[0006] Therefore, an objective of the present invention is to provide a processing method for a wafer in which an alignment step can be carried out by the sealing material containing carbon black, which is applied to coat a front surface of the wafer.
[0007] In accordance with one aspect of the present invention, a machining method for a wafer is provided for machining a wafer in which each of the components having multiple protrusions is formed in each of the regions of a front surface divided by multiple intersecting parting lines formed in an intersecting manner, the machining method for a wafer comprising: a forming step for a first cut groove to form first cut grooves, each having a depth corresponding to a thickness of each of the component chips, by a first cutting blade having a first thickness, along the parting lines of a front surface face of the wafer;a sealing step to seal the front surface of the wafer, including the first cut grooves, with a sealing material after the training step for a first cut groove has been performed; an alignment step to detect an alignment mark through the sealing material by means of a visible light receiving means from the front of the wafer and to detect the parting line to be cut based on the alignment mark after the sealing step has been performed;a training step for a second cut groove to form second cut grooves having a depth corresponding to the finished thickness of each of the device chips, in which sealing material in the first cut grooves is applied by a second cutting blade having a second thickness less than the first thickness of the first cutting blade, along the parting lines from the front surface of the wafer after the alignment step has been performed; a protective element placement step to apply a protective element to the front surface of the wafer after the training step for a second cut groove has been performed;and a splitting step for grinding the wafer from a rear surface side of the wafer to the finished thickness of each of the device chips to expose the second cut grooves, thereby dividing the wafer into individual device chips, each having the front surface and four side surfaces surrounded by the sealing material, after the application step for a protective tape has been performed, wherein the alignment step is performed while an area to be received by the visible light receiving means is irradiated at an angle by an inclined light source.
[0008] According to the processing method for a wafer of the present invention, while the wafer is irradiated with light by the inclined light source, the alignment mark formed in the wafer is detected through the sealing material by the visible light receiving means, and the alignment can be carried out based on the alignment mark. Therefore, the alignment step can be easily performed without removing the sealing material from the circumferential section of the front surface of the wafer, as is the case in the prior art.
[0009] Accordingly, the second cut grooves along the sealing material, which has been filled into the first cut grooves, which are formed in depth according to the finished thickness of the component chips, can be formed from the front surface of the wafer, and then by grinding the wafer from the back surface of the wafer to the finished thickness of the component chips to expose the second cut grooves, the wafer can be divided into individual component chips, each of which has its front surface and four side surfaces sealed with the sealing material.
[0010] The above and other features, objectives and advantages of the present invention and the manner of its realization will become clearer and the invention itself will be understood by studying the following description and attached claims with reference to the attached figures, which show a preferred embodiment of the invention. List of characters Fig. Figure 1 is a perspective view of a semiconductor wafer; Fig. Figure 2 is a perspective view showing a training step for a first cut groove; Fig. Figure 3 is a perspective view showing a sealing step; Fig. Figure 4 is a section view showing an alignment step; Fig. 5A is a sectional view showing a training step for a second cut groove; Fig. 5B is a partially enlarged sectional view of a wafer after the training step for a second cut groove has been performed; Fig. 6A is a partial, side sectional view showing a division step; and Fig. 6B is an enlarged cross-sectional view of a component chip. DETAILED DESCRIPTION OF THE PREFERRED VERSION
[0011] One embodiment of the present invention is described in detail below with reference to the figures. Fig. Figure 1 is a perspective view of a front surface of a semiconductor wafer (hereinafter referred to simply as wafer). 11 shown, which is suitable for being machined by a machining process of the present invention. In a front surface 11a of the semiconductor wafer 11 are several dividing lines (roads) 13 formed in a grid pattern and a building element 15 how an integrated circuit (IC) or an LSI is formed in each of the areas defined by the dividing lines 13 , which intersect orthogonally, are divided.
[0012] Each component 15 exhibits several electrode protrusions (hereinafter simply referred to as protrusions) 17on its front surface, and the wafer 11 includes a component area on its front surface 19 , in which several components 15 , each of which involves several increases 17 exhibit, are formed, and have a comprehensive marginal area 21 , which covers the component sector 19 surrounds.
[0013] In a processing method for a wafer according to an embodiment of the present invention, a first forming step for a first cut groove is carried out to form first cut grooves, each having a depth corresponding to a finished thickness of each component chip, by a first cutting blade having a first thickness, along the parting line. 13 from the front surface of the wafer 11 as a first step. The training step for a first cut groove is carried out with reference to Fig. 2 described.
[0014] A cutting unit 10 includes a cutting blade 14 , which are removable from a tip section of a spindle 12 is attached, and an alignment unit 16 , which is a visible light recording device (visible light recording unit) 18 exhibits. The recording unit 18 For visible light, it has a microscope and a camera that captures visible light.
[0015] Before performing the training step for a first cut groove, an alignment is carried out in which the front surface of the wafer is aligned. 11 first with visible light through the recording unit 18 is captured for visible light, alignment marks such as target patterns, which are in each component 15 Those that are trained are detected, and the dividing line 13The area to be cut is detected based on the alignment marks.
[0016] After the alignment has been carried out, a training step for a first groove is performed, in which the cutting blade (first cutting blade) 14 , which travel at high speed in the direction of an arrow R1 is rotated, is brought into the wafer 11 up to a depth corresponding to the finished thickness of each of the component chips, along the division line 13 from the front surface 11a of the wafer 11 to cut, and a clamping table (not shown) on which the wafer 11 held in suction, it is used for processing in one direction of an arrow. X1 supplied, thereby creating a first cut groove 23 along the dividing line 13 is being trained.
[0017] The training step for a first cut groove is carried out sequentially along the parting lines. 13 carried out, extending in a first direction, while the cutting unit 10 into an index feed in a direction orthogonal to the direction X1 the feed for processing around the distance of the dividing line 13 The clamping table (not shown) is then rotated 90° and the same machining step is repeated sequentially along the dividing lines for the first cut groove, as described above. 13 carried out, extending in a second direction orthogonal to the first direction.
[0018] After the training step for the first cut groove has been carried out, a sealing step is performed, in which, as in Fig. Figure 3 shows a sealing material 20 on the front surface 11a of the wafer 11is applied to the front surface 11a of the wafer 11 , which cut the first grooves 23 This involves sealing with a sealant. Since the sealant 20 The first cut grooves will be liquid when the sealing step is carried out. 23 with the sealing material 20 filled.
[0019] When the sealing material 20 The composition will contain 10.3% epoxy resin or epoxy resin plus phenolic resin, 85.3% silica filler, 0.1% to 0.2% carbon black, and 4.2% to 4.3% other ingredients by mass percent. Examples of the other ingredients include metal hydroxides, antimony trioxide, silicon dioxide, and the like.
[0020] If the front surface 11a of the wafer 11 with the sealing material 20The soot, which is present in an extremely small quantity in the sealing material, causes damage when the material is covered and sealed and has such a composition. 20 It includes the sealing material 20 It is black, and accordingly it is usually difficult to see the front side. 11a of the wafer 11 through the sealing material 20 to see.
[0021] Here, the soot has seeped into the sealing material. 20 primarily to prevent electrostatic damage to the components 15 Mixed and currently no sealing material that does not contain carbon black is used commercially. The method for applying the sealing material 20 is not particularly limited; however, it is desirable to use the sealing material 20 up to a level of each of the increases 17 to apply, and then the sealing material is applied. 20exposed to an etching process to remove the end sections of the elevations 17 to uncover.
[0022] After the sealing step has been carried out, an alignment step is performed in which the front surface 11a of the wafer 11 through the sealing material 20 through the exception for visible light from the front surface 11a of the wafer 11 The recording includes at least two alignment marks such as target patterns, which are located on the front surface. 11a of the wafer 11 are trained, are detected and the division line 13 The area to be cut is detected based on these alignment marks.
[0023] The alignment step is described in detail with reference to Fig. 4 described. Before performing the alignment step, the rear surface is 11b of the wafer 11attached to a dividing band T, the outer circumferential section of which is attached to an annular frame F. In the alignment step, as in Fig. As shown in 4, the wafer 11 through the clamping table 40 a cutting device through the dividing belt T suctioned and held, and the sealing material 20 , the front surface 11a of the wafer 11 sealed, it lies exposed at the top. Then the ring-shaped frame F by clamping with clamps 42 fixed.
[0024] In the alignment step, the front surface 11a of the wafer 11 The image is captured by a recording element such as a CCD (charge-coupled device) in a visible light detection unit. However, because the ingredients such as silica fillers and carbon black are present in the sealing material... 20are included and furthermore, a front surface of the sealing material is uneven, even if the front surface 11a of the wafer 11 through the sealing material 20 by vertical illumination of the recording unit 18 When the image is taken using visible light, it is blurry, making it difficult to recognize alignment marks such as target patterns.
[0025] In this respect, the alignment step of the present embodiment can be achieved by illuminating an area to be recorded at an angle with light from an inclined light source. 31 in addition to the vertical illumination of the recording unit 18 For visible light, the blurring problem of the image is improved, thus enabling the detection of the alignment marks.
[0026] The light radiation from the inclined light source 31preferably white light and an angle of incidence at the front surface 11a of the wafer 11 is preferably in a range of 30° to 60°. The recording unit preferably includes 18 For visible light, an exposure control is used, which allows the exposure time or similar parameters to be adjusted.
[0027] Next, the clamping table will be 40 rotated by θ so that a straight line connecting these alignment marks is parallel to the direction X1 a feed for processing, and furthermore the cutting unit 10 , which in Fig. 2 is shown, in the direction orthogonal to the direction X1 for a feed for processing by a distance between the alignment mark and the center of the division lines 13 moved, thereby changing the dividing line 13 , which is to be cut, is detected.
[0028] After the alignment step has been carried out, a training step for a second cut groove is performed by, as described in Fig. 5A shown, the wafer 11 with its front surface 11a , which are caused by the sealing material 20 is sealed, with a second cutting blade 14A , which has a smaller width than the width of the first cutting blade, along the dividing lines 13 from the front surface 11a of the wafer 11 is applied to create second cut grooves 25 , which have a depth corresponding to the finished thicknesses of each of the component chips.
[0029] This training step for a second cut groove is performed sequentially along the parting lines. 13 carried out, extending in a first direction, whereupon the clamping table 40is rotated by 90°, and the training step for a second cut groove is then carried out sequentially along the dividing lines. 13 carried out, extending in the second direction orthogonal to the first direction.
[0030] After the training step for a second cut groove has been carried out, an application step for a protective strip is performed by attaching a protective element. 22 like a surface protection tape on the front surface 11a of the wafer 11 is applied. After the application step for a protective tape has been carried out, a splitting step is performed by separating the wafer. 11 from the rear surface 11b of the wafer 11 The chips are ground to their finished thickness to create the second cut grooves. 25 , which are in the sealing material 20 trained are to uncover and the wafer 11into individual component chips 27 to divide, each of which coats its front surface and four side surfaces with the sealing material 20 has a sealed seal.
[0031] The division step is described with reference to Fig. 6A described. The wafer 11 is provided by a clamping table 24 in a grinding device through the protective element 22 like a surface protection tape that is attached to the front surface 11a of the wafer 11 It is attached, suctioned in, and held. A grinding unit 26 includes a spindle 30 , which are rotatable in a spindle housing 28 is mounted and is driven by a rotating motor, which is not shown, a disc mounting 32 , which are located at one end of the spindle 30 is fixed, and a grinding wheel 34 , which are removable from the disc mounting 32 is attached. The grinding wheel34 includes a ring-shaped disc base 36 and several whetstones 38 , located on an outer circumference of a lower end of the disk base 36 are secured.
[0032] In the dividing step, while the clamping table 24 in one direction of an arrow a If the grinding wheel is rotated at, for example, 300 revolutions per minute, it will be 34 in one direction of an arrow b for example, it is rotated at 6000 revolutions per minute and a feed mechanism for a grinding unit (not shown) is driven to supply the grinding stones. 38 the grinding wheel 34 in contact with the rear surface 11b of the wafer 11 bring to.
[0033] Then the rear surface 11b of the wafer 11 ground while the grinding wheel 34The wafer is moved downwards by a predetermined amount at a predetermined feed rate into a grinding feeder. While the wafer reaches a certain thickness... 11 The thickness of a contact type or a non-contact type is measured by a measuring instrument, and the wafer is then identified. 11 ground to a predetermined thickness, for example 100 µm, to create the second cut grooves 25 to expose, thereby the wafer 11 into individual component chips 27 is divided, each of which has its front surface and four side surfaces coated with the sealing material. 20 surrounded by features, as in Fig. 6B is shown.
[0034] The component chip 27 , which was manufactured in this way, can be attached to a mainboard by flip-chip connecting, by turning the component chip over from top to bottom and connecting the raised sections to conductive pads on the mainboard.
[0035] The present invention is not limited to the details of the preferred embodiments described above. The scope of the invention is defined by the attached claims, and all changes and modifications that fall within the equivalent scope of the claims are therefore included in the invention. QUOTES INCLUDED IN THE DESCRIPTION
[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature
[0000] JP 2013074021
[0004] JP 2016015438
[0004]
Claims
[1] Wafer machining method for machining a wafer in which each feature having multiple elevations is formed in each of the regions of a front surface divided by multiple intersecting division lines formed in an intersecting manner, the wafer machining method comprising: a training step for a first cut groove to form first cut grooves, each having a depth corresponding to a finished thickness of each of the component chips, by a first cutting blade having a first thickness, along the parting lines from a front surface side of the wafer; a sealing step to seal the front surface of the wafer, including the first cut grooves, with a sealing material after the training step for a first cut groove has been performed; an alignment step to detect an alignment mark through the sealing material by means of a visible light receiving means from the front surface of the wafer and detect the parting line to be cut based on the alignment mark after the sealing step has been performed; a training step for a second cut groove to form second cut grooves having a depth corresponding to the finished thickness of each of the component chips, in the sealing material in the first cut grooves by a second cutting blade having a second thickness less than the first thickness of the first cutting blade, along the parting lines from the front surface side of the wafer after the alignment step has been performed; an application step for a protective element to attach a protective element to the front surface of the wafer after the training step for a second cut groove has been performed; and a splitting step to grind the wafer from a rear surface side of the wafer to the finished thickness of each of the component chips to expose the second cut grooves, thereby dividing the wafer into individual component chips, each of which has its front surface and four side surfaces surrounded by the sealing material after the attachment step for a protective element has been carried out, wherein the alignment step is carried out while an area to be recorded by the visible light receiving device is illuminated at an angle by an inclined light source.