Sensors that use digitally assisted 1 / X analog gain compensation

Abstract

A magnetic sensor (100, 200) having the following features: at least one magnetic field sensor element (10a, 10b, 20a, 20b) configured to generate an analog input sensor signal (ΔVin) in response to a magnetic field; an inverting amplifier (24) configured to generate an analog output sensor signal (ΔVout) amplified with respect to the analog input sensor signal (ΔVin); a programmable current divider (25) arranged in a negative feedback path of the inverting amplifier (24), wherein the amplified value depends on an effective feedback resistance value of the programmable current divider (25);and a digital controller (33) configured to receive at least one measurement parameter, to generate a codeword based on the at least one measurement parameter and to transmit the codeword to the programmable current divider (25) to compensate for the amplified value, wherein the effective feedback resistance value is set based on the codeword received by the programmable current divider (25).

Description

[0001] The present disclosure relates generally to magnetic sensors and in particular to magnetic sensors that use digitally assisted analog gain compensation.

[0002] One type of magnetic sensor is a Hall effect sensor (Hall sensor). A Hall effect sensor is a transducer that varies its output voltage (Hall voltage) in response to a magnetic field. It is based on the Hall effect, which utilizes the Lorentz force. The Lorentz force deflects moving charges when a magnetic field is present that is perpendicular to the current flow through the sensor or Hall plate. A Hall plate, also called the sensing element, can be a thin piece of semiconductor or metal. The deflection causes charge separation, which generates an electric Hall field. This electric field acts on the charge in the opposite direction to the Lorentz force. The two forces balance each other, creating a potential difference perpendicular to the current flow direction. This potential difference can be measured as a Hall voltage and varies linearly with the magnetic field for low values.Hall effect sensors can be used, for example, for proximity switching, positioning, speed sensing and current sensing applications.

[0003] In Hall sensor readout circuits, the magnetic signal from the Hall sensor element is converted into an electrical signal (e.g., a Hall voltage), which is further amplified and calibrated before reaching a sensor output. The Hall voltage can vary with temperature. For example, there may be a non-linear relationship between the Hall voltage and temperature, such that as the temperature increases, the Hall voltage decreases. For accurate detection measurements, this non-linear sensitivity variation with temperature of the Hall sensor should be compensated for.

[0004] Hall sensor readout circuits typically use a digital interface for low-speed operations (e.g., up to 10 kHz). This means that the analog output of the Hall sensor element (e.g., the Hall voltage) is converted into a digital signal by an analog-to-digital converter (ADC). All compensations are calculated and implemented digitally, and a digital stream of n bits is output by the readout circuit. This technique is not well-suited for high-bandwidth operations (e.g., 10 kHz to 120 kHz).

[0005] Therefore, a magnetic Hall sensor capable of operating at higher speeds, for example at a bandwidth of up to 120 kHz, is desirable.

[0006] The object of the present invention is to create a magnetic sensor and a method for gain compensation with improved characteristics.

[0007] This problem is solved by a magnetic sensor according to claim 1 and a method according to claim 14.

[0008] Magnetic field sensors and detection methods are provided.

[0009] One or more embodiments provide a magnetic sensor comprising the following features: at least one magnetic field sensor element configured to generate an analog input sensor signal in response to a magnetic field; an inverting amplifier configured to generate an analog output sensor signal that has an amplified value with respect to the analog input sensor signal; a programmable current divider arranged in a negative feedback path of the inverting amplifier such that the amplified value depends on an effective feedback resistance value of the programmable current divider; and a digital controller configured to receive at least one measurement parameter, generate a codeword based on the at least one measurement parameter, and transmit the codeword to the programmable current divider to compensate for the amplified value.The effective feedback resistance value is set based on the codeword received by the programmable current divider.

[0010] One or more embodiments further provide a gain compensation method implemented in a magnetic sensor. The method comprises the following steps: generating an analog input sensor signal by means of at least one magnetic field sensor element responding to a magnetic field; generating an analog output sensor signal based on the analog input sensor signal, wherein the analog output sensor signal has an amplified value with respect to the analog input sensor signal; generating a codeword based on at least one digital measurement parameter; and setting an effective feedback resistance value of a negative feedback path of an inverting amplifier based on the codeword, such that the amplified value is set to compensate for the at least one digital measurement parameter.

[0011] Preferred embodiments of the present invention are explained in more detail below with reference to the accompanying drawings. These show: Fig. 1 a block diagram of a magnetic sensor according to one or more embodiments; Fig. 2 a schematic block diagram of a magnetic sensor according to one or more embodiments; Fig. 3 a circuit diagram of a programmable current divider according to one or more embodiments; Fig. 4. A circuit diagram of an equivalent resistance conductor of the programmable current divider of Fig. 3 represents when all bits are ON; and Fig. 5 a circuit diagram of an equivalent resistance conductor of the programmable current divider of Fig. 3 represents when all bits are OFF.

[0012] Details are given below to provide a thorough explanation of the exemplary embodiments. However, it is clear to those skilled in the art that the embodiments can also be implemented without these specific details. In other cases, well-known structures and devices are shown in block diagram form or a schematic view, rather than in detail, to avoid obscuring the embodiments. Furthermore, features of the different embodiments described herein can be combined unless specifically noted otherwise.

[0013] Furthermore, identical or similar elements, or elements with the same or similar functionality, are designated by the same or similar reference numerals in the following description. Since the identical or functionally equivalent elements in the figures are designated by the same reference numerals, repeated descriptions for elements with the same reference numeral can be omitted. Thus, descriptions provided for elements with the same or similar reference numerals are interchangeable.

[0014] When an element is described as "connected" or "coupled" with another element, it is clear that it may be directly connected or coupled to the other element, or that there may be intermediate elements. In contrast, when an element is described as "directly connected" or "directly coupled" with another element, there are no intermediate elements. Other terms used to describe the relationship between elements should be interpreted similarly (e.g., "between" as opposed to "directly between," "adjacent" as opposed to "directly adjacent," etc.).

[0015] In embodiments described herein or shown in the drawings, any direct electrical connection or coupling, that is, any connection or coupling without additional intervening elements, can also be implemented by an indirect connection or coupling, that is, a connection or coupling with one or more additional intervening elements, or vice versa, as long as the general purpose of the connection or coupling, for example, transmitting a certain type of signal or transmitting a certain type of information, is essentially maintained. Features of different embodiments can be combined to form further embodiments. For example, variations or modifications described with respect to one embodiment may also be applicable to other embodiments unless otherwise noted.

[0016] Examples relate to sensors and sensor systems, and to obtaining information from sensors and sensor systems. A sensor can refer to a component that converts a physical quantity to be measured into an electrical signal, for example, a current signal or a voltage signal. The physical quantity can be, for example, a magnetic field, an electric field, pressure, force, current, or voltage, but is not limited to these.

[0017] A magnetic field sensor comprises, for example, one or more magnetic field sensor elements that measure one or more characteristics of a magnetic field (e.g., the magnitude of a magnetic field flux density, a field strength, a field angle, a field direction, a field orientation, etc.), which corresponds to detecting and / or measuring the magnetic field structure of an element that generates the magnetic field (e.g., a magnet, a current-carrying conductor (e.g., a wire), the earth, or another magnetic field source). Each magnetic field sensor element is configured to generate an analog sensor signal in response to one or more magnetic fields.

[0018] A sensor signal (e.g., a voltage signal) generated by each magnetic field sensor element can, for example, be proportional to the magnitude of the magnetic field acting on that magnetic field sensor element. Furthermore, it is clear that the terms "sensor" and "detection element" can be used interchangeably in this description, and the terms "sensor signal" and "measured value" can be used interchangeably in this description.

[0019] A Hall effect sensor, for example, is a transducer that varies its output voltage (Hall voltage) in response to a magnetic field. It is based on the Hall effect, which utilizes the Lorentz force. The Lorentz force deflects moving charges when a magnetic field is present that is perpendicular to the current flow through the sensor or Hall plate. A Hall plate, referred to as the magnetic field sensing element, can be a thin piece of semiconductor or metal. This deflection causes charge separation, which generates an electric Hall field. This electric field acts on the charge in the opposite direction to the Lorentz force. The two forces balance each other, creating a potential difference perpendicular to the current flow direction. This potential difference can be measured as a Hall voltage and varies linearly with the magnetic field for low values.Hall effect sensors can be used, for example, for proximity switching, positioning, speed sensing and current sensing applications.

[0020] In some examples, Hall effect sensors can be implemented as vertical Hall effect sensors. A vertical Hall effect sensor is a magnetic field sensor that is sensitive to a magnetic field component extending parallel to its surface. This means it is sensitive to magnetic fields that are parallel to, or in the same plane as, the IC surface. The plane of sensitivity can also be referred to as a "sensitivity axis" or "sensing axis," and each sensing axis has a reference direction. For Hall effect sensors, voltage values ​​output by the sensor change according to the magnetic field strength in the direction of the sensing axis.

[0021] In other examples, Hall effect sensors can be implemented as lateral Hall effect sensors. A lateral Hall effect sensor is sensitive to a magnetic field component perpendicular to its surface. This means they are sensitive to magnetic fields that are perpendicular to, or out of plane with, the integrated circuit (IC) surface. The plane of sensitivity can be referred to as a "sensitivity axis" or "sensing axis," and each sensing axis has a reference direction. For Hall effect sensors, voltage values ​​output by the sensor change according to the magnetic field strength in the direction of the sensing axis.

[0022] According to one or more embodiments, a magnetic field sensor and a sensor circuit can both be housed (i.e., integrated) in the same chip package (e.g., a package encapsulated in plastic, such as a package with or without terminals, or a surface-mount device (SMD) package). This chip package can also be referred to as a sensor package. The sensor package can be combined with a reverse-voltage magnet to form a sensor module, sensor component, or the like.

[0023] The sensor circuit can be described as a signal processing circuit and / or a signal conditioning circuit that receives one or more signals (i.e., sensor signals) from one or more magnetic field sensor elements in the form of raw measurement data and derives a measurement signal representing the magnetic field from the sensor signal. Signal conditioning, as used here, refers to manipulating an analog signal in such a way that the signal meets the requirements of a subsequent stage for further processing. Signal conditioning can include analog-to-digital conversion (e.g., via an analog-to-digital converter), amplification, filtering, conversion, biasing, range matching, isolation, and any other processes necessary to make a sensor output usable for post-conditioning processing.

[0024] Thus, the sensor circuit can include an analog-to-digital converter (ADC) that converts the analog signal from one or more sensor elements into a digital signal. The sensor circuit can also include a digital signal processor (DSP) that performs processing on the digital signal, which will be discussed below. Furthermore, the sensor circuit can include a digital-to-analog converter (DAC) that converts the processed digital signal back into an analog signal. Therefore, the sensor package includes a circuit that processes and amplifies the small signal from the magnetic field sensor element through signal processing and / or conditioning.

[0025] A sensor device, as used herein, can refer to a device comprising a sensor and a sensor circuit, as described above. A sensor device can be integrated on a single semiconductor piece (e.g., a silicon semiconductor piece or chip), although in other embodiments, multiple semiconductor pieces may be used to implement a sensor device. Thus, the sensor and the sensor circuit are located either on the same semiconductor piece or on multiple semiconductor pieces within the same package. For example, the sensor may be on one semiconductor piece and the sensor circuit on another semiconductor piece, so that they are electrically interconnected within the package.In this case, semiconductor pieces can consist of the same or different semiconductor materials, such as GaAs and Si, or the sensor can be sputtered onto a ceramic or glass plate that is not a semiconductor.

[0026] Fig. Figure 1 shows a block diagram of a magnetic sensor. 100 according to one or more exemplary embodiments. In particular, the magnetic sensor comprises 100 a differential Hall sensor pair 10 , a busbar 11 and a readout circuit 12 The readout circuit 12 includes a signal conditioning circuit 13 , a temperature (temp) calibration unit 14a , a load calibration unit 14b , a supply voltage VDD calibration unit 14c and an output connection area 15 .

[0027] The differential Hall sensor pair 10 includes two Hall sensor elements 10a , 10b, which are placed differently at different locations on a semiconductor chip (not shown), and a power rail 11 This causes a current to flow through the Hall sensor elements. 10a , 10b flows. Each Hall sensor element 10a , 10b It is configured to generate an analog sensor signal (e.g., a Hall voltage signal) in response to a magnetic field applied to it. For example, a Hall voltage is generated when the Hall sensor element 10a , 10b within a magnetic field that is perpendicular to the current flow.

[0028] Together, the differential Hall sensor pair generates 10 an analog differential measurement signal (e.g., a differential Hall voltage). For example, the differential Hall sensor pair 10The circuitry includes a combination circuit arrangement or logic to generate the differential measurement signal. Thus, the combination circuit arrangement can receive sensor signals from the Hall sensor elements. 10a , 10b It receives the signal and can generate a differential measurement signal from it. For example, the combined circuit arrangement can include one or more differential amplifiers that measure the difference between the sensor elements. 10a and 10b output. Alternatively, the readout circuit can 12 The combination circuit arrangement includes components for receiving the raw measurement signals from the Hall sensor elements. 10a , 10b and the readout circuit 12 can generate the differential measurement signal before further signal processing is performed.

[0029] Although the exemplary embodiments are described in the context of using a differential Hall sensor pair, it is clear that the embodiments are not limited to this. Therefore, one or more Hall sensor elements can be used to generate a measurement signal that can be processed by the readout circuit. 12 further processed. The differential analog interface provided by the differential Hall sensor pair can offer improved performance for high-bandwidth operations (e.g., up to 120 kHz) due to lower propagation delay along the continuous-time analog signal path through the signal conditioning circuitry. 13 .

[0030] As it is in Fig. As shown in Figure 1, the differential measurement signal generated by the differential Hall sensor pair is 10The provided signal exhibits a non-linear dependence on temperature. As the temperature increases, the differential Hall voltage decreases non-linearly. Therefore, the non-linear sensitivity variation over the temperature of the differential Hall sensor pair should be expected. 10 compensated at the analog interface.

[0031] The signal conditioning circuit 13 It comprises an analog signal path that receives the analog differential measurement signal or receives the individual analog measurement signals and converts them into the analog differential measurement signal and outputs an analog signal. Between the input and output of the signal conditioning circuit. 13 The signal processing circuit 13Signal conditioning of the analog differential measurement signal in a continuous time domain, including signal conversion and amplification and compensation (calibration) of changes in temperature, load and supply voltage VDD to produce a sensitivity-compensated analog output signal.

[0032] During compensation, the signal conditioning circuit can 13 This includes an auxiliary path used to digitally support the calibration of the analog measurement signal. For example, temperature, load, and VDD calibration can be implemented via the auxiliary path in a digital discrete time domain to reflect changes in temperature, load, and supply voltage (VDD) through the signal conditioning circuitry. 13 to be taken into account before they access the initial connection area 15This allows the differential measurement signal to be amplified at the analog interface with high gain to provide a good signal-to-noise ratio and dynamic range during differential signal calibration. The analog gain resolution should be high enough to provide good compensation for temperature, load, supply voltage (VDD), and process variations.

[0033] So that the signal processing circuit 13 The signal conditioning circuit can compensate for temperature, mechanical stress and supply voltage VDD. 13 an input from the temperature calibration unit 14a , the load calibration unit 14b , the supply voltage VDD calibration unit 14c The temperature calibration unit 14aIt may include a temperature sensor configured to measure the ambient temperature at the sensor semiconductor piece. Similarly, the load calibration unit may include 14b include a load sensor configured to measure a load (e.g., mechanical load) applied to at least one section of the sensor semiconductor piece (e.g., to the Hall sensor elements). 10a , 10b) is installed. The supply voltage VDD calibration unit 14c may include a circuit component connected to the supply voltage VDD or a direct electrical connection to the supply voltage VDD to receive the supply voltage VDD, which may be due to a fault in a power supply that powers the magnetic sensor. 100 supplied with power, which can fluctuate.

[0034] Both the temperature calibration unit 14a , the load calibration unit 14b, the supply voltage VDD calibration unit 14c They may also include or be coupled to other circuit arrangements that convert the measured parameters into a code (e.g., a DAC code) used to adjust the analog gain of the differential measurement signal, the details of which are described below in relation to Fig. 2 and Fig. 3 will be described in more detail. Thus, the sensitivity of the differential measurement signal can be compensated, so that the dependence on temperature and mechanical stress is eliminated and a disturbance of the power supply VDD is ratiometric.

[0035] The output connection area 15 the readout circuit 12 is configured to output a (analog) continuous time-domain signal from the signal conditioning circuit 13to receive, where temperature, mechanical stress and supply voltage VDD were compensated. As can be seen at the output terminal area. 15 As can be seen, the output signal is independent of the temperature.

[0036] Fig. Figure 2 shows a block diagram of a magnetic sensor. 200 according to one or more exemplary embodiments. In particular, the magnetic sensor 200 similar to the magnetic sensor 100 from Fig. 1, but is provided in more detail. Thus, the magnetic sensor includes 200 a differential Hall sensor pair 20 , a busbar 21 and a readout circuit 22 .

[0037] The readout circuit 22 includes an analog signal path that incorporates a voltage-to-current converter. 23 , an operational amplifier (op-amp) 24 , which has a programmable current divider 25 and a compensation capacitor Cfb 26includes those provided in negative feedback paths, an external capacitive load CL 27 and an analog output 28 includes.

[0038] Furthermore, the readout circuit includes 22 An auxiliary signal path, implemented in the digital discrete-time domain, provides digital support for the analog signal path. The auxiliary signal path includes a multiplexer. 30 , an ADC 31 , a 1 / x ADC 32 and a digital signal processor (DSB) 33 , which has a memory 34 is coupled.

[0039] The analog signal path is implemented in a continuous time domain, so that based on the continuous real-time input signal ΔVin, which is generated by the differential Hall sensor pair 20A continuous real-time output signal ΔVout is generated. The auxiliary signal path, which includes temperature calibration, mechanical load calibration, and supply voltage VDD calibration, is implemented in a digital discrete time domain to assist in setting the analog gain applied to the analog output. 28 is being implemented.

[0040] In particular, the differential Hall sensor pair generates 20 an analog differential input voltage ΔVin, which is passed through the voltage / current transformer 23 is received. The voltage / current transformer 23Using a detection resistor Rs, the differential input split ΔVin is converted into an asymmetric current signal Igm. The current Igm represents information about the measured magnetic field, as does the differential input voltage ΔVin. This conversion is performed to avoid resistive loading on an already low-impedance Hall sensor element and to improve the common-mode rejection ratio, where the common-mode fluctuation of the differential Hall sensor pair is a concern. 20 is removed by the VI conversion.

[0041] Alternatively, a differential voltage signal can be derived from two Hall sensors using two voltage / current transformers.

[0042] The differential current is converted back into an analog output voltage (i.e., differential output voltage ΔVout) using the programmable current divider. 25 , which uses a negative feedback path of the op-amp 24is coupled. Although the programmable current divider 25 in a negative feedback path of the op-amp 24 It is noted that this negative feedback path is intended to serve as part of the overall analog forward path of the circuit.

[0043] The opamp 24 is an inverting amplifier used to drive an external high capacitive load CL 27 to drive, for example, a 6 nF capacitor. The programmable current divider 25 is in the negative feedback path of the op-amp 24 placed. It is noted here that a non-inverting input node VREF of the opamp 24 is connected to a reference voltage and is not limited to a specific voltage value. The inverting input node VINN of the op-amp 24is connected to a virtual ground, so VREF and VINN are at the same potential. That is, VINN is maintained at the same reference potential (i.e., VREF) without being directly connected to the reference potential. As a result, the differential input voltage of the op-amp is 24 (i.e., the difference between the potential at the non-inverting input and the inverting input of the op-amp) 24 ) null. As it is used here, it is clear that VREF and VINN can refer to the respective node or the potential (voltage) at the respective node.

[0044] The asymmetric current signal Igm is received at VINN, where it is fed back via the negative feedback path of the op-amp. 24 into the programmable current divider 25 is fed in. The programmable current divider 25This is an inverting R2R DAC, which is a programmable resistor network operating as a series of current dividers. The output accuracy of this network depends on how well each resistor is matched to the others. The programmable resistor network as a whole can be considered equivalent to an effective feedback resistor Rfb, which has an effective resistive value that changes according to a programmed configuration of the resistor network.

[0045] Using the value of the effective feedback resistance Rfb, the inverting R2R DAC is configured to convert the differential current signal Igm into an amplified feedback voltage Vfb. Specifically, each current divider or tap of the inverting R2R DAC can be enabled or disabled to measure a portion of the current Igm based on a programming code (e.g., a DAC code) implemented by a digital controller at the programmable current divider. 25The programmable section of the inverting R2R-DAC is programmed to receive or not receive the signal. A weighted current segment (e.g., Iw, 2 Iw, 4 Iw, etc.) of the differential current signal Igm flows through each activated tap of the inverting R2R-DAC according to the current-division function of the inverting R2R-DAC. The sum of all divided currents is equal to Igm. All currents are directed by a fixed resistor array Rfixed, which is connected in series with the programmable section of the inverting R2R-DAC between the programmable section and the output of the inverting R2R-DAC, inducing a voltage drop that arrives at the feedback voltage Vfb.

[0046] The currents arriving at the fixed resistor arrangement Rfixed include all weighted currents Iw (i.e., a total weighted current Iwt) plus a residual current Ir. The residual current Ir is the portion of Igm that passes through the standard branch (i.e., through the resistor). 8R)The current flows through the fixed resistor arrangement Rfixed. Thus, all currents in the resistor network are summed at the output of the inverted R2R-DAC to generate a cumulative feedback current Ifb, which is converted into a feedback voltage Vfb via a voltage drop across Rout (see Fig. 3) More generally, Vfb is the product of Rfb and Igm. The feedback voltage Vfb is then determined by the op-amp. 24 added to the voltage to create the asymmetrical output voltage ΔVout at the analog output 28 to derive.

[0047] Thus, the current Igm is converted into an amplified voltage Vfb, which is a component of the asymmetrical output voltage ΔVout and contributes to the total analog gain of ΔVout / ΔVin.

[0048] Based on this current-to-voltage conversion, which is achieved through the programmable current divider 25The voltage ΔVin is determined according to the analog gain of the readout circuit. 22 amplified. The entire analog amplification of the readout circuit. 22 is determined by the value of the effective feedback resistor Rfb and the sensing resistor Rs. Additional details of the programmable current divider 25 are in connection with Fig. 3 provided.

[0049] Gain compensation due to temperature, mechanical load, supply voltage (VDD), and process variation is performed using a digitally supported system integrated into the auxiliary signal path. For example, measured temperature and mechanical load parameters can be received from a temperature sensor and a load sensor, respectively. The temperature and load values ​​are then processed by a multiplexer. 30 and an ADC 31converted from analog to digital values, and sent to the DSP for further processing. 33 supplied to include the programmable current divider 25 to program.

[0050] Furthermore, supply voltage VDD ratiometricity can be implemented using a 1 / x ADC function, which is provided by the 1 / x ADC. 32 is provided. In particular, the 1 / x-ADC can 32 The supply voltage VDD is received and this parameter is converted into a digital value using a 1 / x ADC function. When the supply voltage VDD decreases, a 1 / x ADC code is generated and displayed. 32 It is generated based on the received supply voltage VDD. The 1 / x ADC 32 can assign the 1 / x ADC code to the programmable current divider 25 feed directly or via a pass-through circuit of the DSP 33This can ratiometrically reduce the analog gain. Therefore, the 1 / x conversion function can simplify the processing for the VDD connected to the DSP. 33 is entered. Accordingly, the 1 / x-converted VDD value can then be processed by the DSP. 33 can be used for further processing to create the programmable current divider 25 to program.

[0051] According to the auxiliary signal path, the output of each measurement parameter (e.g., temperature, mechanical load, and supply voltage VDD) is converted into a digital value that is sent to the DSP. 33 (i.e., the digital controller) is configured to calculate an N-bit codeword (i.e., a DAC code) from the digital values ​​of temperature, mechanical load, and supply voltage VDD. Once the N-bit codeword is calculated, it can be sent to the programmable current divider. 25 be output. For example, the DSP 33The digital values ​​are sampled at sampling times, and the N-bit codeword is updated based on the sampled digital values. Upon updating the N-bit codeword, the DSP can 33 the programming of the programmable current divider 25 update.

[0052] In one example described herein, the DAC code can be an 11-bit codeword derived from the digital values ​​of temperature, mechanical stress, and supply voltage VDD. The DSP 33 delivers the DAC code to the programmable current divider 25 , which in turn is an inverted 11-bit R2R DAC used to vary the analog gain of the differential measurement signal based on the received DAC code.

[0053] The DSP 33 is a digital controller configured to operate the programmable current divider 25to control the current gain in the negative feedback path of the op-amp 24 to control it. By changing the current gain in the negative feedback path of the programmable current divider. 25 The voltage at the output of the op-amp will be 24 This has also been changed. This allows fluctuations in temperature, mechanical load, and supply voltage VDD to be compensated for in the differential measurement signal.

[0054] The DSP 33 can use one or more of the measured parameters (e.g., temperature, mechanical load, and supply voltage VDD) to perform a calculation or conversion to derive an N-bit codeword that is used to program the current divider 25 to program. The calculation or conversion can be stored in the form of higher-order polynomials, a lookup table, or a digital function, which is stored in a memory block. 34is stored. For example, gain and offset polynomial coefficients can be stored in an electrically erasable programmable read-only memory (EEPROM) that is accessible for programming the desired conversion formula(s) and the length of the N-bit codeword.

[0055] Thus, these measured parameters are processed by the DSP. 33 converted into an N-bit digital code value representing the current state of temperature, mechanical stress, and / or supply voltage VDD. This N-bit digital code value is then used as a DAC code to program the current divider. 25 used (i.e., to set the value of Rfb) to perform analog signal compensation.

[0056] The compensation capacitor Cfb 26 This compensation capacitor, Cfb, is intended for loop stability. 26 It can be switched by receiving configuration information from the DSP.33 for a range of codewords that can control the bandwidth of the analog signal path, thereby reducing the noise bandwidth. The switch can be designed using the transmission gate, which is controlled by one or more thermometer bits of the N-bit DAC codeword (e.g., an 11-bit gain codeword). The zero point in the frequency response is determined by Rfb and Cfb. Cfb can be adjusted to minimize the variation of Rfb*Cfb.

[0057] For high-precision applications at high temperatures, an offset compensation loop around the op-amp can be used. 24 be implemented. The fluctuation between the virtual masses of the opamp 24(VREF and VINN) can contribute to the accuracy error in gain calibration. The Hall element has a sensitivity that decreases with temperature. Higher analog gain is desirable. Since the Hall sensitivity is a 1 / x function with respect to temperature, the accuracy requirement increases at high gain levels. An offset compensation loop can be provided to minimize the difference between VREF and VINN.

[0058] With reference to Fig. 3. Additional details of the programmable current divider will be provided. 25 provided. In particular, it provides Fig. 3 a circuit diagram of the programmable current divider 25 dar.

[0059] As noted above, the programmable current divider 25 an inverted R2R-DAC, which is in a negative feedback path of the op-amp 24is placed. More precisely, in this example, the programmable current divider is 25 An inverted 11-bit R2R DAC. However, it is clear that the inverted R2R DAC can be configured with more or fewer bits depending on the application.

[0060] The inverted R2R DAC is an N-bit R-2R resistor network that uses two resistor values ​​(i.e., R and 2R) and a programmable current divider scheme set based on an N-bit DAC code. Based on the N-bit DAC code, the value of the effective feedback resistor Rfb is changed and used to regulate the voltage Vfb. For example, the inverted R2R DAC can be configured so that the value of the effective feedback resistor Rfb is inversely proportional to the N-bit DAC code, for example, by using a 1 / x function. Thus, as the binary-coded value of the N-bit DAC code increases, the value of the effective feedback resistor Rfb decreases, for example, by a function of 1 / x. Thus, the current gain of the inverted R2R DAC is also proportional to the binary-coded value of the N-bit DAC based on the same function.It is clear that different programming settings for temperature, mechanical load and supply voltage VDD can be used to compensate for these measurement parameters.

[0061] The programmable current divider 25 (i.e., the inverted R2R DAC) can comprise three sections that contribute to the value of the effective feedback resistance Rfb (or the cumulative feedback current Ifb). The three sections comprise an n-bit binary section. 35 (e.g., a 7-bit binary section), an m-bit thermometer section (e.g., a 4-bit thermometer section), and a fixed resistor arrangement Rfixed, where the sum of n and m equals N and N equals 11. In addition to using more or fewer bits, it is also possible to use the inverted R2R DAC without the n-bit binary section. 35 or the m-bit thermometer section 36 to implement.

[0062] The inverted R2R DAC of this example is implemented using a 7-bit binary DAC. 35 and a 4-bit MSB thermometer DAC 36 Realized. The 7-bit binary DAC 35 The DAC is implemented using an R2R ladder where currents are binary weighted, ascending from D0 to D6. The thermometer DAC is realized using a parallel resistor bank where equal currents flow, their weights equal to the binary value of D7 (e.g., 128). This DAC arrangement can improve monotonicity and reduce noise pulses. The ratio between maximum and minimum gain can be configured using the fixed resistor arrangement Rfixed.

[0063] Fig. Figure 4 shows a circuit diagram of an equivalent resistance conductor of the programmable current divider of Fig. 3 represents when all bits are ON. That is, when the N-bit DAC codeword is, for example, 11111111111. Here, the total current Igm from the VI converter 23 flows through the parallel combination of the 2R of the DAC and the 8R resistance of the fixed resistor array Rfixed. In this case, the feedback voltage Vfb can be calculated according to equations (1) and (2). I g m ∗ 3.2 R = V f b V f b I g m = 3.2 R

[0064] Fig. Figure 5 shows a circuit diagram of an equivalent resistance conductor of the programmable current divider of Fig. 3 represents when all bits are OFF. That is, when the N-bit DAC codeword is, for example, 00000000000. Here, the total current Igm from the VI converter 23 flows through the 8Ω resistor of the fixed resistor array Rfixed. In this case, the feedback voltage Vfb can be calculated according to equations (3) and (4). I g m ∗ 8 R = V f b 2 V f b I g m = 16 R

[0065] From equations (2) and (4) it can be seen that the effective feedback resistance Rfb varies from 3.2R to 16R and is inversely proportional to the N-bit DAC codeword.

[0066] The m-bit thermometer section 36 corresponds to the most significant bits (MSB) of the N-bit DAC code, while the n-bit binary section 35 This corresponds to the least significant bits (LSB) of the N-bit DAC code. This means that the current at each tap of the m-bit thermometer section 36 flows, is weighted more heavily than the current that flows in each tap of the n-bit binary section. 35 flows.

[0067] Furthermore, the division between the two different sections depends on 35 and 36It depends on the design parameters and can be adjusted. For example, the split can be configured based on the area of ​​the inverted R2R-DAC (i.e., how much semiconductor area can be allocated to the inverted R2R-DAC) and on the desired linearity in the performance of the inverted R2R-DAC.

[0068] The inverted R2R DAC is a programmable resistor network that operates as a series of current dividers. Each current divider, or tap, carries a weighted portion of the input current Igm. The lowest weighted current can be denoted as Iw, and further weighted currents are binary weights of Iw (e.g., 2Iw, 4Iw, ... 128Iw). Furthermore, a remaining portion Ir of the input current Igm flows through the last current tap (e.g., through the resistor). 8R), which is part of the fixed resistor arrangement Rfixed. Thus, in an 11-bit system, there are 12 total current taps, 11 of which are programmable. The total weighted current Iwt and the remaining current Ir are summed to produce a cumulative feedback current Ifb.

[0069] The higher the binary-coded value of the DAC code, the higher the value for the total weighted current Iwt. The higher the value for the total weighted current Iwt, the lower the value of the effective feedback resistance Rfb. The lower the value of the effective feedback resistance Rfb, the lower the overall analog gain of the circuit. Conversely, the lower the binary-coded value of the DAC code, the more current Ir flows through the last current tap (e.g., through the resistor). 8R of the standard branch), and the higher the overall analog gain of the circuit.

[0070] The n-bit binary section 35The n-bit binary section, which in this example represents 7 bits, consists of 7 current taps that are binary weighted relative to each other, such that the first tap closest to VINN has the lowest weight (e.g., Iw) and the seventh tap furthest from VINN has the highest weight (e.g., 64Iw). Since the differential current signal Igm is input into the inverted R2R DAC at VINN, each subsequent tap of the n-bit binary section has a different weight. 35 an increased binary weight (i.e., 2 0 , 2 1 , 2 2 , ... 2 6 ) relative to a section of the differential current signal Igm (i.e. Iw, 2Iw, 4Iw, 8Iw, 16Iw, 32Iw and 64Iw).

[0071] Each tap of the n-bit binary section 35 comprises two switches (e.g., D0 / D0b, D1 / D1b, ... and D6 / D6b). The first switch of each tap ( D0 , D1 , ... and D6The first switch of each tap (D0b, D1b, ..., and D6b) is connected to VINN and the fixed resistor array Rfixed. The second switch of each tap is connected to VREF. The first and second switches of each tap operate in binary opposite states, so when one switch is closed (enabled by a logic 1 of the N-bit DAC code), the other switch is open (disabled by a logic 0 of the N-bit DAC code). Thus, each bit of the binary N-bit DAC codeword connects a corresponding switch to either VREF or VINN.

[0072] If the first switch of a tap ( D0 , D1 , ... and D6 ) is closed, the current from VINN flows through the 2Ω resistor of this tap as a weighted current, which is then directed to the output Vfb, where the "activated" currents are summed to generate the cumulative feedback current Ifb. If, on the other hand, the first switch of a tap ( D0, D1 , ... and D6 If the second switch is open (i.e., when the second switch is closed), no current flows through this tap. Therefore, if a tap is not "activated," it does not contribute to the total weighted current Iwt, and consequently, this tap does not contribute to the cumulative feedback current Ifb.

[0073] The m-bit thermometer section 36 , which in this example represents four bits, consists of (2 m -1) Current taps that are equally weighted relative to each other, but are weighted twice or twice as much as the highest bit of the n-bit binary section. 35 Indeed, the current taps of the m-bit binary section are 36 all equal to the next binary weight in the sequence that corresponds to the binary weight sequence of the n-bit binary segment 35 follows. Since the n-bit binary segment 35 has 7 binary weighted currents (i.e., 2 0 , 2 1 , 2 2 , ... 26 ), is the next binary weight in sequence 2 7 (i.e. 128 ). Thus, each tap in the m-bit thermometer section contributes 36 a current 128Iw to a total weighted current Iwt and thus to the cumulative feedback current Ifb when the tap is "activated".

[0074] The tap of the m-bit thermometer section 36 The resistor closest to the fixed resistor arrangement Rfixed (i.e., furthest from VINN) corresponds to the MSB of the m-bit thermometer section. 36 On the other hand, the tap of the m-bit thermometer section corresponds to 36 furthest away from the fixed resistor arrangement Rfixed (i.e., closest to VINN) the LSB of the m-bit thermometer section 36 If the eighth bit of the N-bit DAC codeword is ON, the first tap is T1 of the m-bit thermometer section 36connected. If only the ninth bit of the N-bit DAC codeword is ON, the taps are T1 and T2 of the m-bit thermometer section 36 ON. If both the eighth and ninth bits of the N-bit DAC codeword are ON, the taps are T1 , T2 and T3 The m-bit thermometer section 36 is activated. If only the eleventh bit of the N-bit DAC codeword is ON, the taps are T1 until T8 of the m-bit thermometer section 36 ONE. If the bits 8 until 11 The taps are ON in the N-bit DAC codeword. T1 until T15 of the m-bit thermometer section 36 ONE. The other taps and combinations thereof are also activated by one of the possible remaining combinations of bits of the N-bit DAC codeword.

[0075] The extraction of the n-bit binary section 35The closest to VINN corresponds to the LSB (e.g., the first bit) of the N-bit DAC codeword. Thus, bits correspond to 1 until 7 of the N-bit DAC codeword, each tap D0 - D6 of the n-bit binary section 35 .

[0076] Similar to the n-bit binary section 35 Each tap of the m-bit thermometer section includes 36 two switches (e.g., T0 / T0b, T1 / T1b, ... and T15 / 15b). The first switch of each tap ( T0 , T1 , ... and T15) is connected to VINN and the fixed resistor array Rfixed. The second switch of each tap ( T0b , T1b , ... and T15b ) is connected to VREF. The first and second switches of each tap operate in binary opposite states, so when one switch is closed (enabled by a logic 1 of the N-bit DAC code), the other switch is open (disabled by a logic 0 of the N-bit DAC code). Thus, each bit of the binary N-bit word connects a corresponding switch to either VREF or VINN.

[0077] If the first switch of a tap ( T0 , T1 , ... and T15 ) is closed, the current from VINN flows through the 2Ω resistor of this tap as a weighted current, which is then directed to the output Vfb, where the "activated" currents are summed to produce the total weighted current Iwt. When the first switch of a tap ( T0 , T1 , ... and T15If the second switch is open (i.e., when the second switch is closed), then no current flows through this tap. Therefore, if a tap is not "activated," it does not contribute any current to the total weighted current Iwt.

[0078] As noted above, each tap of the inverted R2R DAC has two binary opposite switches. This configuration can be used to prevent any change in the potential of VREF and VINN, thus keeping VREF and VINN equal to each other. Consequently, when each tap is switched from one switch to the other (i.e., between enabled and disabled states), the potential across each 2R resistor does not change.

[0079] Furthermore, the switches D0 until T15b each switch is also binary weighted according to the current weight of the respective tap. This means that the effective resistance (e.g., on-resistance) of each switch is binary weighted to ensure an equal voltage drop across all switches. For example, in a tap carrying a larger current weight (e.g., an MSB tap), the effective resistance of the switches in that tap (e.g., T15 and T15b ) lower than the effective resistance of switches provided in a less weighted branch (e.g., D0 and D0b), so that the voltage drops between all branches are equal. This ensures that the current Igm is divided across each branch according to the current-division function of the inverting R2R DAC.

[0080] By using two binary weighted switches in each tap, it can be ensured that the current Igm is divided across each tap according to the current-sharing function of the inverted R2R-DAC. Thus, the inverted R2R-DAC operates on the principle of current summation, and the cumulative feedback current Ifb changes based on which current taps are activated, so that their respective weighted currents are summed.

[0081] As can be seen, the N-bit DAC code affects the analog path by changing the value of the effective feedback resistor Rfb. More precisely, the value of the effective feedback resistor Rfb is inversely proportional to the N-bit DAC code. To convert the current Igm into the voltage Vfb, the current Igm is multiplied by the value of the effective feedback resistor Rfb to provide a voltage across the negative feedback path, which is added to VREF to derive the output voltage ΔVout. Since the current Igm is fed through the negative feedback path, which forms the programmable current divider... 25 If the data includes a reduction in the value of the effective feedback resistance Rfb due to a higher DAC codeword, this would lead to a reduction in the voltage Vfb at the output of the op-amp. 24This would result in lower analog gain. Conversely, an increase in the value of the effective feedback resistance Rfb due to a lower DAC codeword would lead to an increase in the voltage at the op-amp output. 24 This would result in a higher analog gain.

[0082] All currents are passed through a fixed resistor array Rfixed, which is connected in series with the programmable section of the inverting R2R-DAC, between the programmable section and the output of the inverting R2R-DAC, and induces a final voltage drop across the output resistor Rout to arrive at the feedback voltage Vfb. The ratio between maximum and minimum gain can be configured using the fixed resistor array Rfixed. That is, if all taps of the inverting R2R-DAC are disabled, current Igm would flow directly into the fixed resistor array Rfixed as current Ir. This case would correspond to a maximum voltage gain, which is partially defined by the resistance values ​​of the resistors that make up the fixed resistor array Rfixed.Alternatively, if all taps of the inverted R2R DAC are enabled, the total weighted current is a maximum fixed resistance arrangement Rfixed. This case would correspond to a minimum voltage gain, which is partially defined by the resistance value of the resistors forming the fixed resistance arrangement Rfixed.

[0083] This technique can consume less semiconductor area and power. The total analog forward gain is determined by the ratio of the effective feedback resistance Rfb to the sensing resistance Rs. Both resistors are designed with the same temperature coefficient and process variation.

[0084] Using the resistors that make up the fixed resistor arrangement Rfixed in Fig. The total analog forward path gain formed by the readout circuit is 3. 22 is provided, shown in equations (5), (6) and (7).

[0085] The detailed amplification calculation: Igm = Δ Vin / Rs G e s a m t v e r s t ä r k u n g = Δ V o u t Δ V i n = 2 R R s ∗ ( 4096 C o d e + 512 ) <?page 13=""?> G e s a m t v e r s t ä r k u n g = Δ V o u t Δ V i n = 2 R R s ∗ ( 1 D 0 Z 12 + D 1 Z 11 + D 2 Z 10 + D 3 Z 9 + D 4 Z 8 + D 5 Z 7 + D 6 Z 6 + T 1 Z 5 + T 2 Z 5 … … … + T 14 Z 5 + T 15 Z 5 + 1 8 )

[0086] In equation (6), code is the binary-coded value of the N-bit DAC code. In equation (7), the corresponding values ​​are... T1 - T15 the 7-bit thermometer section 36 and each of T1 - T15 It can be either a 0 or a 1, based on the corresponding bit value of the N-bit DAC code. Similarly, D0-D6 correspond to the 4-bit binary section. 35 and each of D0 - D6can be either a 0 or a 1, based on the corresponding bit value of the N-bit DAC code. Therefore, if the corresponding bit of the N-bit DAC code is a 1, the corresponding tap contributes a weighted current value according to equation (7). If the corresponding bit of the N-bit DAC code is a 0, the corresponding tap does not contribute a weighted current value according to equation (7). The value 1 / 8 in equation (7) represents the last current tap formed by the fixed resistor arrangement Rfixed.

[0087] Based on equation (7), the effective feedback resistance is inversely proportional to the DAC code. That is, the total analog gain increases when the binary-coded value of the DAC code decreases, and vice versa.

[0088] Regarding the above embodiments, an inverting R2R DAC can be used in the negative feedback path of an inverting amplifier, implemented in conjunction with digitally assisted analog-to-analog gain compensation, to compensate for the nonlinear sensitivity of one or more Hall sensors to temperature and mechanical stress. Other compensation parameters, such as supply voltage VDD and process corners, can also be used in the digitally assisted analog-to-analog gain compensation.

[0089] Since the inverting R2R DAC uses impedance matching for gain, it can also operate at low power. This technique can also be advantageous for medium to high bandwidth operations from 0 to 120 kHz, and especially from 10 to 120 kHz. Phase delay between input and output can also be reduced with a smaller number of cascaded stages.

[0090] Although various embodiments have been described, it is clear to those skilled in the art that many further embodiments and implementations are possible within the scope of the invention. Accordingly, the invention is not to be limited, except with respect to the attached claims and their equivalents. With regard to the various functions performed by the components or structures (arrangements, devices, circuits, systems, etc.) described above, the terms (including any reference to a "device") used to describe such components shall correspond to each component or structure that performs that specific function of the described component (i.e.,which is functionally equivalent), unless otherwise indicated, even if it is not structurally equivalent to the disclosed structure that performs the function in the exemplary embodiments of the invention described herein.

[0091] Furthermore, the following claims are hereby included in the detailed description, each claim constituting a separate exemplary embodiment. Although each claim may constitute a separate exemplary embodiment, it should be noted that—although a dependent claim may refer in the claims to a specific combination with one or more other claims—other exemplary embodiments may also include a combination of the dependent claim with the subject matter of another dependent or independent claim. Such combinations are proposed herein unless it is noted that a specific combination is not intended. It is also intended to include features of one claim in another independent claim, even if that claim is not directly dependent on the independent claim.

[0092] It should also be noted that methods disclosed in the description or in the claims can be implemented by a device comprising facilities for carrying out each of the respective steps of these methods.

[0093] Furthermore, it is clear that the disclosure of multiple steps or functions revealed in the description or claims need not be restricted to a specific order. Therefore, a disclosure of multiple steps or functions does not limit them to a particular sequence unless such steps or functions are not interchangeable for technical reasons. Moreover, in some embodiments, a single step may comprise or be divided into multiple sub-steps. Such sub-steps may be included within that single step and be part of its disclosure unless this is explicitly excluded.

Claims

[1] A magnetic sensor having the following features: at least one magnetic field sensor element configured to generate an analog input sensor signal in response to a magnetic field; an inverting amplifier configured to produce an analog output sensor signal that has an amplified value with respect to the analog input sensor signal, a programmable current divider arranged in a negative feedback path of the inverting amplifier, wherein the amplified value depends on an effective feedback resistance value of the programmable current divider; and a digital controller configured to receive at least one measurement parameter, to generate a codeword based on that at least one measurement parameter, and to transmit the codeword to the programmable current divider to compensate for the amplified value, where the effective feedback resistance value is set based on the codeword received by the programmable current divider. [2] The magnetic sensor according to claim 1, wherein the at least one magnetic field sensor element comprises a differential Hall sensor element pair, wherein the first analog sensor signal is a first differential Hall voltage and the analog output sensor signal is a second differential Hall voltage. [3] The magnetic sensor according to claim 1 or 2, which further comprises the following feature: at least one voltage-to-current converter configured to convert the analog input sensor signal into an analog current signal and output the analog current signal to the programmable current divider via the negative feedback path. [4] The magnetic sensor according to claim 3, wherein the voltage-to-current converter comprises a sensing resistor configured to convert the analog input sensor signal into the analog current signal, wherein the amplified value corresponds to a ratio of the effective feedback resistance value and a resistance value of the sensing resistor. [5] The magnetic sensor according to any one of claims 1 to 4, wherein: The inverting amplifier, the programmable current divider, and the voltage-to-current converter operate in a continuous time domain and The digital control operates in a digital discrete time domain, so that at least one measurement parameter is sampled at a plurality of sampling times and the codeword is updated. [6] The magnetic sensor according to any one of claims 1 to 5, wherein the effective feedback resistance value is inversely proportional to a binary-coded value of the codeword according to an inverse function. [7] The magnetic sensor according to claim 6, wherein the inverse function is 1 / x. [8] The magnetic sensor according to any one of claims 1 to 7, wherein the programmable current divider is an R2R digital-to-analog converter (DAC). [9] The magnetic sensor according to claim 8, wherein the codeword is an N-bit codeword and the R2R-DAC has the following features: an n-bit binary section that has a first set of binary weighted current taps; an m-bit thermometer section having a second set of equally weighted current taps; and a fixed resistor arrangement configured to receive currents activated by the N-bit codeword and to generate an effective feedback voltage from which the amplified value is derived, where N is the sum of n and m. [10] The magnetic sensor according to claim 9, wherein the second set of equally weighted current taps has a binary weight that is greater than the first set of binary weighted current taps [11] The magnetic sensor according to claim 9 or 10, wherein the fixed resistance arrangement defines a ratio between a maximum and a minimum of the amplified value. [12] The magnetic sensor according to any one of claims 1 to 11, wherein the at least one measurement parameter comprises a temperature value, a mechanical load value or a voltage supply VDD value. [13] The magnetic sensor according to any one of claims 1 to 12, wherein the analog output sensor signal is independent of the at least one measurement parameter. [14] A gain compensation method implemented in a magnetic sensor, the method comprising the following steps: Generating an analog input sensor signal by means of at least one magnetic field sensor element responding to a magnetic field; Generating an analog output sensor signal based on the analog input sensor signal, wherein the analog output sensor signal has an amplified value relative to the analog input sensor signal; Generating a codeword based on at least one digital measurement parameter; and Setting an effective feedback resistance value of a negative feedback path of an inverting amplifier based on the codeword, so that the amplified value is set to compensate for at least one digital measurement parameter. [15] The method according to claim 14, which further comprises the following steps: Converting the analog input sensor signal into an analog current signal; Transferring the analog current signal to the negative feedback path; and Converting the analog current signal into the analog output sensor signal based on the codeword. [16] The method according to claim 14 or 15, wherein the effective feedback resistance value is inversely proportional to a binary-coded value of the codeword according to an inverse function. [17] The method according to claim 16, wherein the inverse function is 1 / x. [18] The method according to any one of claims 14 to 17, wherein the at least one measurement parameter comprises a temperature value, a mechanical load value or a voltage supply VDD value. [19] The method according to any one of claims 14 to 18, wherein the generation of the codeword comprises generating the codeword based on the at least one digital measurement parameter, such that the analog output sensor signal is independent of the at least one measurement parameter. [20] The method according to any one of claims 14 to 19, wherein the effective feedback resistance value is an effective resistance value of an R2R digital-to-analog converter (DAC) and which comprises at least one magnetic field sensor and at least one Hall sensor element.

Images