Semiconductor component and method

DE102019119044B4Active Publication Date: 2026-07-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
DE102019119044
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-07-08
Filing Date
2019-07-15
Publication Date
2026-07-16
Estimated Expiration
2039-07-15

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Abstract

Method comprising the following steps: creating a first recess (52) and a second recess (62) in a substrate (50); growing a first epitaxial material stack (56) in the first recess (52), wherein the first epitaxial material stack (56) comprises alternating layers (58A, 58B) of a first semiconductor material and a second semiconductor material, wherein the layers of the first epitaxial material stack (56) are undoped; growing a second epitaxial material stack (66) in the second recess (62), wherein the second epitaxial material stack (66) comprises alternating layers (58A, 58B) of the first semiconductor material and the second semiconductor material, wherein a first subset (66A) of the second epitaxial material stack (66) is undoped and a second subset (66B) of the second epitaxial material stack (66) is doped;Structuring the first epitaxial material stack (56) and the second epitaxial material stack (66) to fabricate first nanowires and second nanowires, respectively, wherein a first subset of the second nanowires is doped and a second subset of the second nanowires is undoped; and fabricating a first gate structure around the first nanowires and a second gate structure around the second nanowires.
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Citation Information

Patent Citations

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