Semiconductor device and method for forming the same

Abstract

Method for forming a semiconductor device, the method comprising: applying an adhesive material (133) to a first region of an upper surface of a substrate (120), wherein the application of the adhesive material (133) comprises: applying a first adhesive material (133B) to first locations of the first region; and applying a second adhesive material (133A) to second locations of the first region, wherein the second adhesive material (133A) has a different material composition than the first adhesive material (133B);and attaching a ring (131) to the upper surface of the substrate (120) using the adhesive material (133) applied to the upper surface of the substrate (120), wherein the adhesive material (133) is located between the ring (131) and the substrate (120) after the ring (131) is attached, further comprising, after attaching the ring (131), removing the first adhesive material (133B), while the second adhesive material (133A) remains between the ring (131) and the substrate (120).

Description

PRIORITY CLAIM AND CROSS-REFERENCE

[0001] This application claims priority over provisional US patent application No. 62 / 725,749, filed on August 31, 2018, entitled “Semiconductor Device and Method of Forming the Same”, which is incorporated herein by reference in its entirety. GENERAL STATE OF THE ART

[0002] The semiconductor industry has grown rapidly due to continuous improvements in the integration density of a wide variety of electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). This improvement in integration density largely stems from repeated reductions in the minimum component size, allowing more components to be integrated into a given area.

[0003] With the increasing demand for miniaturized electronic devices, there has been a need for smaller and more innovative packaging techniques for semiconductor dies. One example of such packaging systems is package-on-package (PoP) technology. In a PoP device, an upper semiconductor package is stacked on top of a lower semiconductor package to provide a high level of integration and component density. Another example is a chip-on-wafer-on-substrate (CoWoS) structure. In some embodiments, to form a CoWoS structure, multiple semiconductor chips are attached to a wafer, and a dicing process is then performed to divide the wafer into multiple interposers, with one or more semiconductor chips attached to each interposer. The interposer with the attached chip(s) is referred to as a chip-on-wafer (CoW) structure. The CoW structure is then attached to a substrate (e.g., a substrate).a circuit board) to form a CoWoS structure. These and other advanced packaging technologies enable the production of semiconductor devices with improved functionality and small sizes. List of characters

[0004] Aspects of the present disclosure are best understood through the following detailed description, when read in conjunction with the accompanying figures. It should be noted that, in accordance with industry standard practice, various features are not drawn to scale. The dimensions of the various features may, in fact, be arbitrarily enlarged or reduced to clarify the explanation. Fig. Figure 1 illustrates a cross-sectional view of a semiconductor device according to some embodiments. Fig. Figure 2 illustrates a top view of the exemplary semiconductor device of Fig. 1 according to one embodiment. Fig. Figure 3 illustrates a top view of the exemplary semiconductor device of Fig. 1 according to one embodiment. Fig. 4A illustrates a top view of the exemplary semiconductor device of Fig. 1 according to one embodiment. Fig. Figure 4B illustrates a cross-sectional view of the semiconductor conductor device. Fig. 4A along cross-section A-A in one embodiment. Fig. Figure 5 illustrates a top view of the exemplary semiconductor device of Fig. 1 according to one embodiment. Fig. Figure 6 illustrates a cross-sectional view of a semiconductor device according to some embodiments. Fig. Figure 7 illustrates a flowchart of a method for forming a semiconductor device according to some embodiments. DETAILED DESCRIPTION

[0005] The following disclosure provides many different embodiments or examples for implementing various functions of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, only examples and are not intended to be limiting. For example, the formation of a first feature or a second feature in the following description may include embodiments in which the first and second features are formed in direct contact, and it may also include embodiments in which further features can be formed between the first and second features, so that the first and second features need not be in direct contact. Furthermore, the present disclosure may repeat reference numerals and / or letters in the various examples.In this description, unless otherwise specified, identical reference numerals in different figures refer to the same or a similar component formed by the same or a similar process using the same or a similar material or materials.

[0006] Furthermore, spatially relative terms such as "below," "underneath," "lower," "above," "upper," and the like may be used herein for a simpler description of the relationship of one element or feature to one or more other elements or features, as illustrated in the figures. The spatially relative terms should encompass various orientations of the device in use or operation, in addition to the orientation shown in the figures. The device may be oriented differently (rotated by 90 degrees or in other orientations), and the spatially relative designators used herein may also be interpreted accordingly.

[0007] Fig. Figure 1 illustrates a cross-sectional view of a section of a semiconductor device 100 according to some embodiments. The semiconductor device 100 is a CoWoS device, with a ring 131, which are attached to an upper surface of a substrate of the CoWoS device, details of which will be discussed later. For the sake of simplicity, it shows Fig. 1 only a left section of the semiconductor device 100 and the first section of the semiconductor device 100 can be the same as (e.g., symmetrical to) or similar to the left section, which is in Fig. Figure 1 shows, as a person skilled in the art will readily recognize, top views of various embodiments of the semiconductor device. 100 are in the Fig. 2, Fig. 3, Fig. 4A and Fig. 5 illustrated.

[0008] To form the semiconductor device 100 will one or more of these 101 (possibly also referred to as semiconductor dies, chips or integrated circuits) IC This) on an interposer 110attached to form a chip-on-wafer (CoW) structure, and the CoW structure is then placed on a substrate 120 (e.g., a circuit board) to form a "chip-on-wafer-on-substrate" (CoWoS) structure. The die 101 In some embodiments, the dies are of the same type (e.g., memory dies or logic dies). In other embodiments, the dies are 101 of different types, e.g. some of these are 101 Logic this and other this 101 are storage devices. A ring 131 , which can be a rectangular ring, is attached to the substrate 120 around the CoW structure using an adhesive material 133 attached. The adhesive material 133 can include various types of adhesive materials (see e.g. adhesive material) 133A and adhesive material 133B in Fig. 2, Fig. 3 and Fig. 4A), arranged at various locations under the ring 131In one embodiment, the adhesive material remains 133A and the adhesive material 133B both in the final product of the semiconductor device 100 In another embodiment, one of the adhesive materials (e.g. 133B ) removed after the ring 131 is attached. In yet another embodiment, after the ring is attached 131 on the upper surface of the substrate 120 The lower surface of the substrate is attached. 120 attached to a workpiece (e.g. a motherboard) and then the adhesive material is applied. 133 and the ring 131 from the semiconductor device 100 removed. Details of the various embodiments are discussed below.

[0009] To form the CoW structure, one or more dies are used. 101 at the interposer 110 attached. Each of these 101It comprises a substrate, electrical components (e.g., transistors, resistors, capacitors, diodes, or the like) formed in / on the substrate, and a connecting structure above the substrate that links the electrical components to form functional circuits of the die. 101 to form. The 101 also includes conductive columns 103 (also known as die connectors), which provide an electrical connection to the circuits of the die 101 provide.

[0010] The substrate of the die 101 can be a semiconductor substrate, doped or undoped, or an active layer of a “silicon-on-insulator” ( SOI ) Substrates. In general, an SOI substrate comprises a layer of a semiconductor material such as silicon, germanium, silicon-germanium, SOI , silicon germanium on insulator ( SGOI ) or combinations thereof. Other substrates that can be used include multilayer substrates, gradient substrates, or hybrid orientation substrates.

[0011] The electrical components of the die 101 They comprise a wide variety of active devices (e.g., transistors) and passive devices (e.g., capacitors, resistors, inductors), and the like. The electrical components of the die 101 can be carried out using any suitable method either in or on the substrate of the die 101 be formed. The connection structure of this 101It comprises one or more metallization layers (e.g., copper layers) formed within one or more dielectric layers and is used to connect the various electrical components to form a functional circuit. In one embodiment, the interconnect structure is formed from alternating layers of dielectric and conductive material (e.g., copper) and can be formed by a suitable process (such as deposition, damascening, double damascening, etc.).

[0012] One or more passivation layers (not shown) can be applied over the connection structure of the die 101 be designed to provide a level of protection for the underlying structure of the die 101to provide. The passivation layer can consist of one or more suitable dielectrics such as silicon oxide, silicon nitride, low k-value dielectrics such as carbon-doped oxides, extremely low k-value dielectrics such as porous carbon-doped silicon dioxide, combinations thereof, or the like. The passivation layer can be produced by a process such as chemical vapor deposition ( CVD ) can be formed, but any suitable process can be used.

[0013] Conductive pads (not shown) can be formed above the passivation layer and can extend through the passivation layer to make electrical contact with the die's interconnect structure. 101 to be. The conductive pads can be aluminum, but other materials, such as copper, can be used instead.

[0014] Conductive columns 103 of this 101are formed on the conductive pads to provide conductive regions for electrical connection with the circuits of the die. 101 to provide. The conductive columns 103 They can be copper columns, contact bumps such as microbumps or the like, and can include a material such as copper, tin, silver or another suitable material.

[0015] With regard to the interposer 110 , which is a substrate 111 , vias 115 (also known as Through-Substrate Vias (TSVs)) and conductive pads 113 / 117 on the upper / lower surfaces of the substrate 111 includes, illustrates Fig. 1 also a passivation layer 119 (e.g. polymer layer) of the interposer 110 , which include at least sections of the conductive pads 117 includes the interposer. Furthermore, the interposer can 110 external connections 118 include (these may also be referred to as conductive bumps).

[0016] The substrate 111 It can be, for example, a silicon substrate, doped or undoped, or an active layer of a silicon-on-insulator (SOI) substrate. The substrate 111 However, it can alternatively be a glass substrate, a ceramic substrate, a polymer substrate or another substrate that provides suitable protection and / or a bonding function.

[0017] In some embodiments, the substrate can 111 Electrical components include, for example, resistors, capacitors, signal distribution circuits, combinations thereof, or the like. These electrical components can be active, passive, or a combination thereof. In other embodiments, the substrate 111 free of any active and passive electrical components. All such combinations shall be fully contained within the scope of this disclosure.

[0018] Vias 115extend from the upper surface of the substrate 111 to the lower surface of the substrate 111 , and establish electrical connections between the conductive pads 113 and 117 ready. The vias 115 They can be made of a suitable conductive material such as copper, tungsten, aluminum, alloys, doped polysilicon, combinations thereof, and the like. A barrier layer can be placed between the vias. 115 and the substrate 111 The barrier layer may comprise a suitable material such as titanium nitride, although other materials, such as tantalum nitride, titanium, or the like, may also be used as alternatives.

[0019] The external connections 118 are on the conductive pads 117trained and can be any suitable type of external contact, such as microbumps, copper pillars, a copper layer, a nickel layer, a lead-free ( LF ) layer, an “Electroless Nickel Electroless Palladium Immersion Gold” ( ENEPIG ) layer, a Cu / LF layer, a Sn / Ag layer, a Sn / Pb layer, combinations thereof or the like.

[0020] As in Fig. Figure 1 illustrates the conductive column. 103 this 101 to the conductive pads 113 of the interposer 110 e.g. through soldering regions 105 bound. A reflow process can be performed to remove this. 101 to the interposer 110 to bind.

[0021] After this 101 to the interposer 110 bound, an underfill material is used. 107 between the This 101 and the interposer 110 formed. The underfill material 107This could, for example, include a liquid epoxy that is applied to a gap between the dies 101 and the interposer 110 is dispensed, e.g., using a dispensing needle or other suitable dispensing tool, and then hardened. As in Fig. 1 illustrates, fills the sub-filling material 107 the gap between the 101 and the interposer 110 , and can also create gaps between the side walls of the die 101 fill. In other embodiments, the underfill material 107 omitted.

[0022] Next, a molding material will be used. 109 above the interposer 110 and to this 101 trained. The molding material 109 also surrounds the underfill material 107 in embodiments in which underfill material 107 is trained. The mold material 109It may, for example, comprise an epoxy, an organic polymer, a polymer with or without added silicon dioxide-based filler or glass filler, or other materials. In some embodiments, the mold material comprises 109 a liquid molding compound ( LMC ), which is a gel-type liquid when applied. The molding material 109 The application can also include a liquid or a solid. Alternatively, the molding material can be... 109 include other insulating and / or encapsulating materials. The molding material 109 In some embodiments, it is applied using a molding process at the wafer level. The molding material 109 This can be achieved, for example, by using press molds, transfer molds, or shaped underfill ( MUF ) or other methods.

[0023] Next, the molding material will be used. 109In some embodiments, the material is hardened using a hardening process. This hardening process can involve heating the mold material. 109 to a predetermined temperature for a predetermined period of time using an annealing or other heating process. The hardening process may also involve ultraviolet ( UV ) Exposure process, an infrared ( IR ) Energy contact process, combinations thereof, or a combination thereof with a heating process. Alternatively, the mold material can be 109 They can be hardened using other methods. In some embodiments, a hardening process is not included.

[0024] After the formation of the mold material 109 Can a planarization process, such as chemical and mechanical planarization ( CMP ), are carried out to remove excess sections of the molding material. 109 from over the This 101to remove, so that the molding material 109 and this 101 exhibit a coplanar upper surface. As in Fig. As illustrated in 1, the mold material is 109 continuously with the substrate 111 .

[0025] In the examples from Fig. 1. The CoW structure includes the interposer. 110 , This 101 , the underfill material 107 and the molding material 109 Next, the CoW structure is bonded to the substrate. 120 connected, which is a circuit board ( PCB ) can be used to form a CoWoS structure.

[0026] With regard to the substrate 120 In some embodiments, the substrate 120 a multi-layered circuit board. For example, the substrate can be 120 one or more dielectric layers 121 / 123 / 125 include, from bismaleimide triazine ( BT ) Harz, FR- 4(a composite material consisting of woven fiberglass cloth with a refractory epoxy resin binder), ceramic, glass, plastic, tape, film, or other carrier materials. The substrate 120 may exhibit electrically conductive features (e.g., conductive wires) 127 and vias 129 ), which are in / on the substrate 120 are educated. As in Fig. 1 illustrates the substrate 120 conductive pads 126 on, which are located on an upper surface of the substrate 120 are trained, and conductive pads 128 , located on a lower surface of the substrate 120 are formed, with these conductive pads 126 / 128 electrically with the conductive features of the substrate 120 are coupled.

[0027] The Interposer 110 is with the substrate 120 connected. A reverse process can be carried out to electrically and mechanically return the interposer to its original position.110 with the substrate 120 e.g. through external connections 118 to connect. Next, a backer rod is applied. 112 between the interposer 110 and the substrate 120 formed. The underfill material 112 can be the same or similar to the underfill material 107 It can be formed through the same or a similar formation process, so the details are not repeated. After the interposer 110 with the substrate 120 Once connected, the CoWoS structure will be in Fig. 1 formed.

[0028] While more and more of this 101 to be integrated into the CoWoS structure to provide semiconductor devices with improved and / or higher storage capacity (e.g., storage capacity), the size of the interposer can be 110 and the size of the substrate 120 be increased to this 101to record. If the size of the substrate 120 As the substrate increases, it becomes increasingly difficult to remove it. 120 to keep it flat (e.g., to have a planar upper surface and / or a planar lower surface). Deformation of the substrate. 120 can make it difficult to use the semiconductor device 100 with another workpiece (e.g. a motherboard under the substrate) 120 (not shown) to connect, since the conductive pads 128 on the lower surface of the substrate 120 through the deformation of the substrate 120 are not arranged in the same plane. Problems such as cold joints can occur if the substrate is deformed. 120 attached to a motherboard. Similarly, it can be difficult to attach the CoW structure to the substrate. 120 to attach when the substrate 120 is not flat.

[0029] To control (e.g., reduce) the deformation of the substrate. 120Due to its large size, a ring 131 on the upper surface of the substrate 120 with an adhesive material 133 It is attached and used to determine the planarity (e.g., flatness) of the substrate. 120 to improve it. In some embodiments, the ring 131 It is made of a rigid material, such as steel, copper, glass, or the like. In one embodiment, the ring is 131 formed from a bulk material (e.g., bulk steel, bulk copper, bulk glass) to provide structural support, and there is no electrical circuitry in the ring. 131 In some embodiments, a UV light-emitting device is used. 139 on the underside of the ring 131 attached, details of which will be discussed below. The UV light-emitting device 139 can be part of the ring 131 It must be shaped. In the illustrated embodiment, the ring is 131a rectangular ring (e.g. with a hollow rectangular shape in top view), and is attached to the substrate 120 attached so that the ring 131 surrounding the CoW structure (e.g., the Dies) 101 and the interposer 110 surrounding). The CoW structure can also have a rectangular top view, as in Fig. 2 illustrated. The Ring 131 In one embodiment, it is located on the upper surface of the substrate. 120 It is attached after the CoWoS structure has formed. In other embodiments, the ring is 131 first on the upper surface of the substrate 120 attached and the CoW structure, which this 101 and the interposer 110 It is therefore located on the upper surface of the substrate. 120 in the ring 131 attached.

[0030] Fig. Figure 2 illustrates a top view of the exemplary semiconductor device 100 from Fig. 1 after attaching the ring131 according to one embodiment. It should be noted that although Fig. 1 the left section of the semiconductor device 100 illustrated, Fig. 2 but the left section and the right section of the semiconductor device 100 illustrated. To show the detail of the adhesive material. 133 (e.g. 133A and 133B ) under the ring 131 To illustrate, the ring 131 in Fig. 2 not illustrated, whereby it should be understood that the top view of the ring 131 , if it were illustrated, dealing with a region 134 (e.g., a hollow rectangular region) would overlap, which in Fig. 2 is illustrated, where the region 134 a region of the upper surface of the substrate 120 corresponds to those made by the adhesive materials 133 (e.g. 133A and 133B ) is occupied (e.g., covered). In other words, the region 134corresponds to a hollow, rectangular region of the substrate's surface. 120 , which are under (e.g. directly under) the ring 131 lies.

[0031] Fig. 2 illustrates the This 101 , the molding material 109 to this 101 The interposer 110 (see Fig. 1) is located directly below the Dies 101 and the molding material 109 , and is therefore in the top view from Fig. 2 not visible. Fig. Figure 2 further illustrates the underfill material 112 to the molding material 109 , the adhesive material 133 , which is in the region 134 is arranged, and the substrate 120 The number of this 101 and the place of this 101 , who in Fig. The illustrations in Figure 2 are for illustrative purposes only and are not limiting. Other figures of this and other locations of this 101are also possible and should be fully contained within the scope of this revelation.

[0032] Various materials used in the semiconductor device 100 The materials used have different coefficients of thermal expansion (CTEs). For example, the following can be used: 101 a CTE of approximately 2.6 ppm / °C, the substrate 120 can have a CTE of approximately 8.4 ppm / °C and the ring can have a CTE of approximately 17.8 ppm / °C. Due to the differences in the CTEs of the various materials used in the semiconductor device 100 When used, this leads to stresses in the semiconductor device. 100 The voltage level can be high near the corners of the semiconductor device. 100 , such as near the four corners of the region 134 , can be particularly high. If left untreated, this stress can lead to delamination and cracking in the semiconductor device. 100 lead.

[0033] With reference to Fig. 2 In some embodiments, several types of adhesive materials (e.g. adhesive materials with different material compositions) are used to reduce stresses, such as an adhesive material 133A and an adhesive material 133B , for the adhesive material 133 at different locations in the region 134 used. For example, the adhesive material 133B , which is located at the corners of the region 134 is used, softer and / or more elastic than the adhesive material 133A , which in the areas of the region 134 is used outside the corners. Fig. Figure 2 can be used to represent two different embodiments. In one embodiment, both the adhesive material and the adhesive material remain in place. 133A as well as the adhesive material 133B in the final product of the semiconductor device 100 , after the ring 131is attached. In another embodiment, the adhesive material 133B , which is located at the corners of the region 134 A sacrificial adhesive material is deposited, which is removed after the ring is removed. 131 it is attached, and therefore only the adhesive material remains. 133A under the ring 131 in the final product of the semiconductor device 100 Details of the various embodiments described above will be discussed below.

[0034] As in Fig. 2 illustrated, includes the adhesive material 133B separate sections located at the four corners of the region 134 be separated. The adhesive material 133A includes separate sections located in other areas of the region 134 are separated, which are separated by the adhesive material 133B are covered. For example, a section of the adhesive material may 133A in the region 134continuously between two separate sections of the adhesive material 133B extend, with the two separate sections of the adhesive material 133B a first section of the adhesive material 133B include, which is located at a first corner of the region 134 is arranged, and a second section of the adhesive material 133B , which is located at a second corner of the region 134 is arranged adjacent to the first corner. The adhesive materials 133A and 133B can in respective areas of the region 134 can be separated using any suitable method, and then the ring will be 131 over the adhesive material 133 placed and attached to the substrate 120 attached.

[0035] After deposition, the adhesive materials can be used 133A / 133BIt can be cured by a curing process. The curing process can be carried out at a temperature between approximately 150 °C and approximately 300 °C and can last between approximately 1 minute and approximately 30 minutes. In one embodiment, the adhesive material 133B A sacrificial adhesive material; the curing process hardens the adhesive material. 133A and removes the adhesive material 133B In another embodiment, the curing process hardens the adhesive materials. 133A / 133B , and a separate heating process is carried out to cure the adhesive material 133B (e.g., a sacrificial adhesive material) to remove.

[0036] In Fig. 2 show the separate sections of the adhesive material 133B , located at two adjacent corners of the region 134 are arranged, length L1 or L2 on, whereby L1 and L2 along one edge of the region 134 are measured, and the edge of the region 134has a length L. A ratio between the sum of L1 and L2 and the length L (e.g. (Li+L2) / L) can, for example, be between about 10% and about 50%, although other dimensions are also possible, and are intended to fall entirely within the scope of this disclosure.

[0037] In embodiments in which both the adhesive material 133A as well as the adhesive material 133B in the final product of the semiconductor device 100 The adhesive material remains (e.g., in a finished product for use). 133B an elastic adhesive material. For example, the adhesive material can 133BThe adhesive material may be of the rubber type, the silicone type, or the like. The rubber-type adhesive material may comprise natural rubber or synthetic rubber, such as polymers of isoprene and / or another diene. The silicone-type adhesive material may, for example, comprise a polymer-containing polysiloxane backbone (e.g., Si-O-Si). In some embodiments, the Young coefficient of the adhesive material is 133B (e.g., an elastic adhesive material) between approximately 0.0001 megapascals (MPa) and approximately 10,000 MPa, such as between approximately 0.001 MPa and approximately 10 MPa. An elongation of the adhesive material 133B In some embodiments, the value ranges between approximately 10% and approximately 1000%, such as between approximately 50% and approximately 1000%.

[0038] The adhesive material 133A is harder and / or less elastic (e.g. stiffer) than the adhesive material 133B In some embodiments, the Young coefficient of the adhesive material is 133Abetween approximately 0,01 Gigapascals (GPa) and approximately 5 GPa. An extension of the adhesive material. 133A For example, it ranges between approximately 20% and approximately 100%. Examples of the adhesive material 133A contain epoxy or similar substances.

[0039] The use of the elastic adhesive material (e.g. the adhesive material) 133B ) together with the non-homogeneous structure of the adhesive material 133 helps to relieve the tension in the semiconductor device 100 (e.g. at the corners of the region) 134 ), and therefore reduces or prevents stress-induced damage (e.g., delamination, cracking) to the semiconductor device 100 .

[0040] In embodiments in which the adhesive material 133B If it is a sacrificial adhesive material, the adhesive material can 133BIt must be or contain a thermally degradable material (also referred to as a heat-dissipating material), such as resins or polymers with a thermally degradable functional group. Examples of thermally degradable materials contain acrylate, methacrylate, carboxylate, or the like. Adhesive material is another example. 133B (e.g., a sacrificial adhesive) is a UV-degradable material (also referred to as a UV-releasing material) that can be removed by contact with UV light. In subsequent processing, the adhesive will 133B removed, while the adhesive material 133A on the ring 131 and the substrate 120 It remains attached. Therefore, only the adhesive material remains in the final product. 133A between the ring 131 and the substrate 120 in the semiconductor device 100 In other words, there is an opening. 132 (e.g. empty space) between the ring 131 and the substrate 120at any location where the adhesive material 133B was previously placed (before it was removed). Therefore, in Fig. 2 and subsequent figures, each location of the adhesive material 133B also as an opening 132 labelled to indicate that the opening 132 the adhesive material 133B after removing the adhesive material 133B will replace. In some embodiments, the adhesive material 133B removed after the semiconductor device 100 is connected to another workpiece (e.g., a motherboard).

[0041] In some embodiments, the Young coefficient of the adhesive material is 133B (e.g., a sacrificial adhesive) between approximately 0.001 megapascals (MPa) and approximately 10 MPa. An extension of the adhesive material 133B For example, it ranges between approximately 50% and approximately 1000%. Therefore, the adhesive material 133B(e.g., a sacrificial adhesive) a soft and / or elastic material. The adhesive 133A is harder and / or less elastic (e.g. stiffer) than the adhesive material 133B Examples of the adhesive material 133A They contain epoxy or the like. In some embodiments, the Young's coefficient of the adhesive material is... 133A between approximately 0.01 gigapascals (GPa) and approximately 5 GPa. An extension of the adhesive material. 133A For example, it ranges between approximately 20% and approximately 100%.

[0042] Depending on the properties of the adhesive material 133B (e.g., a thermally degradable material, a UV-degradable material), various processes can be carried out to make the adhesive material 133B to remove. For example, the adhesive material 133BIt must be a heat-dissipating material in which a heating process can be carried out, e.g., at a temperature between approximately 200 °C and approximately 300 °C and for a duration between approximately 1 minute and approximately 60 minutes. The heating process can cause the heat-dissipating material to lose its adhesive properties and detach from the substrate. 120 and from the ring 131 separates. The heating process can also cause the heat-dissipating material to break into small pieces. After the heating process, the loose heat-dissipating material can be removed from the semiconductor device. 100 for example, by a cleaning process (using washing fluid) or a vacuum process (vacuuming away loose heat-emitting material).

[0043] Another example is the adhesive material. 133BIt may be a UV-emitting material, in which case UV light can be used to remove the UV-emitting material. It should be noted that if the UV-emitting material is the adhesive material... 133B The ring is used 131 consists of a transparent material (e.g., transparent to UV light), such as glass, so that UV light (e.g., from a UV light source outside the ring) can pass through. 131 ) in one embodiment by the ring 131 can run to the adhesive material 133B to achieve this. In another embodiment, the ring has 131 a UV light-emitting device 139 on (see Fig. 1) which is attached to it, e.g. a lower surface of the ring 131 , which are in the direction of the adhesive material 133B indicates (e.g., is attached to it) in which case the ring 131It may consist of one or more materials (e.g., steel, copper) that are not transparent to UV light. If the UV light-emitting device 139 When activated, a UV light is generated and shines on the adhesive material. 133B , so that the adhesive material 133B loses its adhesive ability and detaches from the substrate 120 and the ring 131 The UV light can also cause the UV emitter material to break into small pieces. After the UV process, the loose UV emitter material can be removed from the semiconductor device. 100 for example, by a cleaning process (using washing fluid) or a vacuum process (vacuuming away loose UV emission material).

[0044] Another process may follow after the ring 131 on the substrate 120 is attached. For example, the lower surface of the substrate can be 120be attached to other workpieces, such as a motherboard, so that the conductive pads 128 of the substrate 120 mechanically and electrically coupled to the conductive properties of the workpieces. Details are not discussed here.

[0045] Fig. Figure 3 illustrates a top view of the exemplary semiconductor device 100 from Fig. 1 according to one embodiment. The embodiment in Fig. 3 is similar to the one from Fig. 2, but with further sections (labeled as 133BA ) of the adhesive material 133B , which are between the adhesive material 133B are secluded, located at the four corners of the region 134 is arranged. The sections 133BA of the adhesive material 133B comprise the same material (e.g., with the same composition) as the adhesive material 133B , and includes several strips of adhesive material 133B , which are in the adhesive material133A is embedded (e.g., in physical contact with it). Each of the strips extends from the upper surface of the substrate. 120 to the lower surface of the ring 131 The number of strips and the locations of the adhesive strips 133BA in Fig. The numbers 3 are for illustrative purposes only and are not limiting. Other numbers and locations are also possible and are to be fully included within the scope of this disclosure.

[0046] With reference to Fig. 3 is, in one embodiment, the adhesive material. 133B an elastic adhesive material, and the adhesive material 133A and 133B Both remain in the final product of the semiconductor device 100 In another embodiment, the adhesive material 133B a sacrificial adhesive material, and the adhesive material 133B is removed, e.g. by a heating process or a UV process, so that only the adhesive material remains. 133Aremains in the final product. This creates an opening. 132 (e.g. empty space) between the ring 131 and the substrate 120 at any location where the adhesive material 133B / 133A previously placed (as sacrificial adhesive material). The details are the same or similar as with reference to Fig. 2. Discussed and therefore not repeated.

[0047] Fig. 4A illustrates a top view of the semiconductor device 100 out of Fig. 1 according to one embodiment. The embodiment in Fig. 4A is similar to the one from Fig. 2, but with further sections (see label) 133BB ) of the adhesive material 133B , which are under the adhesive material 133A in the dashed rectangular regions of the region 134 are formed. In other words, the adhesive material 133exhibits a layered structure in the dashed rectangular regions, with this layered structure comprising a layer of the adhesive material. 133B (labeled as 133BB ) includes those under the adhesive material 133A is formed. Details of the layered structure of the adhesive material. 133 in the dashed rectangular regions are in Fig. 4B illustrates.

[0048] Fig. Figure 4B illustrates a cross-sectional view of a section of the semiconductor device. 100 out of Fig. 4A along cross-section A-A . Fig. Figure 4B shows the layered structure of the adhesive material. 133 in the dashed rectangular regions (see Fig. 4A), which is a layer of the adhesive material 133A over a layer of the adhesive material 133B (labeled as 133BB ) includes. Fig. 4B also illustrates the substrate 120 beneath the layered structure. Furthermore, it shows Fig. 4B also sections of the adhesive material 133A adjacent to and on both sides of the layered structure. As in Fig. 4B illustrates the sections of adhesive material. 133A On both sides of the layered structure, there is a height equal to the height of the layered structure.

[0049] With reference to Fig. 4A and Fig. 4B is, in one embodiment, the adhesive material. 133B an elastic adhesive material, and the adhesive material 133A and 133B Both remain in the final product of the semiconductor device 100 In another embodiment, the adhesive material 133B a sacrificial adhesive material and is removed, e.g. by a heating process or a UV process, so that only the adhesive material remains. 133A remains in the final product. This creates an opening. 132 (e.g. empty space) between the ring 131 and the substrate 120 at any location where the adhesive material133B / 133BB was previously placed (before it was removed). The details are the same or similar as with reference to Fig. 2. Discussed and therefore not repeated.

[0050] Fig. Figure 5 illustrates a top view of the exemplary semiconductor device. 100 from Fig. 1 according to one embodiment. In the embodiment from Fig. 5 is the adhesive material 133B , which is a sacrificial adhesive material, continuously in the region 134 trained to serve the region 134 to cover. In other words, the adhesive material 133 In this example, only the adhesive material is included. 133B (e.g., a sacrificial adhesive). The sacrificial adhesive may have the same Young coefficient and elongation as the sacrificial adhesive mentioned above with reference to Fig. 2 was discussed. After attaching the CoWoS structure, e.g., to a motherboard using conductive pads. 128on the lower surface of the substrate 120 will the adhesive material 133B (e.g., a sacrificial adhesive) is removed in one embodiment, for example, by a heating process or a UV process. As a result, the ring 131 also from the semiconductor device 100 removed. In other words, the ring 131 and the adhesive material 133 (e.g. 133B ) both are from the final product of the semiconductor device 100 removed.

[0051] Fig. Figure 6 illustrates a cross-sectional view of a semiconductor device 200 according to some embodiments. The semiconductor device 200 is similar to the semiconductor device 100 out of Fig. 1, but with a lid 137 , who is on the ring 131 is attached. The lid 137 In some embodiments, it can be made of the same material as the ring. 131be formed. In other embodiments, the lid 137 made of a different material than the ring 131 formed. Furthermore, the lid 137 on the This 101 and the molding material 109 through an adhesive material 135 attached. The adhesive material 135 can a thermal interface material ( TIM ) for the purpose of heat dissipation. TIM It can include a polymer, resin, or epoxy as a base material, as well as a filler to improve its thermal conductivity. The filler can be a dielectric filler, such as aluminum oxide, magnesium oxide, aluminum nitride, boron nitride, diamond powder, or the like. The filler can also be a metal filler such as silver, copper, aluminum, or the like.

[0052] With reference to Fig. 6. Various embodiments discussed above can be described with reference to the Fig. 2, Fig. 3, Fig. 4A and Fig. 4B onto the semiconductor device 200 can be applied. For example, the adhesive material 133 the adhesive material 133A and the adhesive material 133B as in various embodiments with reference to Fig. 2, Fig. 3, Fig. 4A and Fig. 4B include. In some embodiments, the adhesive material 133B an elastic adhesive material, and the adhesive material 133A and 133B Both remain in the final product of the semiconductor device 100 In other embodiments, the adhesive material 133B a sacrificial adhesive material and is removed, e.g. by a heating process or a UV process, so that only the adhesive material remains. 133A remains in the final product. The details are the same or similar as with reference to Fig. 2, Fig. 3, Fig. 4A and Fig. Section 4B was discussed and will therefore not be repeated.

[0053] Still referring to Fig. In one embodiment, 6 is the adhesive material. 133B a UV-emitting material, the ring 131 is made of a UV-transparent material such as glass for removing the adhesive. 133B formed, and the lid 137 is made of a different material than the ring 131 formed, which is permeable to heat dissipation, such as steel or copper. In another embodiment, the ring 131 and the lid 137 formed from the same material (e.g. copper, steel) and the ring 131 contains a UV light-emitting device 139 on the lower surface of the ring 131 .

[0054] Variations of the disclosed embodiments are also possible and are intended to be fully contained within the scope of this disclosure. While the adhesive material 133B , which is located in different places in the region 134The fact that the materials used in the illustrated embodiments are the same is only a non-limiting example. More than one type of adhesive may be used in locations within the region. 134 are separated, which are separated by the adhesive material 133B are covered. In other words, the adhesive material 133B can be replaced by more than one type of adhesive. For example, in Fig. 2 the adhesive material 133B on every corner of the region 134 be formed from a different elastic adhesive material (where, for example, each elastic adhesive material has a similar or the same Young coefficient and / or a similar or the same elongation as the adhesive material) 133B exhibits), or different elastic materials are formed on at least two of the corners. Furthermore, the strips of adhesive material can 133BA in Fig. 3 comprise two or more different elastic adhesive materials, with at least two of the strips 133BA are made from various elastic materials. Another example is in Fig. 4A and Fig. 4B the adhesive material 133BB are replaced by two or more layers of different elastic adhesive materials (where, for example, each elastic adhesive material has the same or a similar Young coefficient and / or an same or a similar elongation as the adhesive material). 133B ). These and other variations are fully intended to be contained within the scope of this disclosure.

[0055] Different designs can offer advantages. For example, using a different and / or more elastic adhesive material can... 133B e.g. at corner locations under the ring road 131 , the voltage in the semiconductor device 100The CTE deviation is relaxed. As a result, damage occurs to the semiconductor device. 100 , such as detachment and cracking, are avoided or reduced. The use of the ring 131 It also helps improve the planarity of the substrate. 120 , and is therefore advantageous for securing the substrate 120 on another workpiece (e.g. a motherboard), or to attach the CoW structure to the substrate 120 The improved planarity of the substrate 120 makes it easier to handle the substrate 120 to connect to other devices, and can reduce or avoid problems such as cold connections.

[0056] Fig. Figure 7 illustrates a flowchart of a method for forming a semiconductor device according to some embodiments. It is to be understood that the method of the embodiment from Fig. Figure 7 is only one example of many possible embodiments. An ordinary person skilled in the art would recognize numerous variations, alternatives, and modifications. For example, various steps such as in Fig. 7. Illustrated, items can be added, removed, replaced, rearranged, and repeated.

[0057] With reference to Fig. 7 will be in block 1010 An adhesive material is applied to a first region of an upper surface of a substrate, the application of the adhesive material comprising: applying a first adhesive material to first locations of the first region; and applying a second adhesive material to second locations of the first region, the second adhesive material having a different material composition than the first adhesive material. In block 1020A ring is attached to the upper surface of the substrate using the adhesive material applied to the upper surface of the substrate, with the adhesive material being located between the ring and the substrate after the ring is attached.

[0058] In one embodiment, a method for forming a semiconductor device comprises applying an adhesive material to a first region of an upper surface of a substrate, wherein the application of the adhesive material comprises: applying a first adhesive material to first locations of the first region; and applying a second adhesive material to second locations of the first region, the second adhesive material having a different material composition than the first adhesive material. The method further comprises attaching a ring to the upper surface of the substrate using the adhesive material applied to the upper surface of the substrate, wherein the adhesive material is located between the ring and the substrate after the ring is attached. In one embodiment, the first adhesive material and the second adhesive material are applied to different locations of the first region.In one embodiment, the first adhesive material comprises first separate sections arranged under the corners of the ring, and the second adhesive material comprises second separate sections arranged between the first separate sections of the first adhesive material. In one embodiment, the Young's coefficient of the first adhesive material is smaller than that of the second adhesive material. In one embodiment, the Young's coefficient of the first adhesive material is between 0.001 MPa and 10 MPa, and the Young's coefficient of the second adhesive material is between 0.01 GPa and 5 GPa. In one embodiment, the elongation of the first adhesive material is greater than that of the second adhesive material. In one embodiment, the elongation of the first adhesive material is between 50% and 1000%, and the elongation of the second adhesive material is between 20% and 100%.In one embodiment, the method further comprises attaching a die to a first face of an interposer; forming a molding material on the first face of the interposer around the die; and attaching a second face of the interposer, opposite the first face, to the upper face of the substrate within the first region, the interposer being surrounded by the ring. In one embodiment, the method further comprises, after attaching the ring, removing the first adhesive material, while the second adhesive material remains between the ring and the substrate. In one embodiment, removing the first adhesive material comprises performing a heating process to separate the first adhesive material from the substrate, the second adhesive material remaining attached to the substrate after the heating process.In one embodiment, the ring is transparent to ultraviolet (UV) light, wherein the removal of the first adhesive material comprises: performing a UV process by illuminating the adhesive material with UV light through the ring, whereby the first adhesive material is separated from the substrate, while the second adhesive material remains adhered to the substrate after the UV process. In another embodiment, the ring comprises an ultraviolet (UV) light-emitting device on a lower surface of the ring facing the adhesive material, wherein the removal of the first adhesive material comprises: performing a UV process by activating the UV light-emitting device to illuminate the adhesive material with UV light, whereby the first adhesive material is separated from the substrate, while the second adhesive material remains adhered to the substrate after the UV process.

[0059] In one embodiment, a method comprises forming a semiconductor device by forming a first adhesive material at first locations of a region of the upper surface of a substrate, wherein the first locations comprise corners of the region; forming a second adhesive material at second locations of the region, which differ from the first locations, wherein the second adhesive material is a different material than the first adhesive material, and the Young coefficient of the first adhesive material is smaller than that of the second adhesive material; and attaching a ring to the upper surface of the substrate using the first and second adhesive materials. In one embodiment, the method further comprises attaching a bottom side of an interposer to the upper surface of the substrate within the region, wherein a die is attached to a top side of the interposer.In one embodiment, the first locations further include locations in the region between the corners of the region. In one embodiment, the extension of the first adhesive material is greater than that of the second adhesive material. In one embodiment, the method further includes removing the first adhesive material after the ring has been attached, wherein the second adhesive material remains attached to the substrate and the ring after the first adhesive material is removed.

[0060] In one embodiment, a semiconductor device comprises a substrate; a ring attached to an upper surface of the substrate; and an adhesive material between the substrate and the ring, wherein the adhesive material comprises a first adhesive material arranged under the corners of the ring and a second adhesive material arranged between the first adhesive material, the first adhesive material having a different composition than the second adhesive material. In one embodiment, the first adhesive material comprises first separate sections arranged under the corners of the ring, and the second adhesive material comprises second separate sections arranged between the first separate sections of the first adhesive material. In one embodiment, the first adhesive material is more elastic than the second adhesive material.

[0061] The above describes features of several embodiments so that those skilled in the art can better understand the aspects of the present disclosure. Those skilled in the art should be aware that they can easily use the present disclosure as a basis for designing or modifying other methods and structures to achieve the same purposes and / or the same advantages as the embodiments presented herein. They should also understand that such corresponding designs do not deviate from the spirit and scope of the present disclosure and that they can make various changes, substitutions, and modifications to it without deviating from the spirit and scope of the present disclosure. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] US 62725749

[0001]

Claims

[1] Method for forming a semiconductor device, the method comprising: Applying an adhesive material to a first region of an upper surface of a substrate, wherein the application of the adhesive material comprises: Applying an initial adhesive material to initial locations in the initial region; and Applying a second adhesive material to second locations in the first region, wherein the second adhesive material has a different material composition than the first adhesive material; and Attaching a ring to the upper surface of the substrate using the adhesive material applied to the upper surface of the substrate, with the adhesive material being between the ring and the substrate after the ring is attached. [2] Method according to claim 1, wherein the first adhesive material and the second adhesive material are applied to different locations in the first region. [3] Method according to claim 1 or 2, wherein the first adhesive material comprises first separate sections arranged under corners of the ring, and the second adhesive material comprises second separate sections arranged between the first separate sections of the first adhesive material. [4] Method according to claim 3, wherein the Young coefficient of the first adhesive material is smaller than that of the second adhesive material. [5] Method according to claim 4, wherein the Young coefficient of the first adhesive material is between 0.001 MPa and 10 MPa, and wherein the Young coefficient of the second adhesive material is between 0.01 GPa and 5 GPa. [6] Method according to claim 4 or 5, wherein the elongation of the first adhesive material is greater than that of the second adhesive material. [7] Method according to claim 6, wherein the elongation of the first adhesive material is between 50% and 1000%, and an elongation of the second adhesive material is between 20% and 100%. [8] Method according to any one of the preceding claims 4 to 7, further comprising: Attaching a die to a first surface of an interposer; Forming a molding material on the first surface of the interposer around the die; and Attaching a second surface of the interposer, opposite the first surface, to the upper surface of the substrate within the first region, with the interposer being surrounded by the ring. [9] Method according to any one of the preceding claims 4 to 8, further comprising: After attaching the ring, remove the first adhesive material, while the second adhesive material remains between the ring and the substrate. [10] Method according to claim 9, wherein the removal of the first adhesive material comprises: Performing a heating process to separate the first adhesive material from the substrate, whereby the second adhesive material remains attached to the substrate after the heating process. [11] Method according to claim 9 or 10, wherein the ring is transparent to ultraviolet (UV) light, comprising the removal of the first adhesive material: Performing a UV process by illuminating the adhesive material with a UV light through the ring, whereby the first adhesive material is separated from the substrate, while the second adhesive material remains attached to the substrate after the UV process. [12] Method according to any one of the preceding claims 9 to 11, wherein the ring comprises an ultraviolet (UV) light-emitting device on a lower surface of the ring which faces the adhesive material, wherein the removal of the first adhesive material comprises: Performing a UV process by activating the UV light emitting device to illuminate the adhesive material with UV light, whereby the first adhesive material is separated from the substrate, while the second adhesive material remains attached to the substrate after the UV process. [13] Method for forming a semiconductor device, the method comprising: Formation of an initial adhesive material at initial locations of a region of an upper surface of a substrate, wherein the initial locations include corners of the region; Forming a second adhesive material at second locations in the region, which differ from the first locations, wherein the second adhesive material is a different material than the first adhesive material, and the Young coefficient of the first adhesive material is smaller than that of the second adhesive material; and Attaching a ring to the upper surface of the substrate using the first adhesive and the second adhesive. [14] Method according to claim 13, further comprising attaching a lower side of an interposer to the upper surface of the substrate within the region, wherein a die is attached to an upper side of the interposer. [15] Method according to claim 13 or 14, wherein the first places further comprise places in the region between the corners of the region. [16] Method according to any one of the preceding claims 13 to 15, wherein the extension of the first adhesive material is greater than that of the second adhesive material. [17] Method according to any one of the preceding claims 13 to 16, further comprising: Removing the first adhesive material after attaching the ring, leaving the second adhesive material attached to the substrate and the ring after the first adhesive material is removed. [18] Semiconductor device comprising: a substrate; a ring that is attached to an upper surface of the substrate; and an adhesive material between the substrate and the ring, wherein the adhesive material comprises a first adhesive material arranged under corners of the ring and a second adhesive material arranged between the first adhesive material, wherein the first adhesive material has a different composition than the second adhesive material. [19] Semiconductor device according to claim 18, wherein the first adhesive material comprises first separate sections arranged below the corners of the ring, and the second adhesive material comprises second separate sections arranged between the first separate sections of the first adhesive material. [20] Semiconductor device according to claim 19, wherein the first adhesive material is more elastic than the second adhesive material.