Power semiconductor module

Abstract

Power semiconductor module (100') comprising: a first substrate (102), wherein the first substrate (102) comprises aluminum; a first aluminum oxide layer (104) arranged on the first substrate (102); a conductive layer (106) arranged on the first aluminum oxide layer (104); a first semiconductor chip (108), wherein the first semiconductor chip (108) is arranged on and electrically connected to the conductive layer (106) and is part of a logic or control circuit arranged on the first substrate (102); an electrical insulating material (110) enclosing the first semiconductor chip (108), wherein the first aluminum oxide layer (104) is configured to electrically insulate the first semiconductor chip (108) from the first substrate (102); a second substrate (116), wherein the second substrate (116) comprises an electrical insulating layer embedded in an upper and lower metal layer (116_1, 116_2). (116_3) includes,wherein a second semiconductor chip (112) is arranged on the second substrate (116) and electrically connected to it and is part of a power circuit arranged on the second substrate, and wherein the first and the second substrate (102, 116) are electrically insulated from each other by the electrical insulating material (110).

Description

TECHNICAL AREA

[0001] The present disclosure relates to a power semiconductor module and a method for manufacturing a power semiconductor module. BACKGROUND

[0002] Power semiconductor modules, that is, semiconductor modules designed to operate at high current and / or high voltage, can differ in their assembly and interconnection technologies. One possibility is to embed the substrate(s), semiconductor chip(s), and any other module components within an electrically insulating body. It can be crucial to electrically isolate individual components of the power semiconductor module, such as the power section, logic / control section, power semiconductor chip, and heat sink. This can be achieved by providing electrical insulation layers. Electrical insulation layers that meet specific requirements for dielectric strength or thermal conductivity can be used in improved power semiconductor modules or in improved manufacturing processes for power semiconductor modules.

[0003] The problem addressed by the invention is solved by the features of the independent claims. Advantageous embodiments and further developments of the invention are specified in the dependent claims. SUMMARY

[0004] Specific examples relate to a power semiconductor module comprising a first substrate, wherein the first substrate comprises aluminium, a first aluminium oxide layer arranged on the first substrate, a conductive layer arranged on the first aluminium oxide layer, a first semiconductor chip, wherein the first semiconductor chip is arranged on the conductive layer and electrically connected to it, and an electrical insulating material enclosing the first semiconductor chip, wherein the first aluminium oxide layer is configured to electrically insulate the first semiconductor chip from the first substrate.

[0005] Specific examples relate to a power semiconductor module comprising an aluminum substrate, which includes a housing of the power semiconductor module and / or a heat sink, an aluminum oxide layer arranged on the aluminum substrate, and a printed circuit board arranged over the aluminum oxide layer, wherein a power semiconductor chip is embedded in the printed circuit board and wherein the aluminum oxide layer is configured to electrically insulate the power semiconductor chip from the aluminum substrate.

[0006] Specific examples relate to a method for manufacturing a power semiconductor module, the method comprising providing a first substrate, wherein the first substrate comprises aluminium, anodizing the first substrate to produce a first aluminium oxide layer, forming a conductive layer on the first aluminium oxide layer, arranging a first semiconductor chip on the conductive layer and electrically connecting it to the first semiconductor chip, and encapsulating the first semiconductor chip in an electrical insulating body, wherein the first aluminium oxide layer is configured to electrically insulate the first semiconductor chip from the first substrate.

[0007] Specific examples relate to a method for manufacturing a power semiconductor module, the method comprising providing an aluminium substrate which includes one or more of a power semiconductor module housing and a heat sink, anodizing the aluminium substrate to produce an aluminium oxide layer and arranging a printed circuit board over the aluminium oxide layer, wherein a power semiconductor chip is embedded in the printed circuit board and wherein the aluminium oxide layer is configured to electrically insulate the power semiconductor chip from the aluminium substrate.

[0008] Specific examples include a power semiconductor module comprising a substrate, wherein the substrate is electrically conductive and has a first side and an opposing second side, a semiconductor chip arranged on the first side of the substrate, wherein the semiconductor chip is electrically connected to the substrate, an electrical insulating material enclosing the first semiconductor chip, and an oxide layer arranged at least on the second side of the substrate. List of characters

[0009] The accompanying drawings are examples and, together with the description, serve to explain the basic features of the disclosure. The elements of the drawings are not necessarily to scale with each other. Identical reference numerals may denote corresponding, similar, or identical parts. Fig. 1A and Fig. Figure 1B shows schematic cross-sectional views of power semiconductor modules. Fig. Figure 2 shows a schematic cross-sectional view of a power semiconductor module with a logic / control area and a power area arranged on a common substrate. Fig. 3A and Fig. Figure 3B shows schematic cross-sectional views of power semiconductor modules that include an aluminum substrate such as a housing or heat sink. Fig. Figure 4 shows a flowchart of a process for manufacturing a power semiconductor module. Fig. Figure 5 shows a flowchart of a process for manufacturing a power semiconductor module with an aluminum housing and / or an aluminum heat sink. Fig. Figure 6 shows a schematic cross-sectional view of a power semiconductor module in which a substrate is at least partially covered by an oxide layer. Fig. Figure 7 shows a schematic cross-sectional view of a power semiconductor module in which an additional layer is arranged between the substrate and the oxide layer. Fig. Figure 8 shows a schematic cross-sectional view of a power semiconductor module which has external contacts. Fig. Figure 9 shows a schematic cross-sectional view of a power semiconductor module in which the oxide layer at least partially covers two opposite sides of a substrate. Fig. Figure 10 shows a schematic cross-sectional view of a power semiconductor module having a module carrier. DETAILED DESCRIPTION

[0010] The following describes power semiconductor modules that can contain one or more semiconductor chips. The semiconductor chips can be of various types, manufactured using different technologies, and may include, for example, integrated circuits and / or passive elements. The semiconductor chips can be designed, for example, as power semiconductor chips such as power MOSFETs (metal-oxide-semiconductor field-effect transistors), IGBTs (insulated-gate bipolar transistors), JFETs (junction field-effect transistors), power bipolar transistors, or power diodes. Furthermore, the semiconductor chips may include control circuits or microprocessors. In one embodiment, semiconductor chips with a vertical structure may be used, meaning that the semiconductor chips can be manufactured in such a way that electrical currents can flow in a direction perpendicular to the main surfaces of the semiconductor chips.In one embodiment, a vertically structured semiconductor chip can have contact elements on its two main surfaces, that is, on its top and bottom surfaces. For example, the source and gate electrodes of a power MOSFET can be located on one main surface, while the drain electrode of the power MOSFET is located on the other main surface. The semiconductor chips can be made from a specific semiconductor material, such as Si, SiC, SiGe, GaAs, or GaN, and can furthermore contain inorganic and / or organic materials that are not semiconductors, such as insulators, plastics, or metals. In addition, the semiconductor chips can be encapsulated or unencapsulated.

[0011] Fig. Figure 1A shows a cross-sectional view of a power semiconductor module. 100 , which is a first substrate 102 , one on the first substrate 102arranged first aluminum oxide layer (Al2O3 layer) 104 , one on the first aluminum oxide layer 104 arranged conductive layer 106 and a first semiconductor chip 108 includes. The first semiconductor chip 108 is on the leading layer 106 arranged and electrically connected to it. Furthermore, the power semiconductor module has 100 an electrical insulating material 110 on, which is the first semiconductor chip 108 surrounds. The first aluminum oxide layer 104 is trained to create the first semiconductor chip 108 from the first substrate 102 to electrically insulate.

[0012] The first substrate 102 can consist entirely or at least partially of aluminum. The first substrate 102It can be part of a conductor frame, or it can have a layered structure of alternating electrically conductive and insulating layers; for example, it can be a DAB substrate (DAB - direct aluminum bonded). The first substrate 102 It can be a chip pad, meaning it is designed to support a semiconductor chip. The first substrate 102 can be done with the first semiconductor chip 108 be electrically connected or it can also be from the first semiconductor chip 108 be electrically insulated. The first substrate 102 can be found on the electrical insulation material 110 at least partially exposed and it may have one or more external connections designed to accommodate the first semiconductor chip 108 to make electrical contact.

[0013] The first aluminum oxide layer 104 can be applied directly to the first substrate 102 be arranged. The first aluminum oxide layer 104can the first substrate 102 completely or at least partially cover the first aluminum oxide layer. 104 can, for example, (exclusively) be an upper surface 102_1 of the first substrate 102 cover the remaining surfaces of the first substrate. 102 can be free from the first aluminum oxide layer 104 be the first aluminum oxide layer 104 can the upper surface 102_1 cover all or part of the surface, e.g., a large part of the upper surface 102_1 from the first aluminum oxide layer 104 be covered. Those surfaces of the first substrate 102 , which are not from the first aluminum oxide layer 104 are covered by a second aluminum oxide layer (in Fig. (1A not shown) may be covered. The second aluminum oxide layer may be a native aluminum oxide layer, i.e., it may have been formed by the first substrate 102was exposed to the ambient air.

[0014] The first aluminum oxide layer 104 can have a thickness greater than the thickness of a native aluminum oxide layer of the first substrate 102 The thickness of the first aluminum oxide layer 104 The thickness of a native aluminum oxide layer can be, for example, more than 400 nm, more than 600 nm, more than 800 nm, more than 1 µm, or even more than 2 µm, and can range from 1 µm to 20 µm. In contrast, the thickness of a native aluminum oxide layer can be much less than 1 µm and, for example, only about 200 nm. The thickness of the aluminum oxide layer 104 can be, for example, larger than the thickness of the conductor layer 106 and e.g. smaller than the thickness of the first substrate 102 be.

[0015] The first aluminum oxide layer 104 It can be an anodized layer, meaning it can be formed by the electrolytic oxidation of aluminum. A common anodizing process can be used to form the initial aluminum oxide layer.104 are used. The formation of the first aluminum oxide layer 104 can thicken a native aluminium oxide layer of the first substrate 102 include, for example, an anodizing process.

[0016] The first aluminum oxide layer 104 can be an electrical insulating layer and can be designed to protect the conductive layer 106 above the first aluminum oxide layer 104 from the first substrate 102 to electrically insulate below the first aluminium oxide layer, especially up to a voltage difference of approximately 1kV or even 2kV or more.

[0017] The leading layer 106 can be applied directly to the first aluminum oxide layer 104 be arranged. The conducting layer 106 It can be a metallization layer and can be a single layer or a stack of (different) metal layers. The conductive layer 106It can be produced, for example, by a deposition process. The conductive layer 106 It may contain, for example, Ag, Al, Au, or Cu, or a metal alloy.

[0018] The leading layer 106 can a rewiring layer of the power semiconductor module 100 It can be and it can have a multitude of conductive pathways. The conductive layer 106 can be designed to make electrical connections between different components on the conductive layer 106 arranged electrical or electronic components such as the first semiconductor chip 108 or to provide passive components such as resistors or capacitors. On the conductive layer 106 arranged electrical or electronic components such as the first semiconductor chip 108 can be part of a logic / control area or low-voltage circuit of the power semiconductor module 100The logic / control area can, for example, be designed for an operating voltage of no more than 48V.

[0019] The first semiconductor chip 108 It could be, for example, a control chip or a driver chip designed to control a power semiconductor chip of the power semiconductor module. 100 to control. The first semiconductor chip 108 can be achieved through a suitable connection technology with the conductive layer 106 They can be connected, for example, by a sintered connection. In particular, such a connection technology can be used that allows the first semiconductor chip to be connected. 108 with the leading layer 106 Processing is permitted at low temperatures, e.g., temperatures below approximately 250°C. A low processing temperature can be important because the first aluminum oxide layer... 104It can be temperature-sensitive. Excessive temperature can cause the first aluminum oxide layer to deteriorate. 104 is damaged and thus the conductive layer 106 no longer from the first substrate 102 electrically insulated.

[0020] The electrical insulation material 110 can be trained to create the first semiconductor chip 108 and any other electrical or electronic components of the power semiconductor module 100 to encapsulate. The electrical insulation material 110 It could be, for example, a potting compound or a laminate and may contain a polymer. For example, it could be an electrical insulation material. 110 an encapsulation body.

[0021] The first substrate 102 can at least partially depend on the electrical insulation material 110 be exposed. For example, the electrical insulation material may be 110 only on the upper surface102_1 of the first substrate 102 be arranged, while an opposite lower surface 102 2 and possibly also side surfaces 102_3 not from the electrical insulation material 110 are covered.

[0022] The arrangement of the leading layer 106 on the first aluminum oxide layer, which serves as an electrical insulating layer 104 can have the advantage that the conductive layer 106 It can be structured much more finely than with the first substrate. 102 (e.g., using DAB etching technology) would be possible. Therefore, in the conductive layer 106 those for the logic / control area of ​​the power semiconductor module 100 desired fine structures (e.g. conductor tracks) are created, while this is done in the first substrate 102 It would not even be possible.

[0023] Fig. Figure 1B shows a cross-sectional view of a power semiconductor module. 100' , which belongs to the power semiconductor module 100 may be identical or at least similar. The power semiconductor module 100' can handle all aspects related to the power semiconductor module 100 The components described above and additionally the components described below.

[0024] The power semiconductor module 100' the first substrate 102 and it also has a component from the first substrate 102 various second substrate 116 on. The second substrate 116 can have an upper and a lower metal layer 116_1 , 116_2 as well as an electrical insulation layer embedded within it 116_3 include the second substrate 116 can be located next to the first substrate 102 and be arranged at a specified distance from it. The lower surface 102_2of the first substrate 102 and the lower metal layer 116_2 can be coplanar and they can be attached to the electrical insulation material 110 be exposed. The second substrate 116 It could, for example, be a DAB-type substrate. The electrical insulation material 110 can be in a gap between the first and second substrate 102 , 116 be arranged. The first substrate 102 and the second substrate 116 They can have the same or different heights (or thicknesses). The case where both substrates 102 , 116 Having the same height or thickness can offer the advantage that certain processes in the manufacturing of the semiconductor module are optimized. 100' are easier to implement. For example, a ladder frame for fixing components in a molding process could be significantly simpler.

[0025] In the power semiconductor module 100'can be applied to the first substrate 102 As described above, a logic / control circuit is arranged on the second substrate. 116 A power section circuit may be arranged. A voltage exceeding 48V may be applied to this power section, for example, 100V or more, 500V or more, or even 1kV or more. Furthermore, the power section may be designed for operation with high currents, for example, currents from 10A to 500A.

[0026] The power module can contain one or more semiconductor chips, e.g., a second semiconductor chip. 112 , which is on the second substrate, e.g. on the upper metal layer 116_1 , is arranged. The second semiconductor chip 112 e.g. an electrode located on the lower side of the second semiconductor chip 112 , can be used with the upper metal layer 116 1 be electrically connected. The second semiconductor chip 112It could be a power semiconductor chip, designed, for example, to operate with the high voltages or high currents described above. The second semiconductor chip 112 It could be, for example, a semiconductor chip of the IGBT or MOSFET type.

[0027] The logic / control area and the power area of ​​the power semiconductor module 100' can be electrically connected to each other, e.g. by means of a connecting element 118 The connecting element 118 It can include, for example, a wire, a conductive strip, a metal clip, a rewiring layer, vias, or similar components. The connecting element 118 For example, one end can be connected to an electrode on the top side of the second semiconductor chip. 112 or with the upper metal layer 116_1 and with the other end with the management team 106 be connected. The power semiconductor module 100'It can also contain multiple connecting elements 118 include components connected to different parts of the logic / control area or the power area. The first semiconductor chip 108 can be a control or driver chip for the second (power) semiconductor chip 112 be.

[0028] For example, the logic / control area can include additional electrical or electronic components. 120 These include, for example, additional semiconductor chips, resistors, capacitors, etc. The other electrical or electronic components 120 can on the conductive layer 106 be arranged and electrically connected to it.

[0029] The first substrate 102 can be one or more initial external contacts 122 exhibiting the one or the other features designed to represent the first semiconductor chip 108to make electrical contact. The first external contact(s) can be designed, for example, for voltages from approximately -15V to 30V. The second substrate 116 It can also have one or more second external contacts 124 exhibit the second external contact(s). 124 can power contact(s) of the power semiconductor module 100' be.

[0030] According to an example, the first substrate 102 the second (native) aluminum oxide layer 114 as with regard to the power semiconductor module 100 described. The second aluminum oxide layer 114 can be in addition to the first aluminum oxide layer 104 be arranged. According to one example, the second substrate can also be 116 have a second aluminum oxide layer (in Fig. 1B not shown). This can be located, for example, next to, but not below, the second semiconductor chip. 112 or second external contact 124 be arranged.

[0031] The second semiconductor chip 112 , the second external contact 124 and any other components of the power range of the power semiconductor module 100' each can be attached to the second substrate by a solder joint, a weld joint, a sintered joint or similar. 116 This may be appropriate. In particular, a bonding technology that requires heating to more than 250°C can be used. The first substrate 102 However, it is possible to assemble using connection technologies that require heating to less than 250°C, as described above. Fig. 1A described. This can prevent the first aluminum oxide layer from forming. 104 is damaged by excessively high temperatures.

[0032] Fig. Figure 2 shows a cross-sectional view of a power semiconductor module. 200 , which belongs to the power semiconductor module 100may be identical or at least similar. The power semiconductor module 200 can handle all aspects related to the power semiconductor module 100 The components described above and additionally include the components described below. The power semiconductor module 200 can detach from the power semiconductor module 100' They differ essentially in that there are no two separate substrates. 102 , 116 , but a single, common first substrate 102 exhibits.

[0033] The first substrate 102 of the power semiconductor module 200 It could be of the DAB type, for example, and have an upper metal layer. 201 , a lower metal layer 202 and one between the metal layers 201 , 202 arranged electrical insulation layer 203 exhibiting the logic / control area with the first semiconductor chip. 108and the power range with the second semiconductor chip 112 Both can be used on the first substrate 102 The logic / control area is located on the conductive layer. 106 arranged, which are separated by the first aluminum oxide layer 104 from the power range (e.g. the second semiconductor chip) 112 ) is isolated.

[0034] According to an example, the first substrate can 102 the first aluminum oxide layer 104 and the second aluminum oxide layer 114 exhibit. For example, the first aluminum oxide layer can 104 the upper metal layer 201 completely cover, except for gaps in which components such as the second semiconductor chip 112 or the second external contact 124 arranged and with the upper metal layer 201 are electrically connected.

[0035] According to one example, in the power semiconductor module 200exclusively connection technologies for attaching components such as the first and second semiconductor chips 108 , 112 with the first substrate, which requires heating to less than 250°C. These can be, for example, sintered compounds. This can damage the first aluminum oxide layer. 104 during the manufacturing of the power semiconductor module 200 be avoided.

[0036] Fig. Figure 3A shows a cross-sectional view of a power semiconductor module. 300 , which is an aluminum substrate 302 , an aluminum oxide layer 304 , which are on the aluminium substrate 302 is arranged and a circuit board 306 , which are above the aluminum oxide layer 304 is arranged, includes a power semiconductor chip. 308 is in the circuit board 306 embedded. The aluminum oxide layer 304is trained to handle the power semiconductor chip 308 from the aluminum substrate 302 to electrically insulate.

[0037] According to one example, the aluminum substrate is 302 to house the power semiconductor module 300 and / or a heat sink designed to protect the power semiconductor chip 308 to dissipate the generated heat.

[0038] The aluminum oxide layer 304 It can be an artificially produced (anodized) layer and it can, for example, have the same or a similar thickness as the first aluminum oxide layer. 104 the power semiconductor modules 100 and 100' The aluminum oxide layer 304 can be a top side of the aluminium substrate 302 completely or partially cover. In particular, the aluminum oxide layer can 304 the aluminum substrate 302 under the circuit board 306completely cover and it can extend over a side edge of the circuit board 306 stand out. The aluminum oxide layer 304 can be designed to protect the aluminum substrate 302 and the circuit board 306 to electrically isolate them from each other up to a voltage difference of 1kV, or up to a voltage difference of 2kV or even more.

[0039] The circuit board 306 It can include an electrical insulating material, e.g., a polymer or a laminate. The printed circuit board 306 It could, for example, include a composite material consisting of epoxy resin and fiberglass fabric, such as FR-4. The printed circuit board 306 may include an encapsulation body. Furthermore, the printed circuit board may 306 have one or more metallization or rewiring layers, which may be designed to provide electrical connections between individual electrical or electronic components of the power semiconductor module300 to provide.

[0040] According to one example, in addition to the power semiconductor chip 308 also other electrical or electronic components in the circuit board 306 be embedded, e.g., other semiconductor chips, capacitors, resistors, etc. In particular, the power semiconductor module 300 include another semiconductor chip designed to complement the power semiconductor chip 308 to control.

[0041] The power semiconductor chip 308 It can be designed to handle the same high voltages or high currents as the semiconductor chip. 112 described. The power semiconductor chip can be seen through the aluminum oxide layer. 304 from the aluminum substrate 302 be electrically insulated.

[0042] Fig. Figure 3B shows a cross-sectional view of a power semiconductor module. 300' , which belongs to the power semiconductor module300 may be identical or at least similar. The power semiconductor module 300' can handle all aspects related to the power semiconductor module 300 The components described above and additionally the components described below.

[0043] A layer of thermal paste 310 can between the aluminum oxide layer 304 and the circuit board 306 be arranged. The thermal paste 310 It can be electrically non-conductive or electrically conductive. Since there is electrical insulation between the aluminum substrate... 302 and the circuit board 306 already through the aluminum oxide layer 304 is provided, it is not necessary to go through the layer of thermal paste 310 to provide such electrical insulation. For this reason, the power semiconductor module can be used 300' an electrically conductive thermal paste 310Thermal paste can be used, which, compared to non-conductive thermal paste, offers the advantage of lower thermal resistance. For the same reason, the layer of thermal paste can be used. 310 They may also be particularly thin, possibly discontinuous, and serve, for example, only to compensate for unevenness between the printed circuit board. 306 and the aluminum oxide layer 304 to compensate.

[0044] The power semiconductor module 300' can the power semiconductor chip 308 as well as one or more additional semiconductor chips 312 include. The other semiconductor chip 312 It can also be a power semiconductor chip and can, for example, be used as a power semiconductor chip 308 be identical. The other semiconductor chip 312 It could also be a control chip designed to control the power semiconductor chip. 308 to control.

[0045] The power semiconductor chip 308and / or the other semiconductor chip 312 can each be on a chip carrier 314 be arranged. The chip carrier 314 It could be, for example, a metal substrate such as a copper plate. The power semiconductor chip 308 or the other semiconductor chip 312 can be achieved, for example, through a soldered connection, a welded connection, or a sintered connection with the chip carrier 314 be connected. The chip carrier 314 can be used as a heat spreader for the efficient removal of heat from the power semiconductor chip 308 or the other semiconductor chip 312 be designed for generated heat.

[0046] The circuit board 306 can a top metallization layer 316 exhibit the upper metallization layer. 316 may be designed to provide electrical connections to the power semiconductor chip 308 and possibly to the additional semiconductor chip 312to provide. The upper metallization layer 316 can, for example, have structured conductor tracks which are connected by means of vias 318 with the power semiconductor chip 308 or the other semiconductor chip 312 or the chip carrier 314 are connected.

[0047] The circuit board 306 can a lower metallization layer 320 exhibiting the lower metallization layer. 320 can be designed to be used with semiconductor chips 308 , 312 generated heat to the aluminum substrate 302 to be carried away. The lower metallization layer 320 can be used with the chip carriers 314 be electrically connected, e.g. by means of vias (in Fig. 3B not shown).

[0048] For example, the lower metallization layer can 320be intended solely for this heat dissipation and have no electrical functionality in the power semiconductor module 300' have. The lower metallization layer 320 It could, for example, be an unstructured layer (i.e., having no structures such as conductor tracks) that forms the underside of the printed circuit board. 306 can completely cover. According to another example, the lower metallization layer can 320 also provide electrical connections, i.e., have electrical functionality.

[0049] Fig. Figure 4 shows a flowchart of a process. 400 for manufacturing a power semiconductor module. The process 400 can be used, for example, to power semiconductor modules 100 , 100' or 200 to produce.

[0050] The procedure 400 includes at 401a provision of a first substrate, wherein the first substrate comprises aluminium, at 402 anodizing the first substrate to create a first aluminum oxide layer, at 403 the formation of a conductive layer on the first aluminum oxide layer, at 404 arranging a first semiconductor chip on the conductive layer and electrically connecting it, and at 405 an encapsulation of the first semiconductor chip in an electrical insulating body, wherein the first aluminium oxide layer is designed to electrically insulate the first semiconductor chip from the first substrate.

[0051] The procedure 400 It may also include structuring the conductive layer to create conductive pathways in the conductive layer.

[0052] The anodizing of the first substrate can further involve covering the first substrate with a mask, e.g., a photomask, before the anodizing process. In this way, the first aluminum oxide layer can be created only on predefined areas of the first substrate.

[0053] Fig. Figure 5 shows a flowchart of a process 500 for manufacturing a power semiconductor module. The process 500 can be used, for example, to power semiconductor modules 300 or 300' to produce.

[0054] The procedure 500 includes at 501 a provision of an aluminium substrate comprising one or more of a power semiconductor module housing and a heat sink, at 502 anodizing the aluminum substrate to create an aluminum oxide layer and at 503an arrangement of a printed circuit board over the aluminium oxide layer, wherein a power semiconductor chip is embedded in the printed circuit board and wherein the aluminium oxide layer is designed to electrically insulate the power semiconductor chip from the aluminium substrate.

[0055] The procedure 500 It may further include the application of a thermal paste to the aluminium oxide layer, wherein the circuit board is arranged on the thermal paste and wherein the thermal paste is electrically conductive.

[0056] Fig. Figure 6 shows another power semiconductor module 600 The power semiconductor module 600 can be used for power semiconductor modules 100 until 300' They will be similar, apart from the differences described below.

[0057] The power semiconductor module 600 includes a substrate 602 , an oxide layer 604 , a semiconductor chip 606and an electrical insulating material 608 According to an example, the substrate 602 to the first substrate 102 similar or identical, the oxide layer 604 can lead to the first aluminum oxide layer 104 similar or identical, the semiconductor chip 606 can lead to the first semiconductor chip 108 be similar or identical and the insulation material 608 can be added to the insulation material 110 be similar or identical.

[0058] The substrate 602 of the power semiconductor module 600 is electrically conductive and it has a first side 602 1 and a second opposite side 602 2 on. The semiconductor chip 608 is on the first page 602_1 of the substrate 602 arranged and the oxide layer 604 is at least on the second page 602_2 of the substrate 602arranged. In particular, the oxide layer 604 the second page 602_2 completely cover.

[0059] According to an example, the substrate 602 Cu on or consists entirely of Cu. The substrate 602 It can, for example, be part of a ladder frame. The substrate 602 can be a dedicated chip carrier.

[0060] The oxide layer 604 It can be an aluminum oxide layer, and it can be an anodized layer, as in connection with the first aluminum oxide layer. 104 described. According to an example, the oxide layer 604 trained to process the substrate 602 on the second side 602_2 to electrically insulate. In particular, the oxide layer 604 be trained to process the substrate 602 on an outer surface of the power module 600 to electrically insulate from the outside.

[0061] The insulation material 608can be trained to handle the semiconductor chip 606 to encapsulate. The insulating material 608 It could be, for example, a casting material. The oxide layer 604 can be removed from the insulation material 608 be uncovered. For example, the insulation material may be exposed. 608 not on the second side 602_2 of the substrate 602 be arranged.

[0062] Fig. Figure 7 shows another power semiconductor module 700 The power semiconductor module 700 can be added to the power semiconductor module 600 be similar or identical and only have the differences described below.

[0063] The power semiconductor module 700 has an additional layer 702 on, which between the substrate 602 and the oxide layer 604 is arranged. The additional layer 702 It can contain or consist of, for example, Al, Ti, or Ni. The additional layer702 It may, for example, also be an alloy of one or more of these metals or consist of them.

[0064] The substrate 602 can be made of Cu, for example, or have Cu in it, and the additional layer 702 can serve to form a nucleation layer or adhesion layer for the oxide layer 604 to provide the additional shift 702 can, for example, be applied to the substrate 602 rolled on (i.e., the term "layer" does not necessarily have to refer to a grown layer, but can also refer, for example, to a sheet or film that is on the substrate) 602 is arranged) .

[0065] According to an example, the substrate 602 a thickness perpendicular to the first and second sides 602_1 , 602_2 exhibit that are greater than the thickness of the additional layer 702 However, it is also possible that the thickness of the additional layer 702greater than the thickness of the substrate 602 is.

[0066] Fig. Figure 8 shows another power semiconductor module 800 The power semiconductor module 800 can be used for power semiconductor modules 600 or 700 be similar or identical and only have the differences described below.

[0067] The power semiconductor module 800 has one or more contacts 802 on, which is used to contact the semiconductor chip 606 They can be trained from the outside. The contact(s) 802 can, for example, beside the substrate 602 be arranged either in a plane with the substrate 602 or also above or below the level of the substrate 602 .

[0068] According to one example, the contact(s) 802 part of the same ladder frame as the substrate 602 be. The contact(s)802 can be the same thickness as the substrate 602 They may have a different thickness, e.g. a smaller thickness.

[0069] According to one example, the oxide layer 604 (and, if applicable, the additional layer) 702 ) only on the substrate 602 , but not on that contact or those contacts 802 be arranged. For example, it is possible that during the manufacturing of the power semiconductor module 800 the oxide layer 604 (and also the additional layer) 702 ) only on the substrate 602 is produced. However, it is also possible that the oxide layer 604 (and also an additional layer) 702 ) both on the substrate 602 as well as on the contact(s) 802 generated and subsequently by the contact(s). 802 is removed again.

[0070] Fig. 9 shows another power semiconductor module900 The power semiconductor module 900 can be used for power semiconductor modules 600 until 800 be similar or identical and only have the differences described below.

[0071] In the power semiconductor module 900 is the oxide layer 604 not only on the second side 602 2 of the substrate 602 arranged, but at least partly also on the first page 602_1 According to one example, the additional layer 702 (completely) between the substrate 602 and the oxide layer 604 be arranged and also be located at least partially on the first page 602_1 condition.

[0072] The oxide layer 604 and, if applicable, the additional layer 702 can the first page 602_1 of the substrate 602 cover in such a way that the substrate 602 in an opening 902at the oxide layer 604 or the additional layer 702 exposed. The semiconductor chip 606 can in the opening 902 arranged and with the substrate 602 be electrically connected.

[0073] According to one example, the power semiconductor module 900 one or more additional semiconductor chips 904 exhibit these additional semiconductor chips. 904 can, for example, on the first page 602 1 on the oxide layer 604 arranged and thus separated from the substrate 602 be electrically insulated. The other semiconductor chip(s) 904 can be attached to the semiconductor chip, for example, using bonding wires, tapes, or clips. 606 and / or external contacts of the power semiconductor module 900 be electrically connected.

[0074] The power semiconductor module 900 can the insulation material 608 exhibit (in Fig. 9 (not shown), which is the semiconductor chip 606 and also the other semiconductor chip(s) 904 can encapsulate.

[0075] Fig. 10 shows another power semiconductor module 1000 The power semiconductor module 1000 can be used for power semiconductor modules 600 until 900 be similar or identical and only have the differences described below.

[0076] The power semiconductor module 1000 the substrate 602 , the oxide layer 604 , the semiconductor chip 606 , the insulating body 608 and additionally a modular carrier 1002 on, which is attached to the oxide layer 604 is arranged. The substrate 602 This can be achieved, for example, through mechanical fasteners such as screws, bolts or clamps, or by means of an adhesive layer on the module carrier. 1002 be attached. The oxide layer 604can be trained to the substrate 602 (and thus also the semiconductor chip) 606 ) opposite the module carrier 1002 to electrically insulate.

[0077] The module carrier 1002 It could be, for example, a heat sink designed to protect the semiconductor chip from heat. 606 to dissipate the generated heat. The heat sink can be designed for air cooling or liquid cooling. For example, the heat sink can have a channel containing a coolant. According to one example, the substrate 602 or the oxide layer 604 be located on an outer surface of the cooling element (as in Fig. (shown in Figure 10). Such cooling can be described as "indirect cooling". It is possible that a layer of thermal paste is used. 1004 on the surface of the heat sink between the oxide layer 604and is arranged on the heat sink and contributes to a thermal connection between the substrate 602 and provide it to the heat sink.

[0078] However, it is also possible that in the power semiconductor module 1000 A so-called "direct cooling" is used. This means that the oxide layer 604 is in direct contact with the coolant, thus forming part of the inner wall of the channel with coolant. In this case, the oxide layer 604 in particular serve to the substrate 602 to electrically insulate from the coolant. EXAMPLES

[0079] The following section provides further explanations of a power semiconductor module and a method for manufacturing a power semiconductor module using examples.

[0080] Example 1 is a power semiconductor module comprising a first substrate, wherein the first substrate comprises aluminium, a first aluminium oxide layer arranged on the first substrate, a conductive layer arranged on the first aluminium oxide layer, a first semiconductor chip, wherein the first semiconductor chip is arranged on the conductive layer and electrically connected to it, and an electrical insulating material enclosing the first semiconductor chip, wherein the first aluminium oxide layer is configured to electrically insulate the first semiconductor chip from the first substrate.

[0081] Example 2 is a power semiconductor module according to Example 1, wherein the first aluminium oxide layer has a thickness of 400nm or more.

[0082] Example 3 is a power semiconductor module according to Example 1 or 2, wherein the first aluminium oxide layer is an anodized layer.

[0083] Example 4 is a power semiconductor module according to one of the preceding examples, wherein the conductive layer is a structured layer comprising conductor tracks.

[0084] Example 5 is a power semiconductor module according to one of the preceding examples, wherein the conductive layer is a stack of at least two metal layers.

[0085] Example 6 is a power semiconductor module according to one of the preceding examples, wherein the first semiconductor chip is connected to the conductive layer by a sintered connection.

[0086] Example 7 is a power semiconductor module according to one of the preceding examples, further comprising a second aluminium oxide layer arranged on the first substrate, wherein a first thickness of the first aluminium oxide layer is greater than a second thickness of the second aluminium oxide layer.

[0087] Example 8 is a power semiconductor module according to one of the preceding examples, further comprising a second substrate, wherein the second substrate comprises an electrical insulating layer embedded in an upper and lower metal layer, wherein a second semiconductor chip is arranged on the second substrate and electrically connected to it, and wherein the first and second substrates are electrically isolated from each other by the electrical insulating material.

[0088] Example 9 is a power semiconductor module according to Example 8, wherein the second semiconductor chip is connected to the second substrate by a solder joint.

[0089] Example 10 is a power semiconductor module according to one of the preceding examples, wherein the first substrate comprises an electrical insulation layer embedded in an upper and lower metal layer, wherein the first aluminium oxide layer and a second semiconductor chip are arranged on the upper metal layer, and wherein the first semiconductor chip is electrically insulated from the upper metal layer by the first aluminium oxide layer.

[0090] Example 11 is a power semiconductor module according to Example 10, wherein the first semiconductor chip is electrically connected to the conductive layer by a first sintered connection and wherein the second semiconductor chip is electrically connected to the upper metal layer by a second sintered connection.

[0091] Example 12 is a power semiconductor module comprising an aluminum substrate, which includes a housing of the power semiconductor module and / or a heat sink, an aluminum oxide layer arranged on the aluminum substrate, and a printed circuit board arranged over the aluminum oxide layer, wherein a power semiconductor chip is embedded in the printed circuit board and wherein the aluminum oxide layer is configured to electrically insulate the power semiconductor chip from the aluminum substrate.

[0092] Example 13 is a power semiconductor module according to Example 12, wherein the aluminium oxide layer is an anodized layer.

[0093] Example 14 is a power semiconductor module according to Example 12 or 13, further comprising a layer of thermal paste arranged between the aluminium oxide layer and the printed circuit board.

[0094] Example 15 is a power semiconductor module according to Example 14, wherein the thermal paste is electrically conductive.

[0095] Example 16 is a method for manufacturing a power semiconductor module, the method comprising providing a first substrate, wherein the first substrate comprises aluminium, anodizing the first substrate to produce a first aluminium oxide layer, forming a conductive layer on the first aluminium oxide layer, arranging a first semiconductor chip on the conductive layer and electrically connecting it to the first semiconductor chip, and encapsulating the first semiconductor chip in an electrical insulating body, wherein the first aluminium oxide layer is configured to electrically insulate the first semiconductor chip from the first substrate.

[0096] Example 17 is a method according to Example 16, further comprising structuring the conductive layer to create conductor tracks.

[0097] Example 18 is a method for manufacturing a power semiconductor module, the method comprising providing an aluminium substrate which includes a housing of the power semiconductor module and / or a heat sink, anodizing the aluminium substrate to produce an aluminium oxide layer and arranging a printed circuit board over the aluminium oxide layer, wherein a power semiconductor chip is embedded in the printed circuit board and wherein the aluminium oxide layer is configured to electrically insulate the power semiconductor chip from the aluminium substrate.

[0098] Example 19 is a method according to Example 18, further comprising applying a thermal paste to the aluminium oxide layer, wherein the printed circuit board is arranged on the thermal paste and wherein the thermal paste is electrically conductive.

[0099] Example 20 is an apparatus for manufacturing a power semiconductor module, the apparatus comprising means for carrying out a method according to any one of Examples 16 to 19.

[0100] Example 21 is a power semiconductor module comprising a substrate, wherein the substrate is electrically conductive and has a first side and an opposite second side, a semiconductor chip arranged on the first side of the substrate, wherein the semiconductor chip is electrically connected to the substrate, an electrical insulating material enclosing the first semiconductor chip, and an oxide layer arranged at least on the second side of the substrate.

[0101] Example 22 is the power semiconductor module according to Example 21, further comprising a heat sink which is arranged on the oxide layer.

[0102] Example 23 is the power semiconductor module according to Example 22, further comprising a layer of thermal paste arranged between the oxide layer and the heat sink.

[0103] Example 24 is the power semiconductor module according to Example 22, wherein the oxide layer forms an inner wall of a channel for coolant of the heat sink.

[0104] It is obvious to the average person skilled in the art that a multitude of alternative and / or equivalent implementations can replace the specific examples shown and described without deviating from the scope of this disclosure. This application is intended to cover all adaptations or variations of the specific examples discussed herein.

Claims

[1] Power semiconductor module (100, 100', 200), comprising: a first substrate (102), wherein the first substrate (102) is a direct aluminum bond substrate, a first aluminium oxide layer (104) arranged on the first substrate (102), a conductive layer (106) arranged on the first aluminium oxide layer (104), a first semiconductor chip (108), wherein the first semiconductor chip (108) is arranged on the conductive layer (106) and electrically connected to it, and an electrical insulating material (110) that surrounds the first semiconductor chip (108), wherein the first aluminium oxide layer (104) is designed to electrically insulate the first semiconductor chip (108) from the first substrate (102). [2] Power semiconductor module (100, 100', 200) according to claim 1, wherein the first aluminium oxide layer (104) has a thickness of 400nm or more. [3] Power semiconductor module (100, 100', 200) according to claim 1 or 2, wherein the first aluminium oxide layer (104) is an anodized layer. [4] Power semiconductor module (100, 100', 200) according to any of the preceding claims, wherein the conductive layer (106) is a structured layer comprising conductor tracks. [5] Power semiconductor module (100, 100', 200) according to any of the preceding claims, wherein the conductive layer (106) is a layer stack of at least two metal layers. [6] Power semiconductor module (100, 100', 200) according to one of the preceding claims, wherein the first semiconductor chip (108) is connected to the conductive layer (106) by a sintered connection. [7] Power semiconductor module (100, 100', 200) according to any one of the preceding claims, further comprising: a second aluminium oxide layer (114) arranged on the first substrate (102), wherein a first thickness of the first aluminium oxide layer (104) is greater than a second thickness of the second aluminium oxide layer (114). [8] Power semiconductor module (100'), comprising: a first substrate (102), wherein the first substrate (102) comprises aluminium, a first aluminium oxide layer (104) arranged on the first substrate (102), a conductive layer (106) arranged on the first aluminium oxide layer (104), a first semiconductor chip (108), wherein the first semiconductor chip (108) is arranged on the conductive layer (106) and is electrically connected to it and is part of a logic or control circuit arranged on the first substrate (102), an electrical insulating material (110) that surrounds the first semiconductor chip (108), wherein the first aluminium oxide layer (104) is designed to electrically insulate the first semiconductor chip (108) from the first substrate (102), a second substrate (116), wherein the second substrate (116) comprises an electrical insulating layer (116_3) embedded in an upper and lower metal layer (116_1, 116_2), wherein a second semiconductor chip (112) is arranged on the second substrate (116) and electrically connected to it and is part of a power circuit arranged on the second substrate, and wherein the first and the second substrate (102, 116) are electrically insulated from each other by the electrical insulating material (110). [9] Power semiconductor module (100') according to claim 8, wherein the second semiconductor chip (112) is connected to the second substrate (116) by a solder connection. [10] Power semiconductor module (200) according to one of the preceding claims, wherein the first substrate (102) comprises an electrical insulation layer (203) embedded in an upper and lower metal layer (201, 202), wherein the first aluminium oxide layer (104) and a second semiconductor chip (112) are arranged on the upper metal layer (101), and wherein the first semiconductor chip (108) is electrically insulated from the upper metal layer (201) by the first aluminium oxide layer (104). [11] Power semiconductor module (200) according to claim 10, wherein the first semiconductor chip (108) is electrically connected to the conductive layer (106) by a first sintered connection and wherein the second semiconductor chip (112) is electrically connected to the upper metal layer (201) by a second sintered connection. [12] Power semiconductor module (300, 300'), comprising: an aluminium substrate (302) comprising a housing for the power semiconductor module and / or a heat sink, an aluminum oxide layer (304) which is arranged on the aluminum substrate (302), and a printed circuit board (306) which is arranged above the aluminium oxide layer (304), wherein a power semiconductor chip (308) is embedded in the printed circuit board (306), a layer of thermal paste (310) arranged between the aluminium oxide layer (304) and the circuit board (306), and wherein the aluminium oxide layer (304) is designed to electrically insulate the power semiconductor chip (308) from the aluminium substrate (302). [13] Method (400) for manufacturing a power semiconductor module, the method comprising: Providing (401) a first substrate, wherein the first substrate is a direct aluminum bond substrate, Anodizing (402) the first substrate to produce a first aluminum oxide layer, Forming (403) a conductive layer on the first aluminium oxide layer, Arranging (404) a first semiconductor chip on the conductive layer and electrically connecting it to the conductive layer, and Encapsulation (405) of the first semiconductor chip in an electrical insulating body, the first aluminium oxide layer is designed to electrically insulate the first semiconductor chip from the first substrate. [14] Method (500) for manufacturing a power semiconductor module, the method comprising: Providing (501) an aluminum substrate comprising a power semiconductor module housing and / or a heat sink, Anodizing (502) the aluminium substrate to create an aluminium oxide layer, and Arranging (503) a printed circuit board over the aluminium oxide layer, wherein a power semiconductor chip is embedded in the printed circuit board, Applying a thermal paste to the aluminium oxide layer, wherein the printed circuit board is placed on the thermal paste and wherein the thermal paste is electrically conductive, and the aluminum oxide layer is designed to electrically insulate the power semiconductor chip from the aluminum substrate. [15] Power semiconductor module (600, 700, 800, 900, 1000), comprising: a substrate (602), wherein the substrate (602) is electrically conductive and has a first side (602_1) and an opposite second side (602_2), a semiconductor chip (606) arranged on the first side (602_1) of the substrate (602), wherein the semiconductor chip (606) is electrically connected to the substrate (602), an electrical insulating material (608) that surrounds the first semiconductor chip (606), and an oxide layer (604) arranged at least on the second side (602_2) of the substrate (602). [16] Power semiconductor module (600, 700, 800, 900, 1000) according to claim 15, further comprising: a heat sink (1002) which is arranged on the oxide layer (604).

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