Arrangement for an optoelectronic component, method for manufacturing and optoelectronic component

DE102020117238B4Active Publication Date: 2025-03-27FIRST SENSOR
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Patent Information

Application Number
DE102020117238
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2020-06-30
Publication Date
2025-03-27
Estimated Expiration
2040-06-30

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Abstract

Arrangement for an optoelectronic component, including: - a substrate (7); - an optical semiconductor chip (1) which is arranged on the substrate (7) and connected to a first substrate-side electrical connection (8); - an optically active area (5) of the optical semiconductor chip (1) which is configured to receive light during operation and convert it into electrical charges; - a first optically inactive region (6) of the optical semiconductor chip (1) in which a chip-side electrical connection (9) and a connection structure (16) are formed which electrically connects the chip-side electrical connection (9) to the optically active region (5); - a second optically inactive area (17) of the optical semiconductor chip (1) which is formed separately from the first optically inactive area (6) and is covered with a protective layer (18); - an electrical connection (11) which connects the chip-side electrical connection (9) to a second substrate-side electrical connection (10); and - a coating (4) in which a layer stack in the optically active region (5) as well as in the first and the second optically inactive region (6; 17) each has the following: - a first layer (3) made of at least one of the materials SiO2 and Si3N4 and - a second layer (12) of an inorganic material arranged in the layer stack above the first layer (3); wherein - the chip-side electrical connection (9) and the connection structure (16) in the first optically inactive area (6) as well as - the protective layer (18) in the second optically inactive area (17) is arranged between the first and second layers (3, 12) of the coating (4).
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Description

[0001] The invention relates to an arrangement for an optoelectronic component and to a method for producing the arrangement and an optoelectronic component. background

[0002] Optoelectronic components typically comprise an optical semiconductor chip arranged on a substrate and connected to a substrate-side electrical contact. The optoelectronic semiconductor chip has an optically active region configured to receive and / or emit light during operation. Terminals of the optical semiconductor chip are connected to substrate-side terminals, for example, by wire bonding.

[0003] Such an optoelectronic component is known, for example, from document WO 2015 / 044529 A1. A protective layer is provided on the substrate of the optoelectronic component, extending over the entire assembly of substrate and optical semiconductor chip. An electrical connection formed on the substrate is arranged beneath the protective layer.

[0004] Document DE 10 2009 058 796 A1 discloses an optoelectronic component and a method for manufacturing the same. The optoelectronic component comprises an inorganic optoelectronically active semiconductor component with an optically active region capable of emitting or receiving light during operation. A sealing material applied by atomic layer deposition is arranged on at least one surface region, hermetically covering the surface region.

[0005] In document US 7 939 932 B2, it is provided that a semiconductor chip is coated on its surface with an inorganic dielectric film material, in particular AL2O3 or TiO2, which also includes a coating of the electrical connections.

[0006] Document WO 2018 / 019 921 A1 discloses an optical sensor in which a layer of a photoconductive material is provided with an outer cover layer.

[0007] Document US 2009 / 0 026 560 A1 relates to a sensor package. One embodiment of this document provides a sensor device comprising a carrier, a semiconductor sensor mounted on the carrier, and an active surface. Contact elements electrically connect the carrier to the semiconductor sensor. A protective layer of an inorganic material covers at least the active surface and the contact elements.

[0008] Document US 2007 / 0 064 133 A1 discloses a MOS image sensor comprising: a semiconductor substrate having a surface with an image region; a plurality of photoelectric conversion elements arranged on the image region; and lines formed over the image region in a manner avoiding the photoelectric conversion elements and connected to a signal reading circuit provided corresponding to each of the photoelectric conversion elements, wherein a predetermined one of the lines is formed by a conductive polysilicon film. Summary

[0009] The object of the invention is to provide an arrangement for an optoelectronic component as well as an optoelectronic component and a method for producing the same, with which the antireflective properties of an outer surface of the optoelectronic component are improved.

[0010] To achieve this, an arrangement for an optoelectronic component according to independent claim 1 and an optoelectronic component according to independent claim 10 are provided. Furthermore, a method for producing an arrangement for an optoelectronic component according to independent claim 11 is provided. Embodiments are the subject of dependent subclaims.

[0011] According to one aspect, an arrangement for an optoelectronic component is provided, comprising the following: a substrate; an optical semiconductor chip arranged on the substrate and connected to a first substrate-side electrical connection; an optically active region of the optical semiconductor chip, which is configured to receive light and convert it into electrical charges during operation; a first optically non-active region of the optical semiconductor chip, in which a chip-side electrical connection and a connection structure are formed, which electrically connects the chip-side electrical connection to the optically active region; a second optically non-active region of the optical semiconductor chip, which is formed separately from the first optically non-active region and covered with a protective layer;an electrical connection which connects the chip-side electrical connection to a second substrate-side electrical connection; and a coating in which the following is provided in a layer stack in the optically active region and in the first and second optically non-active regions: a first layer made of at least one of the materials SiO2 and Si3N4 and a second layer made of an inorganic material, which is arranged in the layer stack above the first layer; wherein in the first optically non-active region, the chip-side electrical connection and the connection structure, and in the second optically non-active region, the protective layer, are each arranged between the first and the second layer of the coating.

[0012] According to a further aspect, a method for producing an arrangement for an optoelectronic component is provided, which comprises the following: providing a substrate; arranging an optical semiconductor chip on the substrate, wherein the optical semiconductor chip is electrically connected to a first substrate-side connection and has an optically active region which is configured to receive light and convert it into electrical charges during operation; producing a chip-side electrical connection and a connection structure which electrically connects the chip-side electrical connection to the optically active region in a first optically non-active region of the optical semiconductor chip; producing a protective layer in a second optically non-active region of the optical semiconductor chip, which is formed separately from the first optically non-active region;Establishing an electrical connection between the chip-side electrical connection and a second substrate-side electrical connection; and producing a coating in which the following is provided in a layer stack in the optically active region and in the first and second optically non-active regions: a first layer made of at least one of the materials SiO2 and Si3N4 and a second layer made of an inorganic material, which is arranged in the layer stack above the first layer; wherein in the first optically non-active region, the chip-side electrical connection and the connection structure, and in the second optically non-active region, the protective layer are each arranged between the first and the second layer of the coating.

[0013] Furthermore, an optoelectronic component with such an arrangement is provided.

[0014] In the proposed arrangement for the optoelectronic component, the coating in the optically active region and the first and second optically non-active regions of the optical semiconductor chip has a different layer structure, which is particularly a result of the integration of the chip-side electrical connection, the connecting structure, and the protective layer between the first and second layers of the coating. In this way, desired (different) properties, in particular reflection properties, for light incident on the surface of the arrangement or the surface of the optoelectronic component can be formed in the optically active region and the optically non-active regions.

[0015] The first layer of the coating can be formed with different layer thicknesses in the different areas it covers, i.e. optically active area and first and second optically non-active area.

[0016] In addition to the first and second layers, the coating may have at least one further layer.

[0017] The protective layer is designed to reduce the incidence of light in the semiconductor chip in the region outside the optically active region. In one embodiment, the protective layer can be made of the same material as the connecting structure.

[0018] The first optically non-active region may include regions that are not covered by the interconnect structure and the chip-side electrical connection. In these regions, the first layer may consist of at least one of the materials SiO2 and Si3N4. The resulting layer thickness may differ from that in the optically active region.

[0019] The first optically non-active region may partially or completely surround the second optically non-active region.

[0020] The various electrical connections can be formed, for example, with a so-called contact pad and / or conductive tracks. The electrical connection between the chip-side electrical connection and the second substrate-side electrical connection can be formed, for example, by wire bonding.

[0021] When arranging it on the substrate, the optical semiconductor chip can be glued on, for example.

[0022] For optical sensor systems, the proposed technology enables high sensitivity and high reliability. To achieve high sensitivity, the entire chip surface, which is formed with a sensitive (optically active) and a non-sensitive (optically inactive) region, can be anti-reflective coated for a target wavelength or wavelength range. The anti-reflective coating in the optically active region serves to achieve high light output in the sensor, which can be converted into an electrical signal. This is important for high sensitivity. The anti-reflective coating in the optically inactive region(s) serves in particular to minimize back reflections onto the optically active region and prevent false signals caused thereby.

[0023] To ensure high reliability of the systems in which the sensor chip is installed, the active chip surface can be protected to prevent halides or other contaminants from coming into contact with the contact pads, conductor tracks, and metal structures. These contaminants are introduced, for example, during the potting of bond wires (glob top), bonding the chip surface to optical system components, or encapsulating the system (dam and fill or molding). The filled or unfilled polymers used for these and other processes often contain components that promote or trigger chip corrosion.

[0024] By means of the coating, a first reflectivity can be formed in the optically active region for an optical (target) wavelength range between a first and a second wavelength, and a second reflectivity can be formed in each of the first and second optically non-active regions, each of which is greater than the first reflectivity for the wavelength range. The second reflectivity in the first and second optically non-active regions can be the same or different, but is always greater than the first reflectivity for the wavelength range. The coating can therefore also be referred to as an anti-reflection coating.

[0025] In one embodiment, the optical wavelength range comprises wavelengths from approximately 840 nm to approximately 980 nm, or alternatively, a wavelength range from approximately 880 nm to approximately 915 nm. The reflectivity behavior can also be achieved in other wavelength ranges. The multilayer coating allows for the selection of different materials for the layers.

[0026] The first reflectivity in the optically active region for the wavelength range may not be greater than approximately 10 percent. In one embodiment, the first reflectivity in the optically active region may not be greater than approximately 6 percent, or alternatively, not greater than approximately 3 percent. A residual reflection greater than 0 percent occurs in the optically active region.

[0027] The second reflectivity in the optically non-active region may not exceed approximately 50 percent for the wavelength range. In one embodiment, the second reflectivity in the optically non-active region may not exceed approximately 40 percent, or alternatively, may not exceed approximately 30 percent. The anti-reflection effect in the region of the chip-side electrical connection is based on the interaction of the first and second layers of the coating and the multilayer arrangement of the chip-side electrical connection arranged therebetween.

[0028] The coating can be implemented as a continuous coating in the optically active region and in the first and second optically non-active regions. Additionally, it can be provided that the coating is also continuous in a region between the optically active region and the optically non-active regions. In the composite comprising a substrate and an optical semiconductor chip, the coating can be configured to cover an entire cover-side surface. If the arrangement is provided in an optoelectronic component, a surface region onto which light can fall during operation can be substantially completely covered with the coating.

[0029] Surface areas of the optical semiconductor chip up to the area of ​​the substrate can also be covered with the coating, which do not run transversely to the direction of light incidence, for example surface areas which are more aligned in the direction of light incidence.

[0030] An optical window component can be arranged on the coating above the optically active region. The optical window component can be made of a glass material. The optical window component can have optical filter properties, for example, in that it is configured to transmit only light in a target wavelength range, for example, in the range from approximately 840 nm to approximately 980 nm. For arrangement in the optically active region, the window component can be adhesively bonded, in particular directly onto the coating.

[0031] The electrical connection may comprise an electrical line or an electrical line section, the surface of which is at least partially covered by the second layer of the coating. The electrical connection may be formed by a wire whose surface is covered with the second layer of the coating. Establishing the electrical connection by means of wire bonding may be provided.

[0032] The multilayer structure of the chip-side electrical connection can have a first layer made of an aluminum material. The first layer made of the aluminum material can form a bottom layer in the multilayer structure of the chip-side electrical connection. One or more further layers in the multilayer structure are arranged on the bottom layer. The first layer of the multilayer structure of the chip-side electrical connection made of aluminum material can be arranged in direct contact with the first layer of the coating, i.e., can be deposited thereon. The aluminum material can comprise aluminum or an aluminum alloy, for example AlSi, AlSiCu, or AlCu. For the first layer, for example when formed from the aluminum material, a layer thickness of approximately 300 nm to approximately 1400 nm can generally be provided.

[0033] The electrically conductive connection structure can have at least one metal layer made of a metal material from the following group: Al, Cr, Ti, W, Ni, V, an oxide of Al, Cr, Ti, W, Ni or V and an alloy whose main component is Al, Cr, Ti, W, Ni or V. The electrically conductive connection structure can be formed with a single layer or with a multi-layer structure. In the case of a multi-layer structure, the aforementioned design options apply accordingly to each layer in the stack. In a multi-layer structure, a metal layer can form the uppermost layer. In one possible embodiment, the layer stack can consist of two layers, for example an aluminum layer and a chromium layer arranged thereon.Possible layer examples include at least one arrangement from the following group: Al; AlSi (an Al layer alloyed with Si); Al + Cr (aluminum with a chromium layer thereon); Al + Cr2O3 (aluminum with a chromium oxide layer thereon) and AlSi + Cr + Cr2O3 (aluminum with a chromium oxide layer and titanium thereon).

[0034] The preceding explanations regarding the layer structure and materials apply accordingly to the chip-side electrical connection. In one exemplary embodiment, this is formed as a single layer, for example, an aluminum layer. Such a configuration can be achieved, for example, by initially producing the areas of the chip-side electrical connection and the electrically conductive connection structure as a two-layer structure, and subsequently removing the upper layer, for example, the chromium layer in the area of ​​the chip-side electrical connection.

[0035] The embodiments described above in connection with the arrangement for the optoelectronic component can be provided accordingly in connection with the optoelectronic component and the method for producing the arrangement.

[0036] The manufacturing method can provide for the first layer of the coating to be applied while the optical semiconductor chip is still arranged in the wafer composite, before the step of singulating the chips is carried out. The first layer of the coating is thus formed in both the optically active region and the optically non-active region. After the wafer has been singulated to form the optical semiconductor chips, the semiconductor chip is applied to the substrate, for example by gluing. Once the electrical connections have been formed, the second layer of the coating can be deposited, for which purpose “atomic layer deposition” technology can be used, for example. The second layer is also applied both in the optically active region and in the optically non-active region in which the chip-side electrical connection with its multi-layer structure is arranged.The deposition of the second layer of the coating can be carried out at low temperatures, for example at temperatures of approximately 150°C to approximately 300°C. This allows the second layer of the coating to be deposited during a packaging process.

[0037] The second layer of the coating can essentially cover the entire composite of substrate and optical semiconductor chip, whereby a back side of the substrate can remain uncoated.

[0038] Further steps can then follow in the manufacturing process, for example the application of an optical window component in the optically active area on the front side of the optical semiconductor chip, for example by gluing.

[0039] The coating can form a moisture barrier to keep moisture away from the chip surface and electrical connections. The coating can therefore also be referred to as an anti-reflective and protective coating (multifunctional coating). Description of implementation examples

[0040] Further embodiments are explained below with reference to the figures of a drawing. Herein: Fig. 1 a schematic perspective view of a singled optical semiconductor chip having a first layer of a functional coating on the cover side; Fig. 2 shows a schematic representation of an arrangement in which the optical semiconductor chip is arranged on a substrate and a chip-side electrical connection is electrically connected, wherein the overall assembly is covered with a second layer of the functional coating; and Fig. 3 a schematic representation of the arrangement of Fig. 2, in which an optical window component is arranged on the optical semiconductor chip in an optically active region of the optical semiconductor chip; and Fig. 4 a schematic representation of another arrangement in which the optical semiconductor chip is arranged on a substrate, in plan view.

[0041] Fig. Figure 1 shows a schematic representation of an optical semiconductor chip 1 that was singulated from a wafer composite and has a first layer 3 of a coating 4 on a top surface 2. The first layer 3 was deposited at wafer level and is continuous in both an optically active region 5 and a first optically non-active region 6 of the optical semiconductor chip 1. The first layer 3 can consist, for example, of SiO2, Si3N4, or a combination of these materials.

[0042] The first layer 3 of the coating 4 is made of at least one of the materials SiO2 and Si3N4. In this case, SiO2 and / or Si3N4 can have a respective layer thickness of approximately 5 nm to approximately 250 nm, and Si3N4 can have a layer thickness of approximately 5 nm to 250 nm.

[0043] Fig. Figure 2 shows a schematic representation of an arrangement in which the optical semiconductor chip 1 is arranged on a substrate 7, for example, using an adhesive material 7a. The optical semiconductor chip 1 is electrically contacted via a first substrate-side electrical connection 8. The substrate 7 can be formed, for example, by a printed circuit board that has conductor tracks for the electrical connections.

[0044] On the top surface 2 of the optical semiconductor chip 1, a chip-side electrical connection 9 with a multilayer structure is fabricated on the first layer 3. An electrical connection 11 is formed between the chip-side electrical connection 9 and a second substrate-side electrical connection 10, for example, by means of wire bonding. The chip-side electrical connection 9 and / or the substrate-side electrical connections 8, 10 can be contact pads or conductor tracks.

[0045] The entire surface of the Fig. A second layer 12 of the coating 4 is applied across the entire surface of the composite shown in Figure 2, i.e., both in the optically active region 5 and in the first optically non-active region 6, but also on the substrate-side sections 13 and side surfaces 14 of the optical semiconductor chip 1. The second layer 12 is made of an inorganic material. It can be a multilayer structure with two or more materials that have different refractive indices and can be deposited alternately. In the simplest case, it is a two-layer system. In one embodiment, the following can be provided: Al2O3 (20 nm) and then Ta2O5 (65 nm). However, these two layers can also be deposited alternately one after the other in thinner layers, even with different thicknesses (e.g., 20 layer sequences of Al2O3 and Ta2O5, each with different layer thicknesses).The total thickness of the multilayer structure can, for example, be less than about 250 nm. The individual layers have a minimum thickness of about 1 nm.

[0046] With the help of the coating 4, the reflectivity in the arrangement with the optical semiconductor chip 1 and the substrate 7 is reduced on the surface side (wavelength-selective), whereby a different reflectivity is formed in the optically active region 5 and in the first optically non-active region 6 with the chip-side electrical connection 9. The reflectivity in the optically active region 5 for a selected wavelength range is significantly lower than in the first optically non-active region 6. For example, the optical reflectivity for a target wavelength or a target wave range in the optical region 5 is less than approximately 6%, alternatively less than approximately 3% or approximately 1%.In the first optically non-active region 6 with the chip-side electrical connection 9, the optical reflectivity for the target wavelength or the target wavelength range can, however, be less than approximately 50%, alternatively less than approximately 30% or less than approximately 10%.

[0047] In the manufacturing process, Fig. 3, it is provided to apply an optical window component 15, for example by adhesive bonding, in the optically active region 5 of the optical semiconductor chip 1. The optical window component 15 can, for example, be made of a glass material and optionally provide optical filter properties.

[0048] In one embodiment, it can be provided that the second layer 12 of the coating 4 is applied or deposited before the electrical connection 11 is formed. In this case, the electrical connection 11 is established through the second layer 12, for example by means of wire bonding. The second layer 12 provides protection against contamination that can occur during wire bonding. The second layer 12 of the coating 4 also protects the chip-side electrical connection 9 from contamination, for example during gluing or other packaging processes after the formation of the electrical connection 11, which takes place, for example, by means of wire bonding.

[0049] Fig.4 shows a schematic representation of a further arrangement in which the optical semiconductor chip 1 is arranged on a substrate 7, in a top view. The same reference numerals are used for identical features. The chip-side electrical connection 9 is arranged in the first optically non-active region 6 and is connected to the optical semiconductor chip 1 via an electrically conductive connection structure 16. The electrically conductive connection structure 16 can have a metal layer made of at least one metal from the following group: Al, Cr, Ti, W, Ni, V, an oxide of Al, Cr, Ti, W, Ni or V and an alloy whose main constituent is Al, Cr, Ti, W, Ni or V. The electrically conductive connection structure can be single-layered or formed with a multi-layer structure. In the case of a multi-layer structure, the aforementioned design options apply accordingly to each layer in the stack.In a multilayer structure, a metal layer can form the topmost layer. In one possible embodiment, the layer stack can consist of two layers, for example, an aluminum layer and a chromium layer arranged on top.

[0050] Outside the optically active region 5, in addition to the first optically non-active region 6, a second optically non-active region 17 is formed, in which a protective layer 18 is deposited, which reduces or essentially completely prevents the penetration of light into the optical semiconductor chip 1 in the second optically non-active region 17. The layer structure can be the same as the layer structure of the electrically conductive connecting structure 16.

[0051] Further design options are explained below.

[0052] In one embodiment, the first layer 3 can be made as a layer with a thickness of about 20 nm from SiO2.

[0053] In this or other embodiments, the chip-side electrical connection 9 can have a metallization with the following layers in a multi-layer structure: 1.1µm Al and 60nm Cr.

[0054] In the various embodiments, the second layer 12 of the coating 4 can be formed from AlN with a layer thickness of approximately 80 µm. However, other electrically insulating materials (insulator materials) can also be used, with a layer thickness of approximately 10 nm to approximately 250 nm being possible.

[0055] Further embodiments may provide one or more of the following configurations: - HfO2 (95nm) on a layer stack on the optical semiconductor chip: pixel (SiO2 20nm) / metal (about 1µm Al + 60nm Cr) - Al2O3 (105nm) on a layer stack on the optical semiconductor chip: pixel (SiO2 20nm) / metal (about 1µm + 60nm Cr) - Al2O3 30nm + AIN 50nm on a layer stack on the optical semiconductor chip: pixel (SiO2 20nm) / metal (about 1µm + 60nm Cr) - Al2O3 30nm + AIN 50nm on a layer stack on the optical semiconductor chip: pixel (SiO2 20nm) / metal (about 1µm + 100nm Ti) - Al2O3 20nm + Ta2O5 65nm on a layer stack on the optical semiconductor chip: pixel (SiO2 20nm) / metal (about 1µm + 60nm Cr)

[0056] The features disclosed in the above description, the claims and the drawings may be important for the realization of the various embodiments both individually and in any combination.

Claims

[1] Arrangement for an optoelectronic component, comprising: - a substrate (7); - an optical semiconductor chip (1) which is arranged on the substrate (7) and is connected to a first substrate-side electrical connection (8); - an optically active region (5) of the optical semiconductor chip (1) which is configured to receive light during operation and to convert it into electrical charges; - a first optically non-active region (6) of the optical semiconductor chip (1), in which a chip-side electrical connection (9) and a connecting structure (16) are formed, which electrically conductively connects the chip-side electrical connection (9) to the optically active region (5); - a second optically non-active region (17) of the optical semiconductor chip (1), which is formed separately from the first optically non-active region (6) and covered with a protective layer (18); - an electrical connection (11) which connects the chip-side electrical connection (9) to a second substrate-side electrical connection (10); and - a coating (4), in which a layer stack in the optically active region (5) and in the first and second optically non-active regions (6; 17) each has the following: - a first layer (3) made of at least one of the materials SiO2 and Si3N4 and - a second layer (12) made of an inorganic material, which is arranged in the layer stack above the first layer (3); wherein - the chip-side electrical connection (9) and the connection structure (16) in the first optically non-active area (6) and - the protective layer (18) in the second optically non-active region (17) is arranged between the first and the second layer (3, 12) of the coating (4). [2] Arrangement according to claim 1, characterized bythat by means of the coating (4) a first reflectivity is formed in the optically active region (5) for an optical wavelength range between a first and a second wavelength, and a second reflectivity is formed in each of the first and second optically non-active regions (6; 17), which second reflectivity is greater than the first reflectivity for the wavelength range. [3] Arrangement according to claim 2, characterized by that the first reflectivity in the optically active region (5) for the wavelength range is not greater than 10 percent. [4] Arrangement according to claim 2 or 3, characterized by that the second reflectivity in the first and the second optically non-active region (6; 17) is not greater than 50 percent for the wavelength range in each case. [5] Arrangement according to at least one of the preceding claims, characterized bythat the coating (4) in the optically active region (5) and in the first and second optically non-active regions (6; 17) is each designed as a continuous coating. [6] Arrangement according to at least one of the preceding claims, characterized by that an optical window component (15) is arranged above the optically active region (5) on the coating (4). [7] Arrangement according to at least one of the preceding claims, characterized by that the electrical connection (11) has an electrical line which is covered on the surface side at least in sections by the second layer (12) of the coating (4). [8] Arrangement according to at least one of the preceding claims, characterized by that the chip-side electrical connection (9) (9) has a first layer of an aluminum material. [9] Arrangement according to at least one of the preceding claims, characterized bythat the electrically conductive connecting structure (16) has a metal layer made of a metal material from the following group: Al, Cr, Ti, W, Ni, V, an oxide of Al, Cr, Ti, W, Ni or V and an alloy whose main component is Al, Cr, Ti, W, Ni or V. [10] Optoelectronic component, comprising an arrangement according to at least one of the preceding claims. [11] Method for producing an arrangement for an optoelectronic component, comprising: - providing a substrate (7); - arranging an optical semiconductor chip (1) on the substrate (7), wherein the optical semiconductor chip (1) is electrically connected to a first substrate-side terminal (8) and has an optically active region (5) which is configured to receive light during operation and to convert it into electrical charges; - producing a chip-side electrical connection (9) and a connection structure (16) which electrically connects the chip-side electrical connection (9) to the optically active region (5) in a first optically non-active region (6) of the optical semiconductor chip (1); - producing a protective layer (18) in a second optically non-active region (17) of the optical semiconductor chip (1), which is formed separately from the first optically non-active region (6); - establishing an electrical connection (11) between the chip-side electrical connection (9) and a second substrate-side electrical connection (10); and - producing a coating (4) in which the following is provided in a layer stack in the optically active region (5) and the first and second optically non-active regions (6; 17): - a first layer (3) made of at least one of the materials SiO2 and Si3N4 and - a second layer (12) made of an inorganic material, which is arranged in the layer stack above the first layer (3); wherein - the chip-side electrical connection (9) and the connection structure (16) in the first optically non-active area (6) and - the protective layer (18) is arranged in the second optically non-active region (17) between the first and the second layer (3, 12) of the coating (4).

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