Integrated voltage regulator with integrated air core inductor and method for its manufacture
The spiral-shaped integrated inductor with central connection pads addresses the inefficiencies of existing PMIC designs by minimizing parasitic resistance and EMI, enhancing efficiency and reducing electromagnetic interference.
Patent Information
- Application Number
- DE102020200544
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-10-31
- Filing Date
- 2020-01-17
- Publication Date
- 2025-08-07
- Estimated Expiration
- 2040-01-17
AI Technical Summary
Existing PMIC designs with integrated inductors suffer from increased resistance and reduced efficiency due to additional conductive metal paths required for connecting solenoid and strip line inductor designs, leading to higher parasitic interference and electromagnetic interference (EMI).
A spiral-shaped integrated inductor with a central space and connection pads located in the middle, minimizing parasitic resistance and EMI by reducing the path length for flux and using air core inductors on a silicon substrate.
The solution results in reduced parasitic resistance by up to 30-50% and improved efficiency by maintaining a higher quality factor (Q) and minimizing electromagnetic interference, allowing for compact and efficient power management integrated circuits.
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Abstract
Description
AreaThe present disclosure relates generally to a power management integrated circuit (PMIC) having discrete inductor coils. In particular, the present invention relates to a discrete / integrated inductor within an embedded PMIC or a PMIC having an embedded discrete / integrated inductor, and a method for manufacturing the same.BackgroundAlmost all PMICs, including switching converters such as buck, boost and buck / boost converters, require an inductor. At present, there are three different approaches to designing integrated inductors on silicon within a PMIC: planar air coils (spiral, "race track"), magnetic core between coil layers (solenoid) and coil layer between winding magnetic cores (stripline). The solenoid and the strip line both have connection pads that terminate at opposite ends of the device, which requires additional conductive metal to connect the device to the rest of the circuit. This additional metal path increases the resistance and reduces the quality factor (Q-factor) of the device, leading to lower efficiency. Comparing the solenoid design to the spiral air coils, the additional conductive layer for connecting the solenoid inductor adds approximately 10 mΩ DC resistance, which corresponds to about 30-50% (depending on the design) of the inductor resistance. The need for additional conductive metal is also required for the strip line design because the pads for the inductor terminate at opposite ends of the device and there is no space in the center of the device. Further, US 20180190635 A1 relates to an electronic device package, and more particularly to an electronic device package including an integrated circuit device, a memory device, and a passive device. US 9406738 B2 describes an inductor for an integrated circuit including a first winding including a first through silicon via (TSV) coupled to a second TSV, where the inductor may include a third TSV coupled to the second TSV.SummaryAccordingly, it is an object of one or more embodiments of the present disclosure to optimize implementation of a polyphase integrated voltage regulator with die-passives with minimal parasitic connection interference and low conductive electromagnetic interference (EMI).It is another object of one or more embodiments of the disclosure to provide an integrated inductor in which the coil on the die is in a spiral shape with a space in the center of the coil, thereby not requiring an additional metal line.Further, it is an object of one or more embodiments of the disclosure to provide an integrated inductor in which the connection pads are located in the space in the middle of a spiral inductor, thereby limiting the overall resistance of the inductor to the device only.Other objects will be apparent hereinafter.The above and other objects of the present disclosure may be achieved in the following manner, among others. A single / polyphase integrated voltage regulator with an integrated air core inductor has an integrated voltage regulator on a silicon substrate and an integrated air core inductor on the integrated voltage regulator. The integrated air core inductor has a spiral shape and a clearance at the center of the spiral shape. The integrated voltage regulator has at least one supply connection pad in the space in the middle of the spiral design of the integrated air core inductor.The above and other objects of the present disclosure may be further achieved with a method of manufacturing an integrated voltage regulator with an integrated air core inductor. The steps include, among other things, forming an integrated voltage regulator in and on a silicon substrate. The steps include forming an integrated air core inductor over the integrated voltage regulator, the air core inductor having a spiral shape and a space in the center of the spiral shape. The steps also include forming at least one supply connection pad of the integrated voltage regulator in the space.In various embodiments, the inductor as claimed may have on the die a magnetic core that wraps around the windings.In various embodiments, the spiral coil may be implemented in a circular design or a "race track" (elongated) design.In various embodiments, the coil layers may be implemented as multiple coil layers or a single coil layer connected in parallel to the same supply connection pads, thereby reducing the resistance and maintaining the inductance.Brief Description of the DrawingsThe present disclosure will be more fully understood from the following description taken in conjunction with the accompanying drawings, in which like reference numerals designate like or corresponding elements, portions, and parts, and in which: FIG. 1 shows a spiral inductor implemented in a "race track" (elongated spiral) design. FIG. 2 shows a spiral inductor implemented in a circular spiral design. FIG. 3 shows a schematic illustration of a single or multi-phase interactive integrated voltage regulator (IVR) circuit constructed with spiral inductor coils and constructed on PMIC silicon. FIG. 4 shows the pad arrangement in the middle of a spiral inductor coil embodying the principles of the disclosure. FIG. 5A shows a cross-section of an integrated voltage regulator (IVR) circuit with a power management integrated circuit (PMIC) and metal layers 1- 6 (although other number of metal layers may also be used) with inductor metal layers (with air coils) over the PMIC. FIG. 5B shows how a magnetic core winding the windings is formed. FIG. 5C is a circuit diagram showing a typical PMIC for a buck configuration connected to an inductor, the inductor output, and VSS / VDD connections. FIG. 5D shows a circuit drawing showing a typical PMIC for a boost configuration connected to an inductor, the inductor output, and VSS / VDD connections. FIG. 6 shows step 1 after the formation of the PMIC and before the fabrication process of the inductor layers. FIG. 7 shows step 2 for depositing and patterning copper (or other metals such as silver PPI1) and dielectric layer PM1 in the manufacturing process of the inductor layers. FIG. 8 shows step 3 for depositing the dielectric layers PM 2- 1, PM 2- 2 in the manufacturing process of the inductor layers. FIG. 9 shows step 4 for depositing copper (or other metal PPI2) layers and the dielectric layer PM3 in the manufacturing process of the inductor layers. FIG. 10 shows step 5 for applying the under bump metallurgy (UBM) and the solder ball in the manufacturing process of the inductor layers. FIG. 11 is a flow diagram of a method of manufacturing an integrated voltage regulator with an integrated air core inductor.Detailed DescriptionThe present disclosure proposes a single / multi-phase power management integrated circuit (PMIC) constructed on a silicon substrate, wherein coil layers are processed on the metal layers of the integrated circuit (IC). Each phase of the polyphase PMIC has a single output inductor. At least one of the power supply connection pads (Vss or Vdd) is disposed in the central space of the coil layers to minimize parasitic interference, wherein the coil layers are formed by electroplating thick copper / silver in a spiral resist pattern formed by lithography.The key elements of the disclosure include an even number of spiral inductors (based on air and magnetic cores) each having a space at its center. The use of an even number of coils allows far field suppression, resulting in less electromagnetic interference (EMI). Further, the arrangement of the inductors is such that they are all arranged in groups of two in a row. The inductors in each group must have a negative coupling, with two adjacent groups having a positive coupling to reduce EMI.The spiral inductors may be implemented as a "race track" (elongated spiral) design in FIG. 1100, or as a circular spiral design in FIG. 2 200. Element 110 of Figure 1 shows the elongated spiral inductor and 120 the space in the center of the elongated spiral inductor. Element 210 in Figure 2 shows the circular spiral inductor and 220 the space in the center of the circular spiral inductor.The coil layers of the disclosure are formed above the PMIC, in and on the silicon substrate, and the supply connection pads (for Vss or Vdd) are disposed in the central space of the spiral inductor coils. With this construction, the parasitic connections between the spiral coil and the supply pads for Vss or Vdd are minimized, resulting in lower losses and better efficiency. In addition, the space at the center of the spiral coil reduces the path length for the course of the flux, thereby increasing inductance and producing a higher quality (Q) factor for the device (in terms of inductance / DC resistance).FIG. 3 shows 300 a schematic of a single phase or polyphase integrated voltage regulator (IVR) circuit constructed with spiral inductor coils 320 constructed on PMIC silicon 330. The improved arrangement of the coils with connection pads 310 in the center of the inductor coils may reduce the parasitic resistance by up to 30-50% of the coil resistance compared to other implementations of the inductor coil built on PMIC silicon without a gap in the center of the inductor coil.FIG. 4 shows 400 the pad arrangement in the middle of a spiral inductor coil 420. The main reason for reducing parasitic resistance in the disclosure is the possibility of connecting the supply rails 430 to the pad 410 inside the inductor, with the shortest possible connection. In most inductor designs, the inductor pads are either on opposite sides (solenoid or strip line) or on the same side (toroid or spiral), meaning that connections to supply pads require a longer connection path, resulting in a higher resistance. In addition, in these designs, the presence of a magnetic core may make it impossible to have a clearance in the center of the device, which may minimize the connection path.In a comparison between a solenoid (magnetic core based) inductor and an air coil spiral inductor, both constructed on silicon, experimental results confirm that an additional connection resistance of 5-10 mΩ is required for the case of the solenoid inductor connected to its supply pads. This is a significant problem because the inductor resistance alone is 20 mΩ and with the additional supply trace, the total inductor resistance increases to 25-30 mΩ or 30-50% of the total inductor resistance.The additional resistance of 5-10 mΩ is not present in the air coil spiral inductor because the pads may be located in the center of the coil. Further, the additional resistance of the power trace affects the overall Q factor (in terms of AC power dissipation value) of the device at higher frequencies. The Q factor of the inductor is given as the additional connection path contributes to the overall AC resistance of the device, resulting in a lower Q factor of the device with reduced efficiency.FIG. 5A shows 500 a cross-section of an integrated voltage regulator (IVR) circuit including a power management integrated circuit (PMIC) and metal layers 1- 6 (although other number of metal layers may also be used), with inductor metal layers (with air coils) built over the PMIC. It shows the full cross-section of a typical PMIC in and on a silicon substrate with an integrated coil processed on the IC metal layers. The metal layers 530 are PMIC layers and the AP layer 520 is the connection / bypass layer to the inductor and capacitor from the PMIC. Finally, the metal layers (PPI1, PPI2) 510 represent thereon the inductor layers, which in this case are a two-stage spiral inductor, with a space in the middle for the supply pads. It should be noted that the inductor may also be formed by a single metal layer.FIG. 5B shows 550 how a magnetic core is formed winding the windings. The inductor is formed after completion of all metal layers required in the PMIC and is described below.FIGS. 5C and 5D show a circuit diagram showing a typical PMIC connected to an inductor, the inductor output, and VSS / VDD connections. The inductor and power switches of buck configuration 575 are shown in FIG. 5C and boost configuration 585 in FIG. 5D. In conventional switch-mode power supplies (SMPS), the power switches and control circuitry are integrated into the PMIC. For the present invention, an air core inductor L is also integrated into the PMIC.FIG. 6 shows 600 step 1 after the formation of the PMIC and before the fabrication process of the inductor layers, where 620 is the AP layer for connecting / bypassing to / to the inductor and capacitor from the PMIC and 630 is the PMIC metal layers. This step is to integrate the spiral inductor coil by depositing a metal interconnect or bypass AP layer that connects the PMIC to passive elements such as the inductors and capacitors.FIG. 7 shows 700 step 2 of depositing and patterning copper (or other metals such as silver PPI1) layers 710 and the dielectric layer (PM1) 715 in the fabrication process of the inductor layers. After the application of the AP layer in step 1, step 2 is used to apply the first metal layer of the inductor (PPI1) and the supply pads.FIG. 8 shows 800 step 3 for depositing the dielectric layers PM 2- 1, PM 2- 2 816 in the manufacturing process of the inductor layers. Step 3 is used to deposit the non-conductive dielectric layers PM 2- 1, PM 2- 2 and isolate the first inductor metal layer PPI 1 and then form openings for the inductor I / O pads and supply pads.FIG. 9 shows 900 step 4 of depositing copper (or other metal PPI2) layers 918 and the dielectric layer (PM3) 917 in the fabrication process of the inductor layers. Step 4 is used to apply the second metal layer PPI2 of the inductor and the supply pads, together with filling the metal vias connecting the two metal layers PP1 and PP2. The upper metal layer is insulated using a second dielectric layer PM 3.FIG. 10 shows 1000 step 5 of applying the under bump metallurgy (UBM) 1021 and the solder ball 1019 in the manufacturing process of the inductor layers. Step 5 is the final step used to apply the metallization to the I / O pads of the entire structure and solder balls to the pads (bump).FIG. 11 is a flow diagram 1100 of a method, not claimed, for constructing an integrated voltage regulator with an integrated air core inductor. The steps include 1110 forming an integrated voltage regulator in and on a silicon substrate. The steps include 1120 forming an integrated air core inductor over the integrated voltage regulator, the air core inductor having a spiral shape and a space in the center of the spiral shape. The steps also include 1130 forming at least one supply connection pad of the integrated voltage regulator in the space.The main advantage of one or more embodiments of the present disclosure includes reduced parasitic link interference and lower electromagnetic interference (EMI). By using integrated air coils in the integrated voltage regulator, the entire device can be either compact ("packed") or monolithically built with the application that powers it, for example in a mobile processor. This allows for significant reduction (if not elimination) of power distribution network (PDN) circuits, resulting in lower bill of materials (BOM) and overall improved efficiency.
Claims
A single / polyphase integrated voltage regulator with an integrated air core inductor, comprising: an integrated voltage regulator (300) on a silicon substrate (330); and an integrated air core inductor (320) built on top of the integrated voltage regulator, wherein the integrated air core inductor comprises: a spiral shape, and a gap in the middle of the spiral shape; and wherein the integrated voltage regulator has at least one supply connection pad (310) in the gap in the middle of the spiral design of the integrated air core inductor, and wherein the integrated air core inductor further comprises a magnetic core that wraps around the windings (550) of the integrated air core inductor.The single / polyphase integrated voltage regulator of claim 1, wherein the integrated voltage regulator comprises a Power Management Integrated Circuit (500).The single / polyphase integrated voltage regulator of claim 1 or 2, wherein each phase of the single / polyphase integrated voltage regulator has a single air core integrated inductor at its output.The single / polyphase integrated voltage regulator of any of claims 1 to 3, wherein the air core integrated inductor has a circular or "track" shape (210, 110).The single / polyphase integrated voltage regulator of any of claims 1 to 4, wherein the supply connection pad (410) is connected in the space in the middle of the spiral arrangement of the integrated air core inductor to minimize a connection path.The single / polyphase integrated voltage regulator of any of claims 1 to 5, wherein the air core integrated inductor comprises a plurality of metal layers connected in parallel to supply connection pads.The single / polyphase integrated voltage regulator of any of claims 1 to 5, wherein the air core integrated inductor comprises a single metal layer connected in parallel to supply connection pads.The single / polyphase integrated voltage regulator of any of claims 1 to 7, further comprising a second integrated air core inductor formed adjacent the first integrated air core inductor to generate a pair of adjacent coils configured for EMI suppression.The single / polyphase integrated voltage regulator of claim 8, further comprising one or more additional pairs of adjacent coils to form even numbers of adjacent coils to provide a negative coupling, wherein two adjacent sets of the even numbers of the air core integrated inductors are configured to provide a positive coupling.A method of constructing a single / polyphase integrated voltage regulator with an integrated air core inductor, comprising: forming an integrated voltage regulator (300) in and on a silicon substrate (330); forming an integrated air core inductor (320) constructed on top of the integrated voltage regulator, the air core inductor having a spiral shape and a gap in the middle of the spiral shape; forming at least one supply connection pad (310) of the integrated voltage regulator in the gap; and forming a magnetic core around the windings (550) of the integrated air core inductor.The method of claim 10, wherein forming an air core integrated inductor comprises: depositing and patterning a first inductor metal layer (710) and a dielectric layer PM1 (715); depositing second and third dielectric layers (816) over the dielectric layer PM1; depositing and patterning a second inductor metal layer (918) and a dielectric layer PM3 (917) over the third dielectric layer; and forming an under bump metallurgy (1021) and a solder ball (1019) connected to the air core integrated inductor.The method of claim 10 or 11, wherein the first and second inductor metal layers comprise copper or silver.The method of any of claims 10 to 12, wherein the voltage regulator integrated comprises a power management integrated circuit.The method of any of claims 10 to 13, wherein the spiral shape has a circular or "race track" design.The method of any of claims 10 to 14, further comprising configuring the integrated air core inductor with an even number of coils for EMI suppression.The method of claim 15, further comprising an arrangement wherein the integrated air core inductors are arranged in sets of two in a row, wherein the integrated air core inductors in each set are configured for negative coupling and two adjacent sets of the integrated air core inductors are configured for positive coupling.
Citation Information
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