Preventing inter-loop interference in a multi-feedback loop system
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- RENESAS DESIGN (UK) LTD
- Filing Date
- 2021-03-24
- Publication Date
- 2026-07-09
AI Technical Summary
Multi-feedback loop power converter systems face challenges in maintaining accurate output regulation under rapid dynamic load changes, leading to potential overshoot, undershoot, and loop instability due to unintended interactions between feedback loops.
A power converter system with dedicated error amplifiers, capacitive elements, and tracking amplifier circuits that manage feedback signals through selection and accelerated charging/discharging based on differential thresholds to prevent loop interference.
Minimizes transition delays and prevents unintended loop interactions, ensuring stable output regulation even under rapid operating condition changes, enhancing system performance.
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Abstract
Description
Related patent application
[0001] This application refers to US patent application serial no. 17 / 106,837 (DS20-023S), filed on November 30, 2020, which is owned by a common successor and is incorporated herein by reference in its entirety. Technical area
[0002] This document relates to power converters. In particular, this document relates to power converter systems with two or more feedback loops. background
[0003] Power converter systems are designed to maintain a well-regulated output while maintaining high operating efficiency. Furthermore, output regulation must be maintained under a wide range of operating conditions, including, but not limited to, input voltage and output load conditions. Fig. Figure 1 shows an example of a system with two feedback loops, where - depending on the operating conditions - one of the two feedback loops is selected to provide an error signal to the pulse width modulation (PWM) logic.
[0004] Power converter systems employing multiple feedback loop circuits meet these stringent requirements because each feedback loop is optimized for a specific operating condition. The operating condition is monitored, and the most suitable feedback loop is selected to provide the error signal to the modulation control device. Several key factors must be considered for multi-feedback systems. First, the most appropriate feedback loop should be selected based on the current operating condition. Second, the system should transition adaptively from one feedback loop to another. And third, the system should ensure that the transitions do not create adverse conditions, such as extreme undershoot or overshoot, or loop instability.
[0005] For changes in operating conditions that are relatively small and slow in time, these factors do not pose significant challenges. However, today's portable devices require low power consumption and high power output. This places an enormous strain on the power converter system, as it is subjected to dynamic load changes that are significant in both magnitude and slew rate. Summary
[0006] This document addresses the technical problems mentioned above. Specifically, it addresses the technical problem of providing a multi-feedback loop power converter that minimizes the risk of a controlled parameter deviating from its specified accuracy limit when the system is subjected to rapid changes in operating conditions. More specifically, this document aims to prevent unintended interaction between different feedback loops, which can lead to current or voltage overshoots / undershoots.
[0007] According to one aspect, a power converter is presented. The power converter can include a first error amplifier and a first capacitive element, wherein the first error amplifier is configured to generate a first error current for charging the first capacitive element based on a first reference value and a first feedback signal. The power converter can include a second error amplifier and a second capacitive element, wherein the second error amplifier is configured to generate a second error current for charging the second capacitive element based on a second reference value and a second feedback signal. The power converter can include a selection circuit configured to generate a selection signal by comparing a first voltage of the first capacitive element with a second voltage of the second capacitive element.The power converter may include a first tracking amplifier circuit configured to provide an additional current path from a supply rail to the first capacitive element for accelerated charging of the first capacitive element.
[0008] The power converter may include a first feedback circuit, which incorporates the first error amplifier. For example, the first feedback circuit may be configured to derive the first feedback signal directly or indirectly from an output voltage or current of the power converter. Alternatively or additionally, the first feedback circuit may be configured to derive the first feedback signal directly or indirectly from an input voltage or current of the power converter.
[0009] The power converter may include a second feedback circuit, which incorporates a second error amplifier. For example, the second feedback circuit may be configured to generate a second feedback signal that differs from the first. Again, the second feedback signal may be derived from one or more of the following: the input voltage, the input current, the output voltage, and the output current of the power converter.
[0010] The described power converter can be used, for example, in a battery charger. The first feedback circuit can be configured to regulate a constant output voltage of the power converter during a constant voltage (CV) operating mode. During CV mode, the output current can be variable. The second feedback circuit can be configured to regulate a constant output current of the power converter during a constant current (CC) operating mode. During CC mode, the output voltage can be variable.
[0011] The power converter may also include a second tracking amplifier circuit configured to provide an additional current path from the supply rail to the second capacitive element for accelerated charging of that element. In general, the power converter may include a variety of feedback circuits, each with an error amplifier, a capacitive element, and a tracking amplifier circuit for accelerated charging of that respective capacitive element. By using dedicated tracking amplifier circuits to increase the error currents, varying bandwidths (i.e.,The response rates of the feedback circuits are compensated, and all capacitive elements can be charged at similar charging rates, thus preventing unintentional switching between different feedback circuits when the power converter is subjected to rapid changes in operating conditions.
[0012] For example, the first error amplifier can be configured to generate the first error current based on a difference between the first reference value and the first feedback signal. Similarly, the second error amplifier can be configured to generate the second error current based on a difference between the second reference value and the second feedback signal.
[0013] For example, the first terminal of the first capacitive element can be coupled to an output of the first error amplifier. Specifically, the power converter can have a compensation resistor coupled between the output of the first error amplifier and the first terminal of the first capacitive element. The first terminal of the first capacitive element can also be coupled to an input of the selector circuit (for example, if no compensation resistor is provided). Again, the compensation resistor can be coupled between the first terminal of the first capacitive element and the input of the selector circuit. A second terminal of the first capacitive element can be connected to a reference potential, such as ground.
[0014] Similarly, the first terminal of the second capacitive element can be connected to an output of the second error amplifier. The first terminal can also be connected to an input of the selection circuit. The second terminal of the second capacitive element can be connected to a reference potential.
[0015] In this document, the term "reference potential" is understood in its broadest possible sense. Specifically, the reference potential is not limited to ground, i.e., a reference potential with a direct physical connection to earth. Furthermore, the reference potential is not limited to a potential / voltage of 0V. Rather, the term "reference potential" can refer to any reference point to which and from which electrical currents can flow or from which voltages can be measured. It should also be noted that the reference potentials mentioned in this document do not necessarily refer to the same physical contact. Instead, the reference potentials mentioned in this document may refer to different physical contacts, although for the sake of simplicity, "the" reference potential is used.
[0016] The first error amplifier can be a voltage-controlled current source (VCCS), such as an operational transconductance amplifier (OTA). This means the first reference value can be a first reference voltage value, and the first feedback signal can be a first feedback voltage. Similarly, the second error amplifier can be a VCCS, such as an OTA; the second reference value can be a second reference voltage value, and the second feedback signal can be a second feedback voltage.
[0017] The first and second capacitive elements can be, for example, capacitors or other devices that can store electrical energy in an electric field.
[0018] The first trace amplifier circuit can be configured to suppress the additional current path from the supply rail to the first capacitive element if the selection signal indicates that the first fault current is used to control a power stage of the power converter. Alternatively or additionally, the first trace amplifier circuit can be configured to enable the additional current path from the supply rail to the first capacitive element if the difference between the first reference value and the first feedback signal exceeds a predefined activation threshold.More precisely, the first tracking amplifier circuit can be configured to establish the additional current path only when the difference between the first reference value and the first feedback signal exceeds the predetermined activation threshold, and not to establish the additional current path when the difference between the first reference value and the first feedback signal does not exceed the predetermined activation threshold.
[0019] The first tracking amplifier circuit may include a charging transistor coupled between the supply rail and the first capacitive element. Depending on a control signal applied to a control terminal of the charging transistor, the charging transistor may be configured to connect the supply rail to the first capacitive element for accelerated charging of the first capacitive element, or to isolate the supply rail from the first capacitive element to interrupt accelerated charging. As discussed earlier, interrupting accelerated charging may be necessary if the feedback loop associated with the first capacitive element is currently selected by the selector circuit to control the power stage of the power converter.Furthermore, interrupting the accelerated charging can be advantageous if a signal difference at the input of the first error amplifier is smaller than the specified activation threshold.
[0020] The charging transistor can be, for example, a CMOS transistor. In particular, the charging transistor can be a p-type CMOS transistor. The control terminal of the charging transistor can be its gate, and a controlled section of the charging transistor can be coupled between the supply rail and the first capacitive element. For example, the source of the charging transistor can be coupled to the supply rail, and the drain of the charging transistor can be coupled to the first capacitive element. The charging transistor can operate as a switch, so that either a high-impedance or a low-impedance electrical connection is established between the drain and source of the charging transistor; that is, the charging transistor can be configured to be either on or off. Alternatively, the active operating mode of the charging transistor can also be in saturation (i.e., linear or analog mode) instead of triode / cutoff (i.e., as an on or off switch).In other words, the tracking amplifier (including the charging transistor and its control amplifier) can also operate as a linear amplifier when active.
[0021] The first tracing amplifier circuit can further include an amplifier. An output of the amplifier can be coupled to a control terminal of the charging transistor. A voltage specifying the first fault current can be applied to a first input of the amplifier. A voltage associated with the predetermined activation threshold can be applied to a second input of the amplifier. The voltage associated with the predetermined activation threshold can be generated by a voltage source coupled to the second input of the amplifier.
[0022] The first trace amplifier circuit can include a current-controlled current source (CCCS) and a resistive element. For example, the CCCS can be implemented using a current mirror. An input current to this current mirror can be the output current of the trace amplifier. The first trace amplifier circuit can be configured to generate the voltage indicating the first trace current by—in a first step—generating, using the CCCS, an intermediate current associated with the first trace current, and—in a second step—translating, using the resistive element of the first trace amplifier circuit, the intermediate current into the voltage indicating the first trace current.
[0023] The power converter may further include a first limiting circuit configured to limit the initial voltage of the first capacitive element to a first threshold value. For example, the first limiting circuit may be an upper limiting circuit configured to limit the initial voltage so that it does not exceed the first threshold value. Simultaneously, the first limiting circuit may be configured neither to limit nor affect the initial voltage if the fault signal is below the first threshold value.
[0024] Alternatively, the first limiting circuit can be a lower limiting circuit configured to limit the first voltage so that it does not fall below the first threshold. Simultaneously, the first limiting circuit can be configured not to limit or affect the first voltage if the fault signal is greater than the first threshold.
[0025] The first limiting circuit can include a limiting transistor coupled between the first capacitive element and a reference potential. The first limiting circuit can include an error amplifier coupled to a control terminal of the limiting transistor. The error amplifier can be configured to compare the first voltage of the first capacitive element with the first threshold. The error amplifier can be configured to generate a continuous analog control signal to control the control terminal of the limiting transistor based on an amplified difference between the first voltage of the first capacitive element and the first threshold.
[0026] The first tracking amplifier circuit can be configured to interrupt the additional current path from the supply rail to the first capacitive element when the first limiting circuit limits the first voltage of the first capacitive element to the first threshold. By interrupting the additional current path, an overload of the supply rail can be prevented if the first voltage of the first capacitive element attempts to exceed the first threshold, and the first limiting circuit actively limits the first voltage of the first capacitive element to the first threshold.
[0027] The first tracking amplifier circuit can further include a current mirror and another transistor. A first branch of the current mirror can be coupled between the supply rail and the control terminal of the charging transistor. A second branch of the current mirror can be coupled to a reference potential via a current path from the supply rail through a controlled section of the second transistor. A control terminal of the second transistor can be coupled to the control terminal of the limiting transistor of the first limiting circuit.
[0028] The power converter may further include a first threshold generator circuit configured to generate the first threshold value as a function of the first fault current. The first threshold generator circuit can be configured to generate the first threshold value such that it increases as the first fault current increases. For example, the first threshold value may be a first threshold voltage, and the first fault current may depend on the difference between a first feedback voltage (representing the first feedback signal) and a first reference voltage (representing the first reference value). In other words, the first fault amplifier may be a voltage-controlled current source (VCCS), such as an operational transconductance amplifier (OTA).The first threshold generator unit can then be configured to increase the first threshold voltage when the first fault current increases, and to decrease the first threshold voltage when the first fault current decreases.
[0029] The first threshold generator circuit can be configured to generate the first threshold such that the first threshold is proportional to the first fault current.
[0030] The first threshold generator circuit can include a current mirror configured to generate a mirror current based on the first fault current. The first threshold generator circuit can include a resistive element configured to translate the mirror current into the first threshold value. The current mirror can be based on CMOS or bipolar technology, for example. The current mirror can include a first mirror transistor configured to translate the first fault current into a corresponding voltage, and a second mirror transistor configured to translate the corresponding voltage into the mirror current. The resistive element can be any type of resistor or a diode-connected transistor. The resistive element can be coupled between an output of the selection circuit and the first threshold circuit.
[0031] The power converter can further include an additional reference current source coupled to the resistive element. This additional reference current source makes it possible to add a constant offset voltage to the first threshold, which, in addition to this constant offset voltage, can be linearly dependent on the first fault current.
[0032] The current mirror can be connected to the resistive element such that the mirror current flows through the resistive element, generating a voltage difference between the output of the selector circuit and the first limiting circuit. The selector circuit can be configured to generate an output voltage at one of its outputs that represents the selected signal. In other words, the output voltage can be associated with the selected fault signal, i.e., either the first or the second fault signal. The voltage difference generated by the resistive element can then be added to (or subtracted from) the output voltage at the selector circuit output and can serve as the first threshold applied to the first limiting circuit.
[0033] The selector circuit can include a unity-gain amplifier. The first voltage of the first capacitive element can be applied to a first non-inverting input of the unity-gain amplifier. The second voltage of the second capacitive element can be applied to a second non-inverting input of the unity-gain amplifier. An output signal of the unity-gain amplifier can be fed back to an inverting input of the unity-gain amplifier. In other words, the open-loop gain of the selector amplifier can be very high, but the closed-loop gain can be one due to the feedback. Preferably, the selector circuit can only pass on the input signal with the lowest value. The other signals can be processed by the amplifier.
[0034] The power converter may further include a modulator circuit configured to generate one or more control signals, based on the selection signal, for controlling a power stage of the power converter. The power converter may further include a high-side switching element, a low-side switching element, and an inductor. The high-side switching element may be coupled to a switching node. The low-side switching element may be coupled between the switching node and a reference potential. The inductor may be coupled to the switching node.
[0035] The high-side switching element, the low-side switching element, and the inductor can form part of the power stage of the power converter. Depending on the type of power converter, the switching elements and the inductor can be arranged in different ways. For example, the power converter can be a buck converter, configured to step down an input voltage to a lower output voltage. Simultaneously, the output current of the buck converter can be greater than the input current. In this scenario, the high-side switching element can be connected between the input of the power converter and the switching node, and the inductor can be connected between the switching node and the output of the power converter.
[0036] As another example, the power converter can be a boost converter, configured to step up the input voltage to a higher output voltage. In this case, the output current of the boost converter can be lower than its input current. The inductor can be connected between the input and the switching node, and the high-side switching element can be connected between the switching node and the output. Of course, the power converter can also be a buck-boost converter, or any other type of power converter with a suitable converter topology.
[0037] Each switching element can be implemented with any suitable device, such as a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), a MOS-gate thyristor, or any other suitable power device. Each switching element can have a control terminal to which a respective drive voltage or control signal can be applied to turn the switching element on (i.e., close the switching element) or turn the switching element off (i.e., open the switching element).
[0038] According to another aspect, a method for operating a power converter is described. The method may include steps corresponding to the functional characteristics of the power converter described in this document. In particular, the power converter may include a first error amplifier, a first capacitive element, a second error amplifier, a second capacitive element, a selection circuit, and a first tracking amplifier circuit. The method may include generating, by the first error amplifier, based on a first reference value and a first feedback signal, a first error current to charge the first capacitive element. The method may include generating, by the second error amplifier, based on a second reference value and a second feedback signal, a second error current to charge the second capacitive element.The method may include generating a selection signal, via a selection circuit, by comparing a first voltage of the first capacitive element and a second voltage of the second capacitive element. The method may also include establishing, via a first tracking amplifier circuit, an additional current path from a supply rail to the first capacitive element for accelerated charging of the first capacitive element.
[0039] The method may include not establishing the additional current path from the supply rail to the first capacitive element if the selection signal indicates that the first fault current is used to control a power stage of the power converter. The method may also include establishing the additional current path from the supply rail to the first capacitive element if a difference between the first reference value and the first feedback signal exceeds a predefined activation threshold.
[0040] The method may include a charging transistor coupled between the supply rail and the first capacitive element. The first tracking amplifier circuit may further include an amplifier. The method may include coupling an output of the amplifier to a control terminal of the charging transistor. The method may include applying a voltage, specifying the first fault current, to a first input of the amplifier. The method may include applying a voltage associated with the specified activation threshold to a second input of the amplifier.
[0041] The first tracing amplifier circuit may include a current-controlled current source (CCCS) and a resistive element. The method may include generating the voltage representing the first fault current by (a) generating, using the CCCS, an intermediate current associated with the first fault current, and (b) translating, using the resistive element, the intermediate current into the voltage representing the first fault current.
[0042] The method may include limiting the initial voltage of the first capacitive element to a first threshold value by means of a first limiting circuit. The method may include coupling a transistor between the first capacitive element and a reference potential. The method may include coupling an error amplifier to a control terminal of the transistor, the error amplifier being configured to compare the initial voltage of the first capacitive element with the first threshold value.
[0043] The method may include interrupting the additional current path from the supply rail to the first capacitive element when the first limiting circuit limits the first voltage of the first capacitive element to the first threshold value. The first tracking amplifier circuit may further include a current mirror and another transistor. The method may include coupling a first branch of the current mirror between the supply rail and the control terminal of the charging transistor. The method may include coupling a second branch of the current mirror to a current path from the supply rail, through a controlled section of the second transistor, to a reference potential. The method may include coupling a control terminal of the second transistor to the control terminal of the transistor in the first limiting circuit.
[0044] The method can include generating the first threshold value, dependent on the first fault current, by means of a first threshold generator circuit. In particular, the method can include generating the first threshold value by the first threshold generator circuit such that the first threshold value increases as the first fault current increases. The method can include generating a mirror current based on the first fault current by means of a current mirror. The method can include translating the mirror current into the first threshold value by means of a resistive element. The method can include coupling the latter resistive element between an output of the selection circuit and the first limiting circuit.
[0045] The selection circuit can include a unity-gain amplifier. The method can involve applying the first voltage of the first capacitive element to a first non-inverting input of the unity-gain amplifier. Alternatively, the compensation resistor can be coupled to the selection circuit. In general, the voltage of the compensation network (e.g., the compensation resistor and the capacitor) can be applied to the input of the selection circuit. The method can involve applying the second voltage of the second capacitive element to a second non-inverting input of the unity-gain amplifier. The method can involve feeding back an output signal of the unity-gain amplifier to an inverting input of the unity-gain amplifier.
[0046] The method may include generating, by means of a modulator circuit, one or more control signals based on the selection signal for controlling a power stage of the power converter. The power converter may further include a high-side switching element, a low-side switching element, and an inductor. The method may include coupling the high-side switching element to a switching node. The method may include applying the low-side switching element between the switching node and a reference potential. The method may include applying the inductor to the switching node.
[0047] It should be noted that the methods and systems, including their preferred embodiments, as set forth in this document, can be used independently or in combination with the other methods and systems disclosed herein. Furthermore, the features set forth in the context of a system are also applicable to a corresponding method. Moreover, all aspects of the methods and systems set forth in this document can be combined arbitrarily. In particular, the features of the claims can be combined arbitrarily.
[0048] In this document, the term “couple” or “coupled” refers to elements that are in electrical communication with each other, either directly connected, e.g. via wires, or in some other way. List of characters
[0049] The present invention is illustrated in an exemplary and non-limiting manner in the figures of the accompanying drawings, in which the same reference numerals refer to the same or identical elements and in which: Fig. Figure 1 shows an example of a power converter with two feedback loops; Fig. Figure 2 shows an example of a power converter with a large number of feedback loops; Fig. 3 shows an exemplary implementation of an error amplifier, a selection circuit, a limiting circuit and a threshold generator circuit; Fig. 4 shows another exemplary implementation of an error amplifier, a selection circuit, a limiting circuit and a threshold generator circuit; Fig. 5 simulation results showing unwanted loop interactions; Fig. Shows 6 components of a power converter with a tracking amplifier circuit; Fig. 7 alternative components of a power converter with a tracking amplifier circuit are shown; Fig. 8 simulation results with loop interactions are shown; and Fig. Figure 9 shows a flowchart for a procedure to prevent inter-loop interference in a multi-feedback loop system. Detailed description
[0050] Fig. Figure 2 shows an example of a power converter 200 with a plurality of feedback loops 205, represented by feedback loops 1, 2, and n. The input to the feedback loops is a number of feedback signals 230. The outputs of the feedback loops 205 are fed into the feedback loop selection block (selection circuit) 210. Once the appropriate feedback loop has been determined, the feedback signal is fed into the modulation control device(s) (modulator circuit) 215, which provides the control signals to the power stage(s) 220 to provide output control.
[0051] For the purposes of this invention, we focus on the feedback loops and the feedback loop selection functions. Fig. Figure 3 shows a detailed representation of the feedback selection block 210 of Fig. 2. In particular, it shows Fig. Figure 3 shows an exemplary implementation of an error amplifier 301, a minimum selection circuit 302, a limiting circuit 303, and a threshold generator circuit 304. For the feedback signals that are not currently controlling the modulator control device 215, the control parameter represented by FB_1, FB_2, and FB_n can be lower than the reference voltages VDAC_1, VDAC_2, and VDAC_n, respectively. In general, the feedback signal (FB_n) can be applied to the non-inverting input of the error amplifier 301, so that the task of the entire loop is to prevent the feedback signal from falling below the reference voltage. All feedback loops can have a similar structure. When feedback loop 1 is not in control, the error amplifier 301 can supply the current IEA_1 for feedback loop 1 to the compensation network RC_1 and CC_1.The current IEA for the feedback loop whose control signal is currently used to modulate the power stages (e.g., feedback loop 2) can be OA in the stable or steady state. For example, if the control signal of loop 2 has been selected for use in modulating the power stage, the current IEA_2 can be equal to OA. Furthermore, the output signal voltage of the error amplifier of feedback loop 2, VEA_2, as well as the voltage of the minimum selection amplifier (MINSEL_OUT), can be lower than the voltages VEA of all other feedback loops. Consequently, the following equations apply: VEA_2 < VEA_1, n and MINSEL_OUT < VEA_1, n. If VEA_Loop1 ≥ MINSEL_OUT + RGM*IREF, the relative upper clamp (RUC) amplifier diverts the current IEA_1 to prevent the capacitive element CC_1 from charging more than necessary.This process can be repeated for all currently unselected feedback loops. To prevent error signals from the currently unselected feedback loops from inadvertently interfering with the error signal of the currently selected feedback loop, the offset voltage IREF*RGM should be set significantly higher than 0V, for example, 200mV.
[0052] Although selecting a relatively large offset voltage IREF*RGM>> 0 ensures that feedback signals from unselected feedback loops do not interfere with the selected control signal, this can have a significant disadvantage. If the operating conditions change such that a transition from one feedback loop to another is required, IREF*RGM » 0 introduces a long transition delay because the voltage VEA of a newly desired feedback loop must fall below the voltage VEA of the currently active feedback loop in order to take over control.
[0053] Long transitions from one feedback loop to another introduce a delay in the power supply's ability to respond to sudden changes in operating conditions. For example, the output load is assumed to have been under a no-load or light-load condition and then subjected to a significant dynamic load change up to the maximum load. It may be desirable to limit the input current overshoot, which requires a change in the "in-control" feedback loop. The delay in transitioning to the feedback loop optimized for controlling input current parameters can limit the responsiveness.
[0054] In summary, multi-feedback loop power converter systems, such as a battery charger, can control one of several parameters depending on the operating conditions. Furthermore, precautions must be taken to prevent interference from control signals from unselected feedback loops. To maintain a singular control signal, [the following is shown]. Fig. 3. The implementation of a fixed guard band for unselected feedback loops. However, this guard band introduces a delay during the transition from one feedback loop to another. These delays negatively impact output control, especially when operating conditions change significantly.
[0055] In engineering, a method is needed to ensure that multi-loop controllers accelerate the transition from one control loop to another in order to reduce control transition errors.
[0056] The present invention describes a power converter system that retains all the advantages of prior art multi-feedback loop systems. It is improved over prior art systems by minimizing the delay time of a transition from one feedback loop to another. Reducing the transition delay improves system performance, which is particularly critical in high-power power supply systems. The transition delay is achieved while ensuring that unselected feedback loops do not interfere with the feedback signal of the selected feedback loop.
[0057] To reiterate a key concept for a feedback loop to assume control, the differential input overdrive voltage (VOD = VDAC - VFB) of this loop may need to fall to OV or become negative, and the voltage VEA signal must fall to the MINSEL_OUT level. For example, VOD must be negative enough to produce a voltage change in the compensation network that can be as high as IREF*RGM. The further VOD falls below OV, the higher the feedback voltage VFB will be above the control setpoint of VDAC (which may correspond to an overshoot condition).
[0058] Fig. Figure 4 shows another exemplary implementation according to the principles of the present invention. Fig. Figure 4 shows an error amplifier 501, a minimum selection circuit 502, a limiting circuit 503, and a threshold generator circuit 504. The circuit shown minimizes the feedback loop transition time by minimizing ΔV, i.e., (IREF*RGM). Minimizing ΔV reduces the overshoot of the feedback voltage VFB when a rapid change occurs, such as a sudden change in the output load. Furthermore, another critical feature is that the circuit in Fig. 4 ensures that VREF_UPCLAMP is sufficiently large so that none of the non-actively controlling VEA signals unintentionally interfere with the VEA signal in control (due to ripple, transient noise coupling, offsets, etc.) during stable operation.
[0059] As in Fig. As shown in Figure 4, the threshold generator circuit 504 can include a mirror block 510, which can provide a suitable current mirror for dynamically controlling ΔV by using a mirror current of the error amplifier's output current IEA, thereby setting VREF_UPCLAMP proportional to VOD = VDAC - VFB. As the voltage VOD becomes increasingly positive, the VEA signal of the non-in-control loop is allowed to rise higher relative to MINSEL_OUT. This reduces the risk of unintended loop interaction. Conversely, as the voltage VOD decreases, VREF_UPCLAMP decreases to allow for a faster loop transition. Since IEA complements IREF, IREF can be smaller than for the original relative limiting scheme, which is used in the context of Fig. 3 is being discussed.
[0060] For both in Fig. 3 and Fig. In the 4 implementations shown, precautions should be taken to ensure that the control signal from the selected feedback loop is not disturbed by a control signal from a non-selected feedback loop.
[0061] Consider, for example, a case where feedback loop_1 is selected and the voltage VEA_1 is used to control the power stage, and the power converter is subjected to a rapid load increase. If VEA_1 controls the regulator's output voltage, then a decrease in the output voltage leads to an associated increase in the differential voltage VOD. Subsequently, the error amplifier output current IEA_1 increases and responds with the compensation network, causing the voltage VEA_Loop1 to suddenly rise by VOD1*(RC_1 / RGM1).
[0062] An unselected fault signal, VEA_Loop2, can be higher than the voltage VEA_Loop1 before the operating condition step. After the step, the voltage VEA_Loop2 may not remain above VEA_Loop1 if the fault current IEA_2 is too small. This results in a relatively slow change in V(CC_2): ΔV / Δt = IEA_2 / CC_2. Consequently, Loop2 briefly assumes control of the step-down control, leading to a degradation of the step response of Loop1. Preferably, Loop1 should retain control of the step-down control before, during, and after the operating condition step. Fig. Figure 5 shows an example of unintended interference by an unselected feedback loop, where 520 shows excessive overshoot on VDDM, 525 shows excessive undershoot on VDDM, and 530 shows where a limited slew current to the compensation capacitor prevents VEA_ABCC from remaining above VEA_CV.
[0063] Therefore, what is still needed in engineering is a method to prevent the control signal from the selected feedback loop from being replaced by a control signal from a non-selected feedback loop.
[0064] The present invention improves prior art power converters with multi-feedback loops by ensuring that unselected feedback loops do not interfere with the control signal of the selected feedback loop. Furthermore, the invention describes a power converter system that retains all the advantages of prior art multi-feedback loop systems.
[0065] The Fig. 6 and Fig. Figure 7 shows further non-restrictive embodiments of the invention. Fig. Figure 6 shows a block diagram of Fig. 3 added tracking amplifier circuit 600, and Fig. 7 shows a block diagram of Fig. 4. Added tracking amplifier circuit. In both cases, the exemplary tracking amplifier circuit includes a charging transistor 601, a CCCS 602, an OTA 603, a current mirror 604, and an NMOS transistor 605. Depending on the voltage difference (Vref_1 - FB_1), the OTA 603 (first tracking amplifier) decides whether the charging transistor 601 establishes an additional current path from a supply rail 606 to the capacitive element CC for accelerated charging of the capacitive element CC.
[0066] To prevent loop interaction, the tracking amplifier circuit 600 is provided to "slew" the capacitive element CC for the loop that is not in control (not selected). The tracking amplifier circuit 600 is activated when the voltage K*IEA*RGM exceeds a predetermined threshold voltage VREF_TA, which is provided by a voltage source. The fault current IEA is proportional to the differential voltage VOD. Therefore, the predetermined threshold voltage VREF_TA can be configured to correspond to a specific VOD value (e.g., 10 mV). A second output signal from the limiting circuit can interact with the tracking amplifier circuit 600 to prevent V(CC) from rising above VREF_UPCLAMP.
[0067] Fig. Figure 8 shows some exemplary waveforms of the invention that can prevent a control signal from a non-selected feedback loop from interfering with the error signal from the selected feedback loop. As shown from Fig. As can be seen in Figure 8, the capacitive elements are loaded with a similar scaling rate, with Figure 820 showing excessive overshoot on VDDM, Figure 825 showing excessive undershoot on VDDM, and Figure 830 showing where VEA_ABCC remains above VEA_CV. Consequently, the fault voltages stored on the capacitive elements follow almost parallel lines and do not intersect, effectively preventing unintended loop interactions.
[0068] In summary, the tracking amplifier circuit 600 prevents the output of the error amplifier, when out of control, from interfering with the output signal of the error amplifier that is in control. Furthermore, the tracking amplifier circuit 600 provides a means of controlling the tracking amplifier 603 so that it is only activated when the differential input signal VOD of the error amplifier exceeds a predetermined threshold (e.g., when VOD = VDAC - VFB > 10 mV). The differential input overdrive of an error amplifier is also referred to as VOD in this document.
[0069] Fig.Figure 9 shows a flowchart for a method for preventing inter-loop interference in a multiple feedback loop system. The method may include, as described in Figure 910, the generation, by the first error amplifier, of a first error current to charge the first capacitive element, based on a first reference value and a first feedback signal. The method may also include, as described in Figure 920, the generation, by the second error amplifier, of a second error current to charge the second capacitive element, based on a second reference value and a second feedback signal. The method may also include, as described in Figure 930, the generation, by the selection circuit, of a selection signal by comparing a first voltage of the first capacitive element with a second voltage of the second capacitive element.The method may also include 940, a manufacture, by means of the first tracking amplifier circuit, of an additional current path from a supply rail to the first capacitive element for accelerated charging of the first capacitive element.
[0070] It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. Those skilled in the art will be able to implement various arrangements which, although not explicitly described or shown here, embody the principles of the invention and are included in its meaning and scope. Furthermore, all examples and embodiments presented in this document are intended, in principle, only for illustrative purposes, to assist the reader in understanding the principles of the proposed methods and systems. Moreover, all statements herein that provide for principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to have equivalents.
Claims
[1] A power converter that features - a first error amplifier and a first capacitive element, wherein the first error amplifier is configured to generate a first error current for charging the first capacitive element based on a first reference value and a first feedback signal, - a second error amplifier and a second capacitive element, wherein the second error amplifier is configured to generate a second error current for charging the second capacitive element based on a second reference value and a second feedback signal, - a selection circuit configured to generate a selection signal by comparing a first voltage of the first capacitive element and a second voltage of the second capacitive element, and - a first tracking amplifier circuit configured to provide an additional current path from a supply rail to the first capacitive element for accelerated charging of the first capacitive element. [2] The power converter according to claim 1, wherein the first tracking amplifier circuit is configured to not establish the additional current path from the supply rail to the first capacitive element when the selection signal indicates that the first fault current is to be used to control a power stage of the power converter. [3] The power converter according to claim 1 or 2, wherein the first tracking amplifier circuit is configured to establish the additional current path from the supply rail to the first capacitive element when a difference between the first reference value and the first feedback signal exceeds a predetermined activation threshold. [4] The power converter according to claim 3, wherein the first tracking amplifier circuit has a charging transistor coupled between the supply rail and the first capacitive element. [5] The power converter according to claim 4, wherein the first tracking amplifier circuit further comprises an amplifier, and wherein - an output of the amplifier is coupled to a control terminal of the charging transistor, - a voltage indicating the first fault current is applied to a first input of the amplifier, and - a voltage associated with the specified activation threshold is applied to a second input of the amplifier. [6] The power converter according to claim 5, wherein the first tracking amplifier circuit comprises a current-controlled current source (CCCS) and a resistive element, and wherein the first tracking amplifier circuit is configured to generate the voltage indicating the first fault current by - Generating, using the CCCS, an intermediate current associated with the first fault current, and - Translate, using the resistance element, the intermediate current into the voltage that indicates the first fault current. [7] The power converter according to any one of claims 4 to 6, further comprising a first limiting circuit configured to limit the first voltage of the first capacitive element to a first threshold value. [8] The power converter according to claim 7, wherein the first limiting circuit comprises: - a transistor coupled between the first capacitive element and a reference potential, and - an error amplifier coupled to a control terminal of the transistor, wherein the error amplifier is configured to compare the first voltage of the first capacitive element and the first threshold. [9] The power converter according to claim 7 or 8, wherein the first tracking amplifier circuit is configured to cut off the additional current path from the supply rail to the first capacitive element when the first limiting circuit limits the first voltage of the first capacitive element to the first threshold. [10] The power converter according to claim 8 or 9, wherein the first tracking amplifier circuit further comprises a current mirror and a further transistor, wherein - a first branch of the current mirror is coupled between the supply rail and the control terminal of the charging transistor, - a second branch of the current mirror is coupled to a reference potential on a current path from the supply rail via a controlled section of the further transistor, and - a control terminal of the further transistor is coupled to the control terminal of the transistor of the first limiting circuit. [11] The power converter according to any one of claims 1 to 10, further comprising a first threshold generator circuit configured to generate the first threshold depending on the first fault current. [12] The power converter according to claim 11, wherein the first threshold generator circuit is configured to generate the first threshold such that the first threshold increases as the first fault current increases. [13] The power converter according to claim 11 or 12, wherein the first has a threshold generator circuit - a current mirror configured to generate a mirror current based on the first fault current, and - a resistive element configured to translate the mirror current into the first threshold value. [14] The power converter according to claim 13, wherein the resistive element of the first threshold generator circuit is coupled between an output of the selection circuit and the first limiting circuit. [15] The power converter according to any one of claims 1 to 14, wherein the selection circuit comprises a unity gain amplifier, and wherein - the first voltage of the first capacitive element is applied to a first non-inverting input of the unity gain amplifier, - the second voltage of the second capacitive element is applied to a second non-inverting input of the unity-gain amplifier, and - an output signal of the unity gain amplifier is fed back to an inverting input of the unity gain amplifier. [16] The power converter according to any one of claims 1 to 15, which further comprises - a modulator circuit configured to generate one or more control signals for controlling a power stage of the power converter based on the selection signal. [17] The power converter according to any one of claims 1 to 16, further comprising a high-side switching element, a low-side switching element and an inductor, wherein - the high-sided switching element is coupled to a switching node, - the low-side switching element is coupled between the switching node and a reference potential, and - the inductor is coupled to the switching node. [18] A method for operating a power converter, wherein the power converter has a first capacitive element, a second capacitive element, and wherein the method has - Generating, based on an initial reference value and an initial feedback signal, an initial fault current to charge the first capacitive element, - Generating, based on a second reference value and a second feedback signal, a second fault current to charge the second capacitive element, - Generating a selection signal by comparing a first voltage of the first capacitive element and a second voltage of the second capacitive element, and - Establishing an additional current path from a supply rail to the first capacitive element for accelerated charging of the first capacitive element. [19] The method according to claim 18, which further comprises - Not establishing the additional current path from the supply rail to the first capacitive element when the selection signal indicates that the first fault current is used to control a power stage of the power converter. [20] The method according to claim 18 or 19, which further comprises - Establishing the additional current path from the supply rail to the first capacitive element when a difference between the first reference value and the first feedback signal exceeds a predetermined activation threshold. [21] The method according to claim 20, which further comprises - Provision of a charging transistor coupled between the supply rail and the first capacitive element. [22] The method according to claim 21, wherein a first tracking amplifier circuit further comprises an amplifier, and wherein the method comprises - Coupling an output of the amplifier with a control terminal of the charging transistor, - Applying a voltage representing the first fault current to a first input of the amplifier, and - Applying a voltage associated with the specified activation threshold to a second input of the amplifier. [23] The method according to claim 22, wherein a first tracking amplifier circuit comprises a current-controlled current source (CCCS) and a resistive element, and wherein the method comprises generating the voltage that specifies the first fault current by - Generating, using the CCCS, an intermediate current associated with the first fault current, and - Translate, using the resistance element, the intermediate current into the voltage that indicates the first fault current. [24] The method according to one of claims 21 to 23, which further comprises - Limiting, by means of a first limiting circuit, the first voltage of the first capacitive element to a first threshold value. [25] The method according to claim 24, which has - Coupling a transistor between the first capacitive element and a reference potential, and - Coupling an error amplifier to a control terminal of the transistor, wherein the error amplifier is configured to compare the first voltage of the first capacitive element and the first threshold. [26] The method according to claim 24 or 25, which has - Interrupting the additional current path from the supply rail to the first capacitive element when the first limiting circuit limits the first voltage of the first capacitive element to the first threshold. [27] The method according to claim 25 or 26, wherein a first tracking amplifier circuit further comprises a current mirror and a further transistor, and wherein the method comprises - Coupling a first branch of the current mirror between the supply rail and the control terminal of the charging transistor, - Coupling a second branch of the current mirror on a current path from the supply rail via a controlled section of the further transistor to a reference potential, and - Coupling a control terminal of the second transistor with the control terminal of the transistor of the first limiting circuit. [28] The method according to one of claims 18 to 27, which further comprises - Generating, by means of a first threshold generator circuit, the first threshold value depending on the first fault current. [29] The method according to claim 28, which has - Generating, by means of the first threshold generator circuit, the first threshold such that the first threshold increases when the first fault current increases. [30] The method according to claim 28 or 29, which has - Generating, by means of a current mirror, a mirror current based on the first fault current, and - Translate, through a resistive element, the mirror current into the first threshold value. [31] The method according to claim 30, which has - Coupling the resistive element between an output of a selection circuit and the first limiting circuit. [32] The method according to any one of claims 18 to 31, wherein a selection circuit comprises a unity gain amplifier, and wherein the method comprises - Applying the first voltage of the first capacitive element to a first non-inverting input of the unity gain amplifier, - Applying the second voltage of the second capacitive element to a second non-inverting input of the unity-gain amplifier, and - Feedback of an output signal of the unity-gain amplifier to an inverting input of the unity-gain amplifier. [33] The method according to any one of claims 18 to 32, which further comprises - Generating, through a modulator circuit, based on the selection signal, one or more control signals to control a power stage of the power converter. [34] The method according to any one of claims 18 to 33, wherein the power converter further comprises a high-side switching element, a low-side switching element and an inductor, and wherein the method comprises - Coupling the high-side switching element with a switching node, -Applying the low-side switching element between the switching node and a reference potential, and - Applying the inductor to the switching node.