Semiconductor device

Abstract

Semiconductor device comprising: a copper structure (2); a copper block (4) bonded to the copper structure (2) by means of a first solder (3); an electrode terminal (6) bonded to the copper block (4) by means of a second solder (5); a semiconductor element (8) electrically connected to the copper structure (2);and a sealing resin (13) covering the copper structure (2), the first solder (3), the copper block (4), the second solder (5), the electrode terminal (6) and the semiconductor element (8), wherein an area of ​​a part of the copper block (4) bonded by the first solder (3) is larger than an area of ​​a part of the copper block (4) bonded by the second solder (5), and the semiconductor device further comprising a wire (9) connected to the semiconductor element (8), wherein an upper end of the sealing resin (13) on a part of the electrode terminal (6) bonded by the second solder (5) is lower than the highest part of the wire (9).

Description

Background of the invention Field of the invention The present disclosure relates to a semiconductor device. Description of the state of the art As a semiconductor device such as a power semiconductor device, a semiconductor device has been proposed in which a semiconductor element and a copper block, which is a relatively thick conductive block, are sealed with a sealing resin (for example, Japanese Patent Application Laid-Open No. 2013-131592). Summary A semiconductor device must operate in a high-temperature environment. However, when the sealing resin is cured for high-temperature operation during the manufacturing process, the temperature difference between the initial curing temperature and room temperature is large, so the stress of thermal expansion and contraction of the sealing resin becomes relatively large. Therefore, the stress of the sealing resin is concentrated on the solder used to bond the copper block, and the solder may detach from the copper block. The present disclosure has been made in view of the above problems, and an object thereof is to provide a technique which ensures that the solder is prevented from peeling off from the copper block. The semiconductor device according to the present disclosure includes a copper structure, a copper block bonded to the copper structure by a first solder, an electrode terminal bonded to the copper block by a second solder, a semiconductor element electrically connected to the copper structure, and a sealing resin covering the copper structure, the first solder, the copper block, the second solder, the electrode terminal, and the semiconductor element. An area of a part of the copper block bonded by the first solder is larger than an area of a part of the copper block bonded by the second solder. This prevents the solder from detaching from the copper block. These and other objects, features, aspects and advantages of the present disclosure will become more apparent from the following detailed description of the present disclosure when taken in conjunction with the accompanying drawings. Character list Fig. 1 is a sectional view illustrating a configuration of a semiconductor device according to a first embodiment. Fig. 2 is a sectional view illustrating a configuration of a semiconductor device according to a second embodiment. Fig. 3 is a sectional view illustrating a configuration of a semiconductor device according to a third embodiment. Fig. 4 is a sectional view illustrating a configuration of a semiconductor device according to a fourth embodiment. Description of the preferred embodiments Hereinafter, the embodiments will be described with reference to the attached drawings. The features described in each of the following embodiments are exemplary, and not all features are necessary. Furthermore, in the description to be given below, similar components will be denoted by the same or similar reference numerals in a plurality of embodiments, and mainly different components will be described. Furthermore, in the description to be given below, when terms specify certain positions and directions such as "up," "down," "left," "right," "front," "back," and the like, these do not necessarily correspond to the positions and directions at the time of implementation. <Erste Ausführungsform> Fig. 1 is a sectional view illustrating a configuration of a semiconductor device according to the first embodiment. The semiconductor device of Fig. 1 includes an insulating base substrate 1, a copper pattern 2, a first solder 3, a copper block 4, a second solder 5, an electrode terminal 6, a third solder 7, a semiconductor element 8, a wire 9, an electrode terminal 10, an adhesive member 11, a case 12, and a sealing resin 13. The insulating base substrate 1 includes a copper base plate 1a and a resin insulating layer 1b. The resin insulating layer 1b is provided on the copper plate 1a and is integrated with the copper base plate 1a. The copper pattern 2 is provided on the resin insulating layer 1b. Note that the copper pattern 2 may be included in the insulating base substrate 1. The copper block 4 is bonded to the copper structure 2 by means of the first solder 3. In the first embodiment, the thickness of the copper block 4 is greater than the thickness of the copper structure 2. The electrode terminal 6 is bonded to the copper block 4 by means of the second solder 5. The area of the part of the copper block 4 bonded by the first solder 3 is larger than the area of the part of the copper block 4 bonded by the second solder 5. The semiconductor element 8 includes at least one of a semiconductor switching element and a diode. A semiconductor switching element is, for example, an insulated gate bipolar transistor (IGBT), a reverse conducting IGBT (RC-IGBT), and a metal oxide semiconductor field-effect transistor (MOSFET), and a diode is, for example, a PN junction diode (PND) and a Schottky barrier diode (SBD). A case where the semiconductor element 8 is a semiconductor switching element will be described below as an example. The material of the semiconductor element 8 can be regular silicon (Si) or a wide-bandgap semiconductor, such as silicon carbide (SiC), gallium nitride (GaN), or diamond. A wide-bandgap semiconductor enables stable operation at high temperatures and high voltages and increases the switching speed. The semiconductor element 8 is electrically connected to the copper structure 2. In the first embodiment, the semiconductor element 8 is electrically connected to the copper structure 2 by being bonded to the copper structure 2 by means of the third solder 7. With this arrangement, the semiconductor element 8 is electrically connected to the copper block 4 and the electrode terminal 6 via the copper structure 2, and the electrode terminal 6 functions, for example, as a collector electrode of the semiconductor element 8. The semiconductor element 8 is electrically connected to an electrode terminal 10 via the wire 9, and the electrode terminal 10 functions, for example, as an emitter electrode of the semiconductor element 8. The material of the wire 9 is aluminum, for example. The connection of the wire 9 and the bonding of the first solder 3, the second solder 5, and the third solder 7 form a circuit in a space enclosed by a housing 12. The housing 12 is adhered to the end portion of the insulating base substrate 1 by an adhesive member 11. The material of the housing 12 is, for example, an insulating resin. In the example of Fig. 1, the central portion of the electrode terminal 6 and the central portion of the electrode terminal 10 are embedded in the housing 12. The sealing resin 13 is filled into the space enclosed by the housing 12 and covers the copper structure 2, the first solder 3, the copper block 4, the second solder 5, the electrode terminal 6, the semiconductor element 8, and the like. The sealing resin 13 has a glass transition temperature (Tg) that exceeds the operating temperature of the semiconductor element 8. <Zusammenfassung der ersten Ausführungsform> In the semiconductor device according to the first embodiment, the area of the part of the copper block 4 bonded by the first solder 3 is larger than the area of the part of the copper block 4 bonded by the second solder 5. According to such an arrangement, the bonded area between the first solder 3 and the copper block 4 is relatively large; therefore, peeling of the first solder 3 from the copper block 4 is prevented. Meanwhile, the second solder 5 is located closer to the upper surface of the sealing resin 13 than the first solder 3. The closer to the upper surface of the sealing resin 13, the more the stress of the sealing resin 13 can be transferred to the space above the sealing resin 13, so that the stress exerted by the sealing resin 13 on the second solder 5 is less than the stress exerted by the sealing resin 13 on the first solder 3. Therefore, even if the bonding area between the second solder 5 and the copper block 4 is relatively small, peeling of the second solder 5 from the copper block 4 is prevented. In the first embodiment, the thickness of the copper block 4 is greater than the thickness of the copper pattern 2. According to such an arrangement, the second solder 5 can be brought closer to the upper surface of the sealing resin 13, thus further preventing the second solder 5 from peeling off the copper block 4. Furthermore, the contact area between the copper block 4 and the sealing resin 13 is relatively large; therefore, peeling off the sealing resin 13 from the copper block 4 is prevented. <Zweite Ausführungsform> Fig. 2 is a sectional view illustrating a configuration of a semiconductor device according to the second embodiment. In the second embodiment, an uneven portion 4a is provided in the surface of the copper block 4, which is bonded by the second solder 5. That is, the surface of the copper block 4, which is bonded by the second solder 5, is roughened. The region of the uneven part 4a may be a region where the second solder 5 wets, for example, an annular region having a diameter of 200 to 300 µm or a rectangular region having a side length of 200 to 300 µm. A step of the uneven part 4a is, for example, 200 µm, and milling, for example, is used to form the uneven part 4a. Except for the above points, the configuration of the second embodiment is the same as that of the first embodiment. According to the semiconductor device of the second embodiment as described above, the same effect as that of the first embodiment can be obtained. Furthermore, in the second embodiment, the uneven part 4a of the copper block 4 provides a holding effect between the second solder 5 and the copper block 4, thus preventing the second solder 5 from peeling off from the copper block 4. Although not shown, the surface of the electrode terminal 6 bonded by the second solder 5 may also be provided with an uneven part to prevent the second solder 5 from peeling off the electrode terminal 6. <Dritte Ausführungsform> Fig. 3 is a sectional view illustrating a configuration of a semiconductor device according to the third embodiment. In Fig. 3, the position of the upper surface of the sealing resin 13 of the first embodiment is indicated by a two-dot chain line. In the third embodiment, a thickness D of the sealing resin 13 on the part of the electrode terminal 6 bonded by the second solder 5 is 2.0 mm or more and 2.5 mm or less. That is, the thickness D from the upper part of the electrode terminal 6, which is not in contact with the second solder 5, to the upper surface of the sealing resin 13 is 2.0 mm or more and 2.5 mm or less, which is relatively thin. Except for the above points, the configuration of the third embodiment is the same as the configuration of the first embodiment. According to the semiconductor device of the third embodiment as described above, the same effect as that of the first embodiment can be obtained. Further, in the third embodiment, the thickness D of the sealing resin 13 on the part of the electrode terminal 6 bonded by the second solder 5 is relatively thin, so that the stress exerted by the sealing resin 13 on the second solder 5 is reduced and peeling of the second solder 5 from the copper block 4 is suppressed. Furthermore, the curing of the sealing resin 13 is promoted. The arrangement of the third embodiment can also be applied to the second embodiment. <Vierte Ausführungsform> Fig. 4 is a sectional view illustrating a configuration of a semiconductor device according to the fourth embodiment. In the fourth embodiment, a coating film 14 is provided between the copper block 4 and the sealing resin 13. In the example of Fig. 4, the coating film 14 is also provided between the sealing resin 13 and each of the resin insulating layer 1b, the copper pattern 2, the semiconductor element 8, and the wire 9. The material of the coating film 14 is, for example, polyimide, and the thickness of the coating film 14 is, for example, 100 nm or less. The thermal expansion coefficient of the coating film 14 is preferably equivalent to the thermal expansion coefficient of copper. Except for the above points, the configuration of the fourth embodiment is the same as the configuration of the first embodiment. According to the semiconductor device of the fourth embodiment as described above, the same effect as that of the first embodiment can be obtained. Further, in the fourth embodiment, the coating film 14 improves the adhesion between the copper block 4 and the sealing resin 13; therefore, peeling of the sealing resin 13 from the copper block 4 is suppressed. According to the arrangement as shown in Fig. 4, peeling of the sealing resin 13 from the resin insulating layer 1b, the copper pattern 2, the semiconductor element 8, and the wire 9 is suppressed. The arrangement of the fourth embodiment can also be applied to the second and third embodiments. The embodiments and the modifications may be combined, and the embodiments and the modifications may be appropriately modified or omitted. Although the disclosure has been shown and described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is therefore understood that numerous modifications and variations may be devised without departing from the scope of the invention. QUOTES CONTAINED IN THE DESCRIPTION This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature JP 2013

[0002] JP 131592

[0002]

Claims

A semiconductor device comprising: a copper structure (2); a copper block (4) bonded to the copper structure (2) by a first solder (3); an electrode terminal (6) bonded to the copper block (4) by a second solder (5); a semiconductor element (8) electrically connected to the copper structure (2); and a sealing resin (13) covering the copper structure (2), the first solder (3), the copper block (4), the second solder (5), the electrode terminal (6), and the semiconductor element (8), wherein an area of a part of the copper block (4) bonded by the first solder (3) is larger than an area of a part of the copper block (4) bonded by the second solder (5). A semiconductor device according to claim 1, wherein a thickness of the copper block (4) is greater than a thickness of the copper structure (2). A semiconductor device according to claim 1 or 2, wherein a surface of the copper block (4) bonded by the second solder (5) is provided with an uneven part (4a). A semiconductor device according to any one of claims 1 to 3, wherein a thickness of the sealing resin (13) on a part of the electrode terminal (6) bonded by the second solder (5) is 2.0 mm or more and 2.5 mm or less. A semiconductor device according to any one of claims 1 to 4, further comprising:a coating film (14) provided between the copper block (4) and the sealing resin (13).

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