DISPLAY DEVICES

Abstract

Display device (1) comprising: a display panel (6); several light receiving elements (3) which, when viewed from a normal direction to the display panel (6), are located within a display area (DA) of the display panel (6) and are configured to receive light;and a light guide (50) which is provided such that it overlaps the light receiving elements (3), wherein the light guide (50) comprises light guide paths (51) which at least partially overlap the light receiving elements (3), and a light-blocking section (55) which has a higher extinction of the light than that of the light guide paths (51), the light guide paths (51) being inclined in a predetermined first direction with respect to the normal direction of the display panel (6), and when viewed from a visible side in the normal direction of the display panel (6), first openings (51b) of the light guide paths (51) which are located closest to the light receiving elements (3) are displaced from second openings (51a) of the light guide paths (51) which are located furthest from the light receiving elements (3).

Description

BACKGROUND 1. Technical field The present disclosure relates to display devices. 2. Description of the state of the art In recent years, optical sensors have been known as sensors used, for example, for personal authentication (e.g., US patent application US 2018 / 0012069A1). An optical sensor contains a light-receiving element in which an output signal changes according to the amount of light received. In a sensor described in US 2018 / 0012069A1, several light-receiving elements, such as photodiodes, are arranged on a substrate. Furthermore, viewing angle control devices have been known that control the viewing angle of an on-board display device of a vehicle so that it is visible from the passenger seat, while its viewing from the driver's seat is restricted (e.g. Japanese patent application, publication JP 2006 - 195 388 A). An optical detection device described in US 2018 / 0012069A1 must direct reflected light from a scoreboard to the light receiving element. There is potential for improvement in the optical detection device to reduce ambient and stray light and to direct the reflected light from the scoreboard to the light receiving element. A detection device described in DE 11 2020 001 819 T5 comprises several light-receiving elements and a light guide section whose surface faces the elements. The light guide contains continuous light guide paths between opposing surfaces as well as a light-absorption section with a higher absorption capacity than the paths. Viewed from the overlap direction, several light guide paths overlap each light-receiving element, so that light is directed specifically to the elements and stray light is attenuated. The present disclosure was made with regard to the problem described above and aims to provide a display device that reduces the drop in the signal-to-noise ratio (S / N). This problem is solved, inter alia, by a display device according to at least one of the independent claims. Further embodiments are the subject of the dependent claims. SUMMARY A display device according to an embodiment of the present disclosure comprises a display panel, several light-receiving elements which, when viewed from a normal direction to the display panel, are located within a display area of ​​the display panel and are configured to receive light, and a light guide which is provided to overlap the light-receiving elements. The light guide comprises light paths which at least partially overlap the light-receiving elements and includes a light-blocking section with a higher extinction of light than that of the light paths, wherein the light paths are inclined in a predetermined first direction with respect to the normal direction of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a perspective view schematically illustrating a display device according to a first embodiment of the present disclosure; Fig. 2 is a sectional view schematically illustrating a section of the display device according to the first embodiment; Fig. 3 is a top view schematically illustrating a detection device according to the first embodiment; Fig. 4 is a block diagram illustrating a configuration example of the detection device according to the first embodiment; Fig. 5 is a circuit diagram illustrating a light receiving element; Fig. 6 is a top view schematically illustrating the light receiving element of the detection device according to the first embodiment; Fig. 7 is a VII-VII' sectional view of Fig. 6; Fig.Figure 8 is a top view schematically illustrating the arrangement between the pixels and the light-receiving elements in a display area according to the first embodiment; Figure 9 is a top view schematically illustrating the arrangement between first and second openings of light guide paths according to the first embodiment; Figure 10 is a sectional view schematically illustrating the arrangement between the first and second openings of the light guide paths according to the first embodiment; Figure 11 is a sectional view schematically illustrating the arrangement between the first and second openings of the light guide paths according to a comparative example; Figure 12A is a top view to explain the operation of the display device; Figure 12B is a top view to explain the operation of the display device; FigureFigure 12C is a top view to explain the operation of the display device; Figure 12D is a top view to explain the operation of the display device; Figure 13 is a top view schematically illustrating a shape of a light guide path according to a first modification of the first embodiment; Figure 14 is a sectional view schematically illustrating a cross-sectional shape of the guide paths according to a second modification of the first embodiment; Figure 15 is a sectional view schematically illustrating a cross-sectional shape of the guide paths according to a third modification of the first embodiment; Figure 16 is a perspective view schematically illustrating the display device according to a second embodiment of the present disclosure; Figure 17 is a top view schematically illustrating an arrangement relationship between the pixels and the light-receiving elements in the display area according to the second embodiment; FigureFigure 18 is a sectional view taken along the XVIII-XVIII shown in Figure 17; Figure 19 is a sectional view taken along the XIX-XIX shown in Figure 17; Figure 20 is an explanatory graphic to illustrate a principal viewing direction of the display device according to the second embodiment; Figure 21 is an explanatory graphic to illustrate a relationship between a viewing angle and a luminance distribution in a horizontal plane of the display device according to the second embodiment; Figure 22 is an explanatory graphic to illustrate the directional dependence of the sensitivity of a detection element according to the second embodiment; FigureFigure 23 is a schematic graphic representation to explain a relationship between the viewing angle and the direction dependence of the sensitivity of the detection element in the horizontal plane of the display device according to the second embodiment; and Figure 24 is a sectional view of the light receiving element according to a first modification of the second embodiment. DETAILED DESCRIPTION The following describes in detail one way (first embodiment) of carrying out the present invention with reference to the drawings. The present disclosure is not limited to the description of the first embodiment given below. The components described below include those that are readily conceivable by those skilled in the field or those that are essentially identical. Moreover, the components described below can optionally be combined. What is disclosed here is merely an example, and the present disclosure naturally includes suitable modifications that are readily conceivable by those skilled in the field while maintaining the main point of the invention. To further clarify the description, the drawings illustrate, for example,The widths, thicknesses, and shapes of various sections are shown schematically in comparison to their actual aspects in some cases. However, they are merely examples, and the interpretation of the present disclosure is not limited to them. The same element illustrated in a drawing already discussed is designated in the description and in the drawings by the same reference symbol, the full description of which is not repeated in some cases where appropriate. In the embodiments of the present disclosure, when expressing an aspect of arranging a first structure above a second structure, a case of the simple expression "above" includes both a case of arranging the first structure directly above the second structure so that it is in contact with the second structure, and a case of arranging the first structure above the second structure with a third structure inserted in between, unless otherwise specified. First embodiment Fig. 1 is a perspective view schematically illustrating a display device according to the first embodiment. Fig. 2 is a sectional view schematically illustrating a section of the display device according to the first embodiment. As illustrated in Fig. 1, a display device 1 comprises an optical sensor 5, a display panel 6, and a translucent cover element CB. The polarization plate PL is superimposed on the display panel 6. As illustrated in Fig. 2, the optical sensor 5 is located on a side opposite a visible side of the display panel 6, superimposed on a display area DA of the display panel 6. The optical sensor 5 is not superimposed on a border area BE that surrounds the display area DA. This configuration allows the optical sensor 5 to detect information about an object Fg using the light L1 emitted by the display panel 6. As illustrated in Fig. 2, the optical sensor 5 comprises a substrate 21, a light receiving element 3, and a light guide 50. The light receiving element 3 detects the light L2 from the object Fg to be detected. When the light L1 from the display panel 6 reaches the object Fg to be detected, the light L1 is specifically transmitted through or reflected by the object Fg to become the light L2, which passes through the cover element CB, the polarizing plate PL, and the display panel 6. The light L2 enters the light guide 50. The light L2 passes through the light guide 50 and enters the light receiving element 3. Consequently, the optical sensor 5 can detect the light L. The object Fg to be detected is, for example, a finger, a palm, or a wrist. The optical sensor 5 can be used to detect the light L2 from the substrate 21, a palm, or a wrist. B. detect the information about a fingerprint of the object to be detected Fg based on the light L2.The optical sensor 5 can also detect various types of information (biological information), such as the shape of blood vessels, a pulse, and a pulse wave. The light guide 50 is an optical filter and an optical element that directs a component of the light L2 reflected by a detectable object, such as the object Fg, which propagates in a direction inclined in a predetermined direction with respect to a third direction Dz, towards a photodiode 30 and attenuates the components propagating in other directions. The light guide 50 is also referred to as a collimation aperture or collimator. The light guide 50 is located on the side of the light receiving element 3 that is closer to the detectable object Fg and faces the light receiving element 3. The light guide 50 includes several light guide paths 51 and a light-blocking section 55 that surrounds the light guide paths 51. The display panel 6 of the first embodiment is, for example, an organic electroluminescent display panel (EL display panel) (with organic light-emitting diodes (OLEDs)). The display panel 6 can, for example, be an inorganic EL display (micro-LED or mini-LED display). Alternatively, the display panel 6 can be a liquid crystal display panel (LCD panel) using liquid crystal elements as display elements. Fig. 3 is a top view schematically illustrating the detection device according to the first embodiment. As illustrated in Fig. 3, the optical sensor 5 comprises a light-receiving element assembly substrate 2 (substrate 21), the light-receiving elements 3, a scanning line driver circuit 15, a signal line selection circuit 16, a detection circuit 48, a control circuit 102, and a power supply circuit 103. Substrate 21 is electrically coupled to a control substrate 501 via a wiring substrate 510. The wiring substrate 510 is, for example, a flexible or rigid printed circuit board. The wiring substrate 510 is equipped with the detection circuit 48. The control substrate 501 is equipped with the control circuit 102 and the power supply circuit 103. The control circuit 102 is, for example, a field-programmable gate array (FPGA). The control circuit 102 supplies control signals to a sensor unit 10, the sampling line driver circuit 15, and the signal line selection circuit 16 to control the detection operations of the sensor unit 10. The power supply circuit 103 supplies voltage signals that... B. a power supply potential SVS and a reference potential VR1 (see Fig. 5) included, the sensor unit 10, the sampling line driver circuit 15 and the signal line selection circuit 16.While the first embodiment illustrates the case of arranging the detection circuit 48 on the wiring substrate 510 by way of example, the present disclosure is not limited to this case. The detection circuit 48 can be arranged above the substrate 21. The substrate 21 has a detection area AA and a boundary area GA. The detection area AA is an area equipped with the light-receiving elements 3 contained in the sensor unit 10. The boundary area GA is an area outside the detection area AA and is an area not equipped with the light-receiving elements 3. That is, the boundary area GA is an area between the outer perimeter of the detection area AA and the outer edges of the substrate 21. Each of the light receiving elements 3 of the sensor unit 10 is a photosensor containing the photodiode 30 as a sensing element. The photodiode 30 outputs an electrical signal corresponding to the light emitted to it. More specifically, the photodiode 30 is a positive-intrinsically-negative (PIN) photodiode or an organic photodiode (OPD). The light receiving elements 3 are arranged in a matrix with a row-column configuration in the detection area AA. The photodiode 30 contained in each of the light receiving elements 3 performs a detection according to a gate driver signal supplied by the sampling line driver circuit 15. Each of the photodiodes 30 outputs the electrical signal corresponding to the light emitted to it as a detection signal Vdet to the signal line selection circuit 16.The display device 1 detects the information about the object Fg to be detected based on the detection signals Vdet received by the photodiodes 30. The scanning line driver circuit 15 and the signal line selection circuit 16 are located in the boundary region GA. Specifically, the scanning line driver circuit 15 is located in a region of the boundary region GA that runs along a second direction Dy. The signal line selection circuit 16 is located in a region of the boundary region GA that runs along a first direction Dx and is situated between the sensor unit 10 and the detection circuit 48. The first direction Dx is a direction in a plane parallel to substrate 21. The second direction Dy is a direction in the plane parallel to substrate 21 and is orthogonal to the first direction Dx. The second direction Dy cannot intersect the first direction Dx orthogonally. The third direction Dz is orthogonal to both the first direction Dx and the second direction Dy and is normal to substrate 21. Fig. 4 is a block diagram illustrating a configuration example of the detection device according to the first embodiment. As illustrated in Fig. 4, the display device 1 further comprises a detection control circuit 11 and a detector 40. One, some, or all functions of the detection control circuit 11 are included in the control circuit 102. Furthermore, one, some, or all functions of the detector 40, with the exception of those of the detection circuit 48, are included in the control circuit 102. The detection control circuit 11 is a circuit that supplies a control signal to the sampling line driver circuit 15, the signal line selector circuit 16, and the detector 40 to control the operations of these components. The detection control circuit 11 supplies various control signals, including, for example, a start signal STV and a clock signal CK, to the sampling line driver circuit 15. Furthermore, the detection control circuit 11 supplies various control signals, including, for example, a selection signal ASW, to the signal line selector circuit 16. The sampling line driver circuit 15 is a circuit that controls several sampling lines GLS based on the various control signals (see Fig. 5). The sampling line driver circuit 15 selects the sampling lines GLS sequentially or simultaneously and applies the gate driver signals VGL to the selected sampling lines GLS. Through this operation, the sampling line driver circuit 15 selects the photodiodes 30 coupled to the sampling lines GLS. The signal line selection circuit 16 is a switching circuit that selects several output signal lines SLS sequentially or simultaneously (see Fig. 5). The signal line selection circuit 16 is, for example, a multiplexer. Based on the selection signal ASW supplied by the detection control circuit 11, the signal line selection circuit 16 couples the selected output signal lines SLS to the detection circuit 48. Through this operation, the signal line selection circuit 16 outputs the detection signal Vdet of the photodiode 30 to the detector 40. The detector 40 contains the detection circuit 48, a signal processing circuit 44, a coordinate extraction circuit 45, a memory circuit 46, and a detection timing control circuit 47. The detection timing control circuit 47 performs a control operation based on a control signal supplied by the detection control circuit 11 to cause the detection circuit 48, the signal processing circuit 44, and the coordinate extraction circuit 45 to operate synchronously with each other. The detection circuit 48 is, for example, an analog front-end circuit (AFE circuit). The detection circuit 48 is a signal processing circuit that incorporates the functions of at least one detection signal amplification circuit 42 and one analog-to-digital conversion (A / D conversion) circuit 43. The detection signal amplification circuit 42 is a circuit that amplifies the detection signal Vdet and is, for example, an integration circuit. The A / D conversion circuit 43 converts an analog signal output by the detection signal amplification circuit 42 into a digital signal. The signal processing circuit 44 is a logic circuit that detects a predefined physical quantity received by the sensor unit 10 based on the output signals of the detection circuit 48. Based on the signals from the detection circuit 48, the signal processing circuit 44 can detect information based on the light reflected by the object Fg to be detected, provided the object Fg is in contact with or near a detection surface (cover element CB). The signal processing circuit 44 can also extract other biological information, such as fingerprints, pulse waves, heart rates, and blood oxygen saturation levels, based on the signals from the detection circuit 48. The memory circuit 46 temporarily stores the signals calculated by the signal processing circuit 44. The memory circuit 46 can be, for example, a read / write memory (RAM) or a register circuit. The coordinate extraction circuit 45 is a logic circuit that obtains the detected coordinates of the object Fg (e.g., the detected positions of irregularities on the surface of a finger or the detected positions of blood vessels in the palm or wrist) when contact or proximity of the object Fg is detected by the signal processing circuit 44. The coordinate extraction circuit 45 combines the detection signals Vdet output by the respective light receiving elements 3 of the sensor unit 10 to generate two-dimensional information representing the shape of the irregularities on the surface of the finger or a blood vessel pattern. Instead of calculating the detected coordinates, the coordinate extraction circuit 45 can output the detection signals Vdet as the sensor outputs Vo. The following describes a circuit configuration example of the optical sensor 5. Fig. 5 is a circuit diagram illustrating the light receiving element of the optical sensor 5. As illustrated in Fig. 5, the light receiving element 3 includes the photodiode 30, a capacitive element Ca, and a first transistor Tr. The first transistor Tr is provided corresponding to the photodiode 30. The first transistor Tr consists of a thin-film transistor and, in this example, is an n-channel metal-oxide-semiconductor thin-film transistor (n-channel MOS-TFT). The gate of the first transistor Tr is coupled to one of the corresponding sampling lines GLS. The source of the first transistor Tr is coupled to one of the corresponding output signal lines SLS. The drain of the first transistor Tr is coupled to the anode of the photodiode 30 and the capacitive element Ca. The power supply potential SVS is supplied to the cathode of photodiode 30 by the power supply circuit 103. The reference potential VR1, which serves as an initial potential for the capacitive element Ca, is supplied to the capacitive element Ca by the power supply circuit 103. When the light-receiving element 3 is illuminated with light, a current corresponding to a certain amount of light flows through the photodiode 30. As a result, an electrical charge is stored in the capacitive element Ca. After the first transistor Tr is switched on, a current corresponding to the electrical charge stored in the capacitive element Ca flows through the output signal line SLS. The output signal line SLS is coupled to the detection circuit 48 via the signal line selection circuit 16. Consequently, the indicator device 1 can detect a signal for each of the light-receiving elements 3 that corresponds to the amount of light illuminating the photodiode 30. While Fig. 5 illustrates one of the light receiving elements 3, the scanning lines GLS and the output signal lines SLS are coupled to the light receiving elements 3. Specifically, the scanning lines GLS run in the first direction Dx (see Fig. 2), being coupled to the light receiving elements 3 arranged in the first direction Dx. The output signal lines SLS run in the second direction Dy and are coupled to the light receiving element 3 arranged in the second direction Dy. The first transistor Tr is not limited to being an n-type TFT, but can be a p-type TFT. The light receiving element 3 can be equipped with several transistors, corresponding to a photodiode 30. The following describes a detailed configuration of the display device 1. Fig. 6 is a top view schematically illustrating the light receiving element of the detection device according to the first embodiment. As illustrated in Fig. 6, the light receiving element 3 corresponds to an area surrounded by the scanning lines GLS and the output signal lines SLS. In the first embodiment, each of the scanning lines GLS contains a first scanning line GLA and a second scanning line GLB. The first scanning line GLA is designed to overlap the second scanning line GLB. The first scanning line GLA and the second scanning line GLB are provided in different layers with insulating layers 22c and 22d inserted between them (see Fig. 7).The first scanning line GLA and the second scanning line GLB are electrically coupled at some point, with the gate driver signals VGL, which have the same potential, being supplied to them. At least one of the first scanning line GLA and the second scanning line GLB is coupled to the scanning line driver circuit 15. In Fig. 6, the first scanning line GLA and the second scanning line GLB have different widths, but can have the same width. The photodiode 30 is located in the area surrounded by the scanning lines GLS and the output signal lines SLS. The photodiode 30 comprises a semiconductor layer 31, an upper electrode 34, and a lower electrode 35. The photodiode 30 is, for example, a PIN photodiode. The upper electrode 34 is coupled to a power supply signal line Lvs via a coupling wire 36. The power supply signal line Lvs is a wire that supplies the power supply potential SVS to the photodiode 30. In the first embodiment, the power supply signal line Lvs runs in the second direction Dy, so that it overlaps the output signal line SLS. The light-receiving elements 3, arranged in the second direction Dy, are coupled to the common power supply signal line Lvs. Such a configuration can enlarge the opening for the light-receiving element 3. The lower electrode 35, the semiconductor layer 31, and the upper electrode 34 are essentially rectangular in a top view. However, the shapes of the lower electrode 35, the semiconductor layer 31, and the upper electrode 34 are not limited to this and can be modified as necessary. The first transistor Tr is located near the intersection of the sampling line GLS and the output signal line SLS. The first transistor Tr comprises a semiconductor layer 61, a source electrode 62, a drain electrode 63, a first gate electrode 64A, and a second gate electrode 64B. Semiconductor layer 61 is an oxide semiconductor. Preferably, semiconductor layer 61 is a transparent amorphous oxide semiconductor (TAOS). Using an oxide semiconductor as the first transistor Tr can reduce the leakage current of the first transistor Tr. That is, the first transistor Tr can reduce the leakage current from an unselected light-receiving element 3. As a result, the signal-to-noise ratio of the display device 1 can be improved. However, semiconductor layer 61 is not limited to this and can be formed, for example, from a microcrystalline oxide semiconductor, an amorphous oxide semiconductor, polysilicon, or low-temperature polycrystalline silicon (LTPS). Semiconductor layer 61 is arranged along the first direction Dx and, in plan view, intersects the first gate electrode 64A and the second gate electrode 64B. The first gate electrode 64A and the second gate electrode 64B are arranged to branch off from the first scanning line GLA and the second scanning line GLB, respectively. In other words, the sections of the first scanning line GLA and the second scanning line GLB that overlap semiconductor layer 61 serve as the first gate electrode 64A and the second gate electrode 64B. Aluminum (Al), copper (Cu), silver (Ag), molybdenum (Mo), or an alloy thereof is used as the first gate electrode 64A and the second gate electrode 64B. A channel region is formed in a section of semiconductor layer 61 that overlaps the first gate electrode 64A and the second gate electrode 64B. One end of semiconductor layer 61 is coupled to source electrode 62 via a contact hole H1. The other end of semiconductor layer 61 is coupled to drain electrode 63 via a contact hole H2. A section of the output signal line SLS, overlapping semiconductor layer 61, serves as source electrode 62. A section of a third conductive layer 67, overlapping semiconductor layer 61, serves as drain electrode 63. The third conductive layer 67 is coupled to the lower electrode 35 via a contact hole H3. This configuration allows the first transistor Tr to switch between coupling and decoupling between photodiode 30 and the output signal line SLS. The spacing of the light-receiving elements 3 (photodiodes 30) in the first direction Dx is defined by the spacing of the output signal line SLS in the first direction Dx. The spacing of the light-receiving elements 3 (photodiodes 30) in the second direction Dy is defined by the spacing of the scanning line GLS in the second direction Dy. The following describes a layer configuration of the optical sensor 5. Fig. 7 is a VII-VII' sectional view of Fig. 6. To illustrate a relationship between the layer structure of the detection region AA (see Fig. 3) and the layer structure of the edge region GA (see Fig. 3), Fig. 7 shows a section taken along a line VII-VII' and a section of a portion of the edge region GA containing a second transistor TrG, in a schematically connected manner. Fig. 7 further shows a section of a portion of the edge region GA containing a terminal 72, in a schematically connected manner. In the description of the optical sensor 5, the direction from the substrate 21 to the photodiode 30, perpendicular to the surface of the substrate 21 (third direction Dz), is referred to as the "top" or "top". A direction from the photodiode 30 towards the substrate 21 is referred to as the "bottom" or "bottom". The term "top view" refers to a positional relationship viewed from the direction orthogonal to the surface of the substrate 21. As illustrated in Fig. 7, the substrate 21 is an insulating substrate, wherein a glass substrate made of, for example, quartz or alkali-free glass is used as the substrate 21. The first transistor Tr, various types of wiring (the scanning line GLS and the output signal line SLS), and the insulating layers are provided to form the light-receiving element array substrate 2 on a surface on one side of the substrate 21. The photodiodes 30 are arranged above the light-receiving element array substrate 2, i.e., on one surface side of the substrate 21. The substrate 21 can be a resin substrate or a resin film made of a resin, such as polyimide. Insulating layers 22a and 22b are provided above substrate 21. Insulating layers 22a, 22b, 22c, 22d, 22e, 22f, and 22g are inorganic insulating films and are formed from silicon dioxide (SiO2) or silicon nitride (SiN). Each of the inorganic insulating layers is not limited to a single layer but can be a multilayer film. The first gate electrode 64A is located above the insulating layer 22b. The insulating layer 22c is located above the insulating layer 22b to cover the first gate electrode 64A. Above the insulating layer 22c are the semiconductor layer 61, a first conductive layer 65, and a second conductive layer 66. The first conductive layer 65 is located such that it covers an end of the semiconductor layer 61 that is coupled to the source electrode 62. The second conductive layer 66 is located such that it covers an end of the semiconductor layer 61 that is coupled to the drain electrode 63. The insulating layer 22d is positioned above the insulating layer 22c, covering the semiconductor layer 61, the first conductive layer 65, and the second conductive layer 66. The second gate electrode 64B is positioned above the insulating layer 22d. The semiconductor layer 61 is located between the first gate electrode 64A and the second gate electrode 64B, perpendicular to the substrate 21. Thus, the first transistor Tr has a so-called dual-gate structure. However, the first transistor Tr can have either a bottom-gate structure, which is equipped with the first gate electrode 64A but not the second gate electrode 64B, or an top-gate structure, which is equipped only with the second gate electrode 64B and not the first gate electrode 64A. Insulating layer 22e is provided above insulating layer 22d to cover the second gate electrode 64B. Source electrode 62 (output signal line SLS) and drain electrode 63 (third conductive layer 67) are provided above insulating layer 22e. In the first embodiment, drain electrode 63 is the third conductive layer 67, which is provided above semiconductor layer 61 with the insulating layers 22d and 22e inserted between them. Source electrode 62 is electrically coupled to semiconductor layer 61 via contact hole H1 and the first conductive layer 65. Drain electrode 63 is electrically coupled to semiconductor layer 61 via contact hole H2 and the second conductive layer 66. The third conductive layer 67 is provided in an area that overlaps the photodiode 30 in the top view. The third conductive layer 67 is also provided on the top surface of the semiconductor layer 61, the first gate electrode 64A, and the second gate electrode 64B. That is, the third conductive layer 67 is located between the second gate electrode 64B and the lower electrode 35 in a direction orthogonal to the substrate 21. In this configuration, the third conductive layer 67 functions as a protective layer that shields the first transistor Tr. The second conductive layer 66 is oriented such that it faces the third conductive layer 67 in a region that does not overlap the semiconductor layer 61. A fourth conductive layer 68 is provided above the insulating layer 22d in the region that does not overlap the semiconductor layer 61. The fourth conductive layer 68 is located between the second conductive layer 66 and the third conductive layer 67. This arrangement creates a capacitance between the second conductive layer 66 and the fourth conductive layer 68, and a capacitance between the third conductive layer 67 and the fourth conductive layer 68. The capacitance created by the second conductive layer 66, the third conductive layer 67, and the fourth conductive layer 68 serves as the capacitance of the capacitive element Ca illustrated in Fig. 5. A first organic insulating layer 23a is provided above the insulating layer 22e to cover the source electrode 62 (output signal line SLS) and the drain electrode 63 (third conductive layer 67). The first organic insulating layer 23a is a planarizing layer that flattens the irregularities formed by the first transistor Tr and various conductive layers. The following describes a cross-sectional configuration of the photodiode 30. The photodiode 30 is stacked above the first organic insulating layer 23a of the light-receiving element assembly substrate 2 in the order of the lower electrode 35, the semiconductor layer 31, and the upper electrode 34. The light-receiving element assembly substrate 2 is a driver circuit board that controls the sensor for each predefined detection range. The light-receiving element assembly substrate 2 contains the substrate 21 and, for example, the first transistor Tr, the second transistor TrG, and the various types of wiring provided on the substrate 21. The lower electrode 35 is positioned above the first organic insulating layer 23a and is electrically coupled to the third conductive layer 67 via the contact hole H3. The lower electrode 35 is the anode of the photodiode 30 and serves as the electrode for reading the detection signal Vdet. For example, a metallic material such as molybdenum (Mo) or aluminum (Al) is used for the lower electrode 35. Alternatively, the lower electrode 35 can be a multilayer film composed of several layers of these metallic materials. The lower electrode 35 can also be made of a translucent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The semiconductor layer 31 is made of amorphous silicon (a-Si). The semiconductor layer 31 contains an i-type semiconductor layer 32a, an n-type semiconductor layer 32b, and a p-type semiconductor layer 32c. The i-type semiconductor layer 32a, the n-type semiconductor layer 32b, and the p-type semiconductor layer 32c form a specific example of a photoelectric conversion element. In Fig. 7, the p-type semiconductor layer 32c, the i-type semiconductor layer 32a, and the n-type semiconductor layer 32b are stacked in that order in the direction orthogonal to the surface of the substrate 21. However, the semiconductor layer 31 can have a reversed configuration. This means that the n-type semiconductor layer 32b, the i-type semiconductor layer 32a, and the p-type semiconductor layer 32c can be stacked in this order. The semiconductor layer 31 can be a photoelectric conversion element formed from organic semiconductors. The a-Si of the n-type semiconductor layer 32b is doped with impurities to form an n+ region. The a-Si of the p-type semiconductor layer 32c is also doped with impurities to form a p+ region. The i-type semiconductor layer 32a, for example, is an undoped intrinsic semiconductor and exhibits lower conductivity than both the n-type semiconductor layer 32b and the p-type semiconductor layer 32c. The upper electrode 34 is the cathode of the photodiode 30 and serves to supply the power supply potential SVS to the photoelectric conversion layer. The upper electrode 34 is, for example, a transparent conductive layer such as ITO, with several upper electrodes 34 being provided for each photodiode 30. Insulating layers 22f and 22g are provided above the first organic insulating layer 23a. Insulating layer 22f covers the edge of the upper electrode 34 and has an opening at a position that overlaps the upper electrode 34. The coupling wiring 36 is coupled to the upper electrode 34 in a section of the upper electrode 34 that is not covered by insulating layer 22f. Insulating layer 22g is provided above insulating layer 22f, so that it covers the upper electrode 34 and the coupling wiring 36. A second organic insulating layer 23b, which serves as the planarization layer, is provided above insulating layer 22g. If the photodiode consists of organic semiconductors, an additional insulating layer 22h may be provided above the photodiode. The second transistor TrG of the scanning line driver circuit 15 is located in the edge region GA. The second transistor TrG is located on the same substrate 21 as that of the first transistor Tr. The second transistor TrG comprises a semiconductor layer 81, a source electrode 82, a drain electrode 83, and a gate electrode 84. Semiconductor layer 81 is made of polysilicon. Semiconductor layer 81 is preferably low-temperature polysilicon (LTPS). Semiconductor layer 81 is positioned above insulating layer 22a. That is, the semiconductor layer 61 of the first transistor Tr is located at a position orthogonal to substrate 21 and further away from substrate 21 than the semiconductor layer 81 of the second transistor TrG. However, semiconductor layer 81 is not limited to this configuration and can be located in the same layer and made of the same material as semiconductor layer 61. Gate electrode 84 is located above semiconductor layer 81, with insulating layer 22b inserted between them. Gate electrode 84 is located in the same layer as the first gate electrode 64A. The second transistor TrG has a so-called top-gate structure. However, the second transistor TrG can also have a dual-gate or bottom-gate structure. Source electrode 82 and drain electrode 83 are located above insulating layer 22e. Source electrode 82 and drain electrode 83 are located in the same layer as source electrode 62 and drain electrode 63 of the first transistor Tr. Contact holes H4 and H5 are positioned to extend through insulating layers 22b to 22e. Source electrode 82 is electrically coupled to semiconductor layer 81 via contact hole H4. Drain electrode 83 is electrically coupled to semiconductor layer 81 via contact hole H5. Terminal 72 is located at a position on the edge region GA that differs from the region equipped with the scanning line driver circuit 15. Terminal 72 comprises a first conductive connection layer 73, a second conductive connection layer 74, a third conductive connection layer 75, and a fourth conductive connection layer 76. The first conductive connection layer 73 is located in the same layer as the first gate electrode 64A, above the insulating layer 22b. A contact hole H6 is provided such that it passes through the insulating layers 22c, 22d, 22e, and the first organic insulating layer 23a. The second conductive connection layer 74, the third conductive connection layer 75, and the fourth conductive connection layer 76 are stacked in this order in the contact hole H6 and are electrically coupled to the first conductive connection layer 73. The second conductive connection layer 74 can be formed using the same material and process as, for example, the third conductive connection layer 67. The third conductive connection layer 75 can be formed using the same material and process as the lower electrode 35. The fourth conductive connection layer 76 can be formed using the same material and process as the coupling wiring 36 and the power supply signal line Lvs (see Fig. 6). While Fig. 7 illustrates one terminal 72, several terminals 72 are arranged at intervals. The terminals 72 are electrically coupled to the wiring substrate 510 (see Fig. 2), for example, by an anisotropic conductive film (ACF). The optical sensor 5 is not limited to the structure described above, as long as the photodiode 30 can detect the light L2. The optical sensor 5 can detect information other than fingerprint information, as long as the optical sensor 5 detects the information by receiving the light L2 using the photodiode 30. Fig. 8 is a top view schematically illustrating the arrangement between the pixels and the light-receiving elements in the display area according to the first embodiment. Fig. 9 is a top view schematically illustrating the arrangement between the first and second openings of the light guide paths according to the first embodiment. Fig. 10 is a sectional view schematically illustrating the arrangement between the first and second openings of the light guide paths according to the first embodiment. Fig. 8 is a partially enlarged top view, seen from the third direction Dz (side of the cover element CB), of a section of the display area DA of the display panel 6, where the position of a second opening 51a of the light guide path 51 with respect to a pixel PIX is indicated by a dashed line in the top view. Fig. 9 illustrates a first surface having a first opening 51b of the light guide path 51 of the light guide 50 illustrated in Fig. 10, and is an area corresponding to the area illustrated in the top view of Fig. 8. In the first embodiment, the first opening 51b and the second opening 51a have the same area in the top view. The pixel PIX contains the subpixels SPX-R, SPX-G, and SPX-B. The color ranges in the three colors red (R), green (G), and blue (B) correspond as a set to the subpixels SPX-R, SPX-G, and SPX-B. Because the display panel 6 is an organic EL display panel, the subpixels SPX-R, SPX-G, and SPX-B contain the pixel electrodes with red (R), green (G), and blue (B) organic light-emitting layers. Hereafter, the subpixels SPX-R, SPX-G, and SPX-B will each be referred to as a "subpixel SPX" unless distinguished by color. Each of the subpixels SPX contains a switching element Trr. A pixel signal line SL runs in the second direction Dy. The pixel signal line SL is a wiring connection for supplying a pixel signal to each of the pixel electrodes. A scanning line GL runs in the first direction Dx. The scanning line GL is a wiring connection for supplying a driver signal (scanning signal) that controls each of the switching elements Trr. In Fig. 8, the second aperture 51a of the light guide path 51 is provided at a position that does not overlap the subpixel SPX. However, the second aperture 51a is not limited to this example and can be provided in an area that overlaps one or more of the subpixels SPX. As illustrated in Fig. 10, the optical fiber 50 has light guide paths 51 and a light-blocking section 55. The light guide paths 51 are arranged in the first direction Dx and the second direction Dy, so that they are provided in a matrix with a row-column configuration. Each light guide path 51 can transmit the light L2 (see Fig. 2). The extinction of the light L2 by the light-blocking section 55 is higher than the extinction of the light L2 by the light guide paths 51. In other words, the transmittance of the light L2 through the light guide paths 51 is higher than the transmittance of the light L2 through the light-blocking section 55. The light-blocking section 55 is provided around the light guide paths 51 and consists of a material that is sparing in its transmission of light L. The extinction of light by the light-blocking section 55 preferably ranges from 99% to 100% and is more preferably 100%. The extinction of light here refers to the ratio of the difference between the intensity of the incident light Lin and the intensity of the output light Lout to the intensity of the incident light Lin ((Lin - Lout) / Lin). The second openings 51a of the light guide paths 51, illustrated in Fig. 10, are located on a second surface to emit the light L towards the light receiving elements 3. As illustrated in Fig. 9, each of the second openings 51a is arranged such that it is offset from the first opening 51b in the first direction Dx. The first openings 51b of the light guide paths 51 are designed to overlap the light receiving elements 3 of the sensor unit 10, enabling them to emit the light L2 precisely towards the light receiving elements 3. As illustrated in Fig. 8, the optical fiber 50 has a surface with the second openings 51a and a surface with the first openings 51b, which is located on the side opposite the surface with the second openings 51a. As illustrated in Fig. 9, the first opening 51b of the optical fiber 50 faces the light-receiving element 3. The second opening 51a is located in a position that does not overlap the subpixel SPX. As illustrated in Fig. 9, the first opening 51b and the photodiode 30 are located in a position that overlaps the subpixel SPX. However, the second opening 51a can also be provided in a position that overlaps the subpixel SPX. The light guide paths 51 are also referred to as "light guide columns" and each extends at an angle θ with respect to the third direction Dz from the first surface with the first openings 51b to the second surface with the second openings 51a. That is, the second openings 51a of the light guide paths 51 are offset in the first direction Dx from the first openings 51b of the light guide 50. This configuration reduces the amount of external light Ls that reaches the light receiving elements 3, thus limiting a reduction in the signal-to-noise ratio. Fig. 11 is a sectional view that schematically illustrates the arrangement relationship between the first and second openings of the light guide paths according to a comparative example. The light guide paths 51 of the comparative example are parallel to the third direction Dz. In the light guide paths according to the comparative example, both the other external light Ls and the light L2 emitted by the display panel 6 and reflected by the object Fg to be detected can easily reach the light receiving elements 3. In contrast, in the first embodiment, when viewed from the third direction Dz, the first opening 51b of the light guide path 51, which is located closest to the photodiode 30 of the light receiving element 3, overlaps the photodiode 30 of the light receiving element 3, while the second opening 51a of the light guide path 51, which is located furthest from the photodiode 30 of the light receiving element 3, does not overlap the first opening 51b.This configuration makes it difficult for external light Ls, such as sunlight in the case of outdoor use, to reach the light receiving element 3. As a result, the noise of the photodiode 30 is reduced and the scanning sensitivity is increased. Figures 12A to 12D are top views illustrating the operation of the display device. The display device 1, shown in Figure 12A, indicates a detection area G1 of the object Fg to be detected. As a result, the object Fg to be detected is directed to the detection area G1, as illustrated in Figure 12B. If, in this situation, the entire surface of the display area DA, shown in Figure 2, emits light, the amount of reflected light generated at an interface between the cover element CB and the air increases, as does the amount of scattered light propagating within the cover element CB. Consequently, this makes it easier for the scattered light to reach the detection area G1. Therefore, the display device 1 causes a light emission area G2 of the display panel 6 to emit light partially, as illustrated in Fig. 12C. As illustrated in Fig. 12D, a center of gravity C2 of the light emission area G2 of the display panel 6 is caused to emit light at a position displaced from a center of gravity C1 of the detection area G1. This displacement between the light emission area G2 of the display panel 6 and the detection area G1 reduces the amount of stray light and makes it difficult for the stray light to reach the detection area G1. As a result, the noise caused by the stray light detected in the detection area G1 is reduced. The direction in which the center of gravity C2 is displaced from the center of gravity C1 is the direction in which the second opening 51a is displaced from the first opening 51b. In the light guide path 51 of the first embodiment, the second opening 51a is displaced from the first opening 51b of the light guide 50 in the first direction Dx. Therefore, the light reflected from the object Fg to be detected in response to the light emission of the light emission area G2 of the display panel 6 can easily enter the light receiving element 3. As a result, the strength of a signal received by the light receiving element 3 increases, and the signal-to-noise ratio is improved. In other words, to cause the light receiving element 3 to detect the detection area G1, which overlaps the light receiving element 3 when viewed from the normal direction (third direction Dz) of the display panel 6, and the light reflected from the object Fg to be detected, the light emission area G2, as a section of the display area of ​​the display panel 6, is caused to emit light. When viewed from the visible side in the third direction Dz of the display panel 6, the direction in which the centroid C2 of the light emission area G2 is displaced from the centroid C1 of the detection area G1 is the direction in which the light guide path 51 is inclined. First modification of the first embodiment Fig. 13 is a top view schematically illustrating a shape of the light guide path according to a first modification of the first embodiment. The structure, identical to that in the first embodiment, is designated by the same reference numeral and is not described in detail. In the first modification, a section of the light guide path 51, obtained by cutting along a virtual plane in the first and second directions Dx and Dy, is elliptical. Therefore, the second aperture 51a and the first aperture 51b are also elliptical. The direction of the major axis of the ellipse is the first direction Dx, which runs along the direction of displacement of the second aperture 51a from the first aperture 51b. This configuration makes the shape of the projection onto the photodiode 30 closer to a circular shape. As a result, the detection accuracy of the photodiode 30 is increased. Second modification of the first embodiment Fig. 14 is a sectional view schematically illustrating a cross-sectional shape of the light guides according to a second modification of the first embodiment. The structure, identical to that in the first embodiment, is designated by the same reference numeral and is not described in detail. The light guide 50 contains the light guides 51, the light-blocking sections 55A, 55B, and 55C. The light-blocking sections 55A, 55B, and 55C are stacked in the third direction Dz. When each of the light-blocking sections 55A, 55B, and 55C is viewed in the third direction Dz, the light guide 51, acting as a pinhole aperture, has an elliptical shape in the same way as in Fig. 13. The direction of the major axis of this ellipse is the first direction Dx, which runs along the direction of displacement of the second aperture 51a from the first aperture 51b. Third modification of the first embodiment Fig. 15 is a sectional view that schematically illustrates a cross-sectional shape of the guide paths according to a third modification of the first embodiment. The structure, identical to that in both the first embodiment and the second modification of the first embodiment, is designated by the same reference numeral and is not described in detail. In the third modification of the first embodiment, a condenser lens 55Z is provided, which covers the top of the second opening 51a of the light guide path 51. This configuration precisely defines the condensation focal point of the light L projected onto the photodiode 30. Second embodiment Fig. 16 is a perspective view schematically illustrating the display device according to a second embodiment of the present disclosure. As illustrated in Fig. 16, the display device 1 comprises the display panel 6, which contains the optical sensor 5, the translucent cover element CB, a dimming plate VC, and a backlight BL. The display panel 6 is a liquid crystal display panel, while the dimming plate VC is superimposed between the display panel 6 and the backlight BL. The dimming plate VC controls the viewing angle of the display panel 6 based on control by a viewing angle control device CT. The cover element CB is superimposed on the visible side of the display panel 6. Fig. 17 is a top view schematically illustrating the arrangement between the pixels and the light-receiving elements in the display area according to the second embodiment. Fig. 18 is a sectional view taken along the XVIII-XVIII shown in Fig. 17. Fig. 18 does not illustrate the light-transmitting cover element CB shown in Fig. 16. Fig. 17 illustrates a partially magnified top view, viewed from the third direction Dz (side of the cover element CB), of a section of the display area DA of the display panel 6, with the positions of the first aperture 51b and the second aperture 51a of the light guide path 51 relative to the pixel PIX in the top view indicated by dashed lines. The photodiode 30 is arranged in each of the pixels PIX. The photodiode 30 can detect information about the object Fg to be detected using the light emitted by the display panel 6.The light receiving element 3 and the light guide 50 are provided within the display panel 6. As illustrated in Fig. 18, a liquid crystal layer LC of the display panel 6 is provided between an arrangement substrate SUB1 and a counter substrate SUB2. The arrangement substrate SUB1 contains a first substrate 110 as a base. The counter substrate SUB2 contains a second substrate 120 as a base. The first substrate 110 and the second substrate 120 are made of a translucent material, such as a glass substrate or a resin substrate. As illustrated in Fig. 18, the counter substrate SUB2 is arranged so that it faces orthogonally to a surface of the arrangement substrate SUB1. The liquid crystal layer LC is arranged between the arrangement substrate SUB1 and the counter substrate SUB2. The arrangement substrate SUB1 contains the first substrate 110 as its base. The counter substrate SUB2 contains the second substrate 120 as its base. The first substrate 110 and the second substrate 120 are made of a translucent material, such as a glass substrate or a resin substrate. The arrangement substrate SUB1 contains, for example, a first insulating film 111, a second insulating film 112, a third insulating film 113, a fourth insulating film 114, a fifth insulating film 115, the pixel signal lines SL, pixel electrodes PE, a common electrode DE and a first orientation film AL1 on a side of the first substrate 110 facing the counter substrate SUB2. A direction from the first substrate 110 towards the second substrate 120 in a direction orthogonal to the first substrate 110 is referred to as a "top" or simply "above". A direction from the second substrate 120 to the first substrate 110 is referred to as a "bottom" or simply "below". The first insulating film 111 is provided over the first substrate 110. The second insulating film 112 is provided over the first insulating film 111. The third insulating film 113 is provided over the second insulating film 112. The pixel signal lines SL are provided over the third insulating film 113. The fourth insulating film 114 is provided over the third insulating film 113 and covers the pixel signal lines SL. While this is not illustrated in Fig. 3, the scanning lines are provided, for example, over the second insulating film 112. The common electrode DE is provided above the fourth insulating film 114. The common electrode DE is provided continuously above the display area DA. However, the common electrode DE is not limited to this configuration and can be slotted and divided into several sections. The common electrode DE is covered by the fifth insulating film 115. The pixel electrodes PE are positioned above the fifth insulating film 115 and face the common electrode DE, with the fifth insulating film 115 inserted between them. The pixel electrodes PE and the common electrode DE are made of a translucent conductive material, such as ITO or IZO. The pixel electrodes PE and the fifth insulating film 115 are covered with the first orientation film AL1. The first insulating film 111, the second insulating film 112, the third insulating film 113, and the fifth insulating film 115 are made of a translucent inorganic material, such as silicon oxide or silicon nitride. The fourth insulating film 114 is made of a translucent resin material and has a greater film thickness than the other insulating films made of the inorganic material. The counter substrate SUB2 contains, for example, a light-blocking layer BM, the color filters CFR, CFG and CFB, a coating layer OC and a second orientation film AL2 on a side of the second substrate 120 facing the arrangement substrate SUB1. The counter substrate SUB2 contains a conductive layer 121 on a side of the second substrate 120 opposite the arrangement substrate SUB1. In the display area DA, the light-blocking layer BM is located on the side of the second substrate 120 facing the arrangement substrate SUB1. The light-blocking layer BM defines openings facing the respective pixel electrodes PE. The pixel electrodes PE are delineated for the respective openings of the pixels PX. The light-blocking layer BM is made of a black resin material or a light-blocking metal material. Each of the color filters CFR, CFG, and CFB is located on the side of the second substrate 120 facing the arrangement substrate SUB1, with the ends of each color filter overlapping the light-blocking layer BM. In one example, the color filters CFR, CFG, and CFB are made of red, green, and blue colored resin materials, respectively. The coating layer OC covers the color filters CFR, CFG, and CFB. The coating layer OC is made of a translucent resin material. The second orientation film AL2 covers the coating layer OC. The first and second orientation films AL1 and AL2 are, for example, made of a material that exhibits horizontal orientation properties. The conductive layer 121 is positioned above the second substrate 120. The conductive layer 121 is a translucent conductive material, such as ITO. Externally applied static electricity or static electricity charged onto a second polarization plate PL2 flows through the conductive layer 121. The display panel 6 can dissipate the static electricity quickly and consequently reduce the static electricity applied to the liquid crystal layer LC, which serves as a display layer. As a result, the display panel 6 can exhibit improved resistance to electrostatic discharge (ESD). A first polarization plate PL1 is arranged on a surface facing an outer side of the first substrate 110. The second polarization plate PL2 is arranged on an outer side or surface on one side of the viewing position of the second substrate 120. A first polarization axis of the first polarization plate PL1 and a second polarization axis of the second polarization plate PL2 are, for example, in a crossed Nichols positional relationship in a Dx-Dy plane. In addition to the first and second polarization plates PL1 and PL2, the display panel 6 may contain other optical functional elements, such as a delay plate. The array substrate SUB1 and the counter substrate SUB2 are arranged such that the first and second orientation films AL1 and AL2 face each other. The liquid crystal layer LC is encapsulated between the first and second orientation films AL1 and AL2. The liquid crystal layer LC consists of a negative liquid crystal material with a negative anisotropy of the dielectric constant or a positive liquid crystal material with a positive anisotropy of the dielectric constant. For example, if the liquid crystal layer LC is a negatively charged liquid crystal material and no voltage is applied to it, the liquid crystal molecules LM are initially oriented such that their principal axes are aligned along the first direction Dx in the plane Dx-Dy. Conversely, when a voltage is applied to the liquid crystal layer LC—that is, in an on-state where an electric field is established between the pixel electrodes PE and the common electrode DE—the liquid crystal molecules LM are influenced by the electric field, changing their orientation. In the on-state, the polarization state of linearly polarized light incident on the liquid crystal layer LC changes according to the orientation state of the liquid crystal molecules LM as it passes through the liquid crystal layer LC. The switching element Trr, the pixel signal line SL, and the scanning line GL of each of the subpixels SPX illustrated in Fig. 17 are formed in the mounting substrate SUB1. The pixel signal line SL runs in the second direction Dy. The pixel signal line SL is the wiring for supplying the pixel signal to each of the pixel electrodes PE (see Fig. 18). The scanning line GL runs in the first direction Dx. The scanning line GL is the wiring for supplying the driver signal (scanning signal) that controls each of the switching elements Trr. The pixel PIX contains the subpixels SPX. Each of the subpixels SPX contains the switching element Trr. The switching element Trr consists of a thin-film transistor and, in this example, is an n-channel metal-oxide-semiconductor TFT (n-channel MOS-TFT). The fifth insulating film 115 is provided between the pixel electrodes PE and the common electrode DE, which are illustrated in Fig. 18, with these components providing a storage capacity. The color ranges, colored, for example, in the three colors red (R), green (G), and blue (B), are arranged periodically as the color filters CFR, CFG, and CFB illustrated in Fig. 18. The color ranges in the three colors red (R), green (G), and blue (B) correspond as a set to the subpixels SPX-R, SPX-G, and SPX-B. The subpixels SPX corresponding to the three color ranges form, as a set, the pixel PIX. That is, the display panel 6 contains the subpixel SPX-R, which displays red, the subpixel SPX-G, which displays green, and the subpixel SPX-B, which displays blue. The color filters can contain color ranges for four or more colors. In this case, the pixel PIX can contain four or more subpixels SPX. As illustrated in Fig. 18, the dimming board VC is inserted between the display panel 6 and the backlight BL. The following describes a specific structure of the dimming board VC. As illustrated in Fig. 18, the liquid crystal layer LC of the dimming panel VC is located between a third substrate 150 and a fourth substrate 160. The liquid crystal layer LC of the dimming panel VC is formed from a liquid crystal operating in a vertical electric field mode, such as a twisted nematic (TN) liquid crystal. The liquid crystal layer LC of the light control panel VC can utilize a liquid crystal operating in any of several different modes, such as a vertically oriented (VA) mode and an electrically controlled birefringent (ECB) mode. The third substrate 150 and the fourth substrate 160 are formed from a translucent material, such as a glass substrate or a resin substrate. A first electrode 151 and a third orientation film AL11 are provided on one side of the third substrate 150, which faces the fourth substrate 160. The first electrode 151 is made of a translucent conductive material, such as ITO or IZO. The first electrode 151 is covered with the third orientation film AL11. A second electrode 161 and a fourth orientation film AL12 are provided on one side of the fourth substrate 160, facing the third substrate 150. The second electrode 161 is made of a translucent conductive material, such as ITO or IZO. The second electrode 161 is covered with the fourth orientation film AL12. An electric field between the first and second electrodes 151 and 161 is controlled by the viewing angle control device illustrated in Fig. 16. The viewing angle control device illustrated in Fig. 16 can tilt a main viewing direction FVC, for example, by the angle θ with respect to the third direction Dz from a direction parallel to the third direction Dz towards the first direction Dx. A third polarizing plate PL11 is arranged on a surface facing an outer side of the third substrate 150. A fourth polarizing plate PL12 is arranged on an outer side or surface on the side of the viewing position of the fourth substrate 160. One polarization axis of the third polarizing plate PL11 and the second polarization axis of the fourth polarizing plate PL12 are, for example, in a crossed Nichols positional relationship in the Dx-Dy plane. In addition to the third and fourth polarizing plates PL11 and PL12, the dimming plate VC may also include other optical functional elements, such as a retardation plate. Fig. 19 is a sectional view taken along the XIX-XIX specified in Fig. 17. Fig. 19 does not illustrate the translucent cover element CB, the dimming plate VC, and the backlight BL, which are illustrated in Fig. 16. As illustrated in Fig. 17, the second opening 51a of the light guide path 51 is positioned so that, in the top view, it does not overlap any of the subpixels SPX-R, SPX-G, and SPX-B. The light-receiving element 3 is integrated into the mounting substrate SUB1. The first transistor Tr, which drives the light-receiving element 3, contains the semiconductor layer 61, the source electrode 62, the drain electrode 63, the gate electrodes 64, and the light-blocking layers 69. The light-blocking layers 69 are metal layers that block the light from the backlight BL. An upper section of the photodiode 30 is coupled to the power supply signal line Lvs (Fig. 5) via the coupling wiring 36. The light-blocking layers 69 are provided above the first substrate 110. The first insulating film 111 is provided above the first substrate 110 to cover the light-blocking layers 69. The semiconductor layer 61 is provided above the first insulating film 111. The second insulating film 112 is provided above the first insulating film 111 to cover the semiconductor layer 61. The gate electrodes 64 are provided above the second insulating film 112. The third insulating film 113 is provided above the second insulating film 112 to cover the gate electrodes 64. The source electrode 62 (output signal line SLS) and the drain electrode 63 (third conductive layer 67) are provided above the third insulating film 113. In the second embodiment, the drain electrode 63 is electrically coupled to the semiconductor layer 61 by a through-hole extending through the second insulating film 112 and the third insulating film 113. The source electrode 62 is electrically coupled to the semiconductor layer 61 by the first conductive layer 65 in a contact hole. An insulating layer 141 is provided above the third insulating film 113 to cover the source electrode 62 (output signal line SLS) and the drain electrode 63. The photodiode 30 is formed above the insulating layer 141. A lower section of the photodiode 30 is electrically coupled to the drain electrode 63 via a contact hole. An insulating layer 142 covers the photodiode 30 and is provided above the insulating layer 141. The source electrode 62 is provided above the insulating layer 142. An insulating layer 143 is formed above the insulating layer 142 to cover the source electrode 62. An insulating layer 144 is formed above the insulating layer 144 to cover the coupling wiring 36. The fourth insulating film 114 described above contains the insulating layers 141, 142, 143, and 144. As illustrated in Fig. 19, the counter substrate SUB2 contains the light guide 50. The light guide 50 illustrated in Fig. 19 is formed in the same layer as the light-blocking layer BM and the color filters CFR, CFG, and CFB, which are illustrated in Fig. 18. The light guide 50 contains the light paths 51 and the light-blocking section 55. Each of the light paths 51 can transmit the light L2 (see Fig. 2). The light-blocking section 55 is formed from the same material as the light-blocking layer BM. An infrared attenuation layer 59 is formed on the first surface where the first aperture 51b is located. The infrared attenuation layer 59 is an optical filter that reduces infrared light but does not significantly reduce visible light from the light source L2 (see Fig. 2). The infrared attenuation layer 59 makes the photodiode 30 less sensitive to infrared light. The infrared attenuation layer 59 is not required. As illustrated in Figures 17 and 19, the light guide path 51 is referred to as a "light guide column," extending at an angle θ in the third direction Dz from the first surface with the first aperture 51b to the second surface with the second aperture 51a. That is, the second apertures 51a of the light guide paths 51 are offset in the first direction Dx from the first apertures 51b of the light guide 50. This configuration makes it difficult for the scattered light propagating through the liquid crystal layer LC to be seen through the light guide 50, consequently reducing the "black floating" of the display panel 6 and improving the display quality. Fig. 20 is an explanatory graphic illustration to explain the main viewing direction of the display device according to the second embodiment. When the display device 1 of the second embodiment is installed in a vehicle, it can be switched between a first operating mode in which the display device 1 is visible from both the driver's seat and the passenger's seat, and a second operating mode in which the display device 1 is visible only from the passenger's seat. As illustrated in Fig. 20, in the second operating mode the main viewing direction FVC is controlled such that a screen can be seen from the passenger's seat, while the screen cannot be seen from the driver's seat. Fig. 21 is an explanatory graphical representation illustrating the relationship between the viewing angle and the luminance distribution in a horizontal plane of the display device according to the second embodiment. In Fig. 21, the horizontal axis represents the viewing angle in the horizontal plane, while the vertical axis represents the luminance. In the display device 1 illustrated in Fig. 20, the principal viewing direction FVC denotes a direction with a principal viewing angle θ1 at which the luminance distribution SLu is at its maximum, as illustrated in Fig. 21. Fig. 22 is an explanatory graphical representation illustrating the directional dependence of the sensitivity of the detection element according to the second embodiment. Fig. 23 is a schematic graphical representation illustrating the relationship between the viewing angle and the directional dependence of the sensitivity of the detection element in the horizontal plane of the display device according to the second embodiment. In Fig. 23, the optical sensor 5 is located on the back of the display panel 6 to be illustrated separately from the display panel 6, although in reality the optical sensor 5 is integrated into the display panel 6. In Fig. 22, the horizontal axis represents the angle in the horizontal plane, while the vertical axis represents the sensitivity of the light-receiving element 3. As in Fig.As illustrated in Figure 22, the peak of the sensitivity Stu of the light receiving element 3 is shifted in the opposite direction to the angle of the principal viewing direction FVC. When the display device 1 (see Fig. 20) is operated and the object Fg to be detected is located in the third direction Dz of the display device 1, as illustrated in Fig. 23, the light emitted by the display panel exhibits a peak in luminance in the main viewing direction FVC. When the light emitted by the display panel strikes the object Fg to be detected, the reflected light is reflected at an angle of reflection equal to the angle of incidence. Therefore, by shifting the peak of sensitivity Stu of the light receiving element 3 in the opposite direction to the angle of the main viewing direction FVC, the reflected light from the object Fg to be detected, passing through the light guide 50 and reaching the light receiving element 3, increases. As a result, the sensitivity of the light receiving element 3 is increased. If the object Fg to be detected, illustrated in Fig. 23, is an ideal plane, the angle of incidence is almost equal to the angle of reflection. Therefore, the magnitude of the principal viewing angle θ1 is preferably equal to the magnitude of the angle θ at which the sensitivity Stu of the light-receiving element 3 is maximized. The sensitivity of the light-receiving element 3 is higher if the magnitude of the angle θ described above is closer to the magnitude of the principal viewing angle θ1 of the display panel 6. Alternatively, the sensitivity Stu of the light-receiving element 3 increases if the direction in which the principal viewing angle θ1 is shifted from the third direction Dz is along the opposite direction to the direction in which the light guide path 51 is inclined. As described above, the principal viewing angle θ1 of the display panel 6 is shifted from the normal direction of the display panel 6 (third direction Dz). When viewed from the visible side in the normal direction of the display panel 6, the first aperture 51b of the light guide path 51, which is closest to the light receiving element 3, is shifted from the second aperture 51a of the light guide path 51, which is furthest from the light receiving element 3. When viewed from the visible side in the third direction Dz of the display panel 6, the direction in which the principal viewing angle θ1 of the display panel 6 is shifted from the third direction Dz of the display panel 6 is the direction in which the first aperture 51b is shifted from the second aperture 51a.The direction in which the principal viewing angle θ1 of the display panel 6 is shifted from the third direction Dz of the display panel 6 is the opposite direction to the direction in which the second aperture 51a is shifted from the first aperture 51b. If the direction in which the principal viewing angle θ1 of the display panel 6 is shifted from the third direction Dz of the display panel 6 is not the same as the direction in which the second aperture 51a is shifted from the first aperture 51b, but rather follows this direction, the reflected light from the display panel 6 can be directed to the light receiving element 3. As a result, the light receiving element 3 can output sufficient detection data. First modification of the second embodiment Fig. 24 is a sectional view of the light-receiving element according to a first modification of the second embodiment. The section in Fig. 24 is a modification of the section taken along the XIX-XIX illustrated in Fig. 17. The same structure as in each of the first embodiment, the second modification of the first embodiment, and the second embodiment is designated by the same reference numeral and is not described in detail. The light guide 50 contains the light-guiding paths 51, the light-blocking sections 55A, 55B, and 55C. The light-blocking sections 55A, 55B, and 55C are stacked in the third direction Dz. When each of the light-blocking sections 55A, 55B, and 55C is viewed in the third direction Dz, the light-guiding path 51, acting as a pinhole aperture, has an elliptical shape in the same way as in Fig. 13.The direction of the major axis of this ellipse is the first direction Dx, which runs along the direction of the displacement of the second aperture 51a from the first aperture 51b. In the embodiments of the present disclosure, for example, the following examples have been described in which the direction in which the second opening 51a is displaced from the first opening 51b is the first direction Dx, but the direction in which the second opening 51a is displaced from the first opening 51b can be any direction in the plane Dx-Dy. As illustrated in Fig. 23, the optical sensor 5 can be located on the back of the display panel 6, which serves as a liquid crystal display device.

Claims

Display device (1) comprising: a display panel (6); several light receiving elements (3) which, when viewed from a normal direction to the display panel (6), are located within a display area (DA) of the display panel (6) and are configured to receive light;and a light guide (50) which is provided such that it overlaps the light receiving elements (3), wherein the light guide (50) comprises light guide paths (51) which at least partially overlap the light receiving elements (3), and a light-blocking section (55) which has a higher extinction of the light than that of the light guide paths (51), the light guide paths (51) being inclined in a predetermined first direction with respect to the normal direction of the display panel (6), and when viewed from a visible side in the normal direction of the display panel (6), first openings (51b) of the light guide paths (51) which are located closest to the light receiving elements (3) are displaced from second openings (51a) of the light guide paths (51) which are located furthest from the light receiving elements (3). Display device (1) according to claim 1, wherein, when viewed from the normal direction of the display panel (6), the first openings (51b) of the light guide paths (51) which are closest to the light receiving elements (3) overlap the light receiving elements (3) and the second openings (51a) of the light guide paths (51) which are furthest from the light receiving elements (3) do not overlap the first openings (51b). Display device (1) according to claim 1 or 2, wherein the light guide paths (51) in a plane orthogonal to the normal direction of the display panel (6) have an ellipse shape and the second openings (51a) of the light guide paths (51) are displaced from the first openings (51b) in a direction in which a principal axis of the ellipse runs. Display device (1) according to claim 1, wherein, in order to cause the light receiving elements (3) to detect a detection area (G1) which, when viewed from the normal direction of the display panel (6), overlaps the light receiving elements (3), and to detect reflected light from an object to be detected, a light emission area (G2) is configured as a section of the display area (DA) of the display panel (6) to emit light, and, when viewed from the visible side in the normal direction of the display panel (6), a direction in which a center of gravity (C2) of the light emission area (G2) is displaced from a center of gravity (C1) of the detection area (G1) is a direction in which the second openings (51a) are displaced from the first openings (51b). Display device (1) according to one of claims 1 to 4, wherein the light guide (50) comprises lenses covering the second openings (51a). Display device (1) comprising: a display panel (6); several light-receiving elements (3) which, when viewed from a normal direction to the display panel (6), are located within a display area (DA) of the display panel (6) and are configured to receive light; and a light guide (50) which is configured to overlap the light-receiving elements (3), wherein the light guide (50) comprises light guide paths (51) which at least partially overlap the light-receiving elements (3), and a light-blocking section (55) which has a higher extinction of light than that of the light guide paths (51), the light guide paths (51) being inclined in a predetermined first direction with respect to the normal direction of the display panel (6) to cause the light-receiving elements (3) to detect a detection area (G1) which, when viewed from the normal direction to the display panel (6), overlaps the light-receiving elements (3).and to detect reflected light from an object to be detected, a light emission area (G2) is configured as a section of the display area (DA) of the display panel (6) to emit light, and a direction in which a centroid (C2) of the light emission area (G2) is displaced from a centroid (C1) of the detection area (G1), is the first direction when viewed from a visible side in the normal direction of the display panel (6). Display device (1) comprising: a display panel (6); several light receiving elements (3) which, when viewed from a normal direction to the display panel (6), are located within a display area (DA) of the display panel (6) and are configured to receive light; a light guide (50) which is provided to overlap the light receiving elements (3), wherein the light guide (50) comprises light guide paths (51) which at least partially overlap the light receiving elements (3), and a light-blocking section (55) which has a higher extinction of light than that of the light guide paths (51), and the light guide paths (51) are inclined in a predetermined first direction with respect to the normal direction of the display panel (6);and comprising an optical sensor comprising the light receiving elements (3), wherein the optical sensor is located on a side opposite a visible side of the display panel (6) and overlaps the display area (DA) of the display panel (6). Display device (1) comprising: a display panel (6); several light receiving elements (3) which, when viewed from a normal direction to the display panel (6), are located within a display area (DA) of the display panel (6) and are configured to receive light; and a light guide (50) which is provided to overlap the light receiving elements (3), wherein the light guide (50) comprises light guide paths (51) which at least partially overlap the light receiving elements (3), and a light-blocking section (55) which has a higher extinction of light than that of the light guide paths (51), the light guide paths (51) being inclined in a predetermined first direction with respect to the normal direction of the display panel (6), and the light receiving elements (3) and the light guide (50) being arranged within the display panel (6). Display device (1) according to one of claims 1 to 6, wherein the display panel (6) comprises an arrangement substrate and a counter-substrate which faces the arrangement substrate in the normal direction of the display panel (6), the light receiving elements (3) are provided on the arrangement substrate, and the light guide (50) is provided on the counter-substrate. Display device (1) comprising: a display panel (6); several light receiving elements (3) which, when viewed from a normal direction to the display panel (6), are located within a display area (DA) of the display panel (6) and are configured to receive light; and a light guide (50) which is provided such that it overlaps the light receiving elements (3), wherein the light guide (50) comprises light guide paths (51) which at least partially overlap the light receiving elements (3), and a light-blocking section (55) which has a higher extinction of the light than that of the light guide paths (51), the light guide paths (51) being inclined in a predetermined first direction with respect to the normal direction of the display panel (6), a principal viewing angle of the display panel (6) being shifted from the normal direction of the display panel (6), when viewed from a visible side in the normal direction of the display panel (6) first openings (51b) of the light guide paths (51),which are located closest to the light receiving elements (3), are displaced from second openings (51a) of the light guide paths (51) which are located furthest from the light receiving elements (3), and when viewed from the visible side in the normal direction of the display panel (6), is a direction in which the principal viewing angle of the display panel (6) is displaced from the normal direction of the display panel (6), is a direction in which the first openings (51b) are displaced from the second openings (51a). Display device (1) comprising: a display panel (6); several light receiving elements (3) which, when viewed from a normal direction to the display panel (6), are located within a display area (DA) of the display panel (6) and are configured to receive light;and a light guide (50) which is provided such that it overlaps the light receiving elements (3), wherein the light guide (50) comprises light guide paths (51) which at least partially overlap the light receiving elements (3), and a light-blocking section (55) which has a higher extinction of the light than that of the light guide paths (51), the light guide paths (51) being inclined in a predetermined first direction with respect to the normal direction of the display panel (6), a principal viewing angle of the display panel (6) being displaced from the normal direction of the display panel (6), and when viewed from a visible side in the normal direction of the display panel (6), a direction in which the principal viewing angle of the display panel (6) is displaced from the normal direction of the display panel (6) is a direction opposite to the first direction.

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