DISPLAY PANEL AND METHOD FOR ITS MANUFACTURING
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- AU OPTRONICS CORP
- Filing Date
- 2023-02-13
- Publication Date
- 2026-07-23
AI Technical Summary
The challenge in manufacturing micro-LED displays lies in the mechanical transfer process, which often results in misalignment and damage of micro-LEDs, leading to poor electrical connections and non-functional pixels, necessitating inefficient maintenance processes.
A display panel design featuring a circuit substrate with pad structures, conductive blocks, and a mold layer that includes conductive interconnect structures to secure light-emitting diodes, allowing for effective repair of defective pixels by replacing and reconnecting diodes through a method that minimizes interference with the panel's brightness.
The solution enhances the reliability of electrical connections and improves the maintenance process by reducing the impact of step differences, ensuring proper alignment and functionality of light-emitting diodes, thereby improving the overall performance and efficiency of the display panel.
Smart Images
Figure 00000000_0000_ABST
Abstract
Description
Background Technical field
[0001] The disclosure relates to a display panel and a method for its manufacture. Description of the state of the art
[0002] A light-emitting diode (LED) is a type of electroluminescent semiconductor element that offers the advantages of high efficiency, long lifespan, low susceptibility to breakage, fast response time, and high reliability. Generally, the key technology for manufacturing micro LED displays lies in transferring a large number of LEDs onto the pixel array substrate. However, this transfer technology is a mechanical process, and its effectiveness depends on the precision of the machine and the accuracy and performance of the transfer device itself. Errors in machine operation and inaccuracies in the transfer device can occur during the micro LED extraction process. Furthermore, deviations from the machine's intended alignment can occur during the micro LED placement.If the micro-LEDs are not positioned correctly or are damaged during the transfer and assembly process, they may not function properly. Generally, malfunctioning pixels are repaired through a maintenance process. Therefore, many manufacturers are currently working on developing methods to improve the performance of this maintenance process. overview
[0003] The revelation provides a display panel that can improve the problem of poor electrical connection between the light-emitting diode and the pad due to the step difference.
[0004] The disclosure provides a manufacturing process for a display panel that can improve the performance of the maintenance process.
[0005] At least one embodiment of the disclosure provides a display panel. The display panel includes a circuit substrate, several pixel structures, and a mold layer. The circuit substrate has several first pad structures and several second pad structures. The pixel structures are arranged over a display area of the circuit substrate. Each of at least one of the pixel structures includes a first light-emitting diode, a first conductive block, and a first conductive interconnect structure. The first light-emitting diode is arranged on a corresponding first pad structure. The first conductive block is arranged on a corresponding second pad structure. The first conductive interconnect structure electrically connects the first light-emitting diode to the first conductive block. The mold layer is located over the circuit substrate and surrounds the first light-emitting diode and the first conductive block.The first conductive connection structure is located on the mold layer.
[0006] At least one embodiment of the disclosure provides a manufacturing method for a display panel that includes the following process. A circuit substrate is provided, wherein the circuit substrate has multiple first pad structures and multiple second pad structures. Multiple conductive blocks are formed on the second pad structures. Multiple first light-emitting diodes are arranged on the first pad structures. A mold layer is formed to surround the conductive blocks and the first light-emitting diodes. Multiple first conductive interconnect structures are formed on the mold layer, wherein the first conductive interconnect structures electrically connect at least a portion of the first light-emitting diodes to at least a portion of the conductive blocks to form a plurality of pixel structures. A portion of the mold layer is removed to form an opening that exposes at least a portion of the first pad structures.A second light-emitting diode is arranged in the opening, and the second light-emitting diode is bonded to at least part of the first pad structures. A second conductive connection structure is formed on the mold layer, wherein the second conductive connection structure electrically connects the second light-emitting diode to a corresponding conductive block. BRIEF DESCRIPTION OF THE DRAWING Fig. 1A, Fig. 2A, Fig. 3A, Fig. 4A, Fig. 5A, Fig. 6A, Fig. 7A, Fig. 8A and Fig. Figure 9A are schematic top views of a manufacturing process for a display panel according to an embodiment of the disclosure. Fig. 1B, Fig. 2B, Fig. 3B, Fig. 4B, Fig. 5B and Fig. 6B are schematic cross-sectional views along a line AA' of Fig. 1A, Fig. 2A, Fig. 3A, Fig. 4A, Fig. 5A or Fig. 6A. Fig. 7B, Fig. 8B and Fig. 9B are schematic cross-sectional views along a line BB' of Fig. 7A, Fig. 8A or Fig. 9A. Fig. 10A, Fig. 11A, Fig. 12A, Fig. 13A, Fig. 14A, Fig. 15A, Fig. 16A, Fig. 17A, Fig. 18A and Fig. Figure 19A are schematic top views of a manufacturing process for a display panel according to an embodiment of the disclosure. Fig. 10B, Fig. 11B, Fig. 12B, Fig. 13B, Fig. 14B and Fig. 15B are schematic cross-sectional views along line AA' of Fig. 10A, Fig. 11A, Fig. 12A, Fig. 13A, Fig. 14A or Fig. 15A. Fig. 16B, Fig. 17B, Fig. 18B and Fig. 19B are schematic cross-sectional views along line BB' of Fig. 16A, Fig. 17A, Fig. 18A or Fig. 19A. Fig. Figure 20 is a schematic top view of a display panel according to one embodiment of the disclosure. Fig. Figure 21 is a schematic top view of a display panel according to one embodiment of the disclosure. DETAILED DESCRIPTION OF THE DISCLOSED FORM OF EXECUTION
[0007] Fig. 1A, Fig. 2A, Fig. 3A, Fig. 4A, Fig. 5A, Fig. 6A, Fig. 7A, Fig. 8A and Fig. Figure 9A are schematic top views of a manufacturing process for a display panel according to an embodiment of the disclosure. Fig. 1B, Fig. 2B, Fig. 3B, Fig. 4B, Fig. 5B and Fig. 6B are schematic cross-sectional views along a line AA' of Fig. 1A, Fig. 2A, Fig. 3A, Fig. 4A, Fig. 5A or Fig. 6A. Fig. 7B, Fig. 8B and Fig. 9B are schematic cross-sectional views along a line BB' of Fig. 7A, Fig. 8A or Fig. 9A. More precisely, they are Fig. 1A to Fig. 6B Schematic views of a manufacturing process for a display panel 10. If it is found that a portion of the pixel structures PX in the display panel 10 is defective, the Fig. 7A to Fig. The maintenance process shown in 9B was continued to obtain the 10' display panel.
[0008] With reference to Fig. 1A and Fig. In Figure 1B, a circuit substrate 100 is provided. The circuit substrate 100 has several first pad structures 102 and several second pad structures 104 located on its surface. The circuit substrate 100 includes, for example, a substrate and a circuit structure located on the substrate. The circuit structure includes conductive traces, active elements, passive elements, the first pad structure 102, the second pad structure 104, and other suitable components. For better illustration, we show... Fig. 1B and Fig. 1A The first pad structure 102 and the second pad structure 104 in the circuit substrate 100, and other circuit structures in the circuit substrate 100 are omitted. The first pad structure 102 and the second pad structure 104 are arranged in the display area DR of the circuit substrate 100.
[0009] In this embodiment, the first pad structure 102 comprises a first part 102a and a second part 102b, which are separate from each other. The first part 102a and the second part 102b of the first pad structure 102 are electrically connected to each other via other conductive lines (not shown) or circuit structures. In other words, the same signal is applied to the first part 102a and the second part 102b. In other embodiments, the first part 102a and the second part 102b are connected to each other; in other words, the first pad structure 102 is not divided into two separate parts.
[0010] In this embodiment, the second pad structure 104 includes a third part 104a and a fourth part 104b, which are separate from each other. The third part 104a and the fourth part 104b of the second pad structure 104 are electrically connected to each other via other conductive lines (not shown) or circuit structures. In other words, the same signal is applied to the third part 104a and the fourth part 104b. In other embodiments, the third part 104a and the fourth part 104b are connected to each other; in other words, the second pad structure 104 is not divided into two separate parts.
[0011] In this embodiment, in the first direction D1, the first part 102a and the second part 102b are arranged alternately, and the third part 104a and the fourth part 104b are arranged alternately. In the second direction D2, the first part 102a and the third part 104a are arranged alternately, and the second part 102b and the fourth part 104b are arranged alternately. In this embodiment, the first direction D1 is perpendicular to the second direction D2.
[0012] In this embodiment, the first pad structure 102 and the second pad structure 104 belong to the same structured conductive layer. For example, the first pad structure 102 and the second pad structure 104 are formed by structuring the same conductive material layer. In some embodiments, the materials of the first pad structure 102 and the second pad structure 104 include metal, metal oxide, or other suitable materials. In some examples, each of the first pad structure 102 and the second pad structure 104 is a single-layer or multi-layer structure.
[0013] With reference to Fig. 2A and Fig. 2B, several first conducting blocks 320a and several second conducting blocks 320b are formed on the second pad structure 104. The first conducting block 320a is formed on the third part 104a of the second pad structure 104, and the second conducting block 320b is formed on the fourth part 104b of the second pad structure 104. The first conducting block 320a is separated from the second conducting block 320b.
[0014] In some embodiments, the first conductive block 320a and the second conductive block 320b further include a seed crystal layer (not shown). The fabrication process for the first conductive block 320a and the second conductive block 320b includes, for example, the following steps. First, a seed crystal layer and a structured photoresist layer are formed on the circuit substrate 100. The seed crystal layer contacts the third part 104a and the fourth part 104b of the second pad structure 104, and the structured photoresist layer has several openings that expose the third part 104a and the fourth part 104b. Then, a metal material is formed on the seed crystal layer in the openings of the structured photoresist layer by electroplating.Finally, the structured photoresist layer and the excess seed crystal layer are removed, and the remaining metal material and the seed crystal layer form the first conductive block 320a and the second conductive block 320b. In some embodiments, the seed crystal layer includes titanium, copper, other suitable conductive materials, or a combination of these materials, and the metal material formed by the aforementioned electroplating includes gold, copper, other suitable metallic materials, or a combination of these materials.
[0015] In some embodiments, the first conductive block 320a and the second conductive block 320b have the same thickness T, where the thickness T is 5 micrometers to 10 micrometers.
[0016] Referring to Fig. 3A and Fig. 3B several first light-emitting diodes 200 are arranged on the first pad structure 102. In this embodiment, the first light-emitting diode 200 is located on the first part 102a of the corresponding first pad structure 102.
[0017] The first light-emitting diode 200 is a vertical light-emitting diode and includes a first electrode 210, a first semiconductor layer 220, a light-emitting layer 230, a second semiconductor layer 240, and a second electrode 250. The first semiconductor layer 220, the light-emitting layer 230, and the second semiconductor layer 240 are stacked sequentially. In some embodiments, one of the first semiconductor layer 220 and the second semiconductor layer 240 is an N-type semiconductor, and the other is a P-type semiconductor. The first electrode 210 and the second electrode 250 are each connected to the first semiconductor layer 220 and the second semiconductor layer 240, respectively. In this embodiment, the top surface area of the first electrode 210 is smaller than the top surface area of the first semiconductor layer 220, but the disclosure is not limited to this. The top surface area of the first electrode 210 can be adapted according to actual requirements.For example, in other embodiments, the upper surface of the first electrode 210 is the same as the upper surface of the first semiconductor layer 220. In some embodiments, the first light-emitting diode 200 includes light-emitting diodes of different colors. For example, the first light-emitting diode 200 includes red light-emitting diodes, green light-emitting diodes, blue light-emitting diodes, or light-emitting diodes of other colors. In some embodiments, the first light-emitting diodes 200 of different colors are arranged in the first direction D1, and the first light-emitting diodes 200 of the same color are arranged in the second direction D2, but the disclosure is not limited thereto. In other embodiments, the first light-emitting diodes 200 of different colors are arranged in the second direction D2, and the first light-emitting diodes 200 of the same color are arranged in the first direction D1.
[0018] In this embodiment, the second electrode 250 is bonded to the corresponding first part 102a of the first pad structure 102. For example, the second electrode 250 is bonded to the first part 102a by the conductive connection structure 310. The conductive connection structure 310 is, for example, anisotropic conductive adhesive, solder, or other suitable materials. In some embodiments, the second electrode 250 is eutectically bonded to the first part 102a of the first pad structure 102.
[0019] In some embodiments, after bonding the first light-emitting diode 200 (the upper surface of the first electrode 210) to the first part 102a, the upper surface of the first light-emitting diode 200 is approximately flush with the upper surface of the first conductive block 320a and the upper surface of the second conductive block 320b. In other words, with respect to the circuit substrate 100, the upper surface of the first light-emitting diode 200 is located approximately at the same horizontal level as the upper surface of the first conductive block 320a and the upper surface of the second conductive block 320b.
[0020] Referring to Fig. 4A and Fig. 4B the form layer 110 is formed on the circuit substrate 100, and the form layer 110 surrounds the first conductive block 320a, the second conductive block 320b and the first light-emitting diode 200.
[0021] In some embodiments, the mold layer 110 includes transparent material, gray material, or black material. For example, the mold layer 110 includes epoxy resin, silicone, or other suitable materials, and the mold layer 110 selectively includes carbon black, scatter particles, or other filler particles.
[0022] In this embodiment, the mold layer 110 covers the upper surface of the first conductive block 320a, the upper surface of the second conductive block 320b, and the upper surface of the first light-emitting diode 200. Therefore, plasma treatment must be performed to remove part of the mold layer 110 so that the first conductive block 320a, the second conductive block 320b, and the first light-emitting diode 200 can be exposed, as shown in Fig. 5A and Fig. 5B shown. In some embodiments, the aforementioned plasma treatment is carried out, for example, by sulfur hexafluoride plasma, carbon tetrafluoride plasma, oxygen plasma or a combination thereof.
[0023] In some embodiments, the plasma treatment is carried out until the upper surface area 110t of the molded layer 110 is lower than the upper surface area of the first conductive block 320a, the upper surface area of the second conductive block 320b, and the upper surface area of the first light-emitting diode 200. However, to reduce the probability of a short circuit of the first light-emitting diode 200, the molded layer 110 preferably covers the light-emitting layer 230 and the second semiconductor layer 240. In particular, relative to the circuit substrate 100, the height of the upper surface area 110t of the molded layer 110 is preferably higher than the height of the light-emitting layer 230 of the first light-emitting diode 200.
[0024] Next, with reference to Fig. 6A and Fig. 6B Several first conductive connection structures 400 are formed on the mold layer 110. The first conductive connection structure 400 electrically connects at least a portion of the first light-emitting diode 200 to at least a portion of the first conductive block 320a and the second conductive block 320b to form several pixel structures PX. In this embodiment, the first pad structure 102 includes, corresponding to each of the pixel structures PX, a first part 102a and a second part 102b, which are separated from each other, and the second pad structure 104 includes, corresponding to each of the pixel structures PX, a third part 104a and a fourth part 104b, which are separated from each other.
[0025] In this embodiment, the first conductive connection structure 400 is an L-shaped structure formed by a portion extending along the first direction D1 and a portion extending along the second direction D2, and the first conductive connection structure 400 is simultaneously connected to the first conductive block 320a and the second conductive block 320b. In other embodiments, the first conductive connection structure 400 is a straight strip structure, in which the first conductive connection structure 400 is connected to the first conductive block 320a and not to the second conductive block 320b.
[0026] In some embodiments, the first conductive interconnect structure 400 includes a transparent conductive material, such as a conductive oxide (for example, indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium gallium zinc oxide, or a combination of these materials). Consequently, even if the first conductive interconnect structure 400 covers the top surface of the first light-emitting diode 200, it does not significantly affect the brightness of the display panel 10, but the disclosure is not limited to this. In other embodiments, the first conductive interconnect structure 400 includes an opaque conductive material, such as metal. Consequently, the area of the first conductive interconnect structure 400 covering the top surface of the first light-emitting diode 200 can be reduced. Furthermore, as in Fig. Figure 20 shows only the side of the first electrode 210 of the first light-emitting diode 200, in order to prevent the first conductive interconnect structure 400 from having a significant impact on the brightness of the display panel 30. In some embodiments, the manufacturing process of the first conductive interconnect structure 400 includes physical vapor deposition, chemical vapor deposition, atomic layer deposition, printing, inkjet printing, or other suitable methods. In some embodiments, the definition process for the pattern of the first conductive interconnect structure 400 includes, for example, a lithography process.
[0027] In this embodiment, each of at least one part of the pixel structures PX includes a first light-emitting diode 200, a first conductive block 320a, a second conductive block 320b, a first conductive interconnect structure 400, and a repair area RR. Both the first light-emitting diode 200 and the repair area RR overlap the first pad structure 102, with the first light-emitting diode 200 and the repair area RR each overlapping the first part 102a and the second part 102b, respectively.
[0028] After the first conductive connection structure 400 is formed, the pixel structures PX in the display panel 10 are inspected, and if any part of the pixel structures PX is found to be defective, the in Fig. 7A to Fig. The maintenance process shown in Figure 9B is carried out further. For example, part of the pixel structures PX is a defective pixel structure PX. In the defective pixel structure PX, the first light-emitting diode 200 and / or the first conductive connection structure 400 are damaged, causing the first light-emitting diode 200 in the defective pixel structure PX not to emit light normally. Fig. 7A to Fig. 9B is marked with a cross on the first light-emitting diode 200, which cannot emit light normally.
[0029] With reference to Fig. 7A and Fig. In 7B, a portion of the mold layer 110 is removed to form an opening 112 that exposes at least a portion of the first pad structure 102. Specifically, the opening 112 of the mold layer 110 is located in the repair region RR of the defective pixel structure PX, and the opening 112 exposes the first pad structure 102 of the defective pixel structure PX. In this embodiment, the opening 112 exposes the second part 102b of the first pad structure 102.
[0030] In some embodiments, the removal process for part of the mold layer 110 includes a dry etching process (for example, a laser process) or a wet etching process.
[0031] Referring to Fig. 8A and Fig. 8B is the second light-emitting diode 200R arranged in the opening 112. The second light-emitting diode 200R is bonded to at least part of the first pad structure 102.
[0032] The second light-emitting diode 200R is a vertical light-emitting diode and includes a first electrode 210R, a first semiconductor layer 220R, a light-emitting layer 230R, a second semiconductor layer 240R, and a second electrode 250R. The first semiconductor layer 220R, the light-emitting layer 230R, and the second semiconductor layer 240R are stacked sequentially. In some embodiments, one of the first semiconductor layer 220R and the second semiconductor layer 240R is an N-type semiconductor, and the other is a P-type semiconductor. The first electrode 210R and the second electrode 250R are each connected to the first semiconductor layer 220R and the second semiconductor layer 240R, respectively. In some embodiments, the second light-emitting diode 200R includes light-emitting diodes of different colors.For example, the second light-emitting diode 200R includes red light-emitting diodes, green light-emitting diodes, blue light-emitting diodes, or light-emitting diodes of other colors. In some embodiments, the first light-emitting diode 200 and the second light-emitting diode 200R in a defective pixel structure PX are light-emitting diodes of the same color.
[0033] In some embodiments, after the second light-emitting diode 200R is positioned in the opening 112, a filler material 120 is formed to fill the gap between the second light-emitting diode 200R and the opening 112. The second light-emitting diode 200R and the filler material 120 are placed in the opening 112, and the filler material 120 surrounds the second light-emitting diode 200R. In some embodiments, the forming method for the filler material 120 includes inkjet printing, adhesive application, or other suitable methods. In some embodiments, the filler material 120 includes epoxy resin, silicone, acrylic, or other suitable materials, and the filler material 120 selectively includes carbon black, scatter particles, or other filler particles. The filler material 120 and the forming layer 110 can include the same or different materials.
[0034] With reference to Fig. 9A and Fig. 9B, a second conductive connection structure 500 is formed on the form layer 110. The second conductive connection structure 500 electrically connects the second light-emitting diode 200R to a corresponding conductive block, and thus the display panel 10' including the repaired pixel structure PX' is formed.
[0035] In some embodiments, the second conductive interconnect structure 500 includes a transparent or opaque conductive material formed by adhesive application, inkjet printing, or other suitable methods, but the disclosure is not limited thereto. In other embodiments, the second conductive interconnect structure 500 includes conductive materials formed by chemical vapor deposition, such as tungsten, other metallic materials, or other suitable conductive materials. In some embodiments, the first conductive interconnect structure 400 and the second conductive interconnect structure 500 include the same or different materials.
[0036] Each of the repaired pixel structures PX' includes the first light-emitting diode 200, the second light-emitting diode 200R, the first conductive block 320a, the second conductive block 320b, the first conductive interconnect structure 400, the filler material 120, and the second conductive interconnect structure 500. The first light-emitting diode 200 and the second light-emitting diode 200R are each located on the first part 102a and the second part 102b of the first pad structure 102, respectively. The first conductive block 320a and the second conductive block 320b are each located on the third part 104a and the fourth part 104b of the second pad structure 104, respectively. The first conductive interconnection structure 400 and the second conductive interconnection structure 500 are located on the mold layer 110. The second conductive interconnection structure 500 electrically connects the second light-emitting diode 200R to the second conductive block 320b.In this embodiment, the first light-emitting diode 200 in the repaired pixel structure PX' is not removed, but the disclosure is not limited thereto. In other embodiments, the first light-emitting diode 200 in the repaired pixel structure PX' is removed by an additional process.
[0037] In the repaired pixel structure PX' of this embodiment, since the first conductive link structure 400 is L-shaped, the second conductive link structure 500 electrically connects the first electrode 210R of the second light-emitting diode 200R to the first conductive link structure 400, and the second conductive link structure 500 is electrically connected to the second conductive block 320b through the first conductive link structure 400. The horizontal distance L1 between the second light-emitting diode 200R and the first conductive link structure 400 is smaller than the horizontal distance L2 between the second light-emitting diode 200R and the second conductive block 320b.In other words, when designing the first conductive connection structure 400, the second conductive connection structure 500 can be electrically connected to the first conductive block 320a and the second conductive block 320b without directly touching either of them. Therefore, the size of the second conductive connection structure 500 can be reduced, and its influence on the brightness of the 10' display panel can be minimized.
[0038] In this embodiment, since the conductive connection structure 500 is formed on the mold layer 110 and can be electrically connected to the second pad structure 104 by the first conductive block 320a and / or the second conductive block 320b, it is therefore possible to prevent interruption of the conductive connection structure 500 caused by the step difference between the first electrode 210R of the second light-emitting diode 200R and the second pad structure 104, and to improve the performance of the maintenance process.
[0039] Fig. 10A, Fig. 11A, Fig. 12A, Fig. 13A, Fig. 14A, Fig. 15A, Fig. 16A, Fig. 17A, Fig. 18A and Fig. Figure 19A are schematic top views of a manufacturing process for a display panel according to an embodiment of the disclosure. Fig. 10B, Fig. 11B, Fig. 12B, Fig. 13B, Fig. 14B and Fig. 15B are schematic cross-sectional views along line AA' of Fig. 10A, Fig. 11A, Fig. 12A, Fig. 13A, Fig. 14A or Fig. 15A. Fig. 16B, Fig. 17B, Fig. 18B and Fig. 19B are schematic cross-sectional views along line BB' of Fig. 16A, Fig. 17A, Fig. 18A or Fig. 19A. More precisely, they are Fig. 10A to Fig. 15B Schematic views of a manufacturing process for a display panel 20. If it is found that a portion of the pixel structures PX in the display panel 20 is defective, the Fig. 16A to Fig. The maintenance process shown in Figure 19B was continued to obtain the 20' display panel.
[0040] It should be noted that the embodiment of Fig. 10A to Fig. 19B the reference numerals and part of the content of the embodiment of Fig. 1A to Fig. 9B is used, and the same or similar reference numerals are used to denote the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted part, reference may be made to the preceding embodiment, and details are not described here.
[0041] With reference to Fig. 10A and Fig. In embodiment 10B, a circuit substrate 100 is provided. The circuit substrate 100 has several first pad structures 102 and several second pad structures 104 located on its surface. In this embodiment, each of the first pad structures 102 does not enclose several separate parts, and each of the second pad structures 104 does not enclose several separate parts.
[0042] In this embodiment, the first pad structures 102 are arranged along the first direction D1, and the second pad structures 104 are arranged along the first direction D1. In the second direction D2, the first pad structures 102 and the second pad structures 104 are arranged alternately.
[0043] With reference to Fig. 11A and Fig. 11B several first conducting blocks 320 are formed on the second pad structures 104.
[0044] In some embodiments, the first conductive block 320 further includes a seed crystal layer (not shown). The fabrication process of the first conductive block 320 includes, for example, the following steps. First, a seed crystal layer and a structured photoresist layer are formed on the circuit substrate 100, wherein the seed crystal layer contacts the second pad structure 104 and the structured photoresist layer has an opening that exposes the second pad structure 104. Then, a metal material is formed in the opening of the structured photoresist layer by electroplating. Finally, the structured photoresist layer and the excess seed crystal layer are removed, and the remaining metal material and the seed crystal layer form the first conductive block 320.In some embodiments, the seed crystal layer includes titanium, chromium, copper, other suitable conductive materials or a combination of these materials, and the metallic material formed by the aforementioned electroplating includes gold, copper, other suitable metallic materials or a combination of these materials.
[0045] In some embodiments, the thickness T of the first conductive block is 320 5 micrometers to 10 micrometers.
[0046] Referring to Fig. 12A and Fig. In Figure 12B, several first light-emitting diodes 200 are arranged on the first pad structure 102. In some embodiments, the first light-emitting diode 200 includes light-emitting diodes of different colors. For example, the first light-emitting diode 200 includes red light-emitting diodes, green light-emitting diodes, blue light-emitting diodes, or light-emitting diodes of other colors. In some embodiments, the first light-emitting diodes 200 of different colors are arranged in the first direction D1, and the first light-emitting diodes 200 of the same color are arranged in the second direction D2, but the disclosure is not limited thereto. In other embodiments, the first light-emitting diodes 200 of different colors are arranged in the second direction D2, and the first light-emitting diodes 200 of the same color are arranged in the first direction D1.In some embodiments, two rows of the first light-emitting diodes 200 of the same color are arranged together. For example, two rows of red light-emitting diodes, two rows of green light-emitting diodes, and two rows of blue light-emitting diodes are arranged next to each other. In this case, two adjacent light-emitting diodes of the same color can be switched on and off simultaneously.
[0047] In this embodiment, the second electrode 250 is bonded to the corresponding first pad structure 102. For example, the second electrode 250 is bonded to the first pad structure 102 via the conductive connection structure 310. In some embodiments, the second electrode 250 is eutectically bonded to the first pad structure 102.
[0048] In some embodiments, the upper surface of the first light-emitting diode 200 (the upper surface of the first electrode 210) is approximately flush with the upper surface of the first conductive block 320 after bonding the first light-emitting diode 200 to the first pad structure 102. In other words, with respect to the circuit substrate 100, the upper surface of the first light-emitting diode 200 is located approximately on the same horizontal plane as the first conductive block 320.
[0049] Referring to Fig. 13A and Fig. 13B the form layer 110 is formed on the circuit substrate 100, and the form layer 110 surrounds the first conductive block 320 and the first light-emitting diode 200.
[0050] In this embodiment, the molded layer 110 covers the upper surface of the first conductive block 320 and the upper surface of the first light-emitting diode 200. Therefore, plasma treatment must be performed to remove part of the molded layer 110 so that the first conductive block 320 and the first light-emitting diode 200 can be exposed, as shown in Fig. 14A and Fig. Figure 14B shows that in some embodiments the aforementioned plasma treatment is carried out, for example, by sulfur hexafluoride plasma, carbon tetrafluoride plasma, oxygen plasma or a combination thereof.
[0051] In some embodiments, the plasma treatment is carried out until the upper surface area 110t of the molded layer 110 is lower than the upper surface area of the first conductive block 320 and the upper surface area of the first light-emitting diode 200. However, to reduce the probability of a short circuit of the first light-emitting diode 200, the molded layer 110 preferably covers the light-emitting layer 230 and the second semiconductor layer 240. In particular, relative to the circuit substrate 100, the height of the upper surface area 110t of the molded layer 110 is preferably higher than the height of the light-emitting layer 230 of the first light-emitting diode 200.
[0052] Next, with reference to Fig. 15A and Fig. 15B Several first conductive connection structures 400 are formed on the mold layer 110. The first conductive connection structure 400 electrically connects at least a portion of the first light-emitting diode 200 to at least a portion of the first conductive block 320 to form several pixel structures PX. In this embodiment, the first conductive connection structure 400 is a straight strip extending along the first direction D1.
[0053] In this embodiment, each of the pixel structures PX corresponds to a first pad structure 102 and a second pad structure 104. In this embodiment, each of at least one part of the pixel structures PX includes a first light-emitting diode 200, a first conductive block 320, and a first conductive interconnect structure 400. The first light-emitting diode 200 and the first conductive block 320 each overlap the first pad structure 102 and the second pad structure 104, respectively.
[0054] In other embodiments, each of the pixel structures PX corresponds to two adjacent first pad structures 102 and corresponding two second pad structures 104, and each of at least one part of the pixel structures PX includes two adjacent first light-emitting diodes 200, two adjacent first conductive blocks 320, and two adjacent first conductive interconnect structures 400. In the case that each of the pixel structures PX includes two first light-emitting diodes 200, it is possible to choose not to repair the pixel structure PX, even if one of the first light-emitting diodes 200 in the pixel structure PX is damaged.
[0055] After the first conductive connection structure 400 is formed, the pixel structures PX in the display panel 20 are checked, and if any part of the pixel structures PX is found to be defective, the in Fig. 16A to Fig. The maintenance process shown in Figure 19B is carried out further. For example, some of the pixel structures PX are defective. In the defective pixel structure PX, the first light-emitting diode 200 and / or the first conductive link structure 400 are damaged, causing the first light-emitting diode 200 in the defective pixel structure PX to not emit light normally. Fig. 16A to Fig. 19B is marked with a cross on the first light-emitting diode 200, which cannot emit light normally.
[0056] With reference to Fig. 17A and Fig. In embodiment 17B, a portion of the mold layer 110 is removed to form an opening 112 that exposes at least a portion of the first pad structure 102. In this embodiment, at least one defective first light-emitting diode 200 is located in the removed portion of the mold layer 110, and the defective first light-emitting diode 200 is removed, so that at least a portion of the first pad structure 102 is exposed beneath the defective first light-emitting diode 200.
[0057] In some embodiments, the removal method for part of the mold layer 110 includes a dry etching process (for example, a laser process) or a wet etching process. In some embodiments, the method for removing the defective first light-emitting diode 200 includes a laser process (for example, an ultraviolet laser or infrared laser), vacuum extraction, or other suitable methods.
[0058] In this embodiment, a portion of the first conductive interconnect structure 400 is also removed to form the first conductive interconnect structure 400'. For example, at least a portion of the first conductive interconnect structure 400 on the first light-emitting diode 200 in the defective pixel structure PX is removed. The size of the first conductive interconnect structure 400' in the defective pixel structure PX is smaller than the size of the first conductive interconnect structure 400 in the non-defective pixel structure PX.
[0059] Referring to Fig. 18A and Fig. 18B is the first light-emitting diode 200' arranged in the opening 112 for repair. The first light-emitting diode 200' is bonded to at least part of the first pad structure 102.
[0060] The first light-emitting diode 200' is a vertical light-emitting diode and includes a first electrode 210', a first semiconductor layer 220', a light-emitting layer 230', a second semiconductor layer 240', and a second electrode 250'. The first semiconductor layer 220', the light-emitting layer 230', and the second semiconductor layer 240' are stacked sequentially. In some embodiments, one of the first semiconductor layer 220' and the second semiconductor layer 240' is an N-type semiconductor, and the other is a P-type semiconductor. The first electrode 210' and the second electrode 250' are each connected to the first semiconductor layer 220' and the second semiconductor layer 240', respectively. In some embodiments, the first light-emitting diode 200' includes light-emitting diodes of different colors.For example, the first light-emitting diode 200' includes red light-emitting diodes, green light-emitting diodes, blue light-emitting diodes, or light-emitting diodes of other colors. In some embodiments, the first light-emitting diode 200' used to repair the defective pixel structure PX and the original first light-emitting diode 200 in the pixel structure PX are light-emitting diodes of the same color.
[0061] In some embodiments, after the first light-emitting diode 200' is positioned in the opening 112, a filler material 120 is formed to fill the gap between the first light-emitting diode 200' and the opening 112. The first light-emitting diode 200' and the filler material 120 are placed in the opening 112, and the filler material 120 surrounds the first light-emitting diode 200'. In some embodiments, the forming method for the filler material 120 includes inkjet printing, adhesive application, or other suitable methods. In some embodiments, the filler material 120 includes epoxy resin, silicone, acrylic, or other suitable materials, and the filler material 120 selectively includes carbon black, scatter particles, or other filler particles. The filler material 120 and the forming layer 110 can include the same or different materials.
[0062] With reference to Fig. 19A and Fig. 19B, a second conductive connection structure 500 is formed on the form layer 110. The second conductive connection structure 500 electrically connects the first light-emitting diode 200' to a corresponding conductive block, and thus the display panel 20' including the repaired pixel structure PX' is formed.
[0063] Each of the repaired pixel structures PX' includes the first light-emitting diode 200', the first conductive block 320, the first conductive interconnect 400', the filler material 120, and the second conductive interconnect 500. The first light-emitting diode 200' is located on the first pad structure 102. The first conductive block 320 is located on the second pad structure 104. The first conductive interconnect 400' and the second conductive interconnect 500 are located on the mold layer 110. The second conductive interconnect 500 and the first conductive interconnect 400' electrically connect the first light-emitting diode 200' to the first conductive block 320.
[0064] Since in this embodiment the conductive connection structure 500 is formed on the mold layer 110 and can be electrically connected to the second pad structure 104 via the first conductive block 320, it is therefore possible to prevent interruption of the conductive connection structure 500 caused by the step difference between the first electrode 210' of the first light-emitting diode 200' and the second pad structure 104, and to improve the performance of the maintenance process.
[0065] Fig. Figure 20 is a schematic top view of a display panel according to one embodiment of the disclosure. It should be noted that the embodiment of Fig. 20 the reference numerals and part of the content of the embodiment of Fig. 1A to Fig. 9B is used, and the same or similar reference numerals are used to denote the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted part, reference may be made to the preceding embodiment, and details are not described here.
[0066] The difference between the 30-inch display panel in Fig. 20 and the 10' display panel in Fig. 9B consists in that: in the display panel 30 the first conductive connection structure 400 and the second conductive connection structure 500 do not overlap at least a part of the upper surface of the first electrode 210 of the first light-emitting diode 200 and at least a part of the upper surface of the first electrode 210R of the second light-emitting diode 200R.
[0067] Referring to Fig. In this embodiment, both the first conductive connection structure 400 and the second conductive connection structure 500 enclose a metallic material formed by a chemical vapor deposition process. To reduce the area covered by the first conductive connection structure 400 and the second conductive connection structure 500, the first conductive connection structure 400 is connected to the side surface of the first electrode 210 of the first light-emitting diode 200, exposing at least a portion of the upper surface of the first electrode 210, and the second conductive connection structure 500 is connected to the side surface of the first electrode 210R of the second light-emitting diode 200R, exposing at least a portion of the upper surface of the first electrode 210R.
[0068] In this embodiment, it is taken as an example that both the first conductive connection structure 400 and the second conductive connection structure 500 include opaque conductive materials, but the disclosure is not limited thereto. In other embodiments, the first conductive connection structure 400 includes a transparent conductive material and the second conductive connection structure 500 includes an opaque conductive material. In this case, even if the first conductive connection structure 400 covers the upper surface of the first electrode 210 of the first light-emitting diode 200, it has no significant effect on the brightness of the display panel 30.
[0069] Fig. Figure 21 is a schematic top view of a display panel according to one embodiment of the disclosure. It should be noted that the embodiment of Fig. 21 the reference numerals and part of the content of the embodiment of Fig. 10A to Fig. 19B is used, and the same or similar reference numerals are used to denote the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted part, reference may be made to the preceding embodiment, and details are not described here.
[0070] The difference between the 40-inch display panel in Fig. 21 and the display panel 20' in Fig. 19B consists in the fact that: in the display panel 40 the second conductive connection structure 500 does not overlap at least a part of the upper surface of the first electrode 210' of the first light-emitting diode 200'.
[0071] Referring to Fig.In this embodiment, the first conductive connection structure 400 encloses a transparent conductive material, and the second conductive connection structure 500 encloses an opaque conductive material. Even if the first conductive connection structure 400 covers the upper surface of the first electrode 210 of the first light-emitting diode 200, it does not significantly affect the brightness of the display panel 40.
[0072] In this embodiment, the second conductive interconnect structure 500 encloses a metallic material and is formed by a chemical vapor deposition process. To reduce the area covered by the second conductive interconnect structure 500, the second conductive interconnect structure 500 is connected to the side surface of the first electrode 210' of the first light-emitting diode 200', leaving the top surface of the first electrode 210' exposed.
[0073] In summary, by arranging the form layer and the conductive block, the problem of poor electrical connection between the light-emitting diode and the pad due to the step difference can be improved.
Claims
[1] Display panel (10, 10', 20, 20', 30, 40), comprising: a circuit substrate (100) having a plurality of first pad structures (102) and a plurality of second pad structures (104); a plurality of pixel structures (PX) arranged over a display area (DR) of the circuit substrate (100), each of at least a portion of the pixel structures (PX) comprising: a first light-emitting diode (200, 200') arranged on a corresponding first pad structure (102) among the first pad structures (102); a first conductive block (320, 320a) disposed on a corresponding second pad structure (104) among the second pad structures (104); and a first conductive connection structure (400, 400') electrically connecting the first light-emitting diode (200, 200') to the first conductive block (320, 320a); and a mold layer (110) located above the circuit substrate (100) and surrounding the first light-emitting diodes (200, 200') and the first conductive blocks (320, 320a), wherein the first conductive interconnect structures (400, 400') are located on the mold layer (110). [2] The display panel (10, 10', 20, 20', 30, 40) according to claim 1, wherein one of the pixel structures (PX) is a repaired pixel structure (PX'), and the repaired pixel structure (PX') further comprises a second light-emitting diode (200R) and a second conductive block (320b), wherein the second light-emitting diode (200R) and the second conductive block (320b) are respectively arranged on the corresponding first pad structure (102) and the corresponding second pad structure (104), and wherein the repaired pixel structure (PX') further comprises: a second conductive connection structure (500) electrically connecting the second light-emitting diode (200R) to the second conductive block (320b), the second conductive connection structure (500) being located on the mold layer (110). [3] Display panel (10, 10', 20, 20', 30, 40) according to claim 2, wherein in the repaired pixel structure (PX') the first light-emitting diode (200, 200') and the second light-emitting diode (200R) are each located on a first part (102a) and a second part (102b) of the corresponding first pad structure (102), the first part (102a) and the second part (102b) being structurally separated from each other. [4] Display panel (10, 10', 20, 20', 30, 40) according to one of claims 2 to 3, wherein in the repaired pixel structure (PX') the first conductive block (320, 320a) and the second conductive block (320b) are respectively arranged on a third part (104a) and a fourth part (104b) of the corresponding second pad structure (104), wherein the third part (104) and the fourth part (104b) are structurally separated from each other. [5] Display panel (10, 10', 20, 20', 30, 40) according to one of claims 2 to 4, further comprising: a filler material (120), wherein the second light-emitting diode (200R) and the filler material (120) are filled into an opening (112) of the mold layer (110), and the filler material (120) surrounds the second light-emitting diode (200R). [6] Display panel (10, 10', 20, 20', 30, 40) according to one of claims 2 to 5, wherein the second conductive connection structure (500) electrically connects a first electrode (210, 210', 210R) of the second light-emitting diode (200R) to the first conductive connection structure (400, 400'), wherein a horizontal distance (L1, L2) between the second light-emitting diode (200R) and the first conductive connection structure (400, 400') is smaller than a horizontal distance (L1, L2) between the second light-emitting diode (200R) and the second conductive block (320b). [7] The display panel (10, 10', 20, 20', 30, 40) according to any one of claims 2 to 6, wherein the second conductive connection structure (500) is connected to a side surface of an electrode of the second light-emitting diode (200R), and the second conductive connection structure (500) does not overlap at least a part of an upper surface (110t) of the electrode of the second light-emitting diode (200R). [8] Display panel (10, 10', 20, 20', 30, 40) according to one of claims 1 to 7, wherein the first conductive connection structure (400, 400') is connected to a side surface of an electrode of the first light-emitting diode (200, 200') and the first conductive connection structure (400, 400') does not overlap at least a part of an upper surface (110t) of the electrode of the first light-emitting diode (200, 200'). [9] The display panel (10, 10', 20, 20', 30, 40) according to any one of claims 1 to 8, wherein, taking the circuit substrate (100) as a base, a height of an upper surface (110t) of the molding layer (110) is higher than a height of a light-emitting layer (230, 230', 230R) of the first light-emitting diode (200, 200'). [10] Display panel (10, 10', 20, 20', 30, 40) according to one of claims 1 to 9, wherein the first conductive connection structure (400, 400') and the second conductive connection structure (500) comprise different materials. [11] Display panel (10, 10', 20, 20', 30, 40) according to one of claims 1 to 10, wherein the molding layer (110) comprises transparent material, gray material or black material. [12] Display panel (10, 10', 20, 20', 30, 40) according to one of claims 1 to 11, wherein each of the at least part of the pixel structures (PX) further comprises a second conductive block (320b), wherein the second conductive block (320b) is arranged on the corresponding second pad structure (104) and the first conductive connection structure (400, 400') is connected to the first conductive block (320, 320a) and the second conductive block (320b) simultaneously. [13] Display panel (10, 10', 20, 20', 30, 40) according to one of claims 1 to 12, wherein a thickness (T) of the first conductive block (320, 320a) is 5 micrometers to 10 micrometers. [14] Display panel (10, 10', 20, 20', 30, 40) according to one of claims 1 to 13, wherein one of the at least part of the pixel structures (PX) is a repaired pixel structure (PX'), and the repaired pixel structure (PX') further comprises: a second conductive interconnection structure (500) electrically connected to the first light-emitting diode (200, 200') and the first conductive block (320, 320a), the second conductive interconnection structure (500) being located on the mold layer (110). [15] A method for producing a display panel (10, 10', 20, 20', 30, 40), comprising: Providing a circuit substrate (100), the circuit substrate (100) having a plurality of first pad structures (102) and a plurality of second pad structures (104); Forming a plurality of conductive blocks on the second pad structures (104); Arranging a plurality of first light-emitting diodes (200, 200') on the first pad structures (102); Forming a mold layer (110) to surround the conductive blocks and the first light-emitting diodes (200, 200'); Forming a plurality of first conductive interconnect structures (400, 400') on the mold layer (110), wherein the first conductive interconnect structures (400, 400') electrically connect at least a portion of the first light-emitting diodes (200, 200') to at least a portion of the conductive blocks to form a plurality of pixel structures (PX); Removing a portion of the mold layer (110) to form an opening (112) exposing at least a portion of the first pad structures (102); Arranging a second light-emitting diode (200R) in the opening (112) and bonding the second light-emitting diode (200R) to at least a portion of the first pad structures (102); and Forming a second conductive interconnection structure (500) on the mold layer (110), wherein the second conductive interconnection structure (500) electrically connects the second light-emitting diode (200R) to a corresponding one of the conductive blocks. [16] A manufacturing method for the display panel (10, 10', 20, 20', 30, 40) according to claim 15, wherein forming the conductive blocks comprises electroplating. [17] Manufacturing method for the display panel (10, 10', 20, 20', 30, 40) according to one of claims 15 to 16, further comprising: Forming a filler material (120) to fill a gap between the second light-emitting diode (200R) and the opening (112) after the second light-emitting diode (200R) has been arranged in the opening (112). [18] Manufacturing method for the display panel (10, 10', 20, 20', 30, 40) according to one of claims 15 to 17, further comprising: wherein one of the first light-emitting diodes (200, 200') is located in the portion of the mold layer (110), and the one of the first light-emitting diodes (200, 200') is removed to expose the at least a portion of the first pad structures (102) beneath the one of the first light-emitting diodes (200, 200'). [19] Manufacturing method for the display panel (10, 10', 20, 20', 30, 40) according to one of claims 15 to 18, wherein each of the pixel structures (PX) comprises a repair region (RR) and the opening (112) of the mold layer (110) is located in a part of the repair regions (RR). [20] A manufacturing method for the display panel (10, 10', 20, 20', 30, 40) according to claim 19, wherein each of the first pad structures (102) comprises a first part (102a) and a second part (102b) which are separated from each other, the first light-emitting diodes (200, 200') being arranged on the first part (102a) and the repair regions (RR) overlapping the second part (102b).