Device for determining the rotor position of a brushed DC motor using pattern recognition-supported commutator pulse detection

Abstract

Device for detecting a ripple of a rotor current of a brushed DC motor (103), wherein the device comprises means (105) for detecting the electrical rotor current of the brushed DC motor (103), and wherein the device comprises an analog-to-digital converter (510), and wherein the device comprises a signal level extraction device (520), and wherein the device comprises an adder (123), and wherein the device comprises a microcontroller (501) and / or a pattern recognition device (170), and wherein the brushed DC motor (103) has a rotor of the brushed DC motor (103) that can be energized via at least two terminals of the brushed DC motor (103).wherein the means (105) for detecting the electric rotor current of the brushed DC motor (103) are provided for this purpose. to detect the rotor current of the brushed DC motor (103) and to generate an analog rotor current signal (107), wherein the value profile of the analog rotor current signal (107) depends on the time profile of the rotor current, and wherein the analog-to-digital converter (510) is configured to sample the rotor current signal (107), and wherein the analog-to-digital converter (510) is configured to generate sample values ​​(135), and wherein the signal level extraction device (520) is configured to low-pass filter the generated sample values ​​(135) to low-pass filtered sample values ​​(197), and wherein each generated sample value (135) corresponds to each low-pass filtered sample value (197); wherein the adder (123) is configured toto subtract the low-pass filtered sample (197) from the sum of an optional offset value (140) and the corresponding generated sample (135) to generate an internal sample (196), wherein the device and / or microcontroller (501) is configured to store this internal sample (196) in a memory (509) with memory cells as a stored sample, and wherein the device and / or microcontroller (501) and / or the pattern recognition device (170) are configured to apply a pattern recognition method to the samples stored in the memory and to decide whether or not a ripple is present in the memory.

Description

Field of the proposal

[0001] The invention is directed to a device for detecting a ripple of a rotor current of a brushed DC motor using the analysis of the commutator current pulses with the aid of a pattern recognition device and an associated pattern recognition method, wherein the use of a neural network and / or optimal filter and / or Kalmann filter as the pattern recognition device is preferred. General introduction

[0002] The technical theory presented here deals with the position determination of the rotors of brushed DC motors. Such brushed DC motors typically feature a commutator. In this context, the text presented here refers to the Wikipedia pages https: / / de.wikipedia.org / wiki / Gleichstrommaschine and https: / / de.wikipedia.org / wiki / Kommutator_%28Elektrotechnik%29.

[0003] During commutation using commutators, current pulses occur when a brush of a brushed DC motor alternates between two contact surfaces of the commutator as a result of the rotation of the brushed DC motor's rotor. This document refers to these current pulses as "ripples." Counting these ripples to determine the position of an actuator driven by a DC motor is known from the prior art. This document refers, for example, to German patents DE 42 17 265 C2 and DE 195 11 307 C1. In this prior art, the ripples are extracted from the signal curve of the value curve of the motor current of the respective DC motor using an analog circuit. The prior art methods are limited to analog filtering and comparison with threshold values, for example, using comparators.Firstly, such circuits are error-prone (step loss = occurrence of an offset error) and secondly, they are complex and expensive to test in final production tests.

[0004] Modern automobiles typically still include a number of brushed DC motors. Possible automotive applications for such brushed DC motors include actuators for air conditioning flaps or actuators for grill shutters used to optimize the drag coefficient of the combustion engine's air intake. The technical solution presented here can also be used for variable-speed DC motor fans. Currently, Asian, US, and automotive manufacturers in Southern Europe primarily use brushed DC motor air conditioning flap actuators rather than stepper motors.

[0005] Manufacturers typically combine brushed DC motors with a potentiometer for position determination. The potentiometer is typically connected via electrically conductive connecting leads. Manufacturers typically control the brushed DC motor via corresponding electrically conductive connecting leads.

[0006] Automotive manufacturers are seeking to reduce the complexity and weight of wiring harnesses. The cost of DC motors will increase in the coming years. Automotive manufacturers want to replace the potentiometer-based position detection solution for DC motor-driven actuators to eliminate the need for connecting wires. Manufacturers therefore typically propose replacing the potentiometer-based position sensors of the corresponding actuators with sensorless solutions.

[0007] The technical teaching proposed here therefore envisages replacing such potentiometer-based position sensors with sensorless DC motor pulse count solutions based on a mixture of analog and digital solutions.

[0008] The technical teaching presented below can be implemented as a pure software solution and / or by means of an integrated acceleration circuit block.

[0009] There are special conditions that currently pose a technical challenge: 1. The technical solution must keep CPU utilization below 80%. 2. The current ripple should be measured simultaneously and the PWM voltage of the DC motor should be controlled. 3. The measurement accuracy of the current ripple should continue to allow data transmission at 19200 baud, for example via a LIN data bus interface. State of the art

[0010] Modern circuits for automotive control circuits prefer a three-stage basic structure. In a first stage, such circuits capture the analog quantity to be evaluated, convert it into an electrical measurement signal, amplify and filter this electrical measurement signal, and sample and digitize it into a digitized measurement signal. Typically, the first stage comprises an analog-to-digital converter. The analog-to-digital converter typically samples the electrical measurement signal at a sampling rate. In a second stage, such circuits process the digital measurement signal into a digital control signal according to a control method. Typically, the second stage comprises a microcontroller for processing the digital measurement signal. In a third stage, such circuits convert the digital control signal into an analog control signal.Typically, the third stage comprises a digital-to-analog converter that generates the digital control signal at a maximum conversion rate with a maximum conversion frequency.

[0011] The technical teaching presented here solves the fundamental problem that during the digitization of the current pulses from the brush commutation of the DC motor, individual current pulses from the brush commutation of the DC motor could be lost and / or insufficiently sampled. The reason for this is that the duration of the current pulses from the brush commutation of the DC motor corresponds to a minimum current pulse frequency. If the sampling frequency of the analog-to-digital converter in the first stage of the circuit is not greater than twice the current pulse frequency of the current pulses from the brush commutation of the DC motor, the Niquist theorem is violated and alising effects occur, leading to the loss of individual current pulses from the brush commutation of the DC motor. The first reason is that the microprocessor in the second stage of the circuit is not designed to process such a high data rate from the analog-to-digital converter.The second reason is that the first-stage analog-to-digital converter is generally unable to deliver such data rates and does not provide such a high sampling frequency. More powerful processors and analog-to-digital converters typically require a larger chip area and consume significantly more electrical power, which is usually completely incompatible with the design goals and drives up costs.

[0012] The state-of-the-art solutions are therefore based on analog amplification, analog filtering, analog detectors, analog decoupling and digital arbitration.

[0013] Today, DC drives that require precise positioning use absolute sensors such as potentiometers or magnetic angle sensors. Absolute position sensors are expensive, but they provide position feedback as soon as they are powered, controlling the application's position in a closed-loop control system.

[0014] Incremental ripple controls require a completely different strategy to provide accurate position feedback for the position of an actuator driven by a brushed DC motor. - The actuator controller must determine an initial and a repeating reference position of the actuator's actuator positioning corresponding to a reference position of the rotor of the brushed DC motor. - The actuator controller controls the positioning of the actuator actuator by controlling the brushed DC motor from the initial reference position in a typically open control loop.

[0015] The use of brushed DC motors for positioning actuators requires, among other things, the solution of several problems: - For precise positioning, the microcontroller cannot rely on the activation time. A state-of-the-art solution for position control of an actuator powered by a brushed DC motor therefore typically requires an additional physical position sensor, such as a potentiometer. - Regarding system costs, the current state of the art is to control the brushed DC motor and potentiometer sensor via a central unit using electrically conductive cables, which results in a corresponding weight and complexity of the wiring harness. - The resulting multiplexing architecture and the required precise absolute positioning of the actuator typically make the system costs unaffordable.

[0016] DC motor actuator multiplexing will typically only be affordable if the cost of the embedded electronics is offset by a reduction in system cost.

[0017] Avoiding the use of a position sensor is one of the main reasons for using multiplexing architectures for drives with a brushed DC motor. One solution could be incremental positioning without a ripple counting sensor. A ripple counting sensor, as defined in this document, is a sensor that detects and counts the commutation pulses in the rotor coil current of a brushed DC motor.

[0018] Such a DC motor brush commutation counting device for a ripple counting sensor is already available as a hardware solution for sensorless incremental positioning. However, these solutions require increased chip area when implemented as microintegrated circuits, resulting in corresponding costs.

[0019] For example, the product AN3049 from Microchip is known from the state of the art.

[0020] The difference between the new technical teaching described in this document and the technical teaching in the data sheet for Microchip's AN3049 product lies in the implementation of the counting of the current pulses used to commutation the motor current of the brushed DC motor. The present document also refers to the counting of the current pulses used to commutation the motor current of the brushed DC motor using the English term "ripple count."

[0021] According to the technical teachings of the Microchip product data sheet, the motor current is measured. According to the technical teachings of the Microchip product data sheet, the subsequent filtering is performed analogously using discrete components outside the microintegrated circuit.

[0022] The technical teachings of the Microchip product datasheet solve the problem in six steps: 1. Motor current signal 2. Motor current detection 3. Signal conditioning stage A 4. Signal conditioning stage B 5. Comparator stage 6. Transfer to the microcontroller

[0023] The method presented in this document for filtering the commutation current pulses of the rotor coil current of the brushed DC motor (the ripple) differs considerably from the method of the technical teaching of the data sheet of the Microchip product in the manner of detecting such a commutation current pulse of the rotor coil current of the brushed DC motor.

[0024] State-of-the-art hardware-only solutions require several specialized silicon detector blocks. These specialized detector blocks can include circuit blocks for nonlinear current amplification, sine and pulse detectors, and, for example, an arbitration block. These hardware-only solutions are generally expensive and require a lot of chip space. Furthermore, they typically require specialized test equipment in production testing. Task

[0025] The proposal is therefore based on the task of creating a solution that does not have the above-mentioned disadvantages of the prior art and has further advantages.

[0026] This problem is solved by the technical teaching of the independent claims. Further embodiments may be the subject of subclaims. Solution to the task

[0027] The proposed solution is directed to a preferably computer-implemented method for detecting a ripple of a rotor current of a brushed DC motor and the associated device, which preferably executes the computer-implemented method, as well as the storage medium and / or the memory containing the program code for the preferably computer-implemented program. The brushed DC motor typically has a rotor of the brushed DC motor that can be energized via at least two terminals of the brushed DC motor. The proposed, preferably computer-implemented method typically begins with the application of a voltage to the at least two terminals of the brushed DC motor by the device proposed here.This is then preferably followed by detecting the rotor current of the brushed DC motor, for example, using special means such as shunt resistors, AMR or GMR sensors, Hall plates, and their evaluation devices. These detect the electrical rotor current of the brushed DC motor and generate a preferably analog rotor current signal. The value profile of the analog rotor current signal preferably depends proportionally or preferably at least according to a linear mapping on the temporal profile of the rotor current. Typically, the rotor current signal is then sampled, preferably by means of an analog-to-digital converter of the proposed device, generating typically binary and / or digitized sample values, for example in the form of a digitized rotor current signal.In a further step, the generated sample values, preferably of the digitized rotor current signal, are typically low-pass filtered in a signal level extraction device and / or by a microcontroller. This low-pass filtering is preferably carried out using a computer-implemented low-pass filtering method, the program code of which is executed by the signal level extraction device and / or the microcontroller in one or more memories and / or one or more storage media of the proposed device. The result of this preferably computer-implemented low-pass filtering is typically low-pass filtered sample values, which are preferably generated in the form of a filtered digital rotor current signal and are preferably stored in one or more memories and / or one or more storage media of the device.Typically, a generated sample, preferably of the digitized rotor current signal, corresponds to each low-pass filtered sample, for example, of a filtered digital rotor current signal. In a subsequent step, an adder and / or a microcontroller, for example, subtracts the low-pass filtered sample, for example, of the filtered digital rotor current signal, from the sum of an optional offset value and the corresponding generated sample, for example, of the digital rotor current signal. The adder and / or the microcontroller preferably perform this subtraction step in the form of a computer-implemented method step in one or more memories and / or in one or more storage media of the device.Preferably, the program code for this computer-implemented method step is stored in the one or more memories and / or the one or more storage media of the device for execution by the adder and / or the microcontroller. When executing this method step, the proposed device typically generates an internal sample value, for example, of a ripple signal, preferably using a computer-implemented method. This is then preferably followed by storing the internal sample value in a memory or a storage medium as a stored sample value. The memory or storage medium can, for example, be a FIFO memory. The memory typically comprises memory cells.The special feature of the technical teaching presented here is the application of a preferably computer-implemented pattern recognition method, for example by a microcontroller and / or by a pattern recognition device and / or another sub-device of the device to the sample values ​​stored in the memory or in the storage medium, in particular in the FIFO memory, and the subsequent decision based on the pattern recognition result of the preferably computer-implemented pattern recognition method as to whether or not a ripple is present in the memory or in the storage medium, in particular in the FIFO memory.

[0028] In a further embodiment of the preferably computer-implemented method, a ripple flag is set, preferably by the microcontroller and / or the pattern recognition device, when a ripple is present in the memory or storage medium, in particular in the FIFO memory, and the ripple flag is cleared, preferably by the microcontroller and / or the pattern recognition device, when no ripple is present in the memory or storage medium, in particular in the FIFO memory. This allows for the presence of a ripple to be checked at any time.

[0029] The device preferably comprises a time counter. When the ripple flag is set, the device preferably stores the time of occurrence of the ripple in a memory or storage medium. External devices can preferably query the state of the ripple flag and, if applicable, the time of occurrence of the ripple via an external data bus. If a computer-implemented neural network model is used, the device can generally also output a value when carrying out the preferably computer-implemented method that, in addition to the information about the presence of a ripple, indicates how reliably the ripple was detected. When carrying out the preferably computer-implemented method, the device can generally also output a value that, in addition to the information about the absence of a ripple, indicates how reliably no ripple is present.These other devices can then use these values ​​for other control purposes.

[0030] In one embodiment of the proposed, preferably computer-implemented method, the memory is a FIFO memory. This has the advantage that the device can use the history of the rotor current value and any values ​​derived from it as feature vectors and / or to generate feature vectors for use as input information for a preferably computer-implemented pattern recognition system.

[0031] In a further embodiment of the method, the preferably computer-implemented pattern recognition method, which is preferably executed by the microcontroller and / or the pattern recognition device, comprises the application and / or execution of a preferably computer-implemented neural network model, in particular by the microcontroller and / or the pattern recognition device. Input signals of the preferably computer-implemented neural network model comprise signals with values ​​from memory cells of the memory or storage medium, in particular the FIFO memory. The output signals of the preferably computer-implemented neural network model preferably comprise control signals for setting and / or clearing the ripple flag and / or the signal of the ripple flag. In this way, the ripple flag is controlled by a preferably computer-implemented KI program.This is considerably more precise than the threshold control known from the state of the art for setting the ripple flag.

[0032] In a further embodiment, the proposed, preferably computer-implemented method comprises applying a preferably computer-implemented method for detecting a ripple of a rotor current of the brushed DC motor, as previously described, and counting the detected ripples of the rotor current of the brushed DC motor while determining a counter reading with a counting direction. The proposed, preferably computer-implemented method then uses this counter reading as the rotor position value. This enables the device to determine the rotor position significantly better than in the prior art, since fewer commutation pulses are not detected and non-existent commutation pulses are counted less frequently.

[0033] In a further embodiment of the preferably computer-implemented method, the device and / or the microcontroller and / or the pattern recognition device store the internal sample value, for example, of a ripple signal, in a memory or storage medium, in particular a FIFO memory, with memory cells as the stored sample value. The microcontroller and / or the pattern recognition device preferably subtract at least a first pair comprising two stored sample values ​​from two different memory cells of the memory, namely a first stored sample value of a first memory cell and a second stored sample value of a second memory cell, from one another to form a first difference signal value.The microcontroller and / or the pattern recognition device preferably subtract at least a second pair of two stored sample values ​​from two further different memory cells of the memory, namely a third stored sample value from a third memory cell and a fourth stored sample value from a fourth memory cell, from one another to form a second difference signal value. The second and third memory cells can be the same. The microcontroller and / or a pattern recognition device then preferably sum the first difference signal value and the second difference signal value to form a sum value. The microcontroller and / or the pattern recognition device then preferably determine, depending on the sum value, whether a ripple is likely present or could be present. They preferably do this by comparing the sum value with a threshold value.This has the advantage that the rising and falling edges of the ripple lead to clear signals. In effect, this is a preferably computer-implemented differentiation that can provide the subsequent feature vector for pattern recognition with an additional dimension, thus increasing the significance of such a feature vector. This further reduces the false detection of non-existent ripples and the number of undetected but present ripples. The final evaluation of whether a ripple is actually present is typically performed by a device according to the technical teaching presented here at a later time using a preferably computer-implemented method, once the corresponding device has additionally evaluated other factors.

[0034] In a further refinement, the microcontroller and / or the pattern recognition device compare the magnitude of the sum value with a first threshold. This is a particularly simple, preferably computer-implemented method for detecting a potential ripple. If this occurs, a ripple flag is set, in particular by the microcontroller and / or a pattern recognition device corresponding to the preferably computer-implemented method, if the magnitude of the sum value is above the first threshold, and the ripple flag is cleared, in particular by the microcontroller and / or the pattern recognition device, if the magnitude of the sum value is below the first threshold.

[0035] In a further variant of the preferably computer-implemented method, the microcontroller and / or the pattern recognition device store the sum value in a further memory or storage medium, in particular a high-pass current signal value FIFO, with memory cells as the stored sum value corresponding to the preferably computer-implemented method. As a result, the history of this sum value is also available to the pattern recognition or the preferably computer-implemented method. The microcontroller and / or the pattern recognition device therefore preferably apply a corresponding further, preferably computer-implemented, pattern recognition method to the sum values ​​stored in the further memory or storage medium in accordance with the preferably computer-implemented method and preferably decide using the typically computer-implemented method whether or not a ripple is present in the further memory or storage medium.The microcontroller and / or the pattern recognition device preferably take into account other values ​​of other feature vectors, preferably using the preferably computer-implemented method. This further improves the recognition performance of the preferably computer-implemented ripple detection.

[0036] The microcontroller and / or the pattern recognition device preferably set an additional ripple flag when a ripple is present in the additional memory or storage medium, and / or clear the additional ripple flag when no ripple is present in the additional memory or storage medium. The ripple flag and the additional ripple flag allow an external device to access these flags to determine why the device detected a ripple.

[0037] Preferably, the additional memory or storage medium also includes an additional FIFO memory. The function of a FIFO memory within the meaning of this document is explained in more detail below. As before, a FIFO memory provides the history for pattern recognition.

[0038] The microcontroller and / or the pattern recognition device preferably carry out a further, preferably computer-implemented, pattern recognition method in accordance with a further refinement, wherein the further, preferably computer-implemented pattern recognition method in this refinement comprises the application of a further, preferably computer-implemented neural network model. The input signals of the further, preferably computer-implemented neural network model preferably comprise signals with values ​​from memory cells of the further memory or the storage medium. The output signals of the further, preferably computer-implemented neural network model preferably comprise control signals for setting and / or deleting the further ripple flag and / or the signal of the further ripple flag. As a result, the preferably computer-implemented neural network model can detect ripples orsignal the absence of ripples in the rotor current signal to an external device with increased precision.

[0039] As an application of the improved device and the improved, preferably computer-implemented method for ripple detection, the document presented here proposes a method or device extension for determining the rotor position of a rotor of a brushed DC motor in the form of a rotor position value. The document presented here proposes using the previously described, preferably computer-implemented method for detecting a ripple in the rotor current of the brushed DC motor, or a device that uses this preferably computer-implemented method, and determining the detected ripples of the rotor current of the brushed DC motor using the microcontroller or a counter by determining a counter reading and applying a counting direction. The device and / or a higher-level device then preferably use this counter reading as the rotor position value.

[0040] The technical teaching of the document presented here proposes a device that preferably comprises a microintegrated circuit 592. The microintegrated circuit 592 preferably comprises a microcontroller 501 and suitable further means (505, 510, 511, 593, 516, 509, 508, 591), in particular one or more FIFO memories, in order to better detect the commutation pulses in the analog rotor current signal of the rotor current of the brushed DC motor 103 in the presence of a commutation pulse in the analog rotor current signal 107, and to avoid falsely detecting such a commutation pulse with greater certainty in the absence of a commutation pulse. This thus improves • Firstly, the frequency of false recognition of a commutation pulse not present in the analog rotor current signal 107 as an alleged commutation pulse, referred to as the “False Acceptance Rate”, and • secondly, the frequency of false non-recognition of a commutation pulse which is actually present in the analog rotor current signal 107, referred to as the False Rejection Rate.

[0041] According to the technical teaching described in this document, a computer core, for example in the form of a microcontroller 501, preferably executes program data (513, 515, 517, 520, 525, 530, 535, 540, 550, 565, 567, 570, 575, 580, 585, 595, 596, 597) of a preferably computer-implemented method, which are stored in a memory 509 or storage medium of the proposed device. The brushed DC motor 103 typically generates an analog rotor current signal 107 of the brushed DC motor 103, the instantaneous value of which preferably corresponds to the instantaneous value of the current through the excitation coils of the brushed DC motor 103. Preferably, the brushed DC motor 103 comprises means 105 for detecting the value of the rotor current of the brushed DC motor 103 and for generating the analog rotor current signal 107 as a function of these detected values ​​of the rotor current of the brushed DC motor 103.This typically involves means 105 for detecting the current through the excitation coils of the brushed DC motor 103. For example, these means can comprise shunt resistors that are inserted into the supply lines of the rotor brushes and via which the H-bridges 5 supply the brushed DC motor 105 with electrical energy. Instead of the H-bridge 5, the device can also have a half-bridge for supplying the brushed DC motor 105 with electrical energy. Instead of the H-bridge 5, the device can also have a voltage and / or current supply for supplying the brushed DC motor 105 with electrical energy. In this respect, the H-bridge 5 in the document presented here generally represents an output stage of the device for supplying the brushed DC motor 105 with electrical energy.The proposed device of the technical teaching of the document presented here uses current sampling and digitization coupled to the microcontroller 501 of the proposed device in a first stage 10 of the proposed device. Preferably, the first stage 10 comprises an analog-to-digital conversion 110 by means of an analog-to-digital converter 510. The first stage 10 preferably generates a digitized rotor current signal 113 from the analog rotor current signal 107 of the brushed DC motor 103. The proposed device of the technical teaching of the document presented here uses an analysis device 20 for analyzing the time profile of the detected motor current of the brushed DC motor 103 in the form of the digitized rotor current signal 113 in the second stage 20 of the device. The second stage 20 of the device can also be referred to as the analysis device 20.This analysis can also be referred to as current waveform analysis. Here, the analysis device 20 generates a ripple detection signal 175 from the digitized rotor current signal 113 of the brushed DC motor 103 using a preferably computer-implemented method. The current value of the ripple detection signal 175 preferably signals whether or not the system comprising the first stage 10 and the analysis device 20 has detected the presence of a pulse shape corresponding to a ripple, which is attributable to a commutation of the brushed DC motor 103, in the digitized rotor current signal 113 of the brushed DC motor 103. In a subsequent third stage 30, the proposed device preferably processes the temporal value profile of the ripple detection signal 175 using a preferably computer-implemented method and, for example, counts the number of detected ripples.Preferably, the third stage 30 of the proposed device comprises a counter 180 which counts the pulses of the ripple detection signal 175 and thus generates a rotor position signal 185.

[0042] Preferably, a microcontroller 501 emulates the function of the first stage 10, the second stage 20, and the third stage 30 by executing one or more programs in its program memory 509 using a preferably computer-implemented method. Typically, the functions 110 of the analog circuit components and the analog-to-digital converter 510 of the first stage 10 are not included in this preferably computer-implemented emulation by the microcontroller 501. However, such emulation by the microcontroller 501 utilizes the digital output data of the analog circuit components and the analog-to-digital converter 510 of the first stage 10.For the purposes of the document presented here, a sub-device of a claimed device is deemed to be present if a computer core, such as a microcontroller 501, emulates the function of such a sub-device of the proposed device at least temporarily, for example in time-division multiplex with other functions, for example by means of a preferably computer-implemented method.

[0043] The device proposed here optimizes the hardware-specific ripple-count silicon block of prior-art devices. The preferably software-based solution, emulating the device components using a microcontroller 501 using a preferably computer-implemented method, is typically a cost-effective solution. It can be easily embedded in and emulated by any microcontroller 501 with sufficient computing power.

[0044] The technical teaching of the document presented here is particularly suitable for use in actuators that use a brushed DC motor 103 as the actuator drive for the actuator's positioning system. The technical teaching of the document presented here proposes reducing the cost of the positioning system of the brushed DC motor 103 of the actuator to zero if the microintegrated control circuit 592 of the brushed DC motor 103 of the actuator includes a microcontroller 501 or the like. When the document presented here uses the term microcontroller 501, functionally equivalent device components are included.The proposal utilizes the computing power of the respective microcontroller 501 to digitize the current waveform of the rotor current of the brushed DC motor 103 into a digitized rotor current signal 113 during rapid sampling and to detect and count the current ripple of the acquired sample values ​​of the digitized rotor current signal 113 during the commutation of the rotor current through the brushes of the brushed DC motor 103 using preferably computer-implemented methods. The current ripple of the sample values ​​in the digitized rotor current signal 113 during the commutation of the current supply to the brushed DC motor 103 typically manifests itself in the form of current pulses in the temporal course of the sample values ​​in the digitized rotor current signal 113. The document presented here also refers to these current pulses in the temporal course of the sample values ​​in the digitized rotor current signal 113 as ripples (plural ripples).

[0045] Typically, the proposed device uses an H-bridge driver to drive the excitation coils of the rotor of the brushed DC motor 103. The proposed device can, for example, operate the brushed DC motor 103 using a PWM-modulated DC motor voltage control. For example, the PWM modulation can be a modulation with a fixed PWM frequency and a variable duty cycle. The inductances of the rotor coils typically smooth the rotor current when no commutation occurs through the commutating brushes of the commutator of the brushed DC motor 103.

[0046] In the following, the document presented here describes a preferably computer-implemented method for detecting a ripple in the motor current of a brushed DC motor 103, in which the brushed DC motor 103 has a rotor with associated rotor coils that can be energized via at least two terminals of the brushed DC motor 130. Of course, it is conceivable that the exemplary brushed DC motor 103 has additional terminals. Brushed DC motors 103 with more than two terminals are also brushed DC motors 103 with two terminals within the meaning of the document presented here and are thus expressly encompassed by the disclosure and the claim.

[0047] The counting of the commutation pulses (ripple) proposed in the document presented here using software of a preferably computer-implemented method executed by microcontroller 501 and preferably computer-implemented pattern recognition executed by microcontroller 501 uses the DC motor voltage control by fixed-frequency PWM, preferably to sample the rotor current from the H-bridge driver 5 into the brushed DC motor 103. The first stage 10 of the proposed device performs the current sampling of the analog rotor current signal 107, for example, by means of an analog-to-digital conversion 110 in an analog-to-digital converter 510 and typically generates the digitized rotor current signal 113, possibly after digital post-processing in digital filters and / or preferably computer-implemented filtering methods, etc.The first stage 10 of the proposed device can, for example, by means of an analog-to-digital converter 510, perform the current sampling of the analog rotor current signal 107 using an image current measurement.

[0048] The preferably computer-implemented method presented here, which the proposed device carries out, thus begins with the application of a voltage signal 7 of the H-bridge 5 to the at least two terminals of the brushed DC motor 103 by the H-bridge 5 of the proposed device. Preferably, the microcontroller 501 and / or a sub-device (505) of the proposed device controlled by the microcontroller 501 control and / or influence the H-bridge 5 and thus the voltage signal 7 of the H-bridge 5, with which the H-bridge 5 supplies the brushed DC motor 103 with electrical energy. The sub-device (505) controlled by the microcontroller 501 by means of preferably computer-implemented methods preferably comprises an H-bridge controller 505, which controls the H-bridge 5 or its functional equivalents described above by means of an H-bridge control signal 506.The proposed H-bridge controller 505 thus preferably controls the brushed DC motor 103 via the H-bridge control signal 506. The H-bridge controller 505 preferably receives information about the state of the H-bridge 5 and its subdevices via H-bridge status lines 507. The H-bridge controller 505 preferably controls the H-bridge 5 or its functional equivalents depending on the signals of the H-bridge status lines 507 and on values ​​that the H-bridge controller 505 preferably receives from the microcontroller 501 via an internal data bus 516 of the microintegrated control circuit 516.The device presented here detects in its first stage 10 the rotor current of the brushed DC motor 103 as a rotor current signal 107 and internally generates by amplification and / or filtering a typically internal analog rotor current signal 107, which thus depends on the temporal course of the rotor current of the brushed DC motor 103.

[0049] If necessary, the proposed device in the first stage 10 amplifies and filters the analog rotor current signal 107 to a filtered analog rotor current signal.

[0050] The proposed device samples the analog rotor current signal 107 and / or the filtered analog rotor current signal in its first stage 10, for example, by means of an analog-to-digital converter 510, thereby generating sample values. During this analog-to-digital conversion 110 in the analog-to-digital converter 510, the proposed device typically generates a digitized rotor current signal 113. The digitized rotor current signal 113 can preferably be a digital rotor current signal storage area 513 in the memory 509 of the microintegrated circuit 592, which the microcontroller 501 accesses via the internal data bus 516 when executing the preferably computer-implemented method. Preferably, the proposed device temporarily stores the digitized rotor current signal 113 in its first stage 10, for example, by storing it 115 in a current register 515, thus generating the stored rotor current signal value 117.Preferably, the stored rotor current signal value 117 can be a rotor current signal value memory 517 in the memory 509 or in the storage medium of the microintegrated circuit 592, which the microcontroller 501 accesses via the internal data bus 516 when executing the preferably computer-implemented method. The current register 515 is preferably a memory area 509 of the microintegrated circuit 592. The current register 515 can be considered part of the first stage 10 and / or the second stage 20 within the meaning of the document presented here.

[0051] The second stage 20 of the proposed device, which follows the first stage 10 in the signal path, filters and manipulates, if necessary, the acquired sample values ​​of the digitized rotor current signal 113 of the first stage 10 in the form of the temporal profile of the stored rotor current signal values ​​117, preferably using computer-implemented methods. For this purpose, the device preferably stores the acquired sample values ​​of the digitized rotor current signal 113 of the first stage 10 by storing them 115 in the said current register 515. The current register 515 preferably makes one or more stored and acquired sample values ​​135 of the digitized rotor current signal 113 of the first stage 10 available for processing in subsequent sub-devices of the proposed device.Preferably, said manipulations of the second stage 20 involve linear mappings, filtering, and other signal operations from signal processing technology, preferably using computer-implemented methods. One of these filtering operations is preferably low-pass filtering. The purpose of this low-pass filtering is to separate the ripple from the signal background of the digitized rotor current signal 113. In this way, the second stage 20 of the proposed device generates a digital output variable with a time profile in the form of a possibly filtered digital rotor current signal 113 from the sequence of sample values ​​of the analog rotor current signal 107 in the form of the values ​​of the stored rotor current signal value 117.After sampling the analog rotor current signal 107 to generate sample values ​​of the digital rotor current signal 113, the generated sample values ​​of the digital rotor current signal 113 are preferably low-pass filtered in a signal level extraction 120, for example by means of a preferably computer-implemented signal level extraction program 520, for example by the microcontroller 501, to produce low-pass filtered sample values ​​of a filtered digital rotor current signal 197. These low-pass filtered sample values ​​of the filtered digital rotor current signal 197 typically represent the current signal level 197 without the commutation ripple of the analog rotor current signal 107 of the brushed DC motor 103.In this case, a generated sample value 135 of the digital rotor current signal 113, which is preferably stored in the current register 515, preferably corresponds to a respective low-pass filtered sample value of the filtered digital rotor current signal 197.

[0052] The preferably computer-implemented method presented here, which is carried out by the proposed device, proposes adding the negative low-pass filtered sample value of the filtered digital rotor current signal 197 and an optional offset value in the form of an initialization parameter 125 to the corresponding sample value 135 of the digital rotor current signal 113, generating an internal sample value 196, for example, by addition in an adder 123 using a preferably computer-implemented method. This corresponds to a subtraction of the low-pass filtered sample value of the filtered digital rotor current signal 197 from the sum of the optional offset value in the form of an initialization parameter 125 and the corresponding sample value 135 of the digital rotor current signal 113, generating an internal sample value 196.As a result, the adder 123 forms a ripple signal 196 from the respective value of the filtered digital rotor current signal 197 and the respective value of the digital rotor current signal 113 with the aid of the initialization parameter 125 (for example, as an offset) from internal sample values ​​using a preferably computer-implemented method. The microcontroller 501 can perform this addition of the adder 123, for example, using a preferably computer-implemented method. The ripple signal 196 can preferably be a ripple memory location 596 in the memory 509 of the microintegrated circuit 592, which the microcontroller 501 accesses via the internal data bus 516 when executing the preferably computer-implemented method.The low-pass filtered sample value 197 essentially represents the temporal value profile of the digital rotor current signal 113 without the ripple of the brush-type commutation of the rotor current of the analog rotor current signal 107 of the brush-type DC motor 103. This subtraction in the adder 123, for example, using the preferably computer-implemented method, thus has the task of separating the ripple from the actual rotor current value profile of the digitized rotor current signal 113 and generating the ripple signal 196. This step can therefore be viewed as a step for separating a digitized ripple signal 196.

[0053] The technical teaching of the document presented here proposes storing the internal sample values ​​of the ripple signal 196 in a memory 509 or storage medium of the device, for example, at a ripple storage location 596 in the memory 509 or storage medium of the microintegrated circuit 592. This memory 509 or storage medium preferably comprises a FIFO memory 165. Typically, a FIFO memory area 565 of the memory 509 or storage medium of the microintegrated circuit 592 forms the memory area of ​​the FIFO memory 165. Preferably, the microcontroller 501 of the microintegrated circuit 592 operates this FIFO memory area 565 as the FIFO memory 165.

[0054] A FIFO memory in the sense of the document presented here typically comprises m memory cells for the values ​​to be stored in the FIFO memory. These memory cells are preferably part of the memory 509 or the storage medium of the microintegrated circuit 592. The memory cells of the respective FIFO memory (e.g., 160, 165) can typically be numbered from 1 to m. Here, m is typically a positive integer greater than 1. If the microcontroller 501 of the proposed device is to write a new value into such a FIFO memory, the respective FIFO memory typically erases the contents of its mth memory cell. In the following, j is a positive integer with 0 <j<m.Starting with the (m-1)th memory location, i.e., with j=m-1, the control device of the respective FIFO memory copies the contents of the jth memory location of the respective FIFO memory into the j+1th memory location of the respective FIFO memory, the previous contents of which are typically overwritten and / or erased. The control device then moves to the (j-1)th memory location of the FIFO memory, which thereby becomes the new jth memory location of the respective FIFO memory, and copies the contents of this new jth memory location of the respective FIFO memory into the new j+1th memory location of the respective FIFO memory, which corresponds to the old jth memory location of the respective FIFO memory. The control device of the respective FIFO memory continues in this manner until all contents of the respective FIFO memory have been advanced by one memory location toward the mth memory location.As a result, the first memory cell of the respective FIFO memory is freed, and the control device of the respective FIFO memory can store the new value to be stored in the first memory cell of the respective FIFO memory. The memory cells of the respective FIFO memory can be located in a partial address range of a memory 509 of the microcontroller 501 of the device. The microcontroller 501 can be the control device of the respective FIFO memory (e.g., 160, 165), or the control device of the respective FIFO memory can comprise the microcontroller 501. This behavior of the respective FIFO memory can also be achieved in a functionally equivalent manner by changing the write and read pointers in an analogous manner, for example, within the framework of a preferably computer-implemented method. Ultimately, a respective FIFO memory (e.g.,165, 160) perform the function of a shift register for the respective values ​​within the meaning of this document. The same applies to the middle high-pass current signal value FIFO 160, which is also typically such a FIFO memory within the meaning of this document.

[0055] This memory 509 of the device preferably comprises memory cells. This memory 509 is preferably a memory area of ​​the read / write memory of the microcontroller 501 of the device. The microcontroller 501 of the device preferably stores the internal sample values ​​of the ripple signal 196 in a ripple memory location 596 and / or in a ripple memory area 596 in the memory 509 of the microintegrated circuit 592 as a stored sample value.

[0056] The technical teaching of the document presented here now proposes not, as in the prior art, by comparing the magnitude of the values ​​of the stored sample values ​​in the ripple memory area 596 with a threshold value or by comparing the values ​​of the sample values ​​stored in the ripple memory area 596 with a threshold value to infer a ripple in the FIFO memory area 565 of the FIFO memory 165, for example by means of a preferably computer-implemented method, but to use more advanced methods for detecting a ripple.

[0057] In particular, the document presented here proposes that the microcontroller 501 of the proposed device execute a preferably computer-implemented program for pattern recognition in the stored sample values ​​in the FIFO memory area 565 of the FIFO memory 165 and / or in the high-pass current signal value FIFO memory area 560 of the medium high-pass current signal value FIFO 160. The instruction codes of this program are preferably stored in the memory 509 or storage medium of the microelectronic circuit 592. The microcontroller 501 preferably accesses the program data and instruction codes of this program in the memory 516 or storage medium of the microelectronic circuit 592 of the device via the internal data bus 516.In the context of executing such a program for preferably computer-implemented pattern recognition in the stored sample values, the microcontroller 501 of the device can also use hardware acceleration blocks, for example, to increase computing power and / or reduce power consumption, without abandoning the scope of the application. A preferably computer-implemented method can therefore expressly be executed in part or in whole by a special hardware circuit within the meaning of the document presented here. The technical teaching of the document presented here thus proposes the application of a preferably computer-implemented pattern recognition method by the microcontroller 501 of the device to the sample values ​​stored in the FIFO memory area 565 of the FIFO memory 165 and / or the high-pass current signal value FIFO memory area 560 of the medium high-pass current signal value FIFO 160 by the microcontroller 501 of the device.Furthermore, the technical teaching of the document presented here proposes a decision, for example by means of a preferably computer-implemented method, as to whether or not a ripple is present in the FIFO memory area 565 of the FIFO memory 165 and / or the high-pass current signal value FIFO memory area 560 of the medium high-pass current signal value FIFO 160. This means that the technical teaching of the document presented here proposes that the microcontroller 501 of the proposed device decides, for example by means of a preferably computer-implemented method, whether or not the sample values ​​in the FIFO memory area 565 of the FIFO memory 165 and / or the high-pass current signal value FIFO memory area 560 of the medium high-pass current signal value FIFO 160 of the device comprise the sample values ​​of a ripple.

[0058] For example, the microcontroller 501 can form a dynamic threshold signal as a function of the filtered samples of the filtered digital rotor current signal 197 in the memory area 597 of the filtered samples of the filtered digital rotor current signal 197 and / or as a function of the samples of the digital rotor current signal 113 in the digital rotor current signal memory area 513 in the memory 509 of the microintegrated circuit 592, for example by means of a preferably computer-implemented method, and compare the internal sample of the ripple signal 196 in the ripple memory location 596 in the memory 509 or storage medium of the microintegrated circuit 592 for the ripple signal 196 with this dynamic threshold signal.In this way, the microcontroller 501 can generate a dynamic comparison result, for example, using the preferably computer-implemented method and use it together with the internal sample values ​​of the ripple signal 196 and / or the stored sample values ​​in the FIFO memory 165 and / or in the average high-pass current signal value FIFO 160 of the device as input values ​​of the preferably computer-implemented pattern recognition program executed by the microcontroller 501. The program data and instruction codes of the preferably computer-implemented pattern recognition program are preferably located in the memory 509 or in the storage medium of the microintegrated circuit 592 of the device, so that the microcontroller 501 can access the program data or instruction codes of this preferably computer-implemented pattern recognition program via the internal data bus 516.Such an approach therefore represents a combination of the previously analog and now digitized prior art methods with the method presented here, using a program for preferably computer-implemented pattern recognition by the device's microcontroller 501. This can combine the advantages of both methods and improve the quality of the device's ripple detection result. This minimizes the number of signal structures incorrectly recognized as ripples by the device and the number of ripples not recognized by the device.

[0059] One idea is to modify the ripple count signal appropriately so that digital processing with a conventional microprocessor 501 is possible despite the limited computing power of the microcontroller 501, without suffering any potential data loss.

[0060] The proposed device reduces the amplitude of the sample values ​​of the measured analog rotor current signal 107 in its first stage 10. The analog-to-digital converter 510 preferably has a bit width of 16 bits or the like for the analog-to-digital conversion 110. If necessary, the analog-to-digital converter 510 can use oversampling methods in the analog-to-digital conversion 110 to achieve the necessary bit width. The microcontroller 501 preferably filters the sample values ​​of the digitized rotor current signal 113 in the digital rotor current signal storage area 513 in the memory 509 or the like using a preferably computer-implemented low-pass filter program for emulating a signal level extraction 120 in a signal level extraction device 520.in the storage medium of the microintegrated circuit 592 to low-pass filtered sample values ​​of a filtered digital rotor current signal 197, for example in a memory area 597 of the filtered sample values ​​of the filtered digital rotor current signal 197. The proposed device can also perform this low-pass filtering by means of a low-pass filter implemented in the hardware of the microelectronic circuit 592, which, for example, is controlled by the microcontroller 501 or another suitable sub-device of the proposed device, for example within the preferably computer-implemented method. In this case, the microcontroller 501 preferably uses this hardware-implemented low-pass filter when executing the preferably computer-implemented low-pass filter program. The program data of the preferably computer-implemented low-pass filter program are preferably again located in the memory 509 orin the storage medium of the microintegrated circuit 592 of the device, so that the microcontroller 501 can access the program data and / or the instruction codes of this preferably computer-implemented low-pass filter program via the internal data bus 516. This digital, preferably computer-implemented low-pass filtering of the signal level extraction 120 preferably uses low-pass filtered samples of a filtered digital rotor current signal 197, adjustable start parameters in the form of initialization parameters 125 and an adjustable offset parameter. The initialization parameters 125 are preferably located in an initialization parameter memory area 525 of the memory 509 or the storage medium of the microintegrated circuit 592, so that the microcontroller 501 can access these initialization parameters 125 via the internal data bus 516.The offset parameters are preferably located in an offset parameter memory area of ​​the memory 509 or the storage medium of the microintegrated circuit 592, so that the microcontroller 501 can access these offset parameters via the internal data bus 516. When the internal samples of a ripple signal 196 are formed, the ripple structure of the signal is preferably retained in the internal samples in the ripple memory area 596 in the memory 509 or in the storage medium of the microintegrated circuit 592 for the ripple signal 196. The device and in particular its microcontroller 501 can further process the internal samples of the ripple signal 196 thus formed, typically digitally, for example by means of preferably computer-implemented methods. The internal samples of the ripple signal 196 in the ripple memory area 596 in the memory 509 orin the storage medium of the microintegrated circuit 592, the ripple signal 196 only has a bit width of 8 bits. The bit width of the internal samples of the ripple signal 196 is therefore preferably reduced compared to the bit width of the samples of the digital rotor current signal 113. This reduces the necessary hardware expenditure for the FIFO memory area 565 of the FIFO memory 165 and / or for the high-pass current signal value FIFO memory area 560 of the medium high-pass current signal value FIFO 160. This also significantly reduces the necessary hardware expenditure for further processing. The memory of the FIFO memory 165 and / or the medium high-pass current signal value FIFO 160 for the internal samples of the ripple signal 196 is preferably designed as a FIFO memory within the meaning of the document presented here. These internal samples of the ripple signal 196 thus typically form the input signal for a FIFO memory.

[0061] The device, and in particular the microcontroller 501 of the device, preferably stores the internal samples of the ripple signal 196 as individual data points of the reduced ripple count signal (stored samples) in the FIFO storage area 565 of the FIFO memory 165 within the memory 509 or the storage medium of the device.

[0062] Preferably, the logical position of the stored sample values ​​in the FIFO memory 165 shifts by one position each time an internal sample value of the ripple signal 196 is stored in the FIFO memory 165, as in a shift register.

[0063] The device and / or the microcontroller 501 of the device preferably execute a program for the preferably computer-implemented pattern recognition of predetermined sample patterns in the samples stored in the FIFO memory 165 and / or in the medium high-pass current signal value FIFO 160 of the device. The program data of the program for the preferably computer-implemented pattern recognition of predetermined sample patterns are preferably located in the memory 509 or in the storage medium of the microintegrated circuit 592 of the device, so that the microcontroller 501 can access the program data or the command codes of this program for the preferably computer-implemented pattern recognition of predetermined sample patterns via the internal data bus 516.By executing this program for preferably computer-implemented pattern recognition, the device and / or the microcontroller 501 of the device perform a preferably computer-implemented pattern recognition method that detects the ripples in the internal sample values ​​stored in the FIFO memory 165 and / or in the average high-pass current signal value FIFO 160 of the device. Preferably, the device proposed here and / or the microcontroller 501 of the device proposed here compare the stored bit-width-reduced current signal values ​​195 in the FIFO memory 165 and / or the stored average high-pass current signal values ​​198 in the average high-pass current signal value FIFO 160 of the device with one another using preferably computer-implemented methods: . The proposed device and / or the microcontroller 501 of the proposed device can identify patterns of predetermined pulse shapes as ripples of the brushed commutation of the brushed DC motor 103 by executing the said program for preferably computer-implemented pattern recognition. The proposed device and / or the microcontroller 503 of the proposed device execute a preferably computer-implemented pattern recognition program that applies the preferably computer-implemented pattern recognition to the stored sample values ​​in one or more FIFO memories (160, 165) and / or in other memories of the device.The proposed device and / or the microcontroller 501 of the proposed device preferably execute a preferably computer-implemented pattern recognition program that applies the preferably computer-implemented pattern recognition to the stored bit-width-reduced current signal value 195 in the FIFO memory 165 and / or to the stored average high-pass current signal value 198 in the average high-pass current signal value FIFO 160 of the device. Preferably, the proposed device and / or the microcontroller 501 evaluate the signal shapes of the signal section of the sample values ​​stored in the FIFO memory 165 and / or in the average high-pass current signal value FIFO 160 of the device or another memory or storage medium of the device.In this way, the proposed device and / or the microcontroller 501 of the proposed device preferably determine, for example, using preferably computer-implemented methods, pulse shapes of potential ripples in the stored sample values ​​in the FIFO memory 165 and / or in the average high-pass current signal value FIFO 160 of the device (or in the relevant memory of the proposed device). Preferably, the proposed device and / or the microcontroller 501 of the proposed device classify the pulse shapes of the potential pulses in the stored sample values ​​in the FIFO memory 165 and / or in the average high-pass current signal value FIFO 160 of the device or in the other memory of the proposed device, for example, using preferably computer-implemented methods.Through this evaluation and / or classification of the pulse shape using these exemplary, preferably computer-implemented methods, the proposed device and / or the microcontroller 501 can determine whether it is a signal from the brushed DC motor 105 or whether it is an "external signal." Such an external signal can, for example, be a signal coupled into the device's lines by EMC. In this way, the technical teaching proposed here avoids the loss of ripples or the false detection of ripples in places where none exist.

[0064] The technical theory presented here thus makes it possible to recognize “external signals” as such and then to filter them out and / or ignore or skip them. a. The first special feature of the technical teaching presented here is thus the implementation of a preferably computer-implemented pattern recognition method, for example, for ripple detection by the proposed device and / or by the microcontroller 501 of the proposed device. This, on the one hand, increases the probability of correctly detecting ripples actually present in the analog rotor current signal 107. On the other hand, it reduces the false detection of ripples not present in the analog rotor current signal 107. b. The second special feature here is the preprocessing (feature extraction) of the recorded current values ​​by the device or by the microcontroller 501 of the proposed device, for example, using preferably computer-implemented methods. A program for the preferably computer-implemented execution of this preprocessing, also called feature extraction, is executed by the proposed device or the microcontroller 501 of the proposed device in order to increase significance. This preferably computer-implemented preprocessing program is preferably stored in the memory 509 or storage medium of the microintegrated circuit 592, so that, for example, the microcontroller 501 can access the program data and / or the instruction codes of this preferably computer-implemented preprocessing program. This preferably computer-implemented preprocessing can, for example, involve differentiation, filtering, etc.The preferably computer-implemented preprocessing program can thus include corresponding differentiation programs and / or filter programs and / or other subprograms, in particular for preferably computer-implemented signal processing. The proposed device and / or the microcontroller 501 of the proposed device typically generate feature vectors from the sample values ​​of the analog rotor current signal 107 or from the digitized rotor current signal 113, respectively. These feature vectors typically form the input values ​​for the preferably computer-implemented pattern recognition program executed by the proposed device and / or by the microcontroller 501 of the proposed devices. This preferably computer-implemented feature extraction program can also be considered part of the preferably computer-implemented pattern recognition program.Preferably, this preferably computer-implemented feature extraction program and / or the preferably computer-implemented pattern recognition program are stored in the memory 509 or in the storage medium of the micro-integrated circuit 592, so that, for example, the microcontroller 501 can access the program data and / or the instruction codes of this preferably computer-implemented feature extraction program and / or the preferably computer-implemented pattern recognition program. c. The third special feature of the technical teaching presented in this document is the use of a FIFO memory (e.g., 160, 165). The proposed device or the microcontroller 501 of the proposed device preferably operates this memory or memory area of ​​the memory or storage medium of the device, in particular the FIFO memory 165 and / or the medium high-pass current signal value FIFO 160 of the device, like a virtual shift register. In other words: The proposed device or the microcontroller 501 of the proposed device preferably operates, for example, the FIFO memory area 565 of the FIFO memory 165 and / or the high-pass current signal value FIFO memory area 560 of the medium high-pass current signal value FIFO 160 like a virtual shift register, for example, using a preferably computer-implemented method.If a newly added internal sample value is to be stored in a memory area of ​​a respective FIFO memory, the proposed device and / or the microcontroller 501 of the proposed device discard the oldest stored sample value in the respective FIFO memory of the device. As already mentioned, the respective FIFO memory can also be just a memory area in a memory 592 or storage medium 4 of the device. The proposed device and / or the microcontroller 501 of the proposed device typically modify the logical content of the respective FIFO memory such that the previously second oldest stored sample value in the respective FIFO memory is now the oldest stored sample value in the respective FIFO memory and the most recent sample value in the respective FIFO memory is now the second most recent stored sample value in the respective FIFO memory.The stored sample values ​​in the respective FIFO memory are thus advanced by exactly one virtual position in the respective FIFO memory. This frees up the first memory location in the respective FIFO memory for the most recently stored sample value. The proposed device or the microcontroller of the proposed device stores the newly added internal sample value in this first free memory location of the respective FIFO memory, for example, using a preferably computer-implemented method. This makes this newly added internal sample value the most recently stored sample value in the respective FIFO memory.The proposed device and / or the microcontroller 501 of the proposed device utilize the stored sample values ​​in the respective FIFO memory when executing the preferably computer-implemented programs, for example, by the microcontroller 501 for preferably computer-implemented feature extraction and / or for preferably computer-implemented pattern recognition. It is conceivable that the proposed device and / or the microcontroller 501 of the proposed device executes a program for the preferably computer-implemented extraction of feature vectors before storing the internal sample values ​​of the ripple signal 196 in the ripple memory area 596 in the memory 509 of the microintegrated circuit 592 for the ripple signal 196.Preferably, the proposed device and / or the microcontroller 501 of the proposed device then preferably generate a feature vector for each internal sample value in the ripple memory area 596 in the memory 509 or storage medium of the microintegrated circuit 592 for the ripple signal 196 - for example in the form of an average high-pass current signal value 198 (e.g. in the memory area 598 of the average high-pass current signal value 198) - which they can store together with the internal sample value of the ripple signal 196 as a stored sample value in the FIFO memory or the FIFO memories (e.g. the FIFO memory 165 and / or the average high-pass current signal value FIFO 160). In this sense, a stored sample value can be the stored value of an internal sample value of the ripple signal 196 and the stored values ​​of a first feature vector - e.g. a mean high-pass current signal value 198 - and possiblyfurther feature vectors extracted differently from the digitized rotor current signal 113. It is conceivable that the proposed device and / or the microcontroller 501 of the proposed device then subsequently executes a second program for the preferably computer-implemented generation of a second feature vector based on these stored sample values. Preferably, the program data of this second program for the preferably computer-implemented extraction of the second feature vector are also stored in the memory 592 of the device, so that, for example, the microcontroller 501 can access the program data and / or the instruction codes of this program via the internal data bus 516 of the microintegrated circuit 592.It is conceivable that the proposed device and / or the microcontroller 501 of the proposed device then repeatedly executes a further program for the preferably computer-implemented generation of a further feature vector based on these stored sample values. Preferably, the program data and / or instruction codes of this further program for the preferably computer-implemented extraction of the further feature vector are also stored in the memory 592 or in the storage medium of the device, so that, for example, the microcontroller 501 can access the program data and / or instruction codes of this further program via the internal data bus 516 of the microintegrated circuit 592.It is conceivable that the proposed device and / or the microcontroller 501 of the proposed device executes a program for preferably computer-implemented pattern recognition using these further feature vectors and / or second feature vectors and / or the stored sample values ​​and / or internal sample values ​​in order to detect and classify pulses and / or ripples. Preferably, the program data and / or command codes of this program for preferably computer-implemented pattern recognition and for preferably computer-implemented classification are also stored in the memory 592 or in the storage medium of the device, so that, for example, the microcontroller 501 can access the program data and / or command codes of this program for preferably computer-implemented pattern recognition and for preferably computer-implemented classification via the internal data bus 516 of the microintegrated circuit 592.d. The fourth special feature of the technical teaching presented here is the execution of a program for preferably computer-implemented pattern recognition by the proposed device and / or the microcontroller 501 of the proposed device. Preferably, the program data and / or command codes of this program for preferably computer-implemented pattern recognition and for preferably computer-implemented classification are also stored in the memory 592 of the device, so that, for example, the microcontroller 501 can access the program data and / or command codes of this program for preferably computer-implemented pattern recognition and for preferably computer-implemented classification via the internal data bus 516 of the microintegrated circuit 592.For example, the proposed device and / or the microcontroller 501 can calculate a correlation value for the respective curve pattern using preferably computer-implemented methods by forming a correlation integral or a similar correlation function between the sample values ​​stored, for example, in the FIFO memories (160, 165) and predetermined curve patterns stored in a memory area of ​​a memory 509 or storage medium of the microelectronic circuit 592. For example, the proposed device and / or the microcontroller 501 can compare each of the sample values ​​stored in the respective FIFO memory (160, 165) with a corresponding value in the memory area of ​​a memory 509 orMultiply the value of a predetermined curve pattern stored in the storage medium of the microelectronic circuit 592 and sum the resulting product value with all other product values ​​for the other sample values ​​stored in the respective FIFO memory (160, 165) to obtain an exemplary correlation value for the respective curve pattern, for example, preferably using computer-implemented methods. This corresponds to a discrete L2 product. (More information on this can be found, for example, at https: / / mathworld.wolfram.com / L2-InnerProduct.html) Further information and exemplary correlation integrals can be found at https: / / de.wikipedia.org / wiki / Korrelation_(Signalverarbeitung). The device and / or the microcontroller 501 preferably calculate, for each predetermined curve pattern, a correlation value associated with this predetermined curve pattern, for example, preferably using computer-implemented methods.If the correlation value of a predetermined curve pattern calculated in this way lies above a correlation threshold value and this correlation value of this predetermined curve pattern is the largest of the correlation threshold values ​​of a predetermined subset or of the set of predetermined curve patterns, the proposed device and / or the microcontroller 501 can typically conclude, for example by means of preferably computer-implemented methods, that a pulse with this predetermined curve pattern is present in the FIFO memory (e.g. in the FIFO memory 165 and / or in the mean high-pass current signal value FIFO 160). For this correlation method, the device and / or the microcontroller 501 preferably execute a preferably computer-implemented correlation program. The program data and / or instruction codes of the preferably computer-implemented correlation program are preferably stored in the memory 509 orstored in the storage medium of the micro-integrated circuit 592 of the proposed device. The proposed device and / or the microcontroller 501 of the proposed device then typically recognize, during the execution of the preferably computer-implemented correlation program, by forming a correlation value between the feature vectors in the FIFO memories (e.g., in the FIFO memory 165 and / or in the mean high-pass current signal value FIFO 160) with predetermined waveform patterns, these predetermined current waveform patterns as ripples if a ripple was present in the digitized rotor current signal 113. The proposed device and / or the microcontroller 501 of the proposed device then typically recognize, during the execution of the preferably computer-implemented correlation program, by forming a correlation value between the feature vectors in the FIFO memories (e.g.,In the FIFO memory 165 and / or in the average high-pass current signal value FIFO 160) with predetermined waveform patterns, these predetermined current waveform patterns are interpreted as non-ripple if no ripple was present in the digitized rotor current signal 113. In this case, the proposed device and / or the microcontroller 501 preferably also evaluate sequences of feature vectors, for example, using preferably computer-implemented methods. To detect these ripples, the third stage 30 can also, and optionally also alternatively, have special filters that respond particularly sensitively and selectively to these predetermined signal shapes of the current waveform patterns. The proposed device and / or the microcontroller 501 can emulate these filters, for example, using preferably computer-implemented methods. Examples of such filters include Kalmann filters and / or optimal filters or the like.For example, the microintegrated circuit 592 may comprise circuits of hardware implementations of such Kalmann filters and / or optimal filters or similar signal processing devices, which the microcontroller 501 preferably controls via the internal data bus 516 as part of the execution of preferably computer-implemented methods and whose results the microcontroller 501 reads out, for example, via the internal data bus 516 and uses for other programs, stores in the memory 509 or in the storage medium, or outputs via a data interface 508 and an external data bus 591.

[0065] In summary, the technical teaching presented here is characterized in that the proposed device carries out a preferably computer-implemented extraction of the ripple signal 196 after the analog-to-digital conversion 110 and then carries out a preferably computer-implemented feature extraction with a typical result in the form of a preferably multi-dimensional feature vector, so that the device then stores in one of its memories (the said FIFO memories 160, 165) orStorage media stores the historical progression of the values ​​of this extracted, preferably multidimensional, feature vector for evaluation, and the proposed device then retrospectively analyzes this historical progression of the values ​​of this extracted, preferably multidimensional, feature vector over a period predefined by the number of values ​​of this extracted, preferably multidimensional, feature vector, in particular through pattern recognition and classification, for example, using preferably computer-implemented methods. As a result, in contrast to the prior art, the proposed device can detect ripple based on the signal shape and not just on a level exceedance, which better prevents ripple losses and reduces false ripple detections. Advantage

[0066] The main advantage of the technical teaching presented here is a cost-effective solution for ripple detection in the current waveform of a brushed DC motor, since only a minimal silicon area of ​​the microintegrated circuit is required for this specific application when integrated into a corresponding microintegrated circuit for controlling such a brushed DC motor.

[0067] As a rule, the resources required for implementing the method presented here, which is preferably largely computer-implemented, are already available in the conventional microintegrated control circuits for controlling brushed DC motors. This essentially applies to the typically available microcontroller. Therefore, the circuit development of a special component with ripple detection for these brushed DC motors is generally unnecessary. Rather, a modification of the firmware of such a microelectronic circuit is usually sufficient to obtain a device functionally equivalent to the proposed device, which is also encompassed by the claim and which implements a preferably computer-implemented functionally equivalent method.

[0068] Ripple detection therefore generally does not require any additional silicon surface area of ​​the microelectronic circuit if the ripple counting solution is not required for the customer in question. The firmware for the preferably computer-implemented emulation of the proposed device can typically be executed by any microcontroller with sufficient computing power.

[0069] This typically essentially software-based solution with preferably computer-implemented methods is preferably used for the sensorless positioning of DC brush actuators with a brushed DC motor drive in an open control loop.

[0070] This software-based, preferably computer-implemented emulation solution for emulating the proposed device can be ported to any microcontroller with sufficient computing power.

[0071] This software-based and preferably computer-implemented emulation solution for emulating the proposed device can only be used if the electronics are embedded in a DC actuator with a brushed DC motor drive.

[0072] Such a solution could hardly be managed in a driven-by-wire architecture, since the excessive CPU load required to manage a few actuators in parallel carries the risk of EMC wire interference, which can affect the accuracy of the position rounding count.

[0073] The benefits are not limited to those mentioned above. List of characters Fig. 1 shows the step-by-step extraction of a ripple from the analog rotor current signal 107 of a brushed DC motor 103 to a rotor position signal 185. Fig. 2 shows the exemplary structure of the detection of a ripple. Fig. 3 shows a typical curve of the values ​​of the digitized rotor current signal 113, the low-pass filtered samples of the filtered digital rotor current signal 197, and the ripple signal 196 from internal samples in the form of a high-pass current signal value 196. Fig. 4 shows an exemplary proposal for the realization of a proposed device. Fig. 5 illustrates the processing of the signals. Description of the figuresFigure 1

[0074] Fig. 1 shows the step-by-step extraction of a ripple from the analog rotor current signal 107 of a brushed DC motor 103 to a rotor position signal 185.

[0075] The brushed DC motor 103 typically includes an excitation coil. Furthermore, the brushed DC motor 103 typically includes means 105 for detecting the current through the excitation coils of the brushed DC motor 103. This current through the excitation coils of the brushed DC motor 103 is hereinafter referred to in the document presented here as the motor current. The means 105 for detecting the motor current of the brushed DC motor 103 typically transmits an analog rotor current signal 107 to an analog-to-digital converter stage 110. The analog-to-digital converter stage 110 is hereinafter referred to in the document presented here as an ADC. The ADC 110 converts the analog rotor current signal 107 into a digitized motor current signal 113. Preferably, a digital current register 115 temporarily stores the current value of the digitized rotor current signal 113.The ADC 110 and the current register 115 operate with an ADC converter clock having an ADC conversion frequency. A signal level extraction 120 extracts the current signal level 197 from the stored rotor current signal value 117. At the beginning of operation, the device preferably loads the registers of the signal level extraction 120 with initialization parameters 125. Preferably, at the beginning of operation, the device loads some of the registers of the signal level extraction 120 with stop parameters 130, which prevent an unlimited increase or decrease of integration parameters within the signal level extraction 120. The current signal level 197 typically has a bit width of 16 bits. An adder 123 adds the stored rotor current signal value 117 and an offset value 140 and subtracts the stored motor current signal value 197 from this to form the high-pass current signal value in the form of a ripple signal 196.A reduction device 150 reduces the bit width of the high-pass current signal value in the form of the ripple signal 196 to the significant bits of the high-pass current signal value of the ripple signal 196 and thus generates the bit-width-reduced current signal value 195. A mean value filter 155 determines the mean value of this determined reduced-width high-pass current signal value 195 and the immediately preceding previously determined bit-width-reduced high-pass current signal value 195 and / or another preceding previously determined bit-width-reduced high-pass current signal value 195 for each bit-width-reduced high-pass current signal value 195 determined in this way, the associated mean high-pass current signal value 198. The device proposed in this document temporarily stores the mean high-pass current signal value 198 in a mean high-pass current signal value FIFO 160.The device proposed in this document stores the bit-width-reduced current signal value 195 in a current signal value FIFO 165. In the proposal presented here, the proposed device uses the combined vector of the values ​​stored in the current signal value FIFO 165 and the medium high-pass current signal value FIFO 160 as a feature vector 167. A pattern recognition device 170 evaluates the feature vector 167. For example, the pattern recognition device 170 can comprise a computer core or can be emulated by a computer core or microcontroller 501 as a preferably computer-implemented pattern recognition. The computer core can be, for example, a microcontroller 501 and / or an ARM processor. The computer core is typically connected via an internal data bus 516 to a memory 509, which typically comprises a program memory and a data memory.The program memory of the data memories can be combined in a common physical memory 509. The program memory preferably contains a program for executing a neural network model and / or a Kalmann filter and / or an optimal filter for the preferably computer-implemented emulation of a pattern recognition device 170. In the case of a computer-implemented neural network model, the parameters of the computer-implemented neural network model are preferably trained such that the computer core can detect the occurrence of ripples in the digitized rotor current signal 113 when executing the computer-implemented neural network model.If a ripple occurs in the rotor current signal 107 and thus in the digitized rotor current signal 113, this causes a profile of the signal values ​​in the current signal value FIFO 165 and in the average high-pass current signal value FIFO 160 that corresponds to or resembles one or more predetermined signal profile sections. Using preferably computer-implemented methods, the device can quantitatively measure and evaluate this similarity. The signal values ​​in the current signal value FIFO 165 and in the average high-pass current signal value FIFO 160 and / or any values ​​derived therefrom preferably form a feature vector 167.In order for the pattern recognition device 170 to be able to recognize these predetermined signal waveform sections in the feature vector 167, the preferably computer-implemented neural network model of the pattern recognition device 170 is preferably previously trained in the design phase with the values ​​of these predetermined signal waveform sections with the aid of a preferably computer-implemented training method on a corresponding and suitable training platform. Preferably, an output signal of the pattern recognition device 170 or the preferably computer-implemented emulation of the pattern recognition device 170 by the microcontroller 501 is a ripple detection signal 175. Preferably, the ripple detection signal 175 becomes active when the pattern recognition device 170 or its preferably computer-implemented emulation detects the values ​​in the current signal value FIFO 165 and in the values ​​in the medium high-pass current signal value FIFO 160 ordetect such a ripple in the feature vector 167. The ripple detection signal 175 becomes inactive if the pattern recognition device 170 or its preferably computer-implemented emulation does not detect such a ripple in the values ​​in the current signal value FIFO 165 and in the values ​​in the medium high-pass current signal value FIFO 160. Preferably, the device uses a counter 180 to count the ripples signaled via the ripple detection signal 175 and thus generates a rotor position signal 185, the rotor position value of which is a measure of the rotor position relative to the housing of the brushed DC motor. The device preferably determines the counting direction of the counter 180 as a function of a previously known direction of rotation of the brushed DC motor 103. Figure 2

[0076] Fig. 2 shows the exemplary structure of the detection of a ripple.

[0077] The H-bridge 5 supplies the brushed DC motor 103 with electrical energy by means of a voltage signal 7 from the H-bridge 5. This causes the brushed DC motor 103 to rotate. Means 105 for detecting the rotor current of the brushed DC motor 103 generate the analog rotor current signal 107, the temporal value profile of which typically reflects the current value profile of the rotor current. These means 105 are typically means 105 for detecting the current through the excitation coils of the brushed DC motor 103. An analog-to-digital converter 110 generates the digitized rotor current signal 113 with sampled values ​​from the analog rotor current signal 107. The storage 115 of the digitized rotor current signal 113, e.g., in a current register 515, temporarily stores this sampled value.The signal level extraction 120 preferably performs low-pass filtering of the stored rotor current signal value 117, thus generating the low-pass filtered sample values ​​of a filtered digital rotor current signal 197. For this low-pass filtering, the signal level extraction 120 preferably uses initialization parameters 125 and stop parameters 130. An adder 123 forms a sum of generated sample values ​​135 of the digital rotor current signal 113, wherein these generated sample values ​​135 of the digital rotor current signal 113 typically correspond to the sample values ​​of the digital rotor current signal 113. From this sum, the adder 123 preferably subtracts the corresponding values ​​of the filtered digital rotor current signal 197, thus forming the ripple signal 196.The reduction device 150 reduces the bit width of the ripple signal 196 (=the high-pass current signal value) to the significant bits of this high-pass current signal value of the ripple signal 196, thus generating the bit-width-reduced current signal value 195. A current signal value FIFO 165—also referred to simply as a FIFO memory in the document presented here—stores the bit-width-reduced current signal value 195 and its history. This creates a first feature vector component. The mean value filter 155 determines the mean value of this determined width-reduced high-pass current signal value 195 and the immediately preceding, previously determined, bit-width-reduced high-pass current signal value 195 and / or another preceding, previously determined bit-width-reduced high-pass current signal value 195, the associated mean high-pass current signal value 198.The average high-pass current signal value FIFO 160 stores the average high-pass current signal value 198 and its history. This creates a second feature vector component. The feature vector 167 preferably comprises the first feature vector component and the second feature vector component. A pattern recognition device 170 preferably executes a preferably computer-implemented pattern recognition method using the feature vector 167. Such a preferably computer-implemented pattern recognition method can, for example, be the execution of a preferably computer-implemented neural network model. As examples of a pattern recognition methodology, the document presented here refers to the following publications: Liu Yunpeng, Lu Fangcheng, Chen Zhiye and Li Yanqing, „Data compression and pattern recognition for partial discharge ultrasonic signal based on fractal theory,“ Proceedings. International Conference on Power System Technology, Kunming, China, 2002, pp. 958-961 vol.2, doi: 10.1109 / ICPST.2002.1047541. N. Mansor, R. Flynn and M. Daly, „Multi-Resolution Pre-Processing for Pattern Recognition in Images and Audio Signals,“ 2021 32nd Irish Signals and Systems Conference (ISSC), Athlone, Ireland, 2021, pp. 1-6, doi: 10.1109 / ISSC52156.2021.9467861. J. A. O'Sullivan and Po-Hsiang Lai, „Pattern recognition system design based on LDPC matrices,“ Proceedings. International Symposium on Information Theory, 2005. ISIT 2005., Adelaide, SA, 2005, pp. 33-36, doi: 10.1109 / ISIT.2005.1523287. Z. Bojkovic, D. Milovanovic and N. Mastorakis, „Neural networks applications for multimedia processing,“ Proceedings of the 5th Seminar on Neural Network Applications in Electrical Engineering. NEUREL 2000 (IEEE Cat. No.00EX287), Belgrade, Yugoslavia, 2000, pp. 87-91, doi: 10.1109 / NEUREL.2000.902390. E. Mese and D. A. Torrey, „An approach for sensorless position estimation for switched reluctance motors using artifical neural networks,“ in IEEE Transactions on Power Electronics, vol. 17, no. 1, pp. 66-75, Jan. 2002, doi: 10.1109 / 63.988671. M. Sharma, „A Review on DC Motor Speed Control using Artificial Neural Network“ International Journal of Engineering & Scientific Research, Vol. 7 Issue 8, Aug2018, ISSN: 2347-6532

[0078] The pattern recognition device 170 generates the ripple detection signal 175 when it detects a ripple in the values ​​in the current signal value FIFO 165 and / or in the values ​​in the medium high-pass current signal value FIFO 160. The counter 180 counts these ripples. Based on the signal waveform of the ripple, the pattern recognition device 170 can typically also detect the direction of rotation of the brushed DC motor 105 using its preferably computer-implemented neural network model. Therefore, the pattern recognition device 170 preferably signals to the counter 180 not only the fact that it has detected a ripple, but also the direction in which the brushed DC motor 105 has rotated. The counter 180 preferably counts the ripples detected by the pattern recognition device 170.The counter 180 counts up or down depending on the direction of rotation of the brushed DC motor 105 detected by the pattern recognition device 170. Instead of detecting the direction of rotation of the brushed DC motor 105, the counter 180 can also use a counting direction according to an externally specified or generated specification. Preferably, the counter 180 or another device generates a rotor position signal 185 from its counter reading. Figure 3

[0079] Fig. 3 shows a typical curve of the values ​​of the digitized rotor current signal 113, the low-pass filtered samples of the filtered digital rotor current signal 197, and the ripple signal 196 from internal samples in the form of a high-pass current signal value 196. Figure 4

[0080] Fig. 4 shows an exemplary proposal for the realization of a proposed device. The proposal is based on a micro-integrated circuit 592. In the example, the micro-integrated circuit 592 comprises a microcontroller 501, a memory 509, an H-bridge controller 505, an analog-to-digital converter 510, an analog signal conditioning 511, a data interface 508 of the microelectronic circuit 592 and further circuit blocks 593 of the micro-integrated circuit 592. The microcontroller 501 communicates via the internal data bus 516 of the micro-integrated circuit 592 with the memory 592 and / or the other sub-devices (e.g. 508, 505, 510, 511, 593) of the micro-integrated circuit 592. The microcontroller 501 accesses the contents of the memory 592 and / or other sub-devices (e.g. 508, 505, 510, 511, 593) of the microintegrated circuit 592 via this internal data bus 516.

[0081] The memory 592 preferably comprises a digital rotor current signal storage area 513 in the memory 509 of the microintegrated circuit 592 in which the microcontroller preferably stores the sample values ​​of the digitized rotor current signal 113.

[0082] The memory 592 preferably comprises a current register memory area of ​​the current register 515 in which the microcontroller 501 temporarily stores the digitized rotor current signal 113.

[0083] The memory 592 preferably comprises a rotor current signal value memory 517 in the memory 509 of the microintegrated circuit 592 in which the microcontroller 501 preferably stores the stored rotor current signal values ​​117.

[0084] The memory 592 preferably includes a memory area 520 for the computer-implemented emulation of a computer-implemented signal level extraction device for signal level extraction 120.

[0085] The memory 592 preferably comprises initialization parameter storage area 525 of the memory 509 of the microintegrated circuit 592 in which the microcontroller 501 preferably stores the initialization parameters 125.

[0086] The memory 592 preferably includes a stop parameter storage area 530 for the stop parameters 130, in which the microcontroller 501 preferably stores the stop parameters 130. If the stop parameters 130 are exceeded, the microcontroller 501 preferably stops the preferably computer-implemented low-pass integration.

[0087] The memory 592 may include a sample storage area 535 of the generated sample values ​​135 of the digital rotor current signal 113.

[0088] The memory 592 preferably includes an offset value storage area 540 for the offset value 140.

[0089] The memory 592 preferably comprises a reduction program memory 550. The reduction program for the computer-implemented emulation of the reduction device 150 by the microcontroller 501 is preferably stored in the reduction program memory 550 of the memory 509. The signal data for the computer-implemented emulation of the reduction device 150 by the microcontroller 501 are preferably stored in the reduction program memory 550 of the memory 509. The preferably computer-implemented reduction device 150 reduces the bit width of the high-pass current signal value in the form of the ripple signal 196 to the significant bits of the high-pass current signal value of the ripple signal 196 and thus generates the bit-width-reduced current signal value 195. The microcontroller 501 preferably emulates the reduction device 150 by executing the preferably computer-implemented reduction program for emulating the reduction device 150.In this preferably computer-implemented emulation, the microcontroller 501, acting as a reduction device 150, reduces the bit width of the high-pass current signal value in the form of the ripple signal 196 to the significant bits of the high-pass current signal value of the ripple signal 196, thus generating the bit-width-reduced current signal value 195. Preferably, the microcontroller 501 stores the bit-width-reduced current signal value 195 in the memory area 595 of the bit-width-reduced current signal value 195. The document presented here also refers to the memory area 595 of the bit-width-reduced current signal value 195 as the high-pass current signal value memory area 595. The document presented here also refers to the bit-width-reduced current signal value 195 as the width-reduced high-pass current signal value 195.

[0090] The memory 592 preferably comprises a memory area 598 of the mean high-pass current signal value 198. The microcontroller 501 preferably stores the high-pass current signal value 198 that the mean filter 155 or the preferably computer-implemented emulation of the mean filter 155 by the microcontroller 501 generates in the memory area 598 of the mean high-pass current signal value 198.

[0091] The memory 592 preferably includes a mean filter program memory 555. The mean filter program for the preferably computer-implemented emulation of the mean filter 155 by the microcontroller 501 is preferably stored in the mean filter program memory 555 of the memory 509. The mean filter 155 determines the mean high-pass current signal value 198 for the determined bit-width-reduced high-pass current signal value 195, the mean value of this determined bit-width-reduced high-pass current signal value 195 and the immediately preceding, previously determined bit-width-reduced high-pass current signal value 195 and / or another preceding, previously determined bit-width-reduced high-pass current signal value 195.

[0092] In the preferably computer-implemented emulation of the mean value filter 155 by means of the mean value filter program in the mean value filter program memory 555, the microcontroller 501 determines the mean high-pass current signal value 198 for the determined bit-width-reduced high-pass current signal value 195 in the high-pass current signal value memory area 595, the mean value from this determined width-reduced high-pass current signal value 195 in the high-pass current signal value memory area 595 and the immediately preceding, previously determined bit-width-reduced high-pass current signal value 195 in the high-pass current signal value memory area 595 and / or another preceding, previously determined bit-width-reduced high-pass current signal value 195 in the high-pass current signal value memory area 595.The microcontroller 501 then stores the thus determined mean high-pass current signal value 198 in the memory area 598 of the mean high-pass current signal value 198, preferably in a computer-implemented emulation.

[0093] The memory 592 preferably comprises a FIFO memory area 565 of the FIFO memory 165. The FIFO memory area 565 of the FIFO memory 165 preferably comprises those memory cells of the memory 592 that are required for storing the generated bit-width-reduced current signal values ​​195. Furthermore, the FIFO memory area 565 of the FIFO memory 165 preferably comprises a FIFO emulation program code memory area in which a FIFO emulation program code for the preferably computer-implemented emulation of the FIFO memory is preferably stored. The microcontroller 501 can, for example, emulate the FIFO memory 165 by executing the FIFO emulation program code in the emulation program code memory area of ​​the memory area 565 of the FIFO memory 165 using a preferably computer-implemented method.Preferably, in the preferably computer-implemented emulation of the FIFO memory 165, the microcontroller 501 provides a feature sub-vector of the feature vector 167 in a first feature sub-vector memory area 567 of the memory 592 for further processing based on the contents of the memory cells of the memory 592 for storing the generated bit-width-reduced current signal values ​​195 within the FIFO memory area 565 of the FIFO memory 165.

[0094] The memory 592 preferably includes the first feature subvector storage area 567 for the feature vector 167.

[0095] The memory 592 preferably comprises a pattern recognition program memory area 570 for the preferably computer-implemented pattern recognition program in the memory 509 of the microelectronic device 592. The microcontroller 501 preferably emulates the pattern recognition device 170 by executing the preferably computer-implemented pattern recognition program in the pattern recognition program memory area 570 of the memory 509. In a preferably computer-implemented emulation of the pattern recognition device 170, the microcontroller 501 preferably evaluates the values ​​in the first feature sub-vector memory area 567 for the feature vector 167 and preferably generates a ripple detection signal 175. The microcontroller 501 preferably stores the values ​​of the generated ripple detection signal 175 in a ripple detection signal memory area 575 of the memory 509.

[0096] The memory 592 preferably comprises a counter memory area 580 of the memory 592. The counter memory area 580 preferably comprises the program code of a counter emulation program. By executing this counter emulation program in the counter memory area 580 of the memory 592, the microcontroller 501 can typically emulate a counter 180 using a preferably computer-implemented method. For example, in a preferably computer-implemented emulation of the counter 180, the microcontroller 501 can count the ripples signaled by the values ​​in the ripple detection signal memory area 575 of the memory 509 by incrementing or decrementing a counter reading value in the counter memory area 580 of the memory 592 according to the counting direction described above.Preferably, in a preferably computer-implemented emulation of the counter 180, the microcontroller 501 provides the current value of the counter reading in the counter memory area 580 of the memory 592 and / or the value history of the counter reading in the counter memory area 580 of the memory 592 as a value or values ​​of a rotor position signal 185 in a rotor position signal memory area 585. The memory 592 preferably includes this rotor position signal memory area 585. The microcontroller 501 provides one or more values ​​of the rotor position signal 185 in a rotor position signal memory area 585.

[0097] The memory 592 preferably comprises a high-pass current signal value storage area 595. In the preferably computer-implemented emulation of the mean value filter 155 by means of the mean value filter program in the mean value filter program memory 555, the microcontroller 501 determines the mean high-pass current signal value 198 for the determined bit-width-reduced high-pass current signal value 195 in the high-pass current signal value storage area 595 from this determined bit-width-reduced high-pass current signal value 195 in the high-pass current signal value storage area 595 and the immediately preceding, previously determined bit-width-reduced high-pass current signal value 195 in the high-pass current signal value storage area 595 and / or another preceding, previously determined bit-width-reduced high-pass current signal value 195 in the high-pass current signal value storage area 595.

[0098] The memory 592 preferably comprises the said ripple memory area 596 in the memory 509 of the microintegrated circuit 592 for storing one or more values ​​of the ripple signal 196.

[0099] The memory 592 preferably includes the filtered sample storage area 597 of the filtered digital rotor current signal 197 for storing the filtered sample values ​​of the filtered digital rotor current signal 197.

[0100] Preferably, in a preferably computer-implemented emulation of the counter 180, the microcontroller 501 provides the current value of the counter reading in the counter memory area 580 of the memory 592 and / or the value history of the counter reading in the counter memory area 580 of the memory 592 as a value or values ​​of a rotor position signal 185 in a rotor position signal memory area 585 and outputs the current value of the counter reading in the counter memory area 580 of the memory 592 and / or the value history of the counter reading in the counter memory area 580 of the memory 592 as a value or values ​​of a rotor position signal 185 via the internal data bus 516 and the data interface 508 of the microelectronic circuit 592 and an external data bus 591, in particular upon request by a higher-level system.

[0101] Typically, the microcontroller 501 configures an analog signal conditioning 511 via the internal data bus 516. The analog signal conditioning 511 amplifies and / or filters and / or processes the analog rotor current signal 107 into a processed analog rotor current signal 512 in a suitable manner.

[0102] The analog-to-digital converter 510 typically converts the conditioned analog rotor current signal 512 into a digitized rotor current signal 113 using the analog-to-digital converter 110. The microcontroller 501 reads the digitized output value of the analog-to-digital converter 510 via the internal data bus 516 and preferably stores this value in the digital rotor current signal storage area 513 in the memory 509 of the microintegrated circuit 592.

[0103] The means 105 for detecting the rotor current of the brushed DC motor 103 detects the electrical rotor current through the rotor coils of the brushed DC motor 103. The means 105 for detecting the rotor current of the brushed DC motor 103 generates the analog rotor current signal 107 corresponding to the rotor current through the rotor coils of the brushed DC motor 103.

[0104] The H-bridge 5 supplies the brushed DC motor 103 with electrical energy.

[0105] The H-bridge 5 generates first monitoring signals 514 of the H-bridge 5 depending on the state of the H-bridge 5. The analog-to-digital converter 510 typically converts the first monitoring signals 514 of the H-bridge 5 into digitized values, which the microcontroller 501 reads from the analog-to-digital converter 510 via the internal data bus 516. Preferably, the microcontroller 501 controls the analog-to-digital converter 510 via the internal data bus 516 and preferably determines which signal the analog-to-digital converter 510 converts.

[0106] The H-bridge 5 generates H-bridge status signals on the H-bridge status lines 507 depending on the state of the H-bridge 5. An H-bridge controller 505 evaluates the bridge status signals on the H-bridge status lines 507 and controls the H-bridge 5 via H-bridge control signals 506 depending on signaling from the microcontroller 501 to the H-bridge controller 505 via the internal data bus 516 by means of the H-bridge control signals 506.

[0107] The H-bridge 5 supplies the brushed DC motor 103 with electrical energy by means of the voltage signal 7 of the H-bridge 5 depending on the states and signaling of the H-bridge control signals 506 of the H-bridge controller 505.

[0108] The microcontroller 501 communicates via the data bus 516 with any additional circuit blocks 593 of the microintegrated circuit 592. Figure 5

[0109] Fig.5 illustrates the processing of the signals.

[0110] The signal level extraction 120 generates the filtered, digital rotor current signal 197 from the stored rotor current signal value 117, which corresponds to the digitized rotor current signal 113, typically using preferably computer-implemented methods. This typically has no or only a few ripples. The adder 123 subtracts the filtered, digital rotor current signal 197 from the digitized rotor current signal 113 or the generated sample value 135 of the digital rotor current signal 113 that typically corresponds to it, and thus generates the ripple signal 196 from internal samples in the form of high-pass current signal values ​​196. The reduction device 150 and the mean filter 155 generate the values ​​that are available in the mean high-pass current signal value FIFO 160 as the first feature subvector of the feature vector 167.The FIFO memory 165 temporarily stores the temporal value sequence of the bit-width-reduced current signal value 195, which the reduction device 150 generates from the ripple signal 196, and makes the values ​​stored in the FIFO memory 165 available as a second feature sub-vector of the feature vector 167. The pattern recognition device 170 can, for example, use preferably computer-implemented methods to compare the feature vector 167 with prototypical feature vectors of a database 610 and, depending on the result of the comparison, adjust the logical status of the ripple detection signal 175.Instead of such a database comparison, the pattern recognition device 170 can have a suitable filter for each prototypical feature vector, for example based on preferably computer-implemented filtering methods, which, if there is sufficient similarity between the feature vector 167 and the prototypical feature vector of this filter, adjusts the logical status of the ripple detection signal 175 accordingly. Particularly preferred is the use of a preferably computer-implemented neural network model in the pattern recognition device 170, wherein the preferably computer-implemented neural network model has preferably been trained with said prototypical feature vectors.The preferably computer-implemented neural network model executing the pattern recognition device 170 adjusts the logical status of the ripple detection signal 175 accordingly if the similarity between the feature vector 167 and one of the prototypical feature vectors used to train the preferably computer-implemented neural network model is sufficiently high. Miscellaneous

[0111] The above description is not exhaustive and does not limit this disclosure to the examples shown. Other variations to the disclosed examples can be understood and practiced by those of ordinary skill in the art, based on the drawings, the disclosure, and the claims. The indefinite articles "a" or "an" and their inflections do not exclude a plurality, while the mention of a certain number of elements does not exclude the possibility of more or fewer elements being present. A single unit may perform the functions of several elements mentioned in the disclosure, and conversely, several elements may perform the function of one unit. Numerous alternatives, equivalents, variations, and combinations are possible without departing from the scope of the present disclosure.

[0112] Unless otherwise stated, all features of the present invention can be freely combined with one another. This applies to the entire document presented here. The features described in the description of the figures can also be freely combined with the other features as features of the invention, unless otherwise stated. A restriction of individual features of the exemplary embodiments to combination with other features of the exemplary embodiments is expressly not intended. Furthermore, physical features of the device can be reformulated to also be used as method features, and method features can be reformulated to be used as physical features of the device. Such a reformulation is therefore automatically disclosed.

[0113] In the foregoing detailed description, reference is made to the accompanying drawings. The examples in the description and drawings should be considered illustrative and not limiting of the specific example or element described. Multiple examples may be derived from the foregoing description and / or drawings and / or the claims by modifying, combining, or varying certain elements. Furthermore, examples or elements not described verbatim may be derived from the description and / or drawings by a person skilled in the art. List of reference symbols 5 H-bridge; 7 Voltage signal 7 of the H-bridge 5. 10 Current sampling and digitization in a first stage 10; 20 second stage; 30 third stage; 103 brushed DC motor. 105 Means 105 for detecting the rotor current of the brushed DC motor 103. This is typically means 105 for detecting the current through the excitation coils of the brushed DC motor 103; 107 analog rotor current signal 107; 110 ADC. The term ADC 110 here refers to an analog-to-digital converter 110; 113 digitized rotor current signal 113; 115 Storage 115 of the digitized rotor current signal 113 e.g. in a current register 515; 117 stored rotor current signal value 117; 120 Signal Level Extraction 120; 123 adder 123; 125 Initialization parameters 125; 130 Stop parameters 130; 135 generated samples 135 of the digital rotor current signal 113. Typically, these generated samples of the digital rotor current signal 113 correspond to the samples of the digital rotor current signal 113; 140 Offset value 140; 150 Reduction device 150; 155 Mean value filter 155. The mean value filter 155 determines for the bit-width-reduced high-pass current signal value 195 thus determined the mean value from this determined width-reduced high-pass current signal value 195 and the immediately preceding previously determined bit-width-reduced high-treason current signal value 195 and / or another preceding previously determined bit-width-reduced high-treason current signal value 195 the associated mean high-pass current signal value 198; 160 average high-pass current signal value FIFO 160; 165 Current signal value FIFO 165. This document also refers to the signal value FIFO 165 as FIFO memory 165; 167 feature vector 167; 170 Pattern recognition device 170; 175 Ripple detection signal 175; 180 counters 180; 185 Rotor position signal 185; 195 bit-width reduced current signal value 195; 196 Ripple signal 196 from internal samples in the form of high-pass current signal values ​​196; 197 current signal level 197, which the document presented here refers to as low-pass filtered samples of a filtered digital rotor current signal 197; 198 mean high-pass current signal value 198; 501 Microcontroller 501; 505 an H-bridge controller 505; 506 H-bridge control signal 506; 507 H-bridge status lines 507; 508 Data interface 508 of the microelectronic circuit 592; 540 Offset parameter storage area of ​​memory 509 of microintegrated circuit 592; 510 ADC. The ADC 510 here refers to an analog-to-digital converter 510, which typically performs the analog-to-digital conversion 110; 511 analog signal processing 511; 512 conditioned analog rotor current signal 512 after conditioning of the analog rotor current signal 107 by the analog signal conditioning 511; 513 digital rotor current signal storage area 513 in memory 509 of microintegrated circuit 592; 514 first monitoring signals 514 of the H-bridge 5; 515 Current register 515. The current register 515 preferably comprises a current register memory area in the memory 509 of the microintegrated circuit 592; 516 internal data bus 516 of the microintegrated circuit 592, via which the microcontroller 501 accesses the contents of the memory 592 and / or other sub-devices (e.g. 508, 505, 510, 511, 593) of the microelectronic circuit 592; 517 Rotor current signal value storage area 517 in memory 509 of microintegrated circuit 592; 520 Memory area 520 for the emulation of a signal level extraction device for signal level extraction 120; 525 Initialization parameter storage area 525 of the memory 509 of the microintegrated circuit 592; 530 Stop parameter memory area 530 for the stop parameter 130; 535 Sample storage area 535 of the generated samples 135 of the digital rotor current signal 113. The sample storage area 535 is typically equal to the digital rotor current signal storage area 513 in the memory 509 of the microintegrated circuit 592; 540 Offset value storage area 540 of the memory 509 of the microintegrated circuit 592 for the offset value 140; 550 Reduction program memory area 550 in memory 509 of microintegrated circuit 592; 555 Mean value filter program memory area 555 in memory 509 of microintegrated circuit 592; 560 High-pass current signal value FIFO memory area 560 in memory 509 of microintegrated circuit 592 for the average high-pass current signal value FIFOs 160; 565 FIFO memory area 565 of the FIFO memory 165 in the memory 509 of the microintegrated circuit 592; 567 Feature sub-vector memory area 567 in memory 509 of microintegrated circuit 592 for feature vector 167; 570 Pattern recognition program storage area 570 in memory 509 of micro-integrated circuit 592 for the pattern recognition program in memory 509 of micro-electronic circuit 592; 575 Ripple detection signal storage area 575 in memory 509 of microintegrated circuit 592 for the value of ripple detection signal 175; 580 Counter memory area 580 in memory 509 of microintegrated circuit 592; 585 Rotor position signal storage area 585 in memory 509 of microintegrated circuit 592; 591 external data bus 591; 592 microintegrated circuit 592; 593 further circuit blocks 593 of the microintegrated circuit 592; 595 High-pass current signal value storage area 595 in memory 509 of microintegrated circuit 592; 596 Ripple memory area 596 in memory 509 of microintegrated circuit 592 for ripple signal 196; 597 Memory area 597 in memory 509 of microintegrated circuit 592 for the filtered sample values ​​of the filtered digital rotor current signal 197; 598 Memory area 598 in memory 509 of microintegrated circuit 592 for the average high-pass current signal value 198; 610 Database 610 with prototypical feature vectors. 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[0116] https: / / de.wikipedia.org / wiki / Gleichstrommaschine https: / / de.wikipedia.org / wiki / Kommutator_%28Elektrotechnik%29 https: / / mathworld.wolfram.com / L2-InnerProduct.html) https: / / de.wikipedia.org / wiki / Korrelation_(Signalverarbeitung) Liu Yunpeng, Lu Fangcheng, Chen Zhiye and Li Yanqing, „Data compression and pattern recognition for partial discharge ultrasonic signal based on fractal theory,“ Proceedings. International Conference on Power System Technology, Kunming, China, 2002, pp. 958-961 vol.2, doi: 10.1109 / lCPST.2002.1047541. N. Mansor, R. Flynn and M. Daly, „Multi-Resolution Pre-Processing for Pattern Recognition in Images and Audio Signals,“ 2021 32nd Irish Signals and Systems Conference (ISSC), Athlone, Ireland, 2021, pp. 1-6, doi: 10.1109 / ISSC52156.2021.9467861. J. A. O'Sullivan and Po-Hsiang Lai, „Pattern recognition system design based on LDPC matrices,“ Proceedings. International Symposium on Information Theory, 2005. ISIT 2005., Adelaide, SA, 2005, pp. 33-36, doi: 10.1109 / ISIT.2005.1523287. Z. Bojkovic, D. Milovanovic and N. Mastorakis, „Neural networks applications for multimedia processing,“ Proceedings of the 5th Seminar on Neural Network Applications in Electrical Engineering. NEUREL 2000 (IEEE Cat. No.00EX287), Belgrade, Yugoslavia, 2000, pp. 87-91, doi: 10.1109 / NEUREL.2000.902390. E. Mese and D. A. Torrey, „An approach for sensorless position estimation for switched reluctance motors using artifical neural networks,“ in IEEE Transactions on Power Electronics, vol. 17, no. 1, pp. 66-75, Jan. 2002, doi: 10.1109 / 63.988671. M. Sharma, „A Review on DC Motor Speed Control using Artificial Neural Network“ International Journal of Engineering & Scientific Research, Vol. 7 Issue 8, Aug2018, ISSN: 2347-6532 ZITATE ENTHALTEN IN DER BESCHREIBUNG

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] DE 42 17 265 C2 [0003, 0114] DE 195 11 307 C1 [0003, 0115] Cited non-patent literature

[0000] Liu Yunpeng, Lu Fangcheng, Chen Zhiye and Li Yanqing, “Data compression and pattern recognition for partial discharge ultrasonic signals based on fractal theory,” Proceedings. International Conference on Power System Technology, Kunming, China, 2002, pp. 958-961 vol.2, doi: 10.1109 / ICPST.2002.1047541

[0077] N. Mansor, R. Flynn and M. Daly, „Multi-Resolution Pre-Processing for Pattern Recognition in Images and Audio Signals,“ 2021 32nd Irish Signals and Systems Conference (ISSC), Athlone, Ireland, 2021, pp. 1-6, doi: 10.1109 / ISSC52156.2021.9467861 [0077, 0116] J. A. O'Sullivan and Po-Hsiang Lai, „Pattern recognition system design based on LDPC matrices,“ Proceedings. International Symposium on Information Theory, 2005. ISIT 2005., Adelaide, SA, 2005, pp. 33-36, doi: 10.1109 / ISIT.2005.1523287 [0077, 0116] Z. Bojkovic, D. Milovanovic and N. Mastorakis, „Neural networks applications for multimedia processing,“ Proceedings of the 5th Seminar on Neural Network Applications in Electrical Engineering. NEUREL 2000 (IEEE Cat. No.00EX287), Belgrade, Yugoslavia, 2000, pp. 87-91, doi: 10.1109 / NEUREL.2000.902390 [0077, 0116] E. Mese and D. A. Torrey, „An approach for sensorless position estimation for switched reluctance motors using artifical neural networks,“ in IEEE Transactions on Power Electronics, vol. 17, no. 1, pp. 66-75, Jan. 2002, doi: 10.1109 / 63.988671 [0077, 0116] M. Sharma, „A Review on DC Motor Speed Control using Artificial Neural Network“ International Journal of Engineering & Scientific Research, Vol. 7 Issue 8, Aug2018, ISSN: 2347-6532 [0077, 0116] https: / / de.wikipedia.org / wiki / Gleichstrommaschine

[0116] https: / / de.wikipedia.org / wiki / Kommutator_%28Elektrotechnik%29

[0116] https: / / mathworld.wolfram.com / L2-InnerProduct.html

[0116] https: / / de.wikipedia.org / wiki / Korrelation_(Signalverarbeitung

[0116] Liu Yunpeng, Lu Fangcheng, Chen Zhiye and Li Yanqing, „Data compression and pattern recognition for partial discharge ultrasonic signal based on fractal theory,“ Proceedings. International Conference on Power System Technology, Kunming, China, 2002, pp. 958-961 vol.2, doi: 10.1109 / lCPST.2002.1047541

[0116]

Claims

[1] Device for detecting a ripple of a rotor current of a brushed DC motor (103), wherein the device comprises means (105) for detecting the electric rotor current of the brushed DC motor (103) and wherein the device comprises an analog-to-digital converter (510) and wherein the device comprises a signal level extraction device (520) and wherein the device comprises an adder (123) and wherein the device comprises a microcontroller (501) and / or a pattern recognition device (170) and wherein the brushed DC motor (103) has a rotor of the brushed DC motor (103) which can be energized via at least two terminals of the brushed DC motor (103), wherein the means (105) for detecting the electric rotor current of the brushed DC motor (103) are configured to detect the rotor current of the brushed DC motor (103) and to generate an analog rotor current signal (107), and wherein the value profile of the analog rotor current signal (107) depends on the time profile of the rotor current and wherein the analog-to-digital converter (510) is configured to sample the rotor current signal (107), and wherein the analog-to-digital converter (510) is configured to generate sample values, in particular in the form of a digitized rotor current signal (113), and wherein the signal level extraction device (120) is configured to low-pass filter the generated sample values, in particular of the digitized rotor current signal (113) to low-pass filtered sample values, in particular in the form of a filtered digital rotor current signal (197), and wherein a generated sample value (135), in particular of the digitized rotor current signal (113), corresponds to a respective low-pass filtered sample value, in particular of the filtered digital rotor current signal (197); wherein the adder (123) is configured to subtract the low-pass filtered sample value, in particular of the filtered digital rotor current signal (197), from the sum of an optional offset value (140) and the corresponding generated sample value (135), in particular of the digital rotor current signal (113), thereby generating an internal sample value, in particular a ripple signal (196), and wherein the device and / or the microcontroller (501) is configured to store this internal sample value, in particular of the ripple signal (196), in a memory (509), in particular in a FIFO memory (165), with memory cells as a stored sample value, and wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to apply a pattern recognition method to the sample values ​​stored in the memory, in particular in the FIFO memory (165), and to decide whether or not a ripple is present in the memory, in particular in the FIFO memory (165). [2] Device according to claim 1, wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to set a ripple flag when a ripple is present in the memory, in particular in the FIFO memory (165), and / or wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to delete a ripple flag if a ripple is not present in the memory, in particular in the FIFO memory (165). [3] The apparatus of claim 1 or 2, wherein the memory is a FIFO memory (165). [4] Device according to one of claims 1 to 3, wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to execute a pattern recognition method comprising the application and / or execution of a neural network model, and wherein the input signals of the neural network model comprise signals with values ​​of memory cells of the memory, in particular of the FIFO memory (165), and wherein the output signals of the neural network model comprise control signals for setting and / or clearing the ripple flag and / or the signal of the ripple flag. [5] Device for detecting a ripple of the rotor current of a brushed DC motor (103), in particular according to one of claims 1 to 4, wherein the device comprises means (105) for detecting the electric rotor current of the brushed DC motor (103) and wherein the device comprises an analog-to-digital converter (510) and wherein the means (105) for detecting the electric rotor current of the brushed DC motor (103) are arranged to detect the rotor current of the brushed DC motor (103) and to generate an analog rotor current signal (107), and wherein the value profile of the analog rotor current signal (107) depends on the profile of the rotor current and wherein the analog-to-digital converter (510) is configured to sample the rotor current signal (107), and wherein the analog-to-digital converter (510) is configured to generate sample values, in particular in the form of a digitized rotor current signal (113), and wherein the signal level extraction device (120) is configured to low-pass filter the generated sample values, in particular of the digitized rotor current signal (113) to low-pass filtered sample values, in particular in the form of a filtered digital rotor current signal (197), and wherein a generated sample value (135), in particular of the digitized rotor current signal (113), corresponds to a respective low-pass filtered sample value, in particular of a filtered digital rotor current signal (197); wherein the adder (123) is configured to subtract the low-pass filtered sample value, in particular of the filtered digital rotor current signal (197), from the sum of an optional offset value (140) and the corresponding generated sample value (135), in particular of the digital rotor current signal (113), thereby generating an internal sample value, in particular a ripple signal (196), and wherein the device is designed to store this internal sample value, in particular of the ripple signal (196), in a memory (509), in particular in a FIFO memory (165), with memory cells as a stored sample value, and wherein the device is configured, in particular by means of the microcontroller (501) and / or by means of a pattern recognition device (170), to subtract at least a first pair of two stored sample values ​​of two different memory cells of the memory (192), namely a first stored sample value of a first memory cell and a second stored sample value of a second memory cell, from one another to form a first difference signal value, and wherein the device is configured, in particular by means of the microcontroller (501) by means of the pattern recognition device (170), to subtract at least a second pair of two stored sample values ​​of two further different memory cells of the memory, namely a third stored sample value of a third memory cell and a fourth stored sample value of a fourth memory cell, from each other, forming a second difference signal value, and wherein the second and third memory cells may be the same; wherein the device is configured, in particular by means of the microcontroller (501) and / or by means of the pattern recognition device (170), to sum the first difference signal value and the second difference signal value to a sum value, and wherein the device is configured, in particular by means of the microcontroller (501) and / or by means of the pattern recognition device (170), to determine whether a ripple is present as a function of the sum value, in particular by comparing the sum value with a threshold value. [6] Device according to claim 5, wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to compare the amount of the sum value with a first threshold value and to generate a comparison result, and wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to set a ripple flag if the amount of the sum value corresponding to the comparison result is above the first threshold value, and / or wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to delete a ripple flag if the amount of the sum value corresponding to the comparison result is below the first threshold value. [7] Device according to claim 6, wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to store the sum value in a further memory, in particular a high-pass current signal value FIFO (160), with memory cells as a stored sum value, and wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) and / or the pattern recognition device (170) are configured to apply a further pattern recognition method to the sum values ​​stored in the further memory and, in particular depending on the sum value and / or depending on the comparison result of a comparison of the sum value with a threshold value, to decide whether or not a ripple is present in the further memory. [8] Device according to claim 7, wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to set a further ripple flag if a ripple is present in the further memory and / or wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to clear a further ripple flag if no ripple is present in the further memory. [9] Apparatus according to claim 7 or 8, wherein the further memory is a further FIFO memory (160). [10] Device according to one of claims 7 to 9, wherein the further pattern recognition method comprises the application of a further neural network model, in particular by the device and / or by the microcontroller (501) and / or by the pattern recognition device (170), and wherein the input signals of the further neural network model comprise signals with values ​​of memory cells of the further memory and wherein the output signals of the further neural network model comprise control signals for setting and / or clearing the further ripple flag and / or the signal of the further ripple flag. [11] Device for determining the rotor position of a rotor of a brushed DC motor (103) in the form of a rotor position value, wherein the device comprises a device for detecting a ripple of a rotor current of the brushed DC motor (103) according to one of claims 1 to 10 and wherein the device comprises a counter (180) and / or the microcontroller (501) and wherein the device comprises a counter (180) or a microcontroller (501) which is configured to count the detected ripples of the rotor current of the brushed DC motor (103) by determining a counter reading with a counting direction and wherein the device and / or the microcontroller (501) are configured to use and / or output the counter reading as a rotor position value or a value derived therefrom.

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