Semiconductor module and semiconductor device

DE102023131032B4Active Publication Date: 2026-07-23MITSUBISHI ELECTRIC CORP
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
MITSUBISHI ELECTRIC CORP
Filing Date
2023-11-09
Publication Date
2026-07-23

AI Technical Summary

Technical Problem

Existing semiconductor devices face difficulties in easily identifying product information due to structural limitations that make it challenging to check prints on mounting plates.

Method used

The semiconductor module incorporates identification terminals that protrude from the housing, allowing product information to be identified based on electrical characteristics, appearance, or shape, without requiring print checks on the substrate.

Benefits of technology

Enables easy and reliable identification of product information without needing to remove the module from the heat radiation fin or substrate, preventing short circuits and enhancing insulation properties.

✦ Generated by Eureka AI based on patent content.

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Abstract

Semiconductor module (10, 210, 310, 410) comprising: • a housing (20); • a main terminal (16) protruding from the housing (20); • a control terminal (18) protruding from the housing (20); and • at least one identification terminal (30) protruding from the housing (20), wherein • information relating to a product is identifiable by reference to an electrical property, an appearance, or a shape of the at least one identification terminal (30), and. the at least one identification terminal (30) protrudes from a side surface (11, 12, 13, 14) of the housing (20), which differs from a side surface (11, 12, 13, 14) from which the main terminal (16) protrudes and from a side surface (11, 12, 13, 14) from which the control terminal (18) protrudes.
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Description

Background area

[0001] The present disclosure relates to a semiconductor module and a semiconductor device. background

[0002] JP 2021-007119 A discloses a semiconductor device comprising a semiconductor module, a mounting plate, and a heat radiation fin, and which is capable of product identification. The semiconductor module includes a module main body having first and second main surfaces opposite each other, and a terminal protruding from a side surface of the module main body and bent toward the first main surface side. The mounting plate is placed on the first main surface side and connected to the terminal. The heat radiation fin is placed on the second main surface side. A screw mounts a mounting portion of the module main body to the heat radiation fin from the first main surface side. The mounting plate is provided with an opening in a part facing the mounting portion.A type of product is printed on the first main surface and is exposed from the opening of the mounting plate.

[0003] In JP 2021-007119 A, the product is identified by checking the print through the opening of the mounting plate. At this time, checking the print may be difficult depending on the structure of the mounting plate. Summary

[0004] The present disclosure has been made to solve the above problem, and it is an object of the present disclosure to provide a semiconductor module and a semiconductor device with which information regarding a product can be easily checked.

[0005] The features and advantages of the present disclosure can be summarized as follows.

[0006] According to one aspect of the present disclosure, a semiconductor module comprises a housing, a main terminal protruding from the housing, a control terminal protruding from the housing, and at least one identification terminal protruding from the housing, wherein information relating to a product is identifiable based on an electrical property, an appearance, or a shape of the at least one identification terminal.

[0007] Other and further objects, features and advantages of the disclosure will become more apparent from the following description. Short description of the characters Fig. 1 is a plan view of a semiconductor module according to a first embodiment. Fig. 2 is an enlarged view of the semiconductor module according to the first embodiment. Fig. 3 is a cross-sectional view of a semiconductor device according to the first embodiment. Fig. 4 is a view illustrating a short line according to the first embodiment. Fig. 5A to 5E are views illustrating the connection states of the identification terminals according to the first embodiment. Fig. 6A is a front view of the semiconductor device according to the first embodiment. Fig. 6B is a side view of the semiconductor device according to the first embodiment. Fig. 6C is a plan view of the semiconductor device according to the first embodiment. Fig. 7A and Fig. 7D are views illustrating the connection states of the identification terminals according to a second embodiment. Fig. 8A to 8D are views illustrating the connection states of the identification terminals according to a third embodiment. Fig. 9 is a plan view of a semiconductor device according to a modified example of the third embodiment. Fig. 10 is an enlarged view of a semiconductor module according to a fourth embodiment. Description of the embodiments

[0008] A semiconductor module and a semiconductor device according to each embodiment will be described with reference to the accompanying figures. Identical or corresponding components are denoted by identical reference numerals, and repeated descriptions thereof are omitted in some cases. First embodiment

[0009] Fig. 1 is a plan view of a semiconductor module 10 according to a first embodiment. The semiconductor module 10 includes a housing 20, and main terminals 16 and control terminals 18, each protruding from the housing 20. The housing 20 is formed, for example, from an insulating sealing resin. The main terminals 16 are terminals through which a main current flows from a semiconductor chip 22 described below, which is housed in the housing 20. The control terminals 18 are terminals for controlling the on / off of the semiconductor chip 22. The main terminals 16 and the control terminals 18 each protrude from a pair of opposite side surfaces 11 and 12 of the housing 20.

[0010] The semiconductor module 10 has a plurality of identification terminals 30 which protrude from the housing 20. Fig. 2 is an enlarged view of the semiconductor module 10 according to the first embodiment. The semiconductor module 10 includes, for example, three identification terminals 31, 32, and 33 as the identification terminals 30. The identification terminals 31, 32, and 33 protrude from a side surface of the case 20, which is different from the side surface 11 from which the main terminals 16 protrude and from the side surface 12 from which the control terminals 18 protrude. Specifically, the identification terminals 31, 32, and 33 protrude from a pair of side surfaces 13 and 14 (i.e., the side surface 13) of the case 20, which connect the side surfaces 11 and 12. The side surface 13 has a recessed portion 23 formed therein. The identification terminals 31, 32, and 33 are provided in the recessed portion 23.

[0011] According to the semiconductor module 10 of the present embodiment, information regarding a product of the semiconductor module 10 can be identified based on the electrical characteristics of the identification terminals 31, 32, and 33 as described below. Examples of the information regarding the product include a nominal value of the product.

[0012] Fig. 3 is a cross-sectional view of a semiconductor device 100 according to the first embodiment. The semiconductor device 100 includes the semiconductor module 10 and a substrate 50 provided to cover the housing 20 and connect to the main terminals 16 or the control terminals 18. The semiconductor device 100 may further include a heat-radiating fin 52 below the semiconductor module 10. The semiconductor chip 22 is housed in the housing 20. The semiconductor chip 22 is electrically connected to the main terminals 16 and the control terminals 18 via wires 26, for example.

[0013] The substrate 50 is, for example, a control substrate for controlling the semiconductor module 10. The substrate 50 is connected, for example, to the main terminals 16 and the control terminals 18 by means of a solder. The main terminals 16 and the control terminals 18 are bent upwards so that they are connected to the substrate 50. It should be noted that Fig. 1 only illustrates the basic parts of the main terminals 16 and the control terminals 18.

[0014] Fig. 4 is a view illustrating a short lead 40 according to the first embodiment. The semiconductor module 10 includes the short lead 40 protruding from the case 20. The short lead 40 protrudes, for example, from the side surface 14 of the case 20. The side surface 14 has a recessed portion 24 formed therein. The short lead 40 is provided in the recessed portion 24. The short lead 40 is electrically connected to the control terminals 18 via the semiconductor chip 22 in the case 20. The short lead 40 is a dummy terminal, which is a redundant terminal not disposed on the side surface 12 and not intended for use. Such a configuration in which terminals protrude from four side surfaces of the sealing resin is rare in the field of power semiconductors.It should be noted that none of the identification terminals 31, 32, and 33 are connected to the control terminals 18 in the housing 20.

[0015] Next, a method for identifying information related to the product using the identification terminals 30 will be described. In the present embodiment, information related to the product is identified, for example, based on a resistance value between the plurality of identification terminals 30. The number of identification terminals 30 may be two or more, and preferably three or more. Here, an example in which three identification terminals 31, 32, and 33 are provided will be described.

[0016] The Fig. 5A to 5E are views illustrating the connection states of the identification terminals 31, 32, and 33 according to the first embodiment. In the state of Fig. 5A, the identification terminals 31, 32, and 33 are not connected to each other. In the state of Fig. 5B, the identification terminals 31 and 32 are electrically connected via a conductor 35 like a wire. In the state of Fig. 5C, the identification terminals 31 and 33 are electrically connected via the conductor 35. In the state of Fig. 5D, the identification terminals 32 and 33 are electrically connected via the conductor 35. In the state of Fig. 5E, the identification terminals 31, 32, and 33 are electrically connected to each other via the conductors 35.

[0017] In the present embodiment, a nominal value is identified based on a combination of a pair of identification terminals 30 which are electrically connected. That is, the five states in the Fig. 5A to 5E are assigned nominal values. An operator is able to identify a nominal value by measuring a resistance value between the identification terminals 31 and 32, a resistance value between the identification terminals 32 and 33, and a resistance value between the identification terminals 31 and 33. In this way, in the present embodiment, information regarding the product can be identified by measuring resistance values ​​between, among the three or more identification terminals 30, two or more different pairs of identification terminals 30. At this time, at least two identification terminals 30 of the three or more identification terminals 30 may be electrically connected in the housing 20, or none of the identification terminals 30 may be connected.

[0018] Fig. 6A is a front view of the semiconductor device 100 according to the first embodiment. Fig. 6B is a side view of the semiconductor device 100 according to the first embodiment. Fig. 6C is a plan view of the semiconductor device 100 according to the first embodiment. The semiconductor module 10 is fixed to the heat-radiating fin 52 by means of screws 56 from the upper surface side of the semiconductor module 10. A washer 54 is provided between each screw 56 and the upper surface of the case 20. The substrate 50 has an opening 50a formed therein in a part facing each screw 56. The upper surface of the case 20 is provided with a print of product rating information. Checking the print of the product rating information can identify a rating. However, there may be a case where, for example, the print is difficult to check depending on the size of the opening 50a of the substrate 50.

[0019] In contrast, in the present embodiment, product information can be identified based on the electrical characteristics of the plurality of identification terminals 30. Therefore, product information can be easily verified without the need to check the print from above the substrate 50 via the opening 50a. The operator can verify product information, for example, by measuring the electrical characteristics of the identification terminals 30 from the semiconductor module 10 side in a state where the heat radiation fin 52 and the substrate 50 are attached to the semiconductor module 10. Therefore, there is no need to remove the semiconductor module 10 from the heat radiation fin 52 or the substrate 50 to verify product information.Furthermore, there is no need to increase the size of the opening 50a of the substrate 50 for viewing the print.

[0020] The identification terminals 30 are not attached to the substrate 50. Therefore, the identification terminals 30 do not need to be bent like the main terminals 16 and the control terminals 18. Furthermore, the identification terminals 30 can be short because they are not connected to the substrate 50. This can prevent a short circuit between the identification terminals 30 and a peripheral device. As shown in Fig. 2, the length of a part of the respective identification terminals 30 protruding from the housing 20 is preferably less than or equal to the extent of the recess of the recess part 23. This can improve the insulation property and further prevent a short circuit.

[0021] The present embodiment has illustrated an example in which a rating is identified using the identification terminals 30. The information regarding the product that can be identified using the identification terminals 30 is not limited to a rating, and it may be any information regarding the product, such as the presence or absence of a short-circuit protection function, the presence or absence of a mounted bootstrap diode, the presence or absence of a circuit for protecting against a drop in a control power supply voltage, the presence or absence of an overheat protection function, and the presence or absence of a breaker circuit.

[0022] In the present embodiment, the information related to the product is identified based on a resistance value between the plurality of identification terminals. However, the present disclosure is not limited to this. For example, the information related to the product may be identified based on electrical properties that differ from the resistance value.

[0023] The structures of the semiconductor module 10 and the semiconductor device 100 described in the present embodiment are only examples, and the present disclosure is not limited thereto. For example, each terminal of the semiconductor module 10 may be provided on any surface of the housing 20. For example, the main terminals 16 and the control terminals 18 may protrude from a side surface.

[0024] The package 20 may include the semiconductor chip 22 formed from a wide bandgap semiconductor. Examples of the wide bandgap semiconductor include silicon carbide, a gallium nitride-based material, and diamond.

[0025] In the present embodiment, the information related to the product is identified based on electrical characteristics among the plurality of identification terminals 30. However, the present disclosure is not limited to this. For example, as described in the following embodiment, the information related to the product can be identified based on electrical characteristics, an appearance, or a shape of one or more identification terminals 30.

[0026] These modifications can be suitably applied to semiconductor modules and semiconductor devices according to the following embodiments. Meanwhile, for the semiconductor modules and semiconductor devices according to the following embodiments, differences from the first embodiment will be mainly explained because they have numerous similarities with the first embodiment. Second embodiment

[0027] The present embodiment differs from the first embodiment in the method for identifying information related to a product using the identification terminals 30. In the present embodiment, the information related to the product is identified based on whether or not the plurality of identification terminals 30 are electrically connected to the main terminal 16. For example, a semiconductor module 210 of the present embodiment includes three identification terminals 31, 32, and 33 as the plurality of identification terminals 30.

[0028] The Fig. 7A to 7D are views illustrating the connection states of the identification terminals 31, 32, and 33 according to a second embodiment. In the state of Fig. 7A, none of the identification terminals 31, 32, and 33 are electrically connected to the main terminal 16. In the state of Fig. 7B, the identification terminal 31 and the main terminal 16 are connected via the conductor 35, such as a wire, in the housing 20. In the state of Fig. 7C, the identification terminal 32 and the main terminal 16 are electrically connected in the housing 20 via the conductor 35. In the state of Fig. 7D, the identification terminal 33 and the main terminal 16 are electrically connected via the conductor 35 in the housing 20. In this way, at least one of the plurality of identification terminals 31, 32, and 33 may be electrically connected to the main terminal 16 in the housing 20, or none of the identification terminals 31, 32, and 33 may be electrically connected thereto.

[0029] An operator is able to identify, for example, a nominal value by measuring a resistance value between the respective identification terminals 31, 32, and 33 and the main terminal 16. Although the Fig. For example, when FIGS. 7A to 7D illustrate four connection states, it is possible to identify eight ratings by assigning the ratings based on whether the identification terminals 31, 32, and 33 are electrically connected to the main terminal 16. Examples of the eight ratings include 5A, 10A, 15A, 20A, 25A, 30A, 50A, and 75A. Moreover, the number of items of product information that can be identified can be increased or decreased in accordance with the number of identification terminals 30. For example, only one identification terminal 30 may be provided so that two types of information can be identified based on whether the identification terminal 30 is electrically connected to the main terminal 16 or not. Third embodiment

[0030] The Fig. 8A to 8D are views illustrating the connection states of the identification terminals 30 according to a third embodiment. A semiconductor module 310 of the present embodiment differs from the semiconductor module 210 of the second embodiment in that one or more of the plurality of identification terminals 30 that are electrically connected to the main terminal 16 and thus have the same potential as the main terminal 16 are plated. The other configurations are similar to the configurations in the second embodiment.

[0031] Each of the identification terminals 31, 32, and 33, which are in the Fig. 8A to 8D, is not electrically connected to the main terminal 16 and is not plated. Each of the identification terminals 31a, 32a, and 33a shown in the Fig. 8B, Fig. 8C and 8D, is electrically connected to the main terminal 16 and is plated. Thus, the plurality of identification terminals 30 may include plated identification terminals 30 and unplated identification terminals 30, and all of the identification terminals 30 may be plated, or none of the identification terminals 30 may be plated.

[0032] In the present embodiment, it is also possible to verify the information related to the product by visually checking the presence or absence of the plating. At this time, it is possible to visually verify the presence or absence of the plating from the semiconductor module 310 side without removing the heat-radiating fin 52 or the substrate 50.

[0033] Fig. 9 is a plan view of a semiconductor device 300 according to a modified example of the third embodiment. A substrate 350 is provided above the semiconductor module 310. An opening 350a of the substrate 350 may be enlarged to a position directly above the identification terminals 30 as an opening for inspecting the identification terminals. This can further increase visibility. This can also enhance the insulation property between the identification terminals 30 and the substrate 350.

[0034] Note that in the present embodiment, an electrical connection between the respective identification terminals 30 and the main terminal 16 is combined with plating. However, the present disclosure is not limited to this. For example, the information related to the product may be identified based solely on whether or not the respective identification terminal 30 is plated. That is, the information related to the product may be identified based solely on the appearance of the plurality of identification terminals 30. Alternatively, the present embodiment may be combined with the first embodiment. Fourth embodiment

[0035] Fig. 10 is an enlarged view of a semiconductor module 410 according to a fourth embodiment. The present embodiment differs from the first embodiment in that information regarding a product is identified based on the shapes of the plurality of identification terminals 30. For example, the semiconductor module 410 has three identification terminals 431, 432, and 433 as the plurality of identification terminals 30. The shape of the respective identification terminals 431, 432, and 433 is selected from two shapes in accordance with nominal values. For example, each shape of the respective identification terminals 431, 432, and 433 is selected from a triangle and a quadrilateral. In the example of Fig. 10, the identification terminals 431 and 433 are triangular as seen in plan view, and the identification terminal 432 is square as seen in plan view.

[0036] In the present embodiment, product information, such as a denomination, can be identified based on a combination of the shapes of the identification terminals 431, 432, and 433. The plurality of identification terminals 431, 432, and 433 may include identification terminals with different shapes, or all of the identification terminals may have the same shape.

[0037] In the present embodiment, product information can be identified based on the appearance of the plurality of identification terminals 30. However, the present disclosure is not limited to this. For example, the present embodiment can be combined with the first embodiment or the second embodiment so that product information can be identified based on the electrical property and appearance of the plurality of identification terminals 30.

[0038] The shape of each of the plurality of identification terminals 431, 432, and 433 can be selected from three or more shapes. Accordingly, more types of information related to the product can be identified using the plurality of identification terminals 431, 432, and 433. This is acceptable as long as the number of the plurality of identification terminals 30 is one or more. Even if only one identification terminal 30 is provided, the information related to the product can be identified using the shape of the identification terminal 30.

[0039] Meanwhile, technical features explained in each embodiment can be combined appropriately for use.

[0040] Below, different aspects of the present disclosure are described collectively as appendices. (Appendix 1)

[0041] Semiconductor module comprising: a housing; a main terminal protruding from the housing; a control terminal protruding from the housing; and at least one identification terminal protruding from the housing, wherein information relating to a product is identifiable based on electrical properties, an appearance, or a shape of at least one identification terminal. (Appendix 2)

[0042] Semiconductor module according to Annex 1, where the information relating to the product is a nominal value of the product. (Appendix 3)

[0043] A semiconductor module according to Annex 1 or 2, wherein the at least one identification terminal has a plurality of identification terminals. (Appendix 4)

[0044] Semiconductor module according to Annex 3, wherein the information relating to the product is identifiable by means of a resistance value between the plurality of identification terminals. (Appendix 5)

[0045] Semiconductor module according to Annex 3, where the at least one identification terminal has three or more identification terminals, and the information relating to the product is identifiable by measuring resistance values ​​between, among the three or more identification terminals, two or more different pairs of identification terminals. (Appendix 6)

[0046] A semiconductor module according to Annex 5, wherein at least two identification terminals of the three or more identification terminals are electrically connected in the housing. (Appendix 7)

[0047] A semiconductor module according to Annex 3, wherein at least one of the plurality of identification terminals is electrically connected to the main terminal in the housing. (Appendix 8)

[0048] A semiconductor module according to Annex 3, wherein the plurality of identification terminals comprise a plated identification terminal and a non-plated identification terminal. (Appendix 9)

[0049] A semiconductor module according to Annex 3, wherein the plurality of identification terminals comprise identification terminals with different shapes. (Appendix 10)

[0050] A semiconductor module according to any one of Appendices 1 to 9, wherein the at least one identification terminal protrudes from a side surface of the housing which differs from a side surface from which the main terminal protrudes and from a side surface from which the control terminal protrudes. (Appendix 11)

[0051] Semiconductor module according to one of the appendices 1 to 10, further comprising a short lead which protrudes from the housing and is connected to the control terminal in the housing. (Appendix 12)

[0052] Semiconductor module according to one of Annexes 1 to 11, wherein a recessed part is formed in a side surface of the housing, and the at least one identification terminal is provided in the recess part. (Appendix 13)

[0053] A semiconductor module according to any one of Appendices 1 to 12, wherein the package comprises a semiconductor chip formed from a wide bandgap semiconductor. (Appendix 14)

[0054] A semiconductor module as defined in Annex 13, wherein the wide bandgap semiconductor is silicon carbide, a gallium nitride-based material, or diamond. (Appendix 15)

[0055] Semiconductor device comprising: the semiconductor module according to any of Annexes 1 to 14; and a substrate provided to cover the housing and connected to the main terminal or the control terminal.

[0056] By means of the semiconductor module according to the present disclosure, the information relating to the product can be identified based on electrical properties, the appearance, or the shape of the at least one identification terminal. Therefore, the information relating to the product can be easily verified without having to check a print.

[0057] Obviously, numerous modifications and variations of the present disclosure are possible in light of the above teachings. It is therefore to be understood that, within the scope of the appended claims, the disclosure may be practiced otherwise than as specifically described.

[0058] The entire disclosure of Japanese Patent Application No. 2023-021111, filed on February 14, 2023, comprising the specification, claims, figures and abstract, on which the priority of the present application is based, is incorporated herein by reference in its entirety. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] JP 2021007119 A [0002, 0003] JP 2023021111

[0058]

Claims

Semiconductor module (10, 210, 310, 410) comprising:• a housing (20);• a main terminal (16) protruding from the housing (20);• a control terminal (18) protruding from the housing (20); and• at least one identification terminal (30) protruding from the housing (20). wherein• information relating to a product is identifiable based on an electrical property, an appearance, or a shape of the at least one identification terminal (30). A semiconductor module (10, 210, 310, 410) according to claim 1, wherein the information regarding the product is a nominal value of the product. Semiconductor module (10, 210, 310, 410) according to claim 1 or 2, wherein the at least one identification terminal (30) has a plurality of identification terminals (30). Semiconductor module (10, 210, 310, 410) according to claim 3, wherein the information regarding the product is identifiable based on a resistance value between the plurality of identification terminals (30). Semiconductor module (10, 210, 310, 410) according to claim 3, wherein• the at least one identification terminal (30) has three or more identification terminals (30), and• the information relating to the product is identifiable by measuring resistance values between, among the three or more identification terminals (30), two or more different pairs of identification terminals (30). Semiconductor module (10, 210, 310, 410) according to claim 5, wherein at least two identification terminals (30) of the three or more identification terminals (30) are electrically connected in the housing (20). Semiconductor module (10, 210, 310, 410) according to claim 3, wherein at least one of the plurality of identification terminals (30) is electrically connected to the main terminal (16) in the housing (20). Semiconductor module (10, 210, 310, 410) according to claim 3, wherein the plurality of identification terminals (30) comprise a plated identification terminal (30) and a non-plated identification terminal (30). Semiconductor module (10, 210, 310, 410) according to claim 3, wherein the plurality of identification terminals (30) comprise identification terminals (30) with different shapes. Semiconductor module (10, 210, 310, 410) according to one of claims 1 to 9, wherein the at least one identification terminal (30) protrudes from a side surface (11, 12, 13, 14) of the housing (20) which deviates from a side surface (11, 12, 13, 14) from which the main terminal (16) protrudes and from a side surface (11, 12, 13, 14) from which the control terminal (18) protrudes. Semiconductor module (10, 210, 310, 410) according to one of claims 1 to 10, further comprising a short line (40) which protrudes from the housing (20) and is connected to the control terminal (18) in the housing (20). Semiconductor module (10, 210, 310, 410) according to one of claims 1 to 11, wherein• a recessed part (23) is formed in a side surface (11, 12, 13, 14) of the housing (20), and• the at least one identification terminal (30) is provided in the recessed part (23). Semiconductor module (10, 210, 310, 410) according to one of claims 1 to 12, wherein the housing (20) comprises a semiconductor chip (22) formed from a wide bandgap semiconductor. A semiconductor module (10, 210, 310, 410) according to claim 13, wherein the wide bandgap semiconductor is silicon carbide, a gallium nitride-based material, or diamond. A semiconductor device (100, 300) comprising:• the semiconductor module (10, 210, 310, 410) according to any one of claims 1 to 14; and• a substrate (50) provided to cover the housing (20) and to be connected to the main terminal (16) or the control terminal (18).