VOLTAGE MONITORING SYSTEM FOR A SYSTEM-ON-A-CHIP

The distributed voltage monitoring system with a master-satellite architecture and error correction addresses the inefficiencies of existing SoC voltage monitoring by ensuring accurate and efficient voltage management across multiple power domains.

DE102024210528B4Active Publication Date: 2026-07-09INFINEON TECHNOLOGIES AG
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Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
INFINEON TECHNOLOGIES AG
Filing Date
2024-10-31
Publication Date
2026-07-09

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Abstract

A mechanism for performing voltage monitoring in a system-on-a-chip. The system comprises a master voltage monitor and one or more satellite voltage monitors. The master voltage monitor determines a fault in a voltage reference generated by its first voltage reference generator. The master voltage monitor is of the same type as the satellite voltage reference generator of each of the one or more satellite voltage monitors. This determined fault is used to correct a fault in a voltage monitored by each satellite voltage monitor relative to a satellite reference voltage generated by its respective satellite voltage reference generator.
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Description

TECHNICAL AREA The present disclosure relates to system-on-a-chips and, in particular, voltage monitoring systems for a system-on-a-chip. BACKGROUND A system-on-a-chip (SoC) is an integrated circuit that performs the functions of several components of an electronic system using a single chip. These components can include a central processing unit (CPU), memory, input / output ports, and so on. SoCs are widely used in various electronic devices, including smartphones, tablets, smart home devices, and especially automotive systems. A typical SoC is made up of a variety of separate modules, each configured to provide the SoC with a specific functionality. As SoCs become more complex and integrate an increasing number of modules, managing power distribution and consumption becomes critical. Different modules within the same SoC may require different voltage levels to operate efficiently and reliably. Therefore, there is a need to perform accurate and reliable monitoring of voltage levels, particularly for calibrating and / or regulating the power supplied to each module. A typical voltage monitoring system will include an ADC connected to each voltage line carrying a voltage to be monitored. The reference voltage for the ADC is derived from a reference voltage generator, such as a bandgap reference. In complex SoCs, there can be a large number of voltages to monitor (e.g., more than 10 is common). In many applications, such as in the automotive industry, voltage monitoring is part of a safety requirement to reduce the risk of catastrophic failure and / or damage. Therefore, there is a need to provide a voltage monitoring system for a SoC that meets high accuracy requirements. US 2023 / 0102986 A1 describes a system-on-a-chip with a voltage monitoring system. A self-test generates a surge current, and voltage monitors measure the resulting voltage drop. If the voltage drop exceeds a threshold, an action can be taken, such as generating an alarm. SUMMARY This paper proposes a voltage monitoring system for a system-on-a-chip. The voltage monitoring system includes a master voltage monitor, which includes a first master reference voltage generator configured to generate a first master reference voltage, wherein the first master reference voltage generator is of a first type, and a fault detection system configured to determine a digital representation as a digital fault in response to a fault measure of the first master reference voltage. The voltage monitoring system also includes one or more satellite voltage monitors, each satellite voltage monitor comprising a respective satellite reference voltage generator configured to generate a satellite reference voltage, the satellite reference voltage generator being of the first type and separate from the first master reference voltage generator, and a satellite voltage measurement system configured to measure as measured satellite voltage a digital representation of the voltage on a satellite voltage line with respect to the satellite reference voltage. The voltage monitoring system also includes an error correction system that is communicatively linked to the error detection system of the master voltage monitor. The error correction system is configured to correct any errors in the digital representation of each measured satellite voltage using the digital error. The expert will recognize additional features and advantages upon reading the following detailed description and upon examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS The present disclosure is illustrated by way of example and without limitation in the figures of the accompanying drawings, in which the same reference numerals refer to similar or identical elements. The elements of the drawings are not necessarily to scale relative to one another. The features of the various examples shown may be combined, provided they are not mutually exclusive. Fig. 1 represents an existing system-on-a-chip. Fig. 2 represents a system-on-a-chip with a proposed voltage monitoring system. Fig. 3 represents a system-on-a-chip with another proposed voltage monitoring system. Fig. 4 shows exemplary faults in a voltage monitoring system. DETAILED DESCRIPTION The examples described herein provide a mechanism for performing voltage monitoring in a system-on-a-chip. The system comprises a master voltage monitor and one or more satellite voltage monitors. The master voltage monitor determines a fault in a voltage reference generated by a first voltage reference generator of the master voltage monitor. The master voltage monitor is of the same type as a satellite voltage reference generator of each of the one or more satellite voltage monitors. This determined fault is used to correct a fault in a voltage monitored by each satellite voltage monitor with respect to a satellite reference voltage generated by its respective satellite voltage reference generator. Fig. 1 schematically represents an existing System-on-a-Chip 100 for improved contextual understanding. The system-on-a-chip comprises a variety of different electronic modules 101, 102, 103, 104, each of which is supplied by a voltage carried by a respective voltage line 111, 112, 113, 114. The voltage on each voltage line can be controlled, for example, by a respective voltage converter 121, 122, 123, 124. Although shown as a separate component for clarity, in practice each voltage converter can form part of its respective electronic module. Each module is designed or configured to provide a specific functionality to the system-on-a-chip. For example, a first module might include a processor to provide processing functionality; a second module might include a memory unit or storage for storing data; a third module might include a timing module; and a fourth module might include a communication module for communicating with external devices. Naturally, a single electronic module can comprise one or more submodules, all powered by the same voltage line. Furthermore, different modules can provide similar functionalities (e.g., processing functionality) but be assigned for different purposes or needs. Each electronic module of the system-on-a-chip may need to operate at a specific voltage level. Failure to operate a module at a required voltage level can lead to improper function, reduced performance, or potential damage to the module. In particular, different electronic modules may require different voltage levels, so there can be a variety of different power domains within the system-on-a-chip. Accordingly, there is a desire to perform accurate and high-quality monitoring and management of voltage carried by a respective voltage line provided to each electronic module of the system-on-a-chip to ensure reliable operation of the system-on-a-chip. Historically, this requirement was met using a central power management system 150. The central power management system includes a voltage monitoring system 155 and the voltage transformers 121, 122, 123, 124. The voltage monitoring system 155 includes a reference voltage generator 156, such as a bandgap voltage reference, which generates a reference voltage. To monitor a voltage carried by a voltage line for an electronic module, the voltage line is connected to a voltage monitor 157 (e.g., an ADC) of the voltage monitoring system via a respective voltage sensing line. The voltage on the voltage sensing line is then determined with respect to the reference voltage generated by the reference voltage generator. The central power management system can then control or regulate the voltage on each voltage line in response to the determined or measured voltage of each voltage line, e.g. by appropriately controlling the voltage transformers 121, 122, 123, 124. In this way, a dedicated acquisition line is required to route from a voltage line of each electronic module (e.g., each power domain) to the central power management system. The present disclosure identifies several disadvantages of the existing approach. In particular, each voltage line must be connected to the central power management system via a separate sensing line, which takes up valuable area of ​​the system-on-chip, increases line overload, and increases the complexity of the central power management system (especially if there are a large number of voltage levels to be monitored). Furthermore, ground loops of voltages unrelated to the power management system, such as those from high-speed input / output interfaces, are difficult or sometimes impossible to accurately account for. Existing power management system examples also need to be redesigned for each new product variant based on the number of voltages, and any changes in the voltage domain (e.g., due to system-on-a-chip updates or upgrades) also necessitate changes in the power management system. The present disclosure proposes an alternative approach for performing voltage monitoring within a system-on-a-chip. In particular, the present disclosure proposes an approach in which the voltage monitoring functionality is distributed across the system-on-a-chip using a master-satellite architecture. Specifically, a master voltage monitor identifies a fault in a voltage reference generated by a first voltage reference generator, which is of the same type as a satellite voltage reference generator of each of the one or more satellite voltage monitors. This identified fault is used to correct a fault in a voltage monitored by each satellite voltage monitor. Fig. 2 shows an overview of a system-on-a-chip 200 that includes a proposed voltage monitoring system. The system-on-a-chip itself is a proposed embodiment and can be formed in a single package. The voltage monitoring system includes a master voltage monitor 210 and one or more satellite voltage monitors 220, 230, 240, 250. In the example shown, the voltage monitoring system comprises a plurality of satellite voltage monitors (namely, four satellite voltage monitors). However, those skilled in the art will recognize that the voltage monitoring system can comprise any number of satellite voltage monitors, e.g., a single satellite voltage monitor, two satellite voltage monitors, three satellite voltage monitors, four satellite voltage monitors, or more than four satellite voltage monitors. In particular, the voltage monitoring system can include one satellite voltage monitor for each power domain of the system-on-a-chip. The master voltage generator 210 includes a first master reference voltage generator 211, which generates a first master reference voltage VMR1. The first master voltage generator 211 also includes a fault detection system 212. The fault detection system 212 is configured to determine at least one digital fault. In this context, a digital fault is a digital representation in response to a fault measure of the first master reference voltage. Suitable examples of digital faults that can be determined by the fault detection system are provided later in this disclosure. Each satellite voltage monitor 220, 230, 240, 250 is configured to monitor the voltage on a respective satellite voltage line 229, 239, 249, 259 and to generate a digital representation of the measured voltage (a "measured satellite voltage"). The voltage on each respective satellite voltage line can be generated by a respective converter 228, 238, 248, 258. In particular, each satellite voltage monitor 220, 230, 240, 250 comprises a satellite reference voltage generator 221, 231, 241, 251 configured to generate a satellite reference voltage, and a satellite voltage measurement system 222, 232, 242, 252. The satellite reference voltage generator may be of the same type as the first master reference voltage generator to ensure similar fault characteristics. The satellite voltage measurement system is configured to measure the voltage on the satellite voltage line with respect to the satellite reference voltage and to generate the digital representation of this measured voltage (i.e., to generate the measured satellite voltage). In this context, "same type" refers to the fact that the satellite reference voltage generator and the first master reference voltage generator are of the same design or configuration. This means they are constructed using similar circuit topologies, components, and principles, resulting in comparable performance characteristics, particularly regarding their response to environmental factors such as temperature changes. Similarly, different types of reference voltage generators (e.g., the first and second types) have different designs or configurations, meaning they are constructed using different circuit topologies, components, and / or principles. As a simple example, the satellite voltage measurement system 222, 232, 242, 252 can include an analog-to-digital converter (ADC) that receives the voltage from the satellite voltage line as an input (e.g., via a sensing line). The ADC uses the satellite reference voltage as a reference for conversion, enabling it to measure the input voltage relative to the satellite reference voltage. The output of the ADC can be a digital value representing the measured voltage. Each satellite voltage monitor can be thermally coupled to the master voltage monitor. This thermal coupling can be achieved using a common heat sink or other thermal management system. Because the reference voltage generators of the master and satellite voltage monitors are of the same type, an error in the first master reference voltage due to thermal effects will be similar to an error in each satellite reference voltage due to thermal effects. In some examples, the master reference voltage generator is configured to generate the master reference voltage using a chopping technique; and each satellite reference voltage generator is configured to generate each satellite reference voltage using the chopping technique. This helps ensure that the temperature drift of the first master reference voltage and each satellite reference voltage is the same or equal. In other words, an error in the first master reference voltage due to thermal effects will be similar to the error in each satellite reference voltage due to thermal effects when a chopping technique is used. If there are multiple satellite voltage monitors, each satellite voltage monitor can be designed or configured to monitor a voltage for a different power domain of the system-on-a-chip. In this way, each satellite voltage line can be configured to carry a power signal for one of a variety of power domains. The voltage monitoring system also includes an error correction system 223, 233, 243, 253, which is configured to correct at least one error in the digital representation of each measured satellite voltage using the at least one digital error determined by the master voltage monitor. The error correction system can be implemented in a distributed form (as shown in Fig. 2) or in a centralized form (described later). In the distributed form, each satellite voltage monitor 220, 230, 240, 250 includes its own error correction module 223, 233, 243, 253, which is integrated into the satellite voltage monitor. Accordingly, each error correction module is associated with a specific satellite voltage monitor and a corresponding measured satellite voltage. Each error correction module receives the at least one digital error from the error detection system (of the master voltage monitor) via a communication bus 290. Each error correction module then uses the received at least one digital error to correct the corresponding measured satellite voltage of its respective satellite voltage monitor. Some exemplary approaches for correcting a measured satellite voltage are provided later in this disclosure. It is evident that the error correction system (and any error correction module) operates in the digital domain and may be implemented using one or more (micro)processors or similar devices. Thus, the error correction system may include one or more processors or processing systems to process each measured satellite voltage in order to generate a corrected measured satellite voltage. By correcting faults in a distributed manner, the system can achieve more accurate voltage monitoring across multiple power domains of the system-on-chip without requiring extensive routing of sensing lines to a central location. This can help improve overall system performance and reliability. Fig. 3 presents an overview of a system-on-a-chip variant 300 which includes a proposed voltage monitoring system in which the error correction system 370 is implemented as a central error correction system. In this centralized form, the error correction system 370 can be formed as its own separate module of the voltage monitoring system and / or system-on-a-chip (as shown in Fig. 3) or as part of the master voltage monitor. The voltage monitoring system comprises a master voltage monitor 310 and one or more satellite voltage monitors 320, 330, 340, 350, which function in a similar manner to the one previously disclosed. Thus, the master voltage monitor includes a first reference voltage generator 311 and a fault detection system 312. The error correction system 330 is connected to each satellite voltage monitor 320, 330, 340, 350 via a communication bus 390. The error correction system 370 is also communicatively connected to the error detection system 312 of the master voltage monitor, whereby the connection can be made via the communication bus 390 (if the error correction system is a separate module) or another connection (if the error correction system is integrated into the master voltage monitor). The error correction system 370 receives a respective measured satellite voltage from each satellite voltage monitor and corrects each measured satellite voltage using the at least one digital error generated by the error determination system 312. Unless otherwise indicated above, components take the same reference numerals in Fig. 3 as their corresponding elements in Fig. 2. Fig. 4 conceptually represents faults within a voltage monitoring system 400 for a better understanding of possible fault correction techniques. For the sake of clarity, the illustrated voltage monitoring system 400 comprises a master voltage monitor 410 and only a single satellite voltage monitor 420. Those skilled in the art will recognize that in practice the voltage monitoring system may comprise more than one satellite voltage monitor, which may be implemented in a similar manner. As previously explained, the master voltage monitor 410 comprises a voltage reference generator 411 of the first type and a fault detection system 412. The satellite voltage monitor 420 comprises a satellite reference voltage generator 421, configured to generate a satellite reference voltage VSR, and a satellite voltage measurement system 422. The satellite voltage measurement system 422 is configured to measure as the measured satellite voltage a digital representation of the voltage on a satellite voltage line 429 with respect to the satellite reference voltage VSR. Here, the satellite voltage monitor 420 further includes an error correction module 425. The error correction system is therefore configured in a distributed form. The error correction module is communicatively connected to the error determination system 412 of the master voltage monitor (e.g., via a communication bus), and the error correction system is configured to correct any error in the digital representation of each measured satellite voltage using the digital error. It has been recognized that a significant source of error in a measured voltage is an error in the reference voltage against which the measured voltage is defined. The present disclosure provides a number of techniques for solving this problem in order to improve the accuracy of voltage measurements in the voltage monitoring system. In particular, the present disclosure identifies a variety of types of errors in the reference voltage(s) used to generate each satellite voltage measurement and proposes techniques for at least partially mitigating these errors. One type of error in a reference voltage results from the reference voltage being generated using a less accurate, reliable, or robust reference voltage generator. To at least partially resolve this problem, the master voltage monitor can include a second reference voltage generator 413 of a second type, which is, for example, less sensitive to temperature changes than the first type (e.g., more accurate or robust than the first type). This second reference voltage generator 413 produces a second master reference voltage VMR2. The fault detection system of the master voltage monitor can then determine, as the first digital fault EGLOC, a digital representation of a fault between the first master reference voltage VMR1 and the second master reference voltage VMR2. The first type of reference voltage generator is less robust (e.g., more sensitive to thermal effects or temperature drift) and / or less accurate than the second type of reference voltage generator. The first type of reference voltage generator can be, for example, a bandgap voltage reference; and the second type of reference voltage generator can be a high-precision bandgap voltage reference. Examples of high-precision bandgap voltage references are well known in engineering, such as those described by Zhou, Ze-Kun et al., "A resistorless high-precision compensated CMOS bandgap voltage reference," IEEE Transactions on Circuits and Systems I: Regular Papers 66.1 (2018): 428-437, and / or Xing, Xinpeng, Zhihua Wang, and Dongmei Li, "A low voltage high precision CMOS bandgap reference," Norchip 2007, IEEE, 2007. In some examples, the second type of reference voltage generator has a larger footprint, i.e., occupies a larger surface area, than the first type of reference voltage generator. A larger surface area is generally required by more sophisticated (and more accurate) reference voltage generators. The first digital fault is then passed on to the fault correction system. In the distributed form of the fault correction system, the first digital fault can be communicated via the communication bus to each fault correction module assigned to a satellite voltage monitor. In the centralized form, the digital fault can be provided to the central fault correction system. The first digital error is then used by the error correction module 425 (e.g., by each error correction module) to correct the / each measured satellite voltage. Since the first master reference voltage generator and the satellite reference voltage generator(s) are of the same type, it can similarly be assumed that at least some faults in the master reference voltage generator will also occur in the satellite reference voltage generator, in particular any faults resulting from thermal effects or temperature drift. The first digital error can be defined as the quotient of the second master reference voltage VMR2 and the first master reference voltage VMR1, in particular VMR2 / VMR1. In such an example, the error correction system 425 can correct the first type of error in each measured satellite voltage by multiplying each measured satellite voltage by this quotient (VMR2 / VMR1). Other examples of defining an error and performing an appropriate correction will be obvious to the person skilled in the art. By using a more accurate reference voltage generator in the master voltage monitor and distributing the resulting error information, the system can compensate for inaccuracies in the less accurate reference voltage generators used in the satellite voltage monitors. This approach can enable the use of simpler, less expensive reference voltage generators in the satellite voltage monitors while still maintaining high overall accuracy in voltage measurements across the system-on-chip. In some examples, the first master reference voltage generator 411 and each satellite reference voltage generator 421 are configured to generate their respective reference voltages using a chopping technique. This helps ensure that temperature drift and / or temperature inaccuracies of these reference voltage generators are equal (so that the first digital error is accurately representative of errors due to temperature drift in each satellite reference voltage generator—as well as the first master reference voltage generator). A second type of error in a reference voltage results from a fixed error EGHPin of the second master reference voltage. This is true even if the second master reference voltage is generated using an accurate or reliable reference voltage generator (e.g., a high-precision bandgap reference). This fixed error represents an absolute error of the second master reference voltage with respect to an ideal voltage. To at least partially correct this second type of error, the error correction system can be configured to store a second digital error representing an error in the second master reference voltage. The error correction system can then be configured to use this stored second digital error to correct each measured satellite voltage. One approach to defining the second digital fault is to provide a predetermined master calibration voltage VC on a master calibration voltage line 415 and measure this voltage relative to the second master reference voltage. This predetermined master calibration voltage may be known to the fault detection system in advance (e.g., pre-programmed into the fault detection system or defined by a user / operator). The predetermined master calibration voltage can be provided, for example, by an external high-precision voltage source connected to the voltage monitoring system and / or the system-on-chip (e.g., during a calibration phase). This provides a highly accurate calibration voltage. The master voltage monitor 410 can determine a digital representation of the voltage VC on the master calibration voltage line 415 with respect to the second master reference voltage VMR2. The second digital error can then be defined as a response to a difference between the predetermined master calibration voltage and the digital representation of the measured voltage. This error represents the fixed error in the second master reference voltage, which may be due to one or more systematic errors in the system. The second digital error EGHP can be defined as a ratio / quotient of the predetermined master calibration voltage VC and the digital representation of the voltage on the master calibration voltage line VCML, in particular VC / VCML. In such an example, the error correction system can correct the second type of error in each measured satellite voltage by multiplying each measured satellite voltage by this quotient (VC / VCML). Other examples of defining an error and performing an appropriate correction will be obvious to the person skilled in the art. It is understood that correcting the first fault type (EGLOC) and the second fault type (EGHP) also works to correct any fixed fault in the first master reference voltage VMR1. In some examples, the master calibration voltage line can be the power line to supply power to the master voltage monitor, e.g., to supply power to at least the fault detection system. A third type of error in a reference voltage results from a fixed error EGSAT in each satellite reference voltage. To at least partially correct this third type of error, the error correction system can be configured to store a specific third digital error (EGSAT) for each satellite voltage monitor, representing a fixed error in the satellite reference voltage. The error correction system can then be configured to use this stored third digital error (EGSAT) to correct each measured satellite voltage. One approach to defining the third digital fault is to provide each satellite voltage monitor with a predetermined satellite calibration voltage (VSC) on a dedicated satellite voltage line. Each satellite voltage monitor can then measure the voltage on its respective satellite voltage line relative to its satellite reference voltage. The predetermined satellite calibration voltage(s) can be known to the fault detection system in advance (e.g., pre-programmed into the fault detection system or defined by a user / operator). The predetermined satellite calibration voltage(s) can be provided, for example, by an external high-precision voltage source connected to the voltage monitoring system and / or the system-on-chip (e.g., during a calibration phase). This provides a highly accurate calibration voltage. Every third digital error can then be defined as a response to, for each satellite voltage monitor, the difference between the predetermined satellite calibration voltage and the digital representation of the measured voltage on the satellite calibration voltage line. Every third digital error represents the fixed error in the corresponding satellite reference voltage. For each satellite voltage monitor, the corresponding third digital error can be defined as a ratio / quotient of the predetermined satellite calibration voltage VSC and the digital representation of the voltage on the satellite calibration voltage line VCSL, in particular VSC / VCSL. In such an example, the error correction system can correct the third type of error in each measured satellite voltage by multiplying each measured satellite voltage by the corresponding quotient (VSC / VCSL). Other examples of defining an error and performing an appropriate correction will be obvious to the person skilled in the art. In some examples, the satellite calibration voltage line for each satellite voltage monitor can be the power line to supply power to the satellite voltage monitor. In some scenarios, where more than one satellite voltage monitor is present, the satellite calibration voltage lines of all satellite voltage monitors can be electrically connected. This allows the same predetermined satellite calibration voltage to be shared by each satellite voltage monitor. In examples where both a master and a satellite calibration voltage are provided, the satellite calibration voltage line of each satellite voltage monitor can be electrically connected to the master calibration voltage line of the master voltage monitor, so that each predetermined satellite calibration voltage is the same as the predetermined master calibration voltage. The preceding examples provide exemplary approaches for determining three different digital errors (for each satellite voltage monitor): a first digital error EGLOC, a second digital error EGHP, and a third digital error EGSAT. The first and second digital errors are determined using the master voltage monitor and are common to all satellite voltage monitors. The third digital error is determined separately using each satellite voltage monitor, so each third digital error EGSAT is specific to a particular satellite voltage monitor. If each digital error is represented by a ratio, each corrected measured satellite voltage can be determined by multiplying the measured satellite voltage by each specific digital error (for the corresponding satellite voltage monitor). Thus, a corrected measured satellite voltage VSATC can be calculated using the following equation: where VSAT is the measured satellite voltage, EGLOC is the first digital error, EGHP is the second digital error, EGSAT is the third digital error, and EGCOM is the product of the first digital error, the second digital error, and the third digital error. Referring to Figures 2 and 3, the master voltage monitor can, in some examples, also be configured to monitor a voltage on a master voltage line, thus effectively performing the functions of a satellite voltage monitor in addition to its task of generating at least one digital fault. This dual functionality can be achieved by integrating suitable additional components and circuitry into the master voltage monitor. For example, the master voltage monitor may include a master voltage measurement system similar to satellite voltage measurement systems. This master voltage measurement system may be configured to measure, as the master voltage measurement, a digital representation of the voltage on a master voltage line relative to the first master reference voltage or the second master reference voltage (if present). The error correction system, whether in its distributed or centralized form, can be configured to receive and correct the measured voltage from the master voltage line using similar principles and techniques applied to the measured satellite voltages. This may involve using the digital errors determined by the error detection system to correct any inaccuracies in the master voltage line measurement. An error in the master voltage measurement can be corrected differently depending on which master reference voltage is used for the measurement. For example, if the master voltage is measured with respect to the first master reference voltage (VMR1), both the fixed error (EGHP) and the local error (EGLOC) must be corrected. However, if the master voltage is measured with respect to the second master reference voltage (VMR2), only the fixed error (EGHP) needs to be corrected. By integrating this additional voltage monitoring capability, the master voltage monitor can provide voltage measurements for its own power domain, enabling more efficient use of the master voltage monitor's high-precision components and fault detection capabilities, potentially reducing the overall complexity and component count of the voltage monitoring system. In addition to the examples described above, the following examples are revealed. Example 1. Voltage monitoring system for a system-on-a-chip, wherein the voltage monitoring system comprises: a master voltage monitor comprising: a first master reference voltage generator configured to generate a first master reference voltage, wherein the first master reference voltage generator is of a first type; and a fault detection system configured to determine as a digital fault a digital representation in response to a fault measure of the first master reference voltage; one or more satellite voltage monitors, wherein each satellite voltage monitor comprises: a respective satellite reference voltage generator configured to generate a satellite reference voltage, wherein the satellite reference voltage generator is of a first type and is separate from the first master reference voltage generator;and a satellite voltage measurement system configured to measure as measured satellite voltage a digital representation of the voltage on a satellite voltage line with respect to the satellite reference voltage, and an error correction system communicatively connected to the error determination system of the master voltage monitor, wherein the error correction system is configured to correct any error in the digital representation of each measured satellite voltage using the digital error. Example 2. Voltage monitoring system according to Example 1, wherein each satellite voltage monitor is communicatively connected to the master voltage monitor via a communication bus, and the error correction system for each satellite voltage monitor comprises a respective error correction module integrated into the satellite voltage monitor, wherein the error correction module is: communicatively connected to the error detection system of the master voltage monitor; and configured to receive the digital error from the error detection system via the communication bus and to correct an error in the digital representation of each measured satellite voltage using the digital error. Example 3. Voltage monitoring system according to Example 1 or 2, wherein the fault detection system of the master voltage monitor comprises: a second master reference voltage generator configured to generate a second master reference voltage, wherein the second master reference voltage generator is of a second type that is less sensitive to temperature changes than the first type; and a digitization system configured to determine as a digital fault a digital representation of a difference between the first master reference voltage and the second master reference voltage. Example 4. Voltage monitoring system according to Example 3, wherein the fault detection system comprises a master voltage measurement system configured to: measure, as the first measured master voltage, a digital representation of a voltage on a first voltage line with respect to the first master reference voltage; and measure, as the second measured master voltage, a digital representation of the voltage on the first voltage line with respect to the second master reference voltage; and wherein the digitization system is configured to determine, as a digital fault, a digital representation in response to a difference between the first measured master voltage and the second measured master voltage. Example 5. Voltage monitoring system according to Example 4, wherein the digitization system is configured to determine as a digital fault a digital representation of the ratio between the first measured master voltage and the second measured master voltage. Example 6. Voltage monitoring system according to one of Examples 3 to 5, wherein: the first type of reference voltage generator is a bandgap voltage reference; and the second type of reference voltage generator is a high-precision bandgap voltage reference. Example 7. Voltage monitoring system according to Example 6, wherein: the master reference voltage generator is configured to generate the master reference voltage using a chopping technique; and each satellite reference voltage generator is configured to generate each satellite reference voltage using the chopping technique. Example 8. Voltage monitoring system according to any of Examples 3 to 7, wherein the error correction system is configured to store a second digital error representing an error in the second master reference voltage, and wherein for each satellite voltage monitor the error correction system is further configured to use the stored second digital error to correct the measured satellite voltage. Example 9. Voltage monitoring system according to Example 8, when dependent on Example 2, wherein each satellite voltage monitor is configured to store the second digital error, and each error correction module is configured to use the second digital error stored by the respective satellite voltage monitor to correct the measured satellite voltage. Example 10. Voltage monitoring system according to Example 9, wherein the master voltage monitor is configured, when a predetermined master calibration voltage is provided on a master calibration voltage line, to: determine a digital representation of the voltage on the master calibration voltage line with respect to the first master reference voltage; and define the second fault in response to a difference between the predetermined master calibration voltage and the digital representation of the determined voltage on the master calibration voltage line. Example 11. Voltage monitoring system according to any of Examples 1 to 10, wherein the error correction system for each satellite voltage monitor is configured to: store a third digital error representing a temperature-independent error of the satellite reference voltage; and furthermore, use the stored third digital error to correct the measured satellite voltage. Example 12. Voltage monitoring system according to Example 11, wherein for each satellite voltage monitor, when a predetermined satellite calibration voltage is provided on a satellite calibration voltage line to the satellite voltage monitor, the satellite voltage monitor is configured to: determine a digital representation of a voltage on the satellite calibration voltage line with respect to the satellite reference voltage; and define the third digital fault in response to a difference between the predetermined satellite calibration voltage and the digital representation of the voltage on the satellite calibration voltage line. Example 13. Voltage monitoring system according to Example 12, wherein, if more than one satellite voltage monitor is present, the satellite calibration voltage lines of all satellite voltage monitors are electrically connected to each other so that the same predetermined satellite calibration voltage is shared by each satellite voltage monitor. Example 14. Voltage monitoring system according to one of example claims 12 or 13, when dependent on Example 10, wherein the satellite calibration voltage line of each satellite voltage monitor is electrically connected to the master calibration voltage line of the master voltage monitor, such that the predetermined satellite calibration voltage is the same as the predetermined master calibration voltage. Example 15. Voltage monitoring system according to any of Examples 1 to 14, wherein the one or more satellite voltage monitors comprise two or more satellite voltage monitors. Example 16. System-on-a-Chip comprising a single package containing the voltage monitoring system according to any one of Examples 1 to 15. Example 17. System-on-a-Chip according to Example 16, comprising a plurality of power domains, wherein each satellite voltage line is configured to carry a power signal for another of the plurality of power domains. Although specific examples have been illustrated and described here, the person skilled in the art will recognize that a multitude of alternative and / or equivalent implementations can replace the specific examples shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific examples discussed herein. Therefore, it is intended that this invention is limited only by the claims and their equivalents. It should be noted that the systems, including their preferred embodiments, as set forth in this document, can be used alone or in combination with the other systems disclosed herein. Furthermore, all aspects of the systems set forth in this document can be combined in any way. In particular, the features of the claims can be combined with one another in any manner. It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. A person skilled in the art will be able to implement various arrangements which, although not explicitly described or shown here, embody the principles of the invention and are contained within its spirit and scope. Furthermore, all examples and embodiments presented in this document are expressly intended primarily for illustrative purposes only, to assist the reader in understanding the principles of the proposed methods and systems. Moreover, all statements made herein that provide the principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to include their equivalents.

Claims

Voltage monitoring system for a system-on-a-chip, wherein the voltage monitoring system comprises: a master voltage monitor comprising: a first master reference voltage generator configured to generate a first master reference voltage, wherein the first master reference voltage generator is of a first type; and a fault detection system configured to determine as a digital fault a digital representation in response to a fault measure of the first master reference voltage; one or more satellite voltage monitors, wherein each satellite voltage monitor comprises: a respective satellite reference voltage generator configured to generate a satellite reference voltage, wherein the satellite reference voltage generator is of a first type and is separate from the first master reference voltage generator;and a satellite voltage measurement system configured to measure as measured satellite voltage a digital representation of the voltage on a satellite voltage line with respect to the satellite reference voltage, and an error correction system communicatively connected to the error determination system of the master voltage monitor, wherein the error correction system is configured to correct any error in the digital representation of each measured satellite voltage using the digital error. Voltage monitoring system according to claim 1, wherein each satellite voltage monitor is communicatively connected to the master voltage monitor via a communication bus, and the error correction system for each satellite voltage monitor comprises a respective error correction module integrated into the satellite voltage monitor, wherein the error correction module is: communicatively connected to the error determination system of the master voltage monitor; and configured to receive the digital error from the error determination system via the communication bus and to correct an error in the digital representation of each measured satellite voltage using the digital error. Voltage monitoring system according to claim 1 or 2, wherein the fault detection system of the master voltage monitor comprises: a second master reference voltage generator configured to generate a second master reference voltage, wherein the second master reference voltage generator is of a second type that is less sensitive to temperature changes than the first type; and a digitization system configured to determine as a digital fault a digital representation of a difference between the first master reference voltage and the second master reference voltage. Voltage monitoring system according to claim 3, wherein the fault detection system comprises a master voltage measurement system configured to: measure, as the first measured master voltage, a digital representation of a voltage on a first voltage line with respect to the first master reference voltage; and measure, as the second measured master voltage, a digital representation of the voltage on the first voltage line with respect to the second master reference voltage; and wherein the digitization system is configured to determine, as a digital fault, a digital representation in response to a difference between the first measured master voltage and the second measured master voltage. Voltage monitoring system according to claim 4, wherein the digitization system is configured to determine as a digital fault a digital representation of the ratio between the first measured master voltage and the second measured master voltage. Voltage monitoring system according to one of claims 3 to 5, wherein: the first type of reference voltage generator is a bandgap voltage reference; and the second type of reference voltage generator is a high-precision bandgap voltage reference. Voltage monitoring system according to claim 6, wherein: the master reference voltage generator is configured to generate the master reference voltage using a chopping technique; and each satellite reference voltage generator is configured to generate each satellite reference voltage using the chopping technique. Voltage monitoring system according to any one of claims 3 to 7, wherein the error correction system is configured to store a second digital error representing an error in the second master reference voltage, and wherein for each satellite voltage monitor the error correction system is further configured to use the stored second digital error to correct the measured satellite voltage. Voltage monitoring system according to claim 8, when dependent on claim 2, wherein each satellite voltage monitor is configured to store the second digital error, and each error correction module is configured to use the second digital error stored by the respective satellite voltage monitor to correct the measured satellite voltage. Voltage monitoring system according to claim 9, wherein the master voltage monitor is configured, when a predetermined master calibration voltage is provided on a master calibration voltage line, to: generate a digital representation of the voltage on the master calibration voltage line with respect to the first master reference voltage; and define the second fault in response to a difference between the predetermined master calibration voltage and the digital representation of the specified voltage on the master calibration voltage line. Voltage monitoring system according to any one of claims 8 to 10, wherein the error correction system for each satellite voltage monitor is configured to: store a third digital error representing a temperature-independent error of the satellite reference voltage; and furthermore use the stored third digital error to correct the measured satellite voltage. Voltage monitoring system according to claim 11, wherein for each satellite voltage monitor, when a predetermined satellite calibration voltage is provided on a satellite calibration voltage line to the satellite voltage monitor, the satellite voltage monitor is configured to: determine a digital representation of a voltage on the satellite calibration voltage line with respect to the satellite reference voltage; and define the third digital fault in response to a difference between the predetermined satellite calibration voltage and the digital representation of the voltage on the satellite calibration voltage line. Voltage monitoring system according to claim 12, wherein, if more than one satellite voltage monitor is present, the satellite calibration voltage lines of all satellite voltage monitors are electrically connected to each other, so that the same predetermined satellite calibration voltage is shared by each satellite voltage monitor. System-on-a-Chip comprising a single package containing the voltage monitoring system according to any one of claims 1 to 13. System-on-a-Chip according to claim 14, comprising a plurality of power domains, wherein each satellite voltage line is configured to carry a power signal for another of the plurality of power domains.

Citation Information

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