Method for operating a power converter, computing unit, power converter assembly and electrical machine unit

Abstract

1. Method for operating a power converter (110, 210) for an electric machine (130), wherein the power converter has several half-bridges (120U, 120V, 120W, 220U), wherein each of the several half-bridges is assigned two switching arrangements (122UH, 122UL, 122VH, 122VL, 122WH, 122WL, 222UH, 222UL), comprising a high-side switching arrangement and a low-side switching arrangement, wherein one or each of several of the switching arrangements, preferably each switching arrangement, is a multiple switching arrangement to which several parallel-connected semiconductor switches (TU_H1, TU_H2, TU_L1, TU_L2) are assigned, and wherein each semiconductor switch is assigned a control device (224UH1, 224UH2, 224UL1, 224UL2) is assigned, by means of which the semiconductor switch can be controlled to open and close, the method comprising, for one or each of the multiple switching arrangements: providing (306), for each semiconductor switch of the multiple switching arrangement,each of a value (304) for one or more thermo-sensitive electrical parameters associated with the respective semiconductor switch; Determine (308), for each semiconductor switch of the multiple switching arrangement, based on the respective value for one or more thermo-sensitive electrical parameters of a temperature value (310) of the respective semiconductor switch; Check (314), based on the temperature values ​​of the semiconductor switches of the multiple switching arrangement, whether a deviation of current flows through the semiconductor switches is within a permissible range; and if it is determined that the deviation of current flows through the semiconductor switches is not within the permissible range, adjust (316) a control of one of the semiconductor switches of the multiple switching arrangement, wherein the adjustment (316) of the control of a semiconductor switch of the multiple switching arrangement, in a first stage,includes: Extending (318) a time delay in the actuation of the semiconductor switch for opening and / or closing for which a higher temperature has been specified than for at least one other semiconductor switch of the multiple switching arrangement, further comprising, if after an adjustment in the first stage it is again determined that the deviation of current flows through the semiconductor switches is not within the permissible range: Adjusting (328) the actuation of a semiconductor switch of the multiple switching arrangement in a second stage, comprising: Adjusting (338) an actuation strength of the actuating device with which at least one of the semiconductor switches of the multiple switching arrangement is to be actuated for opening and / or closing, to a new actuation specification.

Description

The present invention relates to a method for operating a power converter for an electrical machine, a computing unit for its implementation, a power converter arrangement and an electrical machine unit comprising an electrical machine and a power converter. Background of the invention In electrical machines, especially those used as motors and / or generators, and particularly when used in vehicles, inverters (power converters) are used to rectify the generated alternating current or to convert the applied direct current into alternating current. DE 10 2018 212 472 A1, JP 2019 - 4 558 A and “CHEN Cuili [et al.]: Comparison of TSEP performances operating at homogeneous and inhomogeneous temperature distribution in multichip IGBT power modules. In: IEEE journal of emerging and selected topics in power electronics, Vol. 9, 2021, No. 5, pp. 6282-6292. ISSN 2168-6777.” deal with power converters and their operation, especially with regard to control circuits. Disclosure of the invention According to the invention, a method for operating a power converter, a computing unit for its implementation, a power converter arrangement, and an electrical machine unit with the features of the independent claims are proposed. Advantageous embodiments are the subject of the dependent claims and the following description. The invention relates to power converters or inverters, as well as to electrical machines incorporating such power converters and their operation. A suitable processing unit, e.g., a motor control unit, can be provided for operating or controlling the power converter with appropriate signals. Within the scope of the invention, the combination of the electrical machine and the associated power converter, optionally with a processing unit, shall also be referred to as an electrical machine unit. The power converter is frequently mounted on the electrical machine; however, a remote arrangement with a corresponding electrical connection is also conceivable. The electrical machine unit can be part of a vehicle, and in particular, can be used as a traction drive. Examples of suitable electrical machines include synchronous machines, synchronous reluctance machines, induction machines, permanent magnet machines, and others. The power converter and the electrical machine will be described in more detail below.The electrical machine unit and its operation are described in a comprehensive manner. Typical electrical machines have multiple phases, e.g., three phases; although the explanation of the present invention is primarily based on three-phase electrical machines, this also applies to other numbers of phases, e.g., six, nine, twelve, or fifteen phases. Each phase of the electrical machine has a phase winding (though phase and phase winding are often used synonymously). The phase windings are integrated into a stator of the electrical machine (thus forming a stator winding). In principle, however, the electrical machine can also have only one or two phases. Furthermore, the electrical machine has a rotor, which can be permanently excited and / or separately excited. The power converter has multiple half-bridges, typically one half-bridge per phase of the electrical machine. This means the converter is designed for a specific number of phases of the electrical machine with which it is to be used. For this purpose, the converter can have multiple phase terminals, each of which is connected to one of the multiple phase windings of the electrical machine. Generally, each of the multiple half-bridges is connected to one of the multiple phase windings of the electrical machine via a center tap of the respective half-bridge. The two other terminals – the DC-side terminals – of the half-bridges are typically connected together to one (positive and negative) DC terminal each. The converter, or more generally the electrical machine unit, therefore has DC terminals, which in turn can be configured for connection to an energy storage device such as a battery. Typically, an intermediate circuit capacitor, e.g., a DC link capacitor, is also provided between the DC terminals. Preferably, such a converter is bidirectional, meaning it can convert DC voltage to AC voltage (for motor operation of the electrical machine) and vice versa (for generator operation and, if applicable, recuperative operation of the electrical machine). It should be mentioned at this point that, within the scope of the present invention, a connection or a connection is to be understood in particular as an electrical or electrically conductive connection or an electrical or electrically conductive connection. Each of the multiple half-bridges has two switching arrangements, or rather, each half-bridge is assigned two switching arrangements. These two switching arrangements comprise a high-side switching arrangement and a low-side switching arrangement. While a typical two-level converter has exactly two such switching arrangements per half-bridge, other switching arrangements can also be provided, for example, in a three-level converter. Especially in the case of power converters used for electric machines employed as traction drives for vehicles, there is an increasing need to handle high to very high load currents. This typically requires not only meeting basic operational requirements but also providing additional capacity for overload situations and improved reliability. However, even the largest semiconductor or power modules currently available may not be able to meet these requirements and / or are extremely expensive. In such cases, parallel connection of such components is a preferred solution. Accordingly, one or each of the switching arrangements of the power converter, preferably each switching arrangement, is a multiple switching arrangement to which several semiconductor switches are connected in parallel. MOSFETs or IGBTs are particularly suitable as semiconductor switches. Specifically, the multiple semiconductor switches connected in parallel in a multiple switching arrangement are all semiconductor switches of the same type, particularly with regard to their electrical design. Typically, all semiconductor switches of the half-bridges of a power converter are also of the same type. Although a common approach is to use two semiconductor switches connected in parallel in such a multiple switching arrangement, three or more semiconductor switches can also be connected in parallel. A concrete example is a power converter for a three-phase electric machine, which then has three half-bridges, each with two switching arrangements. Each switching arrangement can then be a multiple switching arrangement with two semiconductor switches connected in parallel. This parallelization can be implemented externally, for example, or with parallel dies in a single package. Each semiconductor switch is associated with a control device, a so-called gate driver, which allows the semiconductor switch to be controlled to open and close. This applies regardless of how many of the switching arrangements are configured as multiple switching arrangements. By selectively controlling the semiconductor switches to open and / or close, the power converter can be operated as desired, for example, for rectification or inversion. In normal operation, the control devices are instructed to control the semiconductor switches to open and close. Connecting power semiconductor switches such as metal-oxide-semiconductor field-effect transistors (MOSFETs), SiC MOSFETs, or IGBTs in parallel is a delicate task. A balanced current distribution among the semiconductor switches is crucial for optimal performance and long-term reliability. Several factors can influence the behavior of semiconductor switches in parallel configurations, affecting the dynamic equilibrium and current distribution. Careful layout design can minimize the differences between individual semiconductor switches and their subpaths. Furthermore, fluctuations in switching parameters can lead to disproportionate stress on individual semiconductor switches, especially as the number of parallel-connected semiconductor switches increases, for example, with three, four, or even more switches. In power MOSFETs, for example, parameters such as gate threshold voltage, transconductance, capacitance, on-resistance, temperature differences, and parasitic inductance across the gate and a commutation loop affect the current balance. Deviations in these parameters can lead to serious imbalances and potential failure of a semiconductor switch. Understanding these factors has proven crucial. Proper layout design and switching parameter management can be critical for maintaining power balance. As the complexity of parallel configurations increases, proactively addressing these challenges becomes even more essential. Several options can be considered in this regard. One possibility is so-called active automatic current balancing by monitoring the current of each semiconductor switch: This is a closed system that actively monitors and adjusts the current distribution. This works regardless of the cause of the imbalance (e.g., fluctuations in the properties of the semiconductor switches). The individual currents are continuously monitored during steady-state operation. Regardless of whether the imbalance is caused by fluctuations in the properties of the semiconductor switches or other factors, a dynamic response can be achieved by adjusting the gate voltages or other parameters to balance the currents. However, monitoring the current requires suitable current sensors that must be particularly accurate while still having a high bandwidth. This is generally very expensive and leads to complex circuits. Another option is to add or include inductors in series when connecting power semiconductor switches, such as MOSFETs, in parallel. This can be used to balance the current flow between the semiconductor switches. It's important to consider whether individual semiconductor switches are connected in parallel or whether half-bridges, each comprising a high-side and a low-side semiconductor switch, are used. This is achieved by inserting a typically small inductor in series with each semiconductor switch. The inductor acts as a buffer, absorbing and releasing energy, which helps to equalize the time each semiconductor switch takes to turn on and off. This is particularly useful in high-current applications where slight differences in the semiconductor switches can lead to significant imbalances in current distribution.By carefully selecting the inductance value, it can be ensured that the current is distributed evenly, preventing a semiconductor switch from carrying too much load and potentially overheating or failing. This is a simple and effective method to improve the reliability and performance of a system where multiple power semiconductor switches are used in parallel. However, this requires additional inductors, which also demand additional installation space. This is often not feasible. Another possibility is to adjust the control using the gate drivers. One goal here is to control the turn-on and turn-off characteristics. This can be achieved through careful design of the gate driver circuits, which provide uniform control signals for each semiconductor switch. In particular, the gate voltage and switching timing can be set so that all semiconductor switches turn on and off simultaneously and at the same speed, thus minimizing differences in their conduction times. This synchronization prevents one semiconductor switch from carrying more current than the others, which could lead to overheating or failure.Optimizing the gate driver parameters allows for a uniform current distribution across all semiconductor switches in the parallel configuration, thereby improving the overall efficiency and reliability of the system. The gate-to-gate resistors may need to be adjusted, and capacitors can help achieve balanced switching. Gate drivers with adjustable parameters allow for fine-tuning. Temperature effects on the gate characteristics (particularly the junction temperature of the semiconductor switch) should be taken into account; that is, temperature monitoring can be used to adjust the switching speed. While temperature monitoring can be effective, the typically long time constants of temperature sensors mean that temperature fluctuations within each drive cycle cannot be monitored accurately and quickly. Therefore, the correlation between temperature imbalance and unbalanced current distribution is not precise. Other alignment techniques may require sophisticated hardware for measuring and adjusting the gate signal, which takes up space and makes the circuit more complex, thus increasing the associated costs. In typical power converters, the distance between two power modules (a power module typically has two semiconductor switches) is a few centimeters. If only one (shared) gate driver is used, the distance to the two parallel semiconductor switches (or even more than two) may not be symmetrical, or the gate driver may not be positioned close enough to both semiconductor switches. This results in high gate loop inductance, which causes oscillations or fluctuations in the gate signals. One solution is to add a separate amplification stage for each semiconductor switch that receives the signal from the gate driver. This can help solve the gate loop inductance problem. However, this amplification stage could break the original connection between the semiconductor switches and the gate driver and potentially disable some monitoring, protection, and control functions of the (smart) gate driver (which are standard features in automotive applications). By using two gate drivers, or one gate driver per semiconductor switch, the problem of using gain stages can be solved or circumvented. However, propagation delays can lead to further switching imbalances. Hardware features and / or software algorithms may be required to adjust the gate driver drive strength. Furthermore, if the drive strength adjustment is not controlled, uncontrolled overshoot or short circuits can occur, potentially damaging the semiconductor switches and leading to thermal runaway or fire. Against this background, the use of a control device, i.e., a gate driver, for each semiconductor switch is proposed, along with a testing and, if necessary, adjustment procedure for each existing multiple switching arrangement. This testing and adjustment procedure can, in particular, be repeated continuously, as will be explained in more detail below. For each semiconductor switch in the multi-switching arrangement, a value is provided for one or more thermo-sensitive electrical parameters associated with that specific semiconductor switch. Such thermo-sensitive electrical parameters (TSEPs) and their corresponding values ​​can be read out, for example, in a suitable manner. For each semiconductor switch in the multi-switch arrangement, a temperature value is determined based on the respective value of one or more thermo-sensitive electrical parameters. This temperature value is specifically the junction temperature of the semiconductor switch. A correlation can be established between the junction temperature of the semiconductor switch and one or more electrical parameters of the semiconductor switch. Such correlations can be determined through (potentially extensive) offline experiments and measurements. Each of these parameters, which can provide an indication of the junction temperature, can be designated as a thermo-sensitive electrical parameter (TSEP). Examples of such TSEPs include desaturation voltage (DESAT voltage), a variation in the internal gate resistance of the semiconductor switch, the on-state resistance of the semiconductor switch, or a forward voltage drop. If an on-state resistance of the semiconductor switch (RDS_on) at a given phase current can be estimated or determined using any method, the corresponding temperature can be determined from the I_V curve or by comparing RDS_on vs. I for different temperatures and used for the proposed procedure. The DESAT voltage or a circuit for this purpose, as well as the determination of the temperature using this method, is described, for example, in the subsequently published DE 10 2024 102 629 A1. Another method for determining TSEPs, or the temperature, is the saturation voltage method: This method measures the saturation voltage at low current. The saturation voltage is temperature-dependent, and by calibrating the voltage using known temperatures, the junction temperature can be estimated during operation. The TSEP in this case is the saturation voltage. Another possibility is the threshold voltage method: In this method, the gate threshold voltage of the semiconductor switch is measured. The threshold voltage decreases with increasing temperature. By creating a calibration curve of this voltage versus temperature, the junction temperature can be derived from the measured threshold voltage. The TSEP (gate threshold voltage) is then the threshold voltage. Another possibility is the on-resistance method: This method uses the on-resistance of the semiconductor switch, which increases with temperature. By measuring the on-resistance and using a predefined calibration curve of resistance versus temperature, the junction temperature can be estimated. The TSEP (thermostatic junction temperature) is then the on-resistance. Based on the temperature readings of the semiconductor switches in the multiple switching arrangement, it is then checked whether any deviation in current flow through the semiconductor switches is within a permissible range. In the case of two semiconductor switches in the multiple switching arrangement, this could mean, for example, determining the difference between the two temperature readings, particularly as an absolute value. If this difference then exceeds a predefined threshold (in the sense of a permissible range), the deviation in current flow through the semiconductor switches can be considered too high. It should be noted here that the temperature of a semiconductor switch correlates with the current flow through it. The higher the current flow, the higher the temperature; this is true, at least, unless other conditions are changed, which is the norm in this case. For multiple switching arrangements with more than two semiconductor switches (e.g., when three, four, or more power modules are connected in parallel, each with a high-side and a low-side semiconductor switch), a similar approach can be used, focusing on the two values ​​that differ most significantly. Alternatively, all individual values ​​can be considered; for example, all possible differences between any two different values ​​can be determined and checked against an acceptable range. In general, a comparison of the temperature values ​​of the semiconductor switches in the multiple switching arrangement is performed. If it is determined that the deviation in current flow through the semiconductor switches is not within the permissible range, the control of one of the semiconductor switches in the multiple switching arrangement is adjusted. It is conceivable that the control of more than one of the semiconductor switches in the multiple switching arrangement is also adjusted. In this way, the current balance can be monitored by using temperature measurements of the semiconductor switches. However, instead of relying on conventional current sensors or NTC or PTC elements with large time constants, thermo-sensitive electrical parameters are used, enabling real-time monitoring. This concept helps to update the (virtual) temperature or junction temperature in real time and to react quickly to current imbalances. TSEPs can be measured or acquired without direct access to specific pins of the semiconductor switches or internal components (non-invasive measurement). Furthermore, TSEPs are cost-effective because they utilize existing electrical measurements or can measure available electrical parameters with minimal effort. The real-time feedback helps to prevent overheating and ensure the safe operation of the semiconductor switches. It should be mentioned that providing the TSEP value and determining the temperature value can be done continuously; this also applies in particular to checking the current flows for deviation. Adapting the control of a semiconductor switch in a multi-switch assembly involves, in a first step, increasing the time delay in controlling the semiconductor switch for opening and / or closing (specifically the closing phase following opening) that has a higher temperature specified than at least one other semiconductor switch in the assembly. Such delayed opening and / or closing results in a correspondingly lower current flow in the affected semiconductor switch compared to the previous state. This delay can be, for example, in the range of a few tens or a few hundred nanoseconds; the exact duration depends on how precisely the delays can be implemented. In the case of three parallel semiconductor switches, for instance, only the hottest one can be controlled with a delay. In one embodiment, the permissible range for testing the deviation of current flows through the semiconductor switches is defined as a function of a current flow, particularly an average current flow, and / or an ambient temperature during operation of the power converter. This allows for consideration of different operating conditions of the power converter. For example, a smaller deviation may be permitted at higher ambient temperatures or higher (average) current flows than at lower ambient temperatures or (average) current flows. If, after an adjustment in the first stage, it is determined again (as mentioned, the temperature value can be continuously determined) that the deviation of current flows through the semiconductor switches is not within the permissible range, one embodiment adjusts the control of a semiconductor switch of the multiple switching arrangement in a second stage. This involves adjusting the control signal strength of the control device, with which at least one of the semiconductor switches of the multiple switching arrangement is to be controlled to open and / or close, to a new control setting. In one embodiment, it can first be checked whether an adjustment to a new control setting is even possible, or whether a maximum value has already been reached. It should be noted that after the initial adjustment, the values ​​for the thermo-sensitive electrical parameters are re-provided and the temperature values ​​are determined. This can generally be repeated or performed regularly, so that new values ​​and temperature readings are obtained even after a potential adjustment process. The gate drive strength refers specifically to the gate driver's ability to quickly and efficiently charge and discharge the gate capacitance of the semiconductor switch. The gate drive strength affects several different aspects of the semiconductor switch's operation, such as the switching speed. A higher gate drive strength allows for faster on and off switching of the semiconductor switch. In this way, the current flow through the semiconductor switch can also be influenced, albeit in other ways. In one embodiment, the new control signal is first determined, and then it is checked whether the new control signal meets a test criterion. Only if the new control signal meets the test criterion is the control signal strength adjusted accordingly. The test criterion can include the requirement that a voltage value (in particular, a voltage induced by induction) expected to result from a current change due to the application of the new control signal lies below a predetermined voltage threshold, especially for a DC link of the converter. Short or rapid voltage spikes often cannot be detected directly; however, it is usually possible to determine analytically (or, if necessary, estimate) whether a voltage spike (i.e., a generated voltage value, so-called "voltage overshoot") will still remain below the voltage threshold.This can be done based on known inductances and the drive strength. Before the new control setting is applied, its effect on the transient response of the corresponding semiconductor switch is calculated, for example, using an analytical model. For instance, the (time-dependent) change in the semiconductor switch's current flow when the new setting is applied is calculated. Based on this and the inductance of the commutation loop (this information is usually available from design specifications or measurements), the voltage overshoot should not exceed the semiconductor switch's maximum reverse voltage of, for example, 1200 V. Therefore, the control algorithm has more flexibility to adjust switching speeds at lower battery voltages. At a lower DC link voltage of, for example, 550 V, the overshoot margin is, for example, 650 V. However, at a DC link voltage of, for example, 850 V, the margin decreases to 350 V.This range should be considered for safe operation when updating the drive strength. For example, the 1200 V blocking voltage of the semiconductor switch applies to a nominal DC link voltage of 800 V. Even with a nominal value of 800 V, the battery voltage can vary between approximately 520 V and 850 V under full load. The test criterion may alternatively or additionally include the requirement that a voltage change expected to result from applying the new control specification, due to a change in the switching speed of at least one semiconductor switch, remains below a predetermined voltage change threshold, particularly for a winding of the electrical machine and / or an insulating material of the electrical machine and / or the converter. This (temporal) voltage change during the switching process can be relevant insofar as the actual value of the voltage change may exceed the maximum permissible value of the voltage change for machine windings or other insulating materials due to the adjustment of the switching speed. If the test criterion is not met, then no adjustment of the control strength is necessary. In one embodiment, if, after an adjustment in the second stage, it is again determined that the deviation of current flows through the semiconductor switches is not within the permissible range, the adjustment in the second stage is performed again. In this way, further adjustments can be made as needed if the distribution of current flows across the parallel semiconductor switches is still too uneven. It should also be mentioned here that after the adjustment in the second stage, the values ​​for the thermo-sensitive electrical parameters are provided again and the temperature values ​​are determined. In other words, if an irregularity in the current flow is detected, a time delay can first be introduced in the control signal (in the first stage). If this is insufficient, the control signal strength can be adjusted (in the second stage), several times if necessary. It should also be mentioned that in cases where it is determined that the deviation of current flows through the semiconductor switches is within the permissible range, no adjustment (i.e., neither first nor second stage) needs to be made. In one embodiment, adjusting the drive strength of a semiconductor switch according to the drive value involves specifying to the drive device associated with the semiconductor switch which, or which combination of, several of a plurality of drive outputs of the drive device is used to control the semiconductor switch to open. The plurality of drive outputs are connected to the semiconductor switch via various resistors. In particular, internal sources of the gate driver can be connected to the respective resistor. Here, drive devices or gate drivers can be used that have multiple output pins, which can also be used individually for control. If the individual output pins are connected to the semiconductor switch via different (ohmic or electrical) resistors, the following applies:Since the gates of these devices are connected, the drive strength can be varied by selectively applying the drive signal to specific output pins. The combinations of the drive outputs or pins ultimately result in a certain number of possible combinations, each yielding a different drive strength. When adjusting the control signal in the second stage, specifically during the initial adjustment, the combination (or individual pin) that results in the smallest change compared to the current control signal strength can be selected. With any subsequent adjustments in the second stage, the change can become progressively larger. Therefore, the control signal strength is adjusted incrementally. The aforementioned steps for operating a power converter can be carried out, for example, within the power converter itself or within a processing unit, but also in or using a separate processing unit, in particular a motor control unit. A power converter and a processing unit can then be part of a power converter assembly, which in turn can be part of an electrical machine unit. Further advantages and embodiments of the invention will become apparent from the description and the accompanying drawing. The invention is schematically illustrated in the drawing using exemplary embodiments and is described below with reference to the drawing. Brief description of the drawings Fig. 1 schematically shows an electrical machine unit in one embodiment. Fig. 2 schematically shows part of a power converter arrangement in one embodiment. Fig. 3 schematically shows a process sequence in one embodiment. embodiment(s) of the invention Figure 1 shows a schematic representation of an electrical machine unit 100 in one embodiment. The electrical machine unit 100 comprises a power converter 110 and an electrical machine 130. By way of example, the electrical machine 130 has three phases U, V, W, with corresponding phase windings 132U, 132V, 136W. As already mentioned, the electrical machine can also have a different number of phases. The power converter 110 has three half-bridges 120U, 120V, and 120W, corresponding to the three phases of the electric machine. Each of the three half-bridges, in turn, has two switching arrangements: a high-side switching arrangement and a low-side switching arrangement. Thus, half-bridge 120U has high-side switching arrangement 122UH and low-side switching arrangement 122UL, half-bridge 120V has high-side switching arrangement 122VH and low-side switching arrangement 122VL, and half-bridge 120W has high-side switching arrangement 122WH and low-side switching arrangement 122WL. On the DC side, the 120U, 120V, and 120W half-bridges are each electrically connected to each other (i.e., the positive sides on one side and the negative sides on the other) and also to a respective DC terminal, here the positive DC terminal B+ or the negative DC terminal B-. The 110 power converter can be connected to a battery or other electrical energy storage device via these DC terminals. The center taps 124U, 124V, 124W are connected to the corresponding phases U, V, W or the corresponding phase windings 132U, 132V, 132W. For this purpose, the converter can, for example, have suitable phase terminals via which the converter can be electrically connected to the phases. Furthermore, a DC link capacitor 112 is connected in parallel between the DC voltage terminals. An exemplary control arrangement 114 is also provided, by means of which, for example, the switching devices for opening and closing can be controlled. This control arrangement is shown here only as an example and can represent several control devices (gate drivers). A detailed view and explanation follow with reference to Fig. 2. At least one of the switching arrangements 122UH, 122UL, 122VH, 122VL, 122WH, 122WL, but preferably all of them, now have several semiconductor switches connected in parallel, i.e., they are multiple switching arrangements. This will also be explained in more detail with reference to Fig. 2. Figure 2 schematically shows a portion of a power converter arrangement 201 in one embodiment. The power converter arrangement 201 comprises a power converter 210 and a computing unit 250. The power converter 210 can be fundamentally comparable to the power converter 110 according to Figure 1, except that Figure 2 shows a half-bridge 220U. Corresponding to the three phases of the electrical machine according to Figure 1, the power converter 210 can also have three half-bridges. The following explanations for the half-bridge 220U therefore apply accordingly to other half-bridges not shown. The 220U half-bridge features two switching arrangements: a high-side switching arrangement 222UH and a low-side switching arrangement 222UL. These switching arrangements are multiple switching arrangements, meaning they each have several semiconductor switches connected in parallel. For example, the high-side switching arrangement 222UH has two semiconductor switches TU_H1 and TU_H2, and the low-side switching arrangement 222UL has two semiconductor switches TU_L1 and TU_L2. The semiconductor switches are, for example, MOSFETs. In practical implementation, the half-bridge 220U can be provided with two power modules 220U1 and 220U2, each containing a semiconductor switch for the high side and a semiconductor switch for the low side. The semiconductor switches belonging to or associated with a multiple switching arrangement therefore do not necessarily have to be provided in a common module, but can also be connected in parallel in another way. Furthermore, DC voltage terminals B+, B- are shown, as well as a DC link capacitor 212 connected in parallel between the DC voltage terminals, according to the embodiment shown in Fig. 1. In addition, a voltage measuring device 216 is shown, by means of which an DC link voltage V_DC can be detected or measured by way of example. The half-bridge 220U has a center tap 224U, to which individual center taps 224U1, 224U2 of the two power modules 220U1, 220U2 are interconnected and connected to phase V. Furthermore, the power converter features gate drivers 224UH1, 224UH2, 224UL1, and 224UL2, one gate driver for each semiconductor switch. Specifically, gate driver 224UH1 is assigned to semiconductor switch TU_H1, gate driver 224UH2 to semiconductor switch TU_H2, gate driver 224UL1 to semiconductor switch TU_L1, and gate driver 224UL2 to semiconductor switch TU_L2. It is understood that there are corresponding gate drivers for the other half-bridges and their semiconductor switches not shown here. These control devices can all be constructed in the same way, so they will be described together in more detail below. The individual components of the control devices are also all labeled the same in Fig. 2, where applicable. There is a deviation in the labeling in this case for a specific input signal, which, however, is named according to the control devices or the semiconductor switches. The control units feature, for example, digital input pins DS0 to DSn, meaning that n+1 digital input pins can be provided per control unit (although only one pin is shown here as a representative example). However, only one digital input pin is also conceivable. The control units feature, for example, an interface for a Serial Peripheral Interface (SPI). Digital signals, particularly for a control signal strength (control values) GDS, can be received at the digital input pins from the engine control unit 250, e.g., a so-called MCU, or more specifically, a control and logic unit 252 thereof. Furthermore, communication between the engine control unit 250 or the control and logic unit 252 and the control unit can take place via the Serial Peripheral Interface (SPI). The control signal strength can also be adjusted via SPI. The control devices also have a positive input pin IN+ and a negative input pin IN-, via which control signals for opening and closing the associated semiconductor switches can be received from the motor control unit 250 or the control and logic unit 252. A PWM signal PWM_HS_U (for a high level) and a PWM signal PWM_LS_U (for a low level) are shown here. The control devices also have several pins on the side of the semiconductor switches (shown on the right), which may be separated from the pins on the MCU side (shown on the left), for example, by an insulating layer. These pins include, for example, an analog input pin AI, four output pins OUTL1, OUTL2, OUTH1, and OUTH2, and a GND pin for ground. Output pins OUTL1 and OUTL2 are used to control the semiconductor switch to close, and output pins OUTH1 and OUTH2 are used to control the semiconductor switch to open. These output pins are therefore control outputs. These control outputs, or output pins, are connected to the respective semiconductor switch or its gate via various resistors, namely different turn-off resistors Roff1 and Roff2, and different input resistors Ron1 and Ron2. Depending on which output pins are activated, a different activation level can be achieved for the respective semiconductor switch. Which output pin or combination of output pins is used can be specified or set, for example, via the digital input pins or a signal received from them. It should be noted that output pins OUTH1 and OUTH2 (i.e., one or both) are used to close the semiconductor switch, and output pins OUTL1 and OUTL2 (i.e., one or both) are used to open the semiconductor switch. It should be noted that the two output pins shown here for closing and opening are only for illustrative purposes. Depending on the control device, more than two such output pins may be provided, e.g., three, four, five, or even more. With these and corresponding additional switch-off resistors or input resistors, even more different control strengths can be generated. Furthermore, each semiconductor switch is assigned a measuring device (e.g., in the form of an integrated circuit) by means of which the values ​​of one or more thermo-sensitive electrical parameters of the respective semiconductor switch can be detected or measured. These measuring devices are designated 228UH1, 228UH2, 228UL1, and 228UL2, respectively, according to the semiconductor switches to which they are assigned. The detected values ​​are designated as signals TSEP_HS_U1, TSEP_HS_U2, TSEP_LS_U1, and TSEP_LS_U2. Depending on the situation or possibilities, these signals can be supplied, for example, via the analog input pin AI of the relevant control unit. Alternatively, for example, if no such analog input pin is available or free, all these signals can be supplied to the motor control unit 250 or the control and logic unit 252 via a signal isolator 226. In addition, the DC link voltage V_DC or...The relevant signal is also fed to the engine control unit 250 or control and logic unit 252 via the signal isolator 226. When the power converter 210 is operated, for example to drive the electric machine, the individual semiconductor switches are activated to open and close, typically alternating between the high-side and low-side semiconductor switches. There is also an offset between the individual half-bridges or phases. While the semiconductor switches of a multiple switching arrangement are activated as equally or simultaneously as possible, it can happen—due to slightly different activation methods or other reasons—that the current flow through the individual semiconductor switches of a multiple switching arrangement is not exactly equal or evenly distributed. For example, the current through semiconductor switches TU_H1 and TU_L1 (the current flows through the currently closed semiconductor switch) is denoted by I1, and the current through semiconductor switches TU_H2 and TU_L2 is denoted by I2.Although both currents I1, I2 add up to a total current I for the relevant phase V, an unequal distribution between I1 and I2, or generally between different semiconductor switches connected in parallel, is undesirable. Figure 3 shows a process in an embodiment that can be used to operate a power converter as shown in Figure 1 or Figure 2, and in particular enables the detection of an unequal distribution between different parallel-connected semiconductor switches and an adjustment in response thereto. In principle, the control devices or gate drivers can be instructed to control the semiconductor switches to open and close, in particular according to a predetermined control pattern for a desired operation of the electrical machine. For monitoring and, if necessary, adjustment, the following procedure (a test and adjustment process) is now carried out, which can be repeated repeatedly or run continuously. This procedure is performed for each of the multiple switching arrangements. The procedure should start with step 300. In step 302, a value 304 is acquired or measured for each semiconductor switch for one or more thermo-sensitive electrical parameters associated with that semiconductor switch, and then made available in step 306. The measurement can be performed, for example, using the aforementioned measuring devices 228UH1, etc., whose signals are then transmitted, for example, via the signal isolator 226 to the MCU (or another type of processing unit), or via the individual control devices (with an analog input pin), so that they are available for further use. In step 308, a temperature value 310 of the respective semiconductor switch is then determined for each semiconductor switch, based on the respective value 304 for one or more thermo-sensitive electrical parameters. Since this is performed for each multiple switching arrangement, temperature values ​​are available for each semiconductor switch within that arrangement. In the examples mentioned, where each switching arrangement is a multiple switching arrangement, temperature values ​​are therefore available for each semiconductor switch of the power converter. In the example with two parallel-connected semiconductor switches per multiple switching arrangement, an absolute value of the difference between the two temperature values ​​can then be determined for each multiple switching arrangement in step 312. It is then checked whether this absolute value of the difference exceeds, for example, a predefined threshold. Here, a comparison of the temperature values ​​is performed. As already mentioned, the temperature values ​​of the semiconductor switches (or specifically the junction of the semiconductor switches) can be used to check whether a deviation in current flow through the semiconductor switches is within a permissible range, step 314. As already mentioned, it is also possible to check whether a deviation of current flows through the semiconductor switches is within a permissible range in a multiple switching arrangement with more than two semiconductor switches connected in parallel. If, in step 314, it is determined that the deviation of current flows through the semiconductor switches is not within the permissible range, then, in step 316, the control of one of the semiconductor switches of the multiple switching arrangement is adjusted. If, however, the deviation of current flows through the semiconductor switches is within the permissible range, then—at least if the converter is still in operation or at least operating with some load—the process can be restarted at step 300. The control of the semiconductor switches continues as before. It should be noted that step 314 is performed for each multiple switching arrangement and can lead to different results for different multiple switching arrangements. For example, while one multiple switching arrangement might exhibit an excessive deviation in current flows through the semiconductor switches and proceed to step 316, this might not be the case for another multiple switching arrangement, meaning no adjustment is made there. As mentioned previously, the permissible range or threshold for the temperature difference used here can depend on an (average) current flow and / or an ambient temperature during operation of the converter. This can therefore change over several testing and adjustment procedures. However, it is advisable to use the same permissible ranges or thresholds for all multiple switching arrangements. Depending on the arrangement of the individual semiconductor switches on a heat sink and the flow of coolant through the heat sink, with some heating of the coolant during flow, different semiconductor switches may be cooled differently, which in turn can lead to different temperatures. In such cases, different permissible ranges or thresholds may be appropriate. The adjustment can in turn be carried out in stages, so that the adjustment according to step 316 is a first stage in which, step 318, a time delay is extended in the control of that semiconductor switch for opening and / or closing for which a higher temperature has been determined than for at least one other semiconductor switch of the multiple switching arrangement. Subsequent activations of the relevant semiconductor switches to open or close them then occur with a corresponding time delay, which may lead to changes in the TSEP values ​​and thus temperature values. These can be provided or determined in step 320. This can be done as in steps 302, 306, and 308. As already mentioned, the temperature values ​​can be determined continuously. It can now be checked again in step 322 whether any deviation in current flows through the semiconductor switches is within a permissible range. This can be done as in step 314. If it is determined that the deviation in current flow through the semiconductor switches is within the permissible range, then – at least if the power converter is still operating or at least operating under some load – the process can be restarted at 300. The semiconductor switches are then controlled as before. However, if it is determined here that the deviation of current flows through the semiconductor switches is not within the permissible range, it can first be checked in step 324 whether it is (still) possible to adjust the control of a semiconductor switch of the multiple switching arrangement in a second stage. Such an adjustment can involve defining a new control parameter to which the control signal strength, used to open and / or close at least one of the semiconductor switches in the multiple switching arrangement, must be adjusted. However, if a current control parameter already corresponds to a maximum value for the control signal strength, no further adjustment is possible. If, in step 324, it is determined that adjusting the control is no longer possible, a decision can be made in step 326 as to whether, for example, the converter is switched off or shut down, or whether the converter is put into a safe state, or whether another action is taken, such as a load reduction. If the converter continues to operate and, for example, only a load reduction is performed, the process can return to step 300. If, however, it is determined in step 324 that an adjustment of the control is still possible, then in step 328 an adjustment of the control of a semiconductor switch of the multiple switching arrangement follows in a second stage. The adjustment according to step 328 includes, step 330, determining a new control specification to which a control strength is to be adjusted with which at least one of the semiconductor switches of the multiple switching arrangement is to be controlled to open and / or close. In step 332, it is then checked whether the new control setting meets a test criterion. This can include, in step 334, calculating a current change and consequently a voltage value based on the new control setting, i.e., a new value for the control strength that has been determined. This can be done based on corresponding equations for inductance, control strength, current changes (dl / dt), and DC link voltage (V_DC). It can then be checked or determined whether this voltage value will remain below a predefined voltage threshold, i.e., whether a voltage spike or so-called "voltage overshoot" will still be below a threshold. In other words, it is checked whether a test criterion is met. Additionally (or possibly alternatively), in step 336, it can be checked whether, based on the new control specification, a voltage change caused by a change in the switching speed of the semiconductor switch remains below a threshold value. If excessively high voltage changes occur here, a maximum permissible voltage change for machine windings or other insulating materials could be exceeded. This can also be part of the test criterion. If the test criterion is met, step 338 involves adjusting the control signal strength with which at least one of the semiconductor switches of the multiple switching arrangement is to be controlled to open and / or close, according to a new control signal. This can be done as described above and in more detail with reference to Fig. 2. If this is not the case, i.e., the test criterion is not met, one can proceed again to step 326. As already explained in detail above, the test criterion can therefore be such that it is ensured that safe operation is still possible when applying the changed control strength, i.e., in particular that no excessively high voltages (voltage exceedances or overvoltage) occur. Subsequent activations of the relevant semiconductor switches to open or close them are then carried out with a correspondingly adjusted activation strength, which may lead to changes in the TSEP values ​​and thus temperature values. These TSEP values ​​can then be measured in step 340. In step 340, they can be provided or determined. This can be done as in steps 302, 306, and 308. It can now be checked again in step 344 whether any deviation in current flows through the semiconductor switches is within a permissible range. This can be done as in step 314. If it is determined that the deviation in current flow through the semiconductor switches is (again) outside the permissible range, the second stage is repeated from step 324. If, however, the deviation in current flow through the semiconductor switches is within the permissible range, the process can be restarted at step 300 – at least if the converter is still operating or at least operating under some load. The semiconductor switches are then controlled as before. The subsequent adjustment in a second stage, i.e., from step 324 onwards, can then be performed, for example, with a further modified drive strength. Depending on how detailed and / or how far the overall drive strength can be adjusted, it may happen in this loop that the limit of the gate driver or the drive strength is reached, and the deviation is still (too) high. Re-executing the process from step 324 is then no longer possible. In this phase, the MCU or another corresponding processing unit can, for example, detect an error or disturbance and react accordingly, such as switching to a safe state or switching off all gate pulses.

Claims

Method for operating a power converter (110, 210) for an electric machine (130), wherein the power converter has several half-bridges (120U, 120V, 120W, 220U), wherein each of the several half-bridges is assigned two switching arrangements (122UH, 122UL, 122VH, 122VL, 122WH, 122WL, 222UH, 222UL), comprising a high-side switching arrangement and a low-side switching arrangement, wherein one or each of several of the switching arrangements, preferably each switching arrangement, is a multiple switching arrangement to which several parallel-connected semiconductor switches (TU_H1, TU_H2, TU_L1, TU_L2) are assigned, and wherein each semiconductor switch is assigned a control device (224UH1, 224UH2, 224UL1, 224UL2) is assigned, by means of which the semiconductor switch can be controlled to open and close, the method comprising, for one or each of the multiple switching arrangements: providing (306), for each semiconductor switch of the multiple switching arrangement,each of a value (304) for one or more thermo-sensitive electrical parameters associated with the respective semiconductor switch; Determine (308), for each semiconductor switch of the multiple switching arrangement, based on the respective value for one or more thermo-sensitive electrical parameters of a temperature value (310) of the respective semiconductor switch; Check (314), based on the temperature values ​​of the semiconductor switches of the multiple switching arrangement, whether a deviation of current flows through the semiconductor switches is within a permissible range; and if it is determined that the deviation of current flows through the semiconductor switches is not within the permissible range, adjust (316) a control of one of the semiconductor switches of the multiple switching arrangement, wherein the adjustment (316) of the control of a semiconductor switch of the multiple switching arrangement, in a first stage,includes: Extending (318) a time delay in the actuation of the semiconductor switch for opening and / or closing for which a higher temperature has been specified than for at least one other semiconductor switch of the multiple switching arrangement, further comprising, if after an adjustment in the first stage it is again determined that the deviation of current flows through the semiconductor switches is not within the permissible range: Adjusting (328) the actuation of a semiconductor switch of the multiple switching arrangement in a second stage, comprising: Adjusting (338) an actuation strength of the actuating device with which at least one of the semiconductor switches of the multiple switching arrangement is to be actuated for opening and / or closing, to a new actuation specification. The method according to claim 1, wherein the adjustment of the control of a semiconductor switch of the multiple switching arrangement, in the second stage, further comprises: determining (330) the new control setting; and checking (332) whether the new control setting satisfies a test criterion, wherein the control strength is only adjusted to the new control setting if the new control setting satisfies the test criterion. Method according to claim 1 or 2, wherein the test criterion comprises that a voltage value expected to result from a current change due to the application of the new control specification lies below a predetermined voltage threshold, in particular for an intermediate circuit of the converter, and / or wherein the test criterion comprises that a voltage change expected to result from the application of the new control specification due to a change in the switching speed of the at least one semiconductor switch lies below a predetermined voltage change threshold, in particular for a winding of the electrical machine and / or an insulating material of the electrical machine and / or the converter. Method according to one of the preceding claims, wherein, if in a subsequent, in particular an immediately subsequent, testing and adjustment process, after an adjustment in the second stage, it is again determined that the deviation of current flows through the semiconductor switches is not within the permissible range, the adjustment in the second stage is carried out again. Method according to one of the preceding claims, wherein adjusting (338) the control strength of a semiconductor switch according to the control value comprises specifying to the control device associated with the semiconductor switch which or which combination of several of a plurality of control outputs of the control device is used to control the semiconductor switch to open, wherein the plurality of control outputs are connected to the semiconductor switch via different resistors. Method according to one of the preceding claims, wherein the permissible range when testing the deviation of current flows through the semiconductor switches is specified depending on a, in particular a mean, current flow and / or an ambient temperature during operation of the power converter. Method according to one of the preceding claims, wherein the one or more thermo-sensitive electrical parameters comprise or are based on at least one of the following parameters: - a desaturation voltage, - a variation of an internal gate resistance of the semiconductor switch, - a resistance in the on-state of the semiconductor switch, - a forward voltage drop. Method according to one of the preceding claims, wherein each of the switching arrangements is a multiple switching arrangement. Computing unit configured to perform all steps of a method according to any of the preceding claims. A power converter arrangement comprising a power converter and a computing unit according to claim 9, wherein the power converter is provided for operating an electric machine, wherein the power converter has several half-bridges, wherein each of the several half-bridges is assigned two switching arrangements comprising a high-side switching arrangement and a low-side switching arrangement, wherein one or each of several of the switching arrangements, preferably each switching arrangement, is a multiple switching arrangement to which several parallel-connected semiconductor switches are assigned, and wherein each semiconductor switch is assigned a control device by means of which the semiconductor switch can be controlled to open and close. Electrical machine unit (100) with converter arrangement according to claim 10 and with an electrical machine (130).

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