Stacked PIN diode and method for its manufacture

DE102025106500A1Pending Publication Date: 2026-03-19TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-02-20
Publication Date
2026-03-19

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Abstract

A diode structure comprises a first stack of semiconductor layers, wherein the first stack of semiconductor layers comprises a plurality of first semiconductor layers arranged in an alternating arrangement with a plurality of second semiconductor layers. The diode structure further comprises a second stack of semiconductor layers, wherein the second stack of semiconductor layers comprises a plurality of third semiconductor layers arranged in an alternating arrangement with a plurality of fourth semiconductor layers. The diode structure further comprises a fifth semiconductor layer between the first stack of semiconductor layers and the second stack of semiconductor layers, wherein the composition of the fifth semiconductor layer differs from each of the plurality of first, second, third, and fourth semiconductor layers.The diode structure further comprises an n-doped region in the first stack of semiconductor layers and a p-doped region in the second stack of semiconductor layers.
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Citation Information

Patent Citations

  • US-PATENTANMELDUNGNR.63/695,622