Method for determining the time sequence parameters of a memory chip, as well as control unit, device and medium

DE102026100985A1Undetermined Publication Date: 2026-07-23RAYSON HI-TECH (SZ) CO LTD
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
RAYSON HI-TECH (SZ) CO LTD
Filing Date
2026-01-09
Publication Date
2026-07-23

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Abstract

The present application discloses a method for determining the time sequence parameters of a memory chip, as well as a control unit, a device, and a medium relating to the field of chip testing technology. The method comprises performing the row and column position determination process based on the current transmission delay, which results from the initial transmission delay and the initial step value, to determine the memory position; according to a verification result from the read and write verification based on the memory position and the test code pattern, the updated delay test range and the updated step value are obtained by an update; wherein the updated delay test range includes a third end value and a fourth end value that is greater than the third end value;If the current step value is greater than or equal to the preset step value, the row and column position determination process, the read / write verification process, and the update process are performed based on the updated transmission delay, which is determined by the third end value and the updated step value and is less than the fourth end value. The minimum reference value for the memory chip's time sequence parameter is determined if the updated step value is less than the preset step threshold. The testing efficiency and accuracy of the minimum reference value of the memory chip's time sequence parameter can be improved during testing.
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