Optoelectronic semiconductor chip and method for manufacturing an optoelectronic semiconductor chip

DE112014001679B4Active Publication Date: 2026-07-02OSRAM OPTO SEMICON GMBH & CO OHG

Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
OSRAM OPTO SEMICON GMBH & CO OHG
Filing Date
2014-03-14
Publication Date
2026-07-02
Patent Text Reader

Abstract

Optoelectronic semiconductor chip comprising: - a semiconductor body (10) comprising an n-type region (2), an active region (4) for generating electromagnetic radiation, and a p-type region (3); - a first reflective layer (21) for reflecting electromagnetic radiation; and - an encapsulation layer sequence (20) formed with an electrically insulating material, comprising a first encapsulation layer (11) and a second encapsulation layer (12); and - at least one via (40) extending through the p-type region (3) and the active region (4) into the n-type region (2), wherein - the first reflective layer (21) is arranged on a bottom side of the p-type region (3); - the active region (4) is arranged on a side of the p-type region (3) facing away from the first reflective layer (21).- the n-type region (2) is arranged on a side of the active region (4) facing away from the p-type region (3), - the encapsulation layer sequence (20) partially covers the semiconductor body (10) on its outer surface, - the first encapsulation layer (11) and the second encapsulation layer (12) extend on the outer surface of the semiconductor body (10) from the active region (4) along the p-type region (3) to below the first mirror layer (21), wherein - the second encapsulation layer (12) is an ALD layer or consists of an ALD layer, - a third encapsulation layer (13) extends along the underside of the first mirror layer (21) facing away from the p-type region (3), wherein the third encapsulation layer (13) completely covers the first mirror layer (21), - the p-type region (3) and the first mirror layer (21) are partially covered on their side surfaces by a metallic encapsulation layer (42) are covered,wherein the encapsulation layer sequence (20) extends between the metallic encapsulation layer (42) and the side surfaces,- the via (40) comprises an n-contact material (41) via which the n-conducting region (2) can be electrically contacted,- a second mirror layer (22) is arranged on the underside of the n-contact material (41) facing away from the n-conducting region (2), wherein the encapsulation layer sequence (20) is arranged locally between the first mirror layer (21) and the second mirror layer (22), and- the encapsulation layer sequence (20) is locally directly adjacent to the n-contact material (41).
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Claims

Registration country: DERegistration number: 112014001679 Registration date: March 14, 2014 Publication date: December 24, 2015 Priority: DE 102013103079 26.03.2013 Priority: EP 2014055110 14.03.2014 Main class: H01L 33 / 40(2010.01,A) Subclass: H01L 33 / 00(2006.01,A) Subclass: H01L 33 / 44(2010.01,A) MCD main class: H01L 33 / 40(2010.01,A) MCD subclass: H01L 33 / 00(2010.01,A) MCD subclass: H01L 33 / 44(2010.01,A) CPC: H01L 33 / 46(2013.01) CPC: H01L 33 / 382(2013.01) CPC: H01L 33 / 405(2013.01) CPC: H01L 33 / 44(2013.01) CPC: H01L 33 / 54(2013.01) CPC: H01L 2924 / 0002(2013.01) CPC: H01L 2933 / 0025(2013.01) CPC: H01L 2933 / 005(2013.01) Inventor: Engl, Karl, Dr., 93080, Pentling, DE Inventor: Hartung, Georg, Dr., 87484, Nesselwang, DE Erfinder: Maute, Markus, Dr., 93087, Alteglofsheim, DE Anmelder: OSRAM Opto Semiconductors GmbH, 93055, Regensburg, DE DWPI 2010 © Thomson Reuters. All rights reserved. AN_WPI: 2014R71174 TI_WPI: Optoelectronic semiconductor chip, has encapsulating layer sequence extending on outer face of semiconductor body from active region along p-conducting region to below mirror layer and comprising encapsulating layer AB_WPI: NOVELTY: The chip has a semiconductor body (10) comprising an n-conducting region (2) and an active region (4) provided for generating electromagnetic radiation. An encapsulating layer sequence is made by an electrically insulating material, and a mirror layer is arranged on a lower side of a p-conducting region (3). The encapsulating layer sequence extends on an outer face of the semiconductor body from the active region along the p-conducting region to below the mirror layer. The encapsulating layer sequence comprises an encapsulating layer i.e. atom layer deposition (ALD) layer. DESCRIPTION: An INDEPENDENT CLAIM is also included for a method for manufacturing an optoelectronic semiconductor chip. USE: Optoelectronic semiconductor chip. ADVANTAGE: The encapsulating layer sequence extends on the outer face of the semiconductor body from the active region along the p- conducting region to below the mirror layer thus increasing the efficiency of the semiconductor body and service life of the semiconductor device. DESCRIPTION OF DRAWINGS: The drawing shows a sectional view of an optoelectronic semiconductor chip during manufacturing method. 1 := Substrate 2 := N-conducting region 3 := P-conducting region 4 := Active region 10 := Semiconductor body IW_WPI: SEMICONDUCTOR CHIP ENCAPSULATE LAYER SEQUENCE EXTEND OUTER FACE BODY ACTIVE REGION P CONDUCTING BELOW MIRROR COMPRISE DC_WPI: U11, U12 MC_WPI: U11C18B4, U11E02A, U12A01A2, U12A01A4 [DE]Optoelectronic semiconductor chip encapsulated with an ALD layer and corresponding manufacturing process