Semiconductor device

Abstract

Semiconductor device (10) comprising: an N-type drift layer (1); a P-type well layer (2) formed in a surface layer subregion of one side of an upper surface of the N-type drift layer (1); an N-type emitter layer (3) formed in a surface layer subregion of the P-type well layer (2); a gate electrode (5a, 5b) formed on one side of an upper surface of a semiconductor layer in which the N-type drift layer (1), the P-type well layer (2), and the N-type emitter layer (3) are formed; an N-type buffer layer (6) formed on one side of a lower surface of the N-type drift layer (1); a P-type collector layer (7) formed on one side of a lower surface of the N-type buffer layer (6);and a layer (8) of N++ type, which is partially formed in the buffer layer (6) of N type and has a defect concentration that is higher than a defect concentration of the buffer layer (6) of N type and equal to or higher than a defect concentration of the collector layer (7) of P type, wherein the layer (8) of N++ type is arranged such that it avoids a region immediately below the emitter layer (3) of N type, the collector layer (7) of P type is formed continuously on the side of the lower surface of the buffer layer (6) of N type, and the layer (8) of N++ type is formed on the collector layer (7) of P type.

Images