Semiconductor device

Abstract

Semiconductor device comprising: - a substrate (1) provided with a semiconductor element (4, 6), - a resin housing (7) arranged on and surrounding a periphery of the substrate (1), and - a wiring component (8, 13, 22, 27, 28, 30, 31) comprising: - an exposed portion (11, 16, 20, 25) adjacent to and exposed to the outside of a first fixing portion (9, 14, 18, 23) fixed in a wall surface of the resin housing (7), both adjacent to the periphery in a top view, and - a second fixing portion (10, 15, 19, 24) fixed in the wall surface of the resin housing (7) at a position adjacent to the periphery in a top view and different from the first fixing portion (9, 14, 18, 23) with respect to a The fixed sub-area extends from the first fixing sub-area (9, 14, 18, 23) into the resin housing (7), wherein: - the wiring component (8, 13, 22, 27, 28, 30,31) is bonded to a surface of the semiconductor element (4, 6) opposite the substrate (1) by a solder (5) in the resin housing (7) and has a plate shape with a length, a thickness and a width,- the wiring component (8, 13, 22, 27, 28, 30, 31) has a uniform thickness and is flat in the resin housing (7) and- the width of the second fixing part (10, 15, 19, 24) is narrower than the width of the exposed part (11, 16, 20, 25).,

Description

Technical field

[0001] The present invention relates to a semiconductor device and in particular to a semiconductor device used for an inverter for controlling a motor of an electric vehicle or a train or a converter for regeneration or the like. Background technology

[0002] A conventionally disclosed semiconductor device containing a wiring component integrally encapsulated in a resin housing has been described (see, for example, patent documents 1 and 2). The wiring component is bonded by solder to an electrode located on the upper surface of a semiconductor element, and a portion of the wiring component is exposed to the outside. In such a configuration, high accuracy in the vertical direction of the wiring component is required to improve the bonding condition of the solder between the wiring component and the semiconductor element. The vertical direction of the wiring component here refers to the direction of the distance between the wiring component and the semiconductor element. State-of-the-art documents, patent documents [Patent Document 1] WO2013 / 058038 [Patent document 2] Published Japanese patent application no. 2015-46416 Summary Problem to be solved by the invention

[0003] In the manufacturing process of a semiconductor device, a wiring component and a semiconductor element are bonded together with solder at a high temperature of approximately 200°C to 250°C. At this point, the resin package and the wiring component are also at a high temperature, and due to their different coefficients of linear expansion, a stress is generated between the resin package and the wiring component.

[0004] In patent documents 1 and 2, the wiring component is subjected to bending to reduce the aforementioned stress. However, the accuracy of the position in the vertical direction of the bent wiring component is not high; therefore, in some cases, bonding the wiring component to the semiconductor element with solder is not advantageous.

[0005] The present invention was made to solve such a problem, and one object of the present invention is to provide a semiconductor device capable of improving the accuracy of the position in the vertical direction of a wiring component. Means to solve the problem

[0006] A semiconductor device comprises a substrate provided with a semiconductor element, a resin housing arranged on a periphery of the substrate, and a wiring component having an exposed portion adjacent to and exposed to the outside of a first fixing portion fixed in a wall surface of the resin housing, and a second fixing portion fixed in the wall surface of the resin housing at a position different from the first fixing portion with respect to a portion extending from the first fixing portion into the resin housing, wherein the wiring component is bonded to a surface of the semiconductor element opposite the substrate by a solder in the resin housing and has a plate shape with a length, a thickness, and a width.wherein the wiring component has a uniform thickness and is flat in the resin housing, and the width of the second fixing sub-area is narrower than the width of the exposed sub-area. Effects of the invention

[0007] A semiconductor device according to the present invention comprises a substrate provided with a semiconductor element, a resin housing arranged on a periphery of the substrate, and a wiring component having an exposed portion adjacent to and exposed to the outside of a first fixing portion fixed in a wall surface of the resin housing, and a second fixing portion fixed in the wall surface of the resin housing at a position different from the first fixing portion with respect to a portion extending from the first fixing portion into the resin housing, wherein the wiring component is bonded to a surface of the semiconductor element opposite the substrate by a solder in the resin housing and has a plate shape with a length, a thickness, and a width.wherein the wiring component has a uniform thickness and is flat within the resin housing, and the width of the second fixing section is narrower than the width of the exposed section. Therefore, an improvement in the positional accuracy in the vertical direction of the wiring component is ensured.

[0008] The explicit purpose, feature, phase and advantage of the present invention are described in detail below with reference to the accompanying drawings. List of characters Fig. Figure 1 is a top view illustrating a configuration example of a semiconductor device according to embodiment 1 of the present invention. Fig. 2 is along a line A1-A2 in Fig. 1. Cross-sectional view taken. Fig. Figure 3 is a top view illustrating a configuration example of a semiconductor device according to embodiment 2 of the present invention. Fig. 4 is along a line B1-B2 in Fig. 3 cross-sectional views taken. Fig. Figure 5 is a top view illustrating a configuration example of a semiconductor device according to embodiment 3 of the present invention. Fig. 6 is along a line C1-C2 in Fig. 5 cross-sectional views taken. Fig. Figure 7 is a top view illustrating a configuration example of a semiconductor device according to embodiment 4 of the present invention. Fig. 8 is along a line D1-D2 in Fig. 7. Cross-sectional view taken. Fig. Figure 9 is a top view illustrating a configuration example of a semiconductor device according to embodiment 5 of the present invention. Fig. 10 is along a line E1-E2 in Fig. 9. Cross-sectional view taken. Fig. Figure 11 is a top view illustrating a configuration example of a semiconductor device according to a related technique. Fig. 12 is a cross-sectional view showing a view along a line F1-F2 in Fig. 11 cross-sections are illustrated. Fig. 13 is a cross-sectional view showing a view along a line F1-F2 in Fig. 11 cross-sections are illustrated. Fig. 14 is a cross-sectional view showing a view along a line F1-F2 in Fig. 11 cross-sections are illustrated. Fig. Figure 15 is a top view illustrating a configuration example of a semiconductor device according to a related technique. Fig. 16 is a cross-sectional view showing along a line G1-G2 in Fig. 15 cross-sections are illustrated. Fig. Figure 17 is a top view illustrating a configuration example of a semiconductor device according to a related technique. Fig. 18 is a cross-sectional view showing a view along a line H1-H2 in Fig. 17 taken cross-sections are illustrated. Fig. 19 is a cross-sectional view showing a line H1-H2 in Fig. 17 taken cross-sections are illustrated. Fig. Figure 20 is a top view illustrating a configuration example of a semiconductor device according to a related technique. Fig. 21 is a cross-sectional view showing along a line 11-12 in Fig. 20 cross-sections are illustrated. Description of embodiments

[0009] Embodiments of the present invention are described with reference to the drawings. <Verwandte Technik>

[0010] A related technique, relating to embodiments, is described.

[0011] Fig. Figure 11 is a top view illustrating a configuration example of a semiconductor device according to the related technique. Fig. 12 is a cross-sectional view showing a view along a line F1-F2 in Fig. Figure 11 illustrates the cross-section taken. Note that Fig. 11 and Fig. 12. Illustrate the condition before the resin is placed in the resin casing 7 is injected.

[0012] The in Fig. 11 and Fig. 12 illustrated semiconductor devices are shown with circuit structures 2 on a substrate 1 equipped. Semiconductor elements 4 and 6 are above a plumb line 3 on the circuit structures 2 bonded. On the back surface of the substrate 1 is a heat sink 12 arranged.

[0013] The resin casing 7 is on the periphery of the substrate 1 arranged. A wiring component 27 is in the resin casing 7 integrally cast in. The wiring component 27 is above a plumb line 5 to the substrate 1 opposite surface of the semiconductor elements 4 and 6 bonded, and one end of it is on the outside of the resin casing 4 exposed.

[0014] In the configuration of the in Fig. 11 and Fig. In the illustrated semiconductor device 12, the accuracy of the position varies in the vertical direction of the wiring component. 27 In the example of Fig. 12 is the position in the vertical direction of the wiring component. 27 suitable; therefore, the advantageous bonding state between the wiring component is 27 and the semiconductor elements 4 and 6 with the plumb line 5 manufactured. As in Fig. 13 and Fig. As illustrated in 14, however, the situation deteriorates when the position is in the vertical direction of the wiring component. 27 is not suitable, the bonding state between the wiring component 27 and the semiconductor elements 4 and 6 through the plumb line 5 .

[0015] Specifically, in the example of Fig. 13 a place where there is a gap between the wiring component 27 and the semiconductor element 4is large and the wiring component 27 and the semiconductor element 4 at such a point through the plumb line 5 cannot be bonded. Furthermore, in the example of Fig. 14 a place where there is a gap between the wiring component 27 and the semiconductor element 4 is small and at such a point the plumb line 5 becomes apparent when the wiring component 27 and the semiconductor element 4 be bonded.

[0016] Fig. Figure 15 is a top view illustrating a configuration example of a semiconductor device according to the related technique. Fig. 16 is a cross-sectional view showing along a line G1-G2 in Fig. The cross-section taken in Figure 15 illustrates this. Note that Fig. 15 and Fig. 16. Illustrate the condition before the resin is poured into the resin casing 7 is injected.

[0017] The in Fig. 15 and Fig. Figure 16 illustrates a semiconductor device with a circuit structure 29 on a substrate 1 The circuit structure is provided. 29 is from the circuit structures 2 isolated. Part of a wiring component. 28 extends towards the substrate 1 and is related to the circuit structure 29 in contact. Note that the circuit structure 29 a rise or a lead. The remaining configurations are the same as those in Fig. 11 and Fig. 12 illustrated semiconductor devices; therefore, their description is omitted here.

[0018] In the configuration of the in Fig. 15 and Fig. The semiconductor device shown in 16 can determine the position in the vertical direction of the wiring component. 28They can be controlled or monitored; however, a space is required to arrange the circuit structure. 29 and a space for isolation between the circuit structure 29 and the circuit structures 2 to provide. Consequently, the reduction of the in Fig. 15 and Fig. The semiconductor device shown in 16 is difficult to reach.

[0019] Fig. Figure 17 is a top view illustrating a configuration example of a semiconductor device according to the related technique. Fig. 18 is a cross-sectional view showing a view along a line H1-H2 in Fig. The cross-section taken in section 17 illustrates this. Note that Fig. 17 and Fig. 18. Illustrate the condition before the resin is poured into the resin casing 7 is injected.

[0020] In the Fig. 17 and Fig. Figure 18 illustrates a semiconductor device as one end of a wiring component. 30 from the inside of the wall surface of the resin housing 7 exposed to the outside, and the other end is inside the wall surface of the resin housing. 7 fixed. The remaining configurations are the same as those in Fig. 11 and Fig. 12 illustrated semiconductor devices; therefore, their description is omitted here.

[0021] In the configuration of the in Fig. 17 and Fig. The semiconductor device illustrated in 18 is located between the resin housing 7 and the wiring component 30 a voltage is generated when the wiring component 30 and the semiconductor elements 4 through the plumb line 5 bonding occurs at high temperatures. Consequently, as in Fig. Figure 19 illustrates the wiring component 30curved. If the wiring component 30 Because it is curved, the position varies in the vertical direction of the wiring component. 30 and can the wiring component 30 and the semiconductor elements 4 through the plumb line 5 not be bonded.

[0022] Fig. Figure 20 is a top view illustrating a configuration example of a semiconductor device according to the related technique. Fig. 21 is a cross-sectional view showing along a line 11-12 in Fig. The cross-section taken from 20 is illustrated. Note that Fig. 20 and Fig. 21 illustrate the condition before the resin is placed in the resin casing 7 is injected.

[0023] In the Fig. 20 and Fig. The semiconductor device illustrated in 21 is the wiring component. 31 in the resin casing 7curved. The remaining configurations are the same as those in Fig. 17 and Fig. 18 illustrated semiconductor devices; therefore, their description is omitted here.

[0024] In the configuration of the in Fig. 20 and Fig. The semiconductor device illustrated in 21 is located between the resin housing 7 and the wiring component 31 The generated voltage decreases when the wiring component 31 and the semiconductor elements 4 through the plumb line 5 bonding occurs at high temperatures. The accuracy of the position in the vertical direction of the bent wiring component is crucial. 31 However, it is not high; therefore, bonding of the wiring component is sometimes necessary. 31 to the semiconductor elements 4 with the plumb line 5 The design is not advantageous. Furthermore, bending the wiring component is problematic. 31Costs are involved.

[0025] As described above, it cannot be said that the semiconductor devices according to the related techniques described above improve the accuracy of the position in the vertical direction of the wiring component. Embodiments of the present invention were created to solve the problems of the semiconductor devices according to the related techniques and are described in detail below. <Ausführungsform 1 >

[0026] Fig. Figure 1 is a top view illustrating a configuration example of a semiconductor device according to embodiment 1. Fig. 2 is along a line A1-A2 in Fig. 1. Cross-sectional view taken. Note that Fig. 1 and Fig. 2. Illustrate the state before resin is added to the resin housing 7 is injected.

[0027] As in Fig. 1 and Fig. As illustrated in 2, the semiconductor device according to embodiment 1 is characterized by a second fixing sub-area. 10 a wiring component 8 marked. The remaining configurations are the same as those in Fig. 11 and Fig. 12 illustrated semiconductor devices according to the related technology; therefore, their description is omitted here.

[0028] The wiring component 8 shows an exposed section 11 , which forms a first fixing sub-area 9 , which is located in the wall surface of the resin housing 7 is fixed, adjacent and exposed to the outside, and a second fixing sub-area 10 on, which is located in the wall surface of the resin housing 7 on one of the first fixing sub-area 9 different positions are fixed in relation to a sub-area that extends from the first fixing sub-area 9into the resin housing 7 extends, in which the wiring component 8 in the resin casing 7 through the plumb line 5 to a substrate 1 opposite surface of the semiconductor elements 4 and 6 It is bonded and has a plate shape with a length, a thickness, and a width. Furthermore, the wiring component has... 8 a uniform thickness and is in the resin housing 7 flat and is not subject to bending. Furthermore, the second fixing sub-area is 10 of the wiring component 8 It is formed by punching in such a way that it has a narrow width. Therefore, the width of the second fixing sub-area is 10 narrower than the width of the exposed section 11 .

[0029] As described above, in the manufacturing process of a semiconductor device, a wiring component and a semiconductor element are bonded together with solder at a high temperature of approximately 200°C to 250°C. At this point, the resin housing and the wiring component are also at a high temperature, and due to their different coefficients of linear expansion, a stress is generated between the resin housing and the wiring component. Meanwhile, in the semiconductor device according to the embodiment... 1 the width of the second fixing sub-area 10 of the wiring component 8 narrowed to facilitate deformation; therefore, the second fixing sub-area reduces 10 the voltage that is generated when it is at a high temperature.

[0030] As described above, according to embodiment 1, the second fixing sub-area is reduced 10of the wiring component 8 The voltage that is generated when it is at a high temperature; therefore, the position shifts in the vertical direction of the wiring component. 8 No. Therefore, the accuracy of the position in the vertical direction of the wiring component is not affected. 8 Improved. Furthermore, the accuracy of the position in the vertical direction of the wiring component is improved. 8 improved; therefore, an advantageous bonding state is achieved between the wiring component 8 and the semiconductor elements 4 and 6 through the plumb line 5 created. The wiring component 8 Furthermore, it is not subject to any bending, and the cost of the wiring component 8 can be suppressed. <Ausführungsform 2>

[0031] Fig. Figure 3 is a top view illustrating a configuration example of a semiconductor device according to embodiment 2. Fig. 4 is along a line B1-B2 in Fig. 3. Cross-sectional view taken. Note that Fig. 3 and Fig. 4. Illustrate the state before resin is placed in a resin casing 7 is injected.

[0032] As in Fig. 3 and Fig. As illustrated in 4, the semiconductor device according to embodiment 2 is characterized by a second fixing sub-area. 15 a wiring component 13 marked. A first fixing sub-area. 14 of the wiring component 13 corresponds to the first fixing sub-area 9 the Fig. 1 and Fig. 2, and an exposed section 16 of the wiring component 13 corresponds to the exposed section 11 the Fig. 1 and Fig. 2. The remaining configurations are the same as those in Fig. 1 and Fig. 2 illustrated semiconductor device according to embodiment 1; therefore, its detailed description is omitted here.

[0033] In the wiring component 13 the second fixing sub-area 15 In top view, it has a curved shape. Specifically, the second fixing section has a curved shape. 15 a crank shape. In the example of the Fig. 3 and Fig. 4 is, although a case is illustrated in which the fixing sub-area 15 the present invention does not limit itself to a crank shape. For example, the second fixing sub-section can 15 have a curved shape.

[0034] As described above, according to embodiment 2, by adding the second fixing sub-area 15 of the wiring component 13when formed into a curved shape, the effect of a reduction in voltage is increased more than in the semiconductor device according to embodiment 1. <Ausführungsform 3>

[0035] Fig. Figure 5 is a top view illustrating a configuration example of a semiconductor device according to embodiment 3. Fig. 6 is along a line C1-C2 in Fig. 5. Cross-sectional view taken. Note that Fig. 5 and Fig. 6. Illustrate the state before resin is placed in a resin casing 7 is injected.

[0036] As in Fig. 5 and Fig. As illustrated in 6, the semiconductor device according to embodiment 3 is characterized by a second fixing sub-area. 19 a wiring component 17 marked. A first fixing sub-area. 18 of the wiring component 17 corresponds to the first fixing sub-area9 the Fig. 1 and Fig. 2, and an exposed section 20 of the wiring component 17 corresponds to the exposed section 11 the Fig. 1 and Fig. 2. The remaining configurations are the same as those in Fig. 1 and Fig. 2 illustrated semiconductor device according to embodiment 1; therefore, its detailed description is omitted here.

[0037] The second fixing sub-area 19 of the wiring component 17 is fixed in the wall surface, which is the wall surface of the resin housing 7 , where the first fixing sub-area 18 is fixed, is adjacent.

[0038] As described above, according to embodiment 3, the second fixing sub-area is reduced 19The voltage that is generated when it is at a high temperature; therefore, the position shifts in the vertical direction of the wiring component. 17 No. Therefore, the accuracy of the position in the vertical direction of the wiring component is not affected. 17 improved. <Ausführungsform 4>

[0039] Fig. Figure 7 is a top view illustrating a configuration example of a semiconductor device according to embodiment 4. Fig. 8 is along a line D1-D2 in Fig. 7. Cross-sectional view taken. Note that Fig. 7 and Fig. 8. Illustrate the state before resin is placed in a resin casing 7 is injected.

[0040] As in Fig. 7 and Fig. As illustrated in figure 8, the semiconductor device according to embodiment 4 is enclosed in a resin housing. 7 and a wiring component 22marked. The remaining configurations are the same as those in Fig. 11 and Fig. 12 illustrated semiconductor devices according to the related technology; therefore, their description is omitted here.

[0041] The resin casing 7 is on the periphery of a substrate 1 arranged and has a protrusion 21 on, in which part of it protrudes inwards.

[0042] The wiring component 22 shows an exposed section 25 , which forms a first fixing sub-area 23 , which is located in the wall surface of the resin housing 7 is fixed, adjacent and exposed to the outside, and a second fixing sub-area 24 up, who is on the lead 21 at one of a first fixing sub-area 23 is fixed in different positions, in which the wiring component 22 through the plumb line 5to the substrate 1 opposite surface of the semiconductor elements 4 and 6 It is bonded and has a plate shape with a length, a thickness, and a width. Furthermore, the wiring component has 22 a uniform thickness and is in the resin housing 7 flat and is not subject to any bending.

[0043] As described above, according to the embodiment, the reduction is reduced 4 the lead 21 of the resin casing 7 The voltage that is generated when it is at a high temperature; therefore, the position shifts in the vertical direction of the wiring component. 22 No. Therefore, the accuracy of the position in the vertical direction of the wiring component is not affected. 22 Improved. Furthermore, the accuracy of the position in the vertical direction of the wiring component is improved. 22improved; therefore, an advantageous bonding state is achieved between the wiring component 22 and the semiconductor elements 4 and 6 through the plumb line 5 created. Furthermore, the wiring component 22 Not subject to any bending, the costs of the wiring component can be reduced. 8 The processing of the wiring component will be suppressed. 22 relieved. <Ausführungsform 5>

[0044] Fig. Figure 9 is a top view illustrating a configuration example of a semiconductor device according to embodiment 5. Fig. 10 is along a line E1-E2 in Fig. 9. Cross-sectional view taken. Note that Fig. 9 and Fig. 10. Illustrate the state before resin is placed in a resin casing 7 is injected.

[0045] As in Fig. 9 and Fig. As illustrated in 10, the semiconductor device according to embodiment 5 is enclosed in a resin housing. 7 marked. The remaining configurations are the same as those in Fig. 7 and Fig. 8 illustrated semiconductor device according to embodiment 4; therefore, its detailed description is omitted here.

[0046] The lead 26 of the resin casing 7 It has a curved shape when viewed from above. Specifically, the protrusion has 26 a crank shape. In the example of the Fig. 9 and Fig. 10 is, although a case is illustrated in which the advantage 26 the present invention does not limit itself to a crank shape. For example, the projection 26 have a curved shape.

[0047] As described above, according to embodiment 5, by making the projection 26 of the resin casing 7when formed into a curved shape, the effect of a reduction in voltage is increased more than in the semiconductor device according to embodiment 4.

[0048] It should be particularly noted that embodiments of the present invention can be combined in any way and can be suitably modified or omitted without deviating from the scope of the invention.

[0049] Although the invention has been described in detail, the preceding description is illustrative in all aspects and not limiting. It is therefore understood that numerous other modifications and variations can be conceived without deviating from the scope of the invention. Reference symbol list 1 substrate, 2 Circuit structure, 3 Lot, 4 Semiconductor element, 5 Lot, 6 Semiconductor element, 7 resin housings, 8 Wiring component, 9 first fixing sub-area, 10 second fixing sub-area, 11 exposed section, 12 heat sinks, 13 Wiring component, 14 first fixing sub-area, 15 second fixing sub-area, 16 exposed sections, 17 Wiring component, 18 first fixing sub-area, 19 second fixing sub-area, 20 exposed sections, 21 lead, 22 Wiring component, 23 first fixing sub-area, 24 second fixing sub-area, 25 exposed section, 26 lead, 27, 28 Wiring component, 29 Circuit structure, 30, 31 Wiring component QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] WO 2013058038

[0002] JP 2015046416 A

[0002]

Claims

[1] Semiconductor device comprising: a substrate (1) provided with a semiconductor element (4), a resin housing (7) arranged on a periphery of the substrate (1), and a wiring component (8) comprising an exposed portion (11) adjacent to and exposed to the outside of a first fixing portion (9) fixed in a wall surface of the resin housing (7), and a second fixing portion (10) fixed in the wall surface of the resin housing (7) at a position different from the first fixing portion (9) with respect to a portion extending from the first fixing portion (9) into the resin housing (7), wherein the wiring component (8) is bonded to a surface of the semiconductor element (4) opposite the substrate (1) by a solder (5) in the resin housing (7) and has a plate shape with a length, a thickness and a width, wherein the wiring component (8) has a uniform thickness and is flat in the resin housing (7) and the width of the second fixing sub-area (10) is narrower than the width of the exposed sub-area (11). [2] Semiconductor device according to claim 1, wherein the second fixing part (10) has a curved shape in top view. [3] Semiconductor device according to claim 1, wherein the second fixing part (10) is fixed to the wall surface adjacent to the wall surface of the resin housing (7) to which the first fixing part (9) is fixed. [4] Semiconductor device comprising: a substrate (1) provided with a semiconductor element (4), a resin housing (7) arranged on a periphery of the substrate (1) and having a projection (21) in which part of it protrudes inwards, and a wiring component (22) having an exposed portion (25) adjacent to and exposed to the outside of a first fixing portion (23) fixed in a wall surface of the resin housing (7), and a second fixing portion (24) fixed to the projection (21) at a position different from the first fixing portion (23), wherein the wiring component (22) is bonded to a surface of the semiconductor element (4) opposite the substrate (1) by a solder (5) and has a plate shape with a length, a thickness and a width, wherein the wiring component (22) has a uniform thickness and is flat in the resin housing (7). [5] Semiconductor device according to claim 4, wherein the projection (21) has a curved shape in top view.

Images