METHOD FOR PRODUCING A SEMICONDUCER UNIT

Abstract

A method for manufacturing a semiconductor device, the method comprising: - manufacturing a semiconductor substrate (1); and - forming an electrode (10) having a plurality of layers laminated onto a main surface (1B) of the semiconductor substrate (1), - the forming of the electrode (10) comprising: - forming a first metal layer (12) in contact with the main surface (1B) of the semiconductor substrate (1), wherein the first metal layer (12) contains Al; - forming an oxide layer (13) on a surface of the first metal layer (12), wherein the oxide layer (13) contains a metal as well as oxygen; and - forming a second metal layer (14) on a surface of the oxide layer (13), - the forming of the oxide layer (13) comprising: - oxidizing the surface of the first metal layer (12) to form a metal oxide layer (13A);and- etching a surface of the metal oxide layer (13A), and- wherein the oxygen concentrations in the oxide layer (13) are higher than or equal to 8.0 x 1021 / cm3 and lower than or equal to 4.0 x 1022 / cm3, and- wherein the etching of the surface of the metal oxide layer (13A) comprises etching the surface of the metal oxide layer (13A) using a hydrogen-containing plasma or a hydrogen-containing acid solution.;

Description

[0001] The present invention relates to a semiconductor unit and to a method for manufacturing such a semiconductor unit. STATE OF THE ART

[0002] A power semiconductor module comprises an insulated-gate bipolar transistor (IGBT) that controls the switching of a high current, as well as a diode that blocks reverse current generated during switching. Power semiconductor modules are used in various fields that Electrical household appliances and vehicle equipment are included, used as main components of power converters.

[0003] A semiconductor unit inside the power semiconductor module has an electrode or wiring that includes a plurality of exhibiting metal layers on the surface of a semiconductor substrate (see, for example, patent documents 1 to 4). The patent document 1 The described semiconductor unit has a back electrode on a back surface of a semiconductor substrate, which is obtained, by successively laminating an AlSi layer, a polysilicon layer, a Ti layer, a Ni layer, and an Au layer. The rear electrode is attached to an external component, such as a separate circuit board. Thus, the semiconductor unit is connected to electrically connected to the external component. State-of-the-art documents Patent documents Patent document 1: WO2010 / 109 572 A1 Patent document 2: Japanese patent application disclosure JP 2000-183 063 A 3: Japanese patent application disclosure JP 2017-135 283 A Patent document 4: Japanese patent application disclosure JP 2013-214 732 A SHORT DESCRIPTION Problem to be solved with the invention

[0004] When an electrode, which, as described above, has a plurality of metal layers, is placed on a surface of a The metal layers are formed in a semiconductor substrate contained within a semiconductor unit during the layer formation process. sometimes exposed to an atmosphere. If the metal layers are exposed to different atmospheres, for example depending on the type of metal. Layer formation devices are formed or formed using various layer formation processes, causing the removal of the Semiconductor substrates from the layering devices sometimes require that the metal layers are exposed to an atmosphere.

[0005] The environment in which the layer formation processes are carried out, for example the atmosphere in a cleanroom, exhibits Components of organic substances. Even if the exposure time to an atmosphere is short, during which the metal layers of the When exposed to the atmosphere, the electrode that is formed becomes contaminated by the organic substances in the cleanroom.

[0006] The present invention was designed to solve such a problem and has the objective of providing a semiconductor unit, where organic contamination of the electrode can be prevented, which has a plurality of laminated metal layers. Means to solve the problem

[0007] A semiconductor unit according to the present invention comprises: a semiconductor substrate; and an electrode comprising a plurality The electrode consists of layers laminated onto a primary surface of the semiconductor substrate. It comprises the following: a first metal layer. in contact with the main surface of the semiconductor substrate, wherein the first metal layer contains Al; an oxide layer formed on a surface of the first metal layer, the oxide layer containing a metal as well as oxygen; and a second metal layer formed on a surface the oxide layer is formed. Oxygen concentrations in the oxide layer are higher than or equal to 8.0 × 10²¹ / cm³ and lower than or equal to 4.0 × 1022 / cm3. Effects of the invention

[0008] The present invention can provide a semiconductor unit in which organic contamination of an electrode is prevented, which has multiple laminated metal layers.

[0009] The objectives, features, aspects and advantages of the present invention will be explained in detail below. The attached drawings make this even clearer. List of characters

[0010] In the figures show: Fig. Fig. 1 a cross-sectional view showing the structure of a semiconductor unit according to embodiment 1; Fig. 2 a cross-sectional view showing a Figure 1 shows the laminated structure of a collector electrode according to embodiment 1; Figure 3 shows a flowchart illustrating a method for manufacturing the Figure 1 shows a semiconductor unit according to embodiment 1; Figure 4 shows a structure of a semiconductor substrate before the formation of the collector electrode; Figure 5 the semiconductor substrate on which an adhesion layer is formed; Fig. 6 the semiconductor substrate on which a metal oxide layer is formed; Fig. 7 shows a relationship between the time elapsed after exposure to an atmosphere and the thickness of the metal oxide layer; Fig. 8 the semiconductor substrate over which an oxide layer has formed; Fig. 9 Carbon concentrations in the vicinity of a boundary between the adhesion layer and a barrier layer; Fig. 10 Oxygen concentrations in the vicinity of the boundary between the adhesion layer and of the barrier layer; Fig. 11 Hydrogen concentrations in the vicinity of the boundary between the adhesion layer and the barrier layer; Fig. 12 is a cross-sectional view showing a laminated structure of a collector electrode according to the first comparative example; Fig. 13 is a Cross-sectional view showing a structure of a semiconductor unit according to embodiment 2; Fig. 14 a cross-sectional view showing a laminated The structure of a collector electrode according to embodiment 2 is shown. DESCRIPTION OF EXECUTION FORMS

[0011] With reference to the drawings, embodiments are described. In the drawings, the The scale of contraction of each component contained in a semiconductor unit may differ from that of an actual semiconductor unit. Design 1

[0012] Fig. 1 is a cross-sectional view showing the structure of a semiconductor unit according to embodiment 1. In the semiconductor unit This is, for example, a power semiconductor unit. The semiconductor unit according to embodiment 1 is a Bipolar transistor with insulated gate (IGBT). The semiconductor unit is not limited to the IGBT; it can also be, for example, a It could be a metal oxide semiconductor field-effect transistor (MOSFET) or a diode.

[0013] The IGBT has a semiconductor substrate 1. The semiconductor substrate 1 contains dopants in low concentration and has a Conductivity of the n-type. The semiconductor substrate 1 contains, for example, a semiconductor with a large band gap as one material, such as... SiC or GaN.

[0014] The surface structure of the IGBT is formed on a surface 1A of the semiconductor substrate 1. In the surface 1A of the Semiconductor substrate 1 is formed with a plurality of trenches 3a with openings. A trench-gate 3 is embedded in each of the trenches 3a, at which is a gate electrode. A gate insulating layer 2, which surrounds each of the trench gates 3, insulates the trench gate 3 from the Semiconductor substrate 1. Furthermore, a base layer 4, a p-type defect layer, is located between the adjacent gate insulating layers 2. trained.

[0015] An emitter layer 5, which is an n-type defect layer with a high concentration, is considered a region of a The surface layer of the base layer 4 is formed, that is, as a region of a surface layer of the semiconductor substrate 1. The emitter layer 5 is in contact with the gate insulating layers 2. Furthermore, the emitter layer 5 is located on its underside and on a side that faces that opposite, which is in contact with the gate insulating layer 2, in contact with the base layer 4.

[0016] The base layer 4 and the emitter layer 5 are connected to an emitter electrode 6 on the surface 1A of the semiconductor substrate 1. An intermediate insulating layer 7 is formed between the emitter electrode 6 and the trench gates 3. The intermediate insulating layer 7 insulates the Emitter electrode 6 from the trench gates 3. The trench gates 3 are connected to a (not shown) gate electrode.

[0017] A collector layer 9 is formed on a rear surface 1B of the semiconductor substrate 1. A buffer layer 8 is formed with respect to A position of the back surface 1B of the semiconductor substrate 1 is formed deeper than the collector layer 9. The buffer layer 8 is located in contact with collector layer 9 .

[0018] A collector electrode 10 is in contact with the collector layer 9 on the rear surface 1B of the semiconductor substrate 1 . In particular, the buffer layer 8, which is an n-type defect layer, and the collector layer 9, which is a The defect layer is of the p-type, and the collector electrode 10 is arranged in this order.

[0019] Fig. 2 is a cross-sectional view showing a laminated structure of the collector electrode 10 according to embodiment 1.

[0020] The collector electrode 10 is bonded to a conductive circuit board 50 by a metal layer 11 with a low melting point. Metal layer 11 with a low melting point is prepared by a thermal treatment process for the attachment of the collector electrode 10. The circuit board 50 was melted and attached. The metal layer 11, which has a low melting point, contains, for example, solder.

[0021] The collector electrode 10 has a plurality of layers laminated onto the back surface 1B of the semiconductor substrate 1 The collector electrode 10 has the following: a first metal layer in contact with the rear surface 1B of the semiconductor substrate. 1, an oxide layer 13, which is formed on the surface of the first metal layer, and a second metal layer, which is formed on the surface of the oxide layer 13 is formed. In embodiment 1, the first metal layer corresponds to an adhesion layer 12, and the second metal layer corresponds to a barrier layer 14 .

[0022] The collector electrode 10 according to embodiment 1 further comprises an electrode layer 15 on the surface of the barrier layer 14 as well as an affinity layer 16 on the surface of the electrode layer 15.

[0023] The adhesion layer 12 is a metal layer which contains Al as a main component, which has good adhesion to a semiconductor. The adhesion layer 12 according to embodiment 1 is an A1 alloy, which is formed by adding Si is produced from Al. The concentration of added Si is approximately 1 wt.% to allow diffusion of Si atoms into the adhesion layer 12. to prevent this. The adhesion layer 12 preferably has a thickness of 700 nm to 1000 nm. The adhesion layer 12 improves the adhesion between the collector layer 9, which is a semiconductor, and the collector electrode 10, which is made of metals.

[0024] The oxide layer 13 contains a metal and oxygen. The oxide layer 13 according to embodiment 1 contains an aluminum oxide. The oxide layer 13 It preferably has a thickness of several nm to 7 nm. The oxide layer 13 prevents contamination with carbon, while an increase the electrical resistance of the collector electrode 10 is prevented.

[0025] The barrier layer 14 contains a metal with a high melting point, for example, Ti. The barrier layer 14 preferably has a The barrier layer 14 has a thickness of 80 nm to 140 nm. Its function is to separate the electrode layer 15 from the adhesion layer. 12 to separate. If the barrier layer 14 is missing, contact of the molten metal of the metal layer 11 with a low temperature causes Melting point with the collector electrode 10 over a long period of time, that a part of the affinity layer 16, the electrode layer 15 or the adhesion layer 12 melts into the molten metal.

[0026] Contact of the molten metal with the collector layer 9 creates cavities, so that the electrical properties or the Reliability is impaired. The barrier layer 14 prevents erosion of the metal layer 11, which has a low melting point and reduces the formation of cavities during the thermal treatment process for attaching the collector electrode 10 to the circuit board 50. Furthermore, the barrier layer 14 improves the adhesion to the adhesion layer 12.

[0027] The electrode layer 15 contains a metal with low resistance. The electrode layer 15 contains, for example, nickel or a Nickel alloy. The electrode layer 15 improves the adhesion between the barrier layer 14 and the affinity layer 16, which is located above and below. are arranged in electrode layer 15.

[0028] The affinity layer 16 is arranged on the surface of the collector electrode 10. The affinity layer 16 contains gold, which has a high It exhibits an affinity for a metal with a low melting point. The affinity layer 16 improves the adhesion between the collector electrode and the electrode. 10 and the metal layer 11 with a low melting point.

[0029] Fig. 3 is a flowchart illustrating a method for manufacturing the semiconductor unit according to embodiment 1.

[0030] In step S10, the semiconductor substrate 1 is produced. Fig. 4 shows a structure of the semiconductor substrate 1 produced in step S10. The semiconductor substrate 1 produced here is in a state in which the collector layer 9 of the IGBT is exposed and the collector electrode 10 has not yet been formed. Many surface structures of the IGBT are formed on the surface 1A of the semiconductor substrate 1.

[0031] In step S20, the first metal layer is formed in contact with the main surface of the semiconductor substrate 1. Here, the adhesion layer 12 is formed. formed in contact with the surface of the collector layer 9, that is, with the rear surface 1B of the semiconductor substrate 1. Fig. 5 shows The semiconductor substrate 1 on which the adhesion layer 12 is formed is represented.

[0032] The adhesion layer 12 is formed, for example, by sputtering on the rear surface 1B of the material placed in a vacuum chamber. Semiconductor substrate formed. The adhesion layer 12 is an Al alloy containing Al and Si.

[0033] In step S30, the surface of the first metal layer is oxidized to form a metal oxide layer. In this process, the surface of the The adhesion layer 12 oxidizes to form a metal oxide layer. Fig. 6 shows the semiconductor substrate 1 over which a metal oxide layer 13A is deposited. is formed. The metal oxide layer 13A is formed, for example, by heating the semiconductor substrate 1 using an oven system, etc. formed, into which oxygen has been introduced.

[0034] Alternatively, the metal oxide layer 13A is formed by using the semiconductor substrate 1 removed from the vacuum chamber, for example, a is exposed to the atmosphere. The metal oxide layer 13A is a native oxide layer. The metal oxide layer 13A according to Embodiment 1 is formed by the action of an atmosphere.

[0035] Fig. 7 shows a relationship between the time elapsed after exposure to the atmosphere and the thickness of the metal oxide layer. 13A. The thickness of the metal oxide layer 13A was measured using a spectroscopic ellipsometer. The atmosphere The exposed metal oxide layer 13A showed a thickness of 7 nm or greater after five hours, and a thickness of approximately 7.3 nm after 24 hours. nm and after 120 hours and 240 hours a thickness of about 7.5 nm.

[0036] The oxidation of the adhesion layer 12 is almost saturated in 120 hours after exposure to the atmosphere. In this way, with After an exposure time of five hours in an atmosphere or a longer exposure time, the metal oxide layer 13A with a thickness of 7 nm or of a greater thickness. The metal oxide layer 13A, which is formed by oxidizing the Al-containing adhesion layer 12, contains as One main component is an Al oxide containing Al and oxygen.

[0037] In step S40, an area of ​​the metal oxide layer 13A is etched to form the oxide layer 13. Fig. 8 shows the semiconductor substrate 1, above which the oxide layer 13 is formed. The oxide layer 13 is formed, for example, by a wet treatment in which the semiconductor substrate 1 is in is immersed in an acidic chemical solution, or etched by a dry treatment in which the semiconductor substrate is exposed to ions or a plasma is exposed. The acidic chemical solution used in the wet treatment is, for example, hydrofluoric acid.

[0038] The plasma used in the dry treatment contains, for example, hydrogen. The metal oxide layer 13A according to embodiment 1 is etched using a plasma containing hydrogen and argon. The oxide layer 13 has a thickness sufficient to prevent the alloying reaction of Al and Ti at a temperature of thermal treatment is sufficient, which is used when the collector- Electrode 10 is attached to the circuit board 50 through the metal layer 11 with a low melting point.

[0039] The temperature of the thermal treatment is, for example, approximately 300 °C to 500 °C, and the oxide layer 13 preferably has a Thicknesses of several nm up to 7 nm. Thus, by etching at least approximately a fraction of a nanometer of the material formed in step S30, it is possible to remove the material. Metal oxide layer 13A the oxide layer 13 is formed, the thickness of which lies in the range mentioned above.

[0040] In step S50, the second metal layer is formed on the surface of the oxide layer 13. In embodiment 1, the following are The barrier layer 14, the electrode layer 15, and the affinity layer 16 are formed on the surface of the oxide layer 13. Immediately After the formation of the oxide layer 13, the semiconductor substrate 1 is transferred to another vacuum chamber.

[0041] The barrier layer 14 is formed in the vacuum chamber by sputtering on the surface of the oxide layer 13. This involves Barrier layer 14 consists of a titanium thin film. The titanium thin film is produced, for example, by sputtering a titanium target with a sputtering gas. The layer containing Argas is formed. Furthermore, the electrode layer 15 and the affinity layer 16 are formed by sputtering or by vapor deposition. educated.

[0042] By the steps mentioned above, the IGBT is completed, which places the collector electrode 10 on the rear surface 1B of the The semiconductor substrate 1 is present. The IGBT is attached to the circuit board 50 by the metal layer 11, which has a low melting point, so that thereby producing the structure shown in Fig. 2.

[0043] Figures 9 to 11 show the results of secondary ion mass spectrometry (SIMS)- Analysis of the area around the boundary between the adhesion layer 12 and the barrier layer 14 in the collector electrode 10 is shown in Fig. 9. Figure 10 shows carbon concentrations. Figure 10 shows oxygen concentrations. Figure 11 shows hydrogen concentrations. Each of the drawings shows The three results of the first and second comparison examples, as well as the example, are presented.

[0044] Fig. 12 is a cross-sectional view showing a laminated structure of a collector electrode 110 according to the first comparative example. The semiconductor unit according to the first comparative example differs from the semiconductor unit according to embodiment 1 with respect to the structure from an adhesion layer 112 to a barrier layer 114 and with regard to the processes for the formation of these layers. Barrier layer 114, according to the first comparative example, was formed within several hours after the formation of the adhesion layer 12. Then the surface of the adhesion layer 112 was not etched.

[0045] The semiconductor unit according to the second comparative example in Figs. 9 to 11 differs from the semiconductor unit according to Embodiment 1 with regard to the structure from the adhesion layer to the barrier layer and with regard to the processes for formation of these layers. The barrier layer formed two weeks after the formation of the adhesion layer. Then the layer on the surface of the Adhesive layer formed metal oxide layer not etched.

[0046] The semiconductor unit according to the example in Figs. 9 to 11 was manufactured according to the manufacturing process shown in Fig. 3. manufactured. The barrier layer 14 was formed two weeks after the formation of the adhesion layer 12. Then the one on the surface of the The adhesion layer 12 formed a metal oxide layer 13A and was etched. The barrier layer 14 was formed immediately afterwards.

[0047] In each of the first and second comparative examples, as well as the example, the adhesion layer contains Al, and the barrier layer contains contains Ti. Each of the collector electrodes 10 described in the first and second comparative examples as well as in the example suffices for a specified value of electrical resistance required for power semiconductor units.

[0048] Furthermore, based on the secondary ion intensity data of A1 and Ti (not shown), it was determined that the depth in a region from 130 nm to 230 nm in Figures 9 to 11 coincides with the boundary between the adhesion layer and the barrier layer. Thus, it exists the oxide layer 13 of the semiconductor unit according to embodiment 1 at a depth in the range of 130 nm to 230 nm.

[0049] As shown in Fig. 9, the carbon concentrations in each of the first and second comparison examples as well as the For example, a peak appears at a depth in the range of 150 nm to 180 nm. The peak values ​​of the carbon concentrations are consistently higher in the Order: second comparative example, example and first comparative example. In particular, the peak value of the carbon concentrations at The second comparative example is the highest.

[0050] This suggests an increase in the extent of organic contamination, since the time elapsed since the formation of the The adhesion layer until the barrier layer forms, i.e., the exposure time to one atmosphere, is two weeks, whereby it is which is the longest of the three. Furthermore, the time elapsed from the formation of the adhesion layer 12 to the formation of the Barrier layer 14 in this example, similar to the second comparison example, also lasts two weeks.

[0051] However, the peak value of the carbon concentrations in the example is lower than that of the second comparison example and is thus as high as that of the first comparison example. This is because the etching of the surface of the adhesion layer 12 after the formation of the The adhesion layer 12 reduces the organic substances adhering to its surface.

[0052] As shown in Fig. 10, the oxygen concentrations in each of the first and second comparison examples as well as the For example, a peak occurs at a depth in the range of 150 nm to 180 nm. The peak values ​​of the oxygen concentrations are consistently higher at this depth. Order: Example, second comparative example, and first comparative example. In particular, the peak value of the oxygen concentrations at the Example of the highest. The elapsed time from the formation of the adhesion layer to the formation of the barrier layer is, in the first and the The second comparison example differs. The elapsed time in the first comparison example is several hours, while the elapsed time in the second example is several hours. In the second comparison example, the timeframe is two weeks.

[0053] Thus, the elapsed time in the second comparative example is longer than that in the first comparative example. Since the natural Since oxidation was facilitated more in the second comparison example than in the first, the peak value of the Oxygen concentrations in the second comparison example are higher than in the first. Although the etching of the surface The thickness of the metal oxide layer 13A is reduced after the formation of the adhesion layer 12, increasing the The etching process created a rough structure on the surface, thus facilitating oxidation.

[0054] Furthermore, etching the organic substances adhering to the surface makes the surface of the adhesion layer 12 sensitive compared to oxidation. This resulted in a facilitation of oxidation, and the peak value of the oxygen concentrations at the Example increased. The peak oxygen concentration in the example at a depth in the range of 150 nm to 200 nm is higher than the peaks at the first and the second comparative example.

[0055] Thus, after etching the metal oxide layer 13A, the oxide layer 13 exists at a depth in the range of 150 nm to 200 nm. Oxygen concentrations were detected at depths in the range of 150 nm to 200 nm based on the SIMS principle, although the The thickness of the oxide layer 13 is equal to 7 nm or less.

[0056] As shown in Fig. 11, the hydrogen concentrations in the first and second comparative examples decrease from the The barrier layer slopes down towards the adhesion layer. In contrast, the hydrogen concentrations in this example show a peak near 170 nm. Furthermore, the peak value of the hydrogen concentrations in this example is higher than the peaks in the first and second comparison examples. As described above, the metal oxide layer 13A according to embodiment 1 is formed using a hydrogen-containing Plasma etching was performed as a dry treatment. Therefore, the hydrogen concentrations in this example are higher than in the first and second examples. Comparative example.

[0057] As described above, the oxide layer 13 is a thin film with a thickness of 7 nm or less, and it It has a large surface area to volume ratio. Therefore, the oxide layer 13, which is a thin film, is sensitive. compared to the effect of a termination structure at the surface. The hydrogen concentrations in this example are higher than those in the The first and second comparative examples are higher than the oxygen concentrations.

[0058] Since the surface of a metal oxide is closed by a bridging oxygen (O) or a hydroxyl group (OH) or When the process is terminated, the termination by the hydroxyl group (OH) on the surface of the oxide layer 13 is dominant, the hydrogen concentrations of which are higher. Deformation at the OH-terminated surface is less than at the O-terminated surface. Thus, the values ​​in the The oxide layer 13 according to embodiment 1 accumulated stresses lower than those in the first and second comparative examples.

[0059] Next, a preferred range of oxygen concentrations in the oxide layer 13 is described. As described above, The metal oxide layer 13A formed on the surface of the adhesion layer 12 is treated by a wet treatment or a dry treatment etched to form oxide layer 13. If the etching time is longer, the layer arranged as a lower layer of the metal oxide layer 13A is formed. The adhesion layer 12 is damaged. Therefore, the oxygen concentrations in the oxide layer 13 exhibit a lower limit. The lower limit The limit value is 8.0 × 1021 / cm3.

[0060] The oxide layer 13, which has oxygen concentrations higher than or equal to this lower limit, reduces Contamination with carbon in the process for the formation of the collector electrode 10 reduces damage that occurs during the process. The formation of oxide layer 13 on the adhesion layer 12 occurs. If the oxygen concentrations in oxide layer 13 are too high, the electrical resistance increases when the semiconductor unit is supplied with energy, thus causing an energy loss.

[0061] Therefore, the oxygen concentrations in the oxide layer 13 have an upper limit. The upper limit is equal to 4.0 × 10²² / cm3. The oxide layer 13, which has oxygen concentrations lower than or equal to this upper limit, prevents the Increase in electrical resistance.

[0062] Thus, the oxygen concentrations in the oxide layer 13 are preferably higher than or equal to 8.0 × 1021 / cm3 and lower than or This is equal to 4.0 × 10²² / cm³. This prevents carbon contamination while minimizing the increase in electrical resistance. is prevented.

[0063] In summary, the semiconductor unit according to embodiment 1 comprises the following: a semiconductor substrate 1; and an electrode, which has a plurality of layers laminated onto a main surface of the semiconductor substrate 1. The electrode has the first The metal layer, the oxide layer 13, and the second metal layer are present. The first metal layer contains A1 and is in contact with the Main surface of the semiconductor substrate 1. The oxide layer 13 contains a metal as well as oxygen and is located on a surface of the first metal layer. formed. The second metal layer is formed on a surface of the oxide layer 13.

[0064] The oxygen concentrations in the oxide layer 13 are higher than or equal to 8.0 × 1021 / cm3 and less than or equal to 4.0 × 10²² / cm³. According to embodiment 1, the semiconductor unit corresponds to an IGBT, the main surface of the Semiconductor substrate 1 corresponds to the back surface 1B of semiconductor substrate 1, the electrode corresponds to the collector electrode 10, the The first metal layer corresponds to the adhesion layer 12, and the second metal layer corresponds to the barrier layer 14.

[0065] In such a semiconductor unit, contamination of the electrode, which has a plurality of laminated metal layers, with prevented from being caused by organic substances.

[0066] In a process for producing a continuous layer, in which electrodes, each comprising a plurality of Semiconductor substrates, which have layers and are formed in a continuous structure, sometimes warp or distort. The thickness of the Semiconductor substrates were reduced to achieve a low ON resistance and increase switching speed, especially in power semiconductor units, such as high-power onboard IGBTs. When a multiple of layers When a semiconductor is formed coherently on a thin semiconductor substrate, the semiconductor substrate sometimes warps or distorts due to... Layer stresses.

[0067] A separation layer formation process for subdivision layer formation processes for each type of metal layer contained in an electrode In contrast, it enables thermal treatment of a semiconductor substrate between layer formation processes. This prevents warping or Discarding the semiconductor substrate is reduced. However, if the semiconductor substrate is exposed to an atmosphere during the layer formation processes, this is further reduced. If this happens, the electrode will be contaminated by organic substances in the atmosphere.

[0068] When the organic substances are transported into the electrode, for example in the organic substances The carbon atoms contained in the electrode diffuse into it during the thermal treatment process after the layer has formed. This causes... The electrical properties of the semiconductor unit are adversely affected. In the semiconductor unit according to embodiment 1, which the The presence of an oxide layer 13 between the adhesion layer 12 and the barrier layer 14 prevents contamination with carbon.

[0069] Thus, during the thermal treatment process, the organic substances are removed after the formation of the collector electrode. 10 does not diffuse, and the electrical properties of the semiconductor unit do not deteriorate. At the same time, the oxide layer 13 prevents the Semiconductor unit, that the adhesion layer 12 and the barrier layer 14 react during the thermal treatment process and a Form an alloy with high resistance.

[0070] The semiconductor substrate contained in a power semiconductor unit includes, as one material, a semiconductor with a large band gap, such as For example, SiC or GaN. The semiconductor substrate containing a large bandgap semiconductor has a higher defect density than one containing a large bandgap semiconductor. Semiconductor substrate consisting of silicon as a material. Thus, the semiconductor substrate, which contains the semiconductor with a large bandgap, is sensitive. against contamination with organic substances.

[0071] However, since the collector electrode 10 of the semiconductor unit according to embodiment 1 has the oxide layer 13, the contamination the collector electrode 10 with organic substances effectively prevents, even if the semiconductor substrate 1 is a semiconductor with It involves a large band gap.

[0072] Since the oxygen concentrations in the oxide layer 13 are also higher than or equal to 8.0 × 10²¹ / cm³, the oxide layer 13 can Sufficiently prevent contamination of the electrode with organic substances. Furthermore, since the oxygen concentrations in the oxide layer 13 If the values ​​are less than or equal to 4.0 × 1022 / cm3, the oxide layer 13 can prevent an increase in the electrical resistance of the electrode.

[0073] Apart from the use of an oven system etc. into which oxygen can be introduced, the oxide layer 13 can be treated by means of the natural oxidation is formed by the action of an atmosphere. In this way, the oxide layer 13 of the semiconductor unit can be formed according to Design 1 can be produced at low cost.

[0074] Furthermore, the oxide layer 13 of the semiconductor unit according to embodiment 1 has a thickness of 7 nm or a lesser thickness.

[0075] Using the oxide layer 13, contamination with carbon can be reduced by such a semiconductor unit, while preventing an increase in the electrical resistance of the electrode.

[0076] Furthermore, the hydrogen concentrations in the oxide layer 13 of the semiconductor unit according to embodiment 1 are higher than the Oxygen concentrations in the oxide layer 13 or equal to these.

[0077] The oxide layer 13 of such a semiconductor unit exhibits less deformation on its surface. This is because the The majority of the surface is occupied by the stable OH-terminated surface. The oxide layer 13 prevents warping or distortion. of the semiconductor substrate is reduced, and, for example, peeling of a layer is reduced.

[0078] A method for manufacturing a semiconductor unit according to embodiment 1 comprises the following: Manufacturing the semiconductor substrate 1 ; as well as forming an electrode having a plurality of layers laminated onto a main surface of the semiconductor substrate 1. The electrode formation involves the following: forming a first metal layer in contact with the main surface of the semiconductor substrate 1, wherein the first metal layer contains Al; forming the oxide layer 13 on a surface of the first metal layer, wherein the oxide layer is a metal as well as contains oxygen; and forming a second metal layer on a surface of the oxide layer 13 .

[0079] The oxygen concentrations in the oxide layer 13 are higher than or equal to 8.0 × 1021 / cm3 and lower than or equal to 4.0 × 1022 / cm3. According to embodiment 1, the semiconductor unit corresponds to an IGBT, the main surface of the semiconductor substrate 1 corresponds to the rear Surface 1B of the semiconductor substrate 1, the electrode corresponds to the collector electrode 10, the first metal layer corresponds to the adhesion layer 12 , and the second metal layer corresponds to the barrier layer 14 .

[0080] Such a method for manufacturing a semiconductor unit avoids contamination of the electrode, which consists of a plurality of which has laminated metal layers, is prevented by organic substances. Apart from the use of an oven system, etc., into which Oxygen can be introduced, and the oxide layer 13 can be formed by natural oxidation through exposure to an atmosphere. The oxide layer 13 can be formed at low cost by the method for manufacturing a semiconductor unit according to embodiment 1.

[0081] Furthermore, the oxide layer 13 formed in the process for manufacturing a semiconductor unit according to embodiment 1 has a thickness of 7 nm or a lesser thickness.

[0082] Using the oxide layer 13, a reduction of the Contamination with carbon at the semiconductor unit is permitted, while an increase in the electrical resistance of the electrode is prevented.

[0083] In the method for producing a semiconductor unit according to embodiment 1, the formation of the oxide layer 13 has the following characteristics: Oxidizing the surface of the first metal layer to form the metal oxide layer 13A; and etching a surface of the metal oxide layer 13A.

[0084] In such a method for producing a semiconductor unit, the oxide layer 13 can be formed at low cost. Furthermore, the oxide layer 13 can be precisely manufactured with a predetermined thickness and a The cells are formed at a specified oxygen concentration. The specified thickness is, for example, 7 nm or less. Thus, the specified Oxygen concentration higher than or equal to 8.0 × 1021 / cm3 and lower than or equal to 4.0 × 1022 / cm3.

[0085] In the method for producing a semiconductor unit according to embodiment 1, the etching of the surface of the metal oxide layer an etching of the surface of the metal oxide layer 13A using a hydrogen-containing plasma or a hydrogen-containing Acid solution. The hydrogen concentrations in oxide layer 13 are higher than or equal to the oxygen concentrations in oxide layer 13. this one.

[0086] In such a method for manufacturing a semiconductor unit, the oxide layer 13 can be produced with less deformation at its surface are formed. This is because the majority of the surface of oxide layer 13 is formed by the stable OH-terminated surface. is absorbed. The oxide layer 13 reduces warping or distortion of the semiconductor substrate and, for example, prevents flaking. reduced by one layer. Design 2

[0087] A semiconductor unit and a method for manufacturing the semiconductor unit according to embodiment 2 are described. A further description of the structure and operation, which are identical to those according to embodiment 1, is omitted.

[0088] Fig. 13 is a cross-sectional view showing the structure of a semiconductor unit according to embodiment 2. In the semiconductor unit According to embodiment 2, the IGBT is similar to that in embodiment 1. The IGBT according to embodiment 2 features the same structure as that of the IGBT according to embodiment 1, with the exception of the structure of a collector electrode.

[0089] Fig. 14 is a cross-sectional view showing a laminated structure of a collector electrode 20 according to embodiment 2. Collector electrode 20 according to embodiment 2 has the same structure as that of collector electrode 10 according to embodiment 1, with Exception of the structure of a barrier layer. A barrier layer 24 according to embodiment 2 has a first barrier layer 24A and a second barrier layer 24B, which consists of different materials.

[0090] The collector electrode 20 is bonded to the conductive circuit board 50 by the metal layer 11, which has a low melting point. Metal layer 11 with a low melting point is applied by the thermal treatment process to attach the collector electrode 20. The circuit board 50 was melted and attached.

[0091] The collector electrode 20 has a plurality of layers laminated onto the rear surface 1B of the semiconductor substrate 1 The collector electrode 20 has the following: the first metal layer in contact with the rear surface 1B of the semiconductor substrate. 1, the oxide layer 13, which is formed on the surface of the first metal layer, as well as the second metal layer, which is formed on the surface of the oxide layer 13 is formed. In the collector electrode 20 according to embodiment 2, the first metal layer corresponds to the adhesion layer 12. and the second metal layer corresponds to the barrier layer 24 .

[0092] The collector electrode 20 according to embodiment 2 further comprises the electrode layer 15 on the surface of the barrier layer 24 as well as the affinity layer 16 on the surface of the electrode layer 15.

[0093] The adhesion layer 12 is a metal layer which contains as a main component A1, which provides good adhesion to a semiconductor. The adhesion layer 12 according to embodiment 2 is an Al alloy, which is modified by adding Si is produced from Al.

[0094] The concentration of the added Si is about 1 wt.% to prevent the diffusion of Si atoms into the adhesion layer 12. The adhesion layer 12 improves the adhesion between the collector layer 9, which is a semiconductor, and the collector- Electrode 20, which consists of metals.

[0095] The oxide layer 13 contains a metal and oxygen. The oxide layer 13 according to embodiment 2 contains an aluminum oxide. The oxide layer 13 preferably has a thickness of several nm to 7 nm. The oxide layer 13 prevents contamination with carbon, while a An increase in the electrical resistance of the collector electrode 20 is prevented.

[0096] The barrier layer 24 comprises the first barrier layer 24A and the second barrier layer 24B, which are arranged in this order onto the The surface of the oxide layer 13 is laminated. The first barrier layer 24A contains a nitride, which is a metal with a high The second barrier layer, 24B, contains a metal with a high melting point, for example, titanium. Barrier layer 24 has a function in that it separates the electrode layer 15 from the adhesion layer 12.

[0097] If the barrier layer 24 is missing, contact of the molten metal with the metal layer 11, which has a low melting point, causes with the collector electrode 20 during a long period of time, that a part of the affinity layer 16, the electrode layer 15 or the The adhesion layer 12 is melted into the molten metal. Contact between the molten metal and the collector layer 9 occurs. This creates cavities, which can degrade electrical properties or reliability.

[0098] The barrier layer 24 has functions such that, during the thermal treatment process for attaching the collector- Electrode 20 on circuit board 50 to prevent erosion of the metal layer 11 with a low melting point and to prevent the generation of to reduce cavities. Furthermore, the barrier layer 24 also has the function of reducing adhesion to the adhesion layer 12. to improve.

[0099] If the barrier layer 24 consists only of the second barrier layer 24B, the barrier layer 24 has the same structure as those of barrier layer 14 according to embodiment 1. Barrier layer 24 has a two-layer structure consisting of the first barrier layer. 24A and the second barrier layer 24B, thus increasing the effect of separation of the electrode layer 15 from the adhesion layer 12.

[0100] The electrode layer 15 contains a metal with low resistance. The electrode layer 15 contains, for example, nickel or a Nickel alloy. The electrode layer 15 improves the adhesion between the barrier layer 24 and the affinity layer 16, which is located via and are arranged under the electrode layer 15.

[0101] The affinity layer 16 is arranged on the surface of the collector electrode 20. The affinity layer 16 contains gold, which has a high exhibits affinity for a metal with a low melting point. The affinity layer 16 increases adhesion between the collector electrode and the collector electrode. 20 and the metal layer 11 with a low melting point improved.

[0102] Next, a method for manufacturing the semiconductor unit according to embodiment 2 is described. The method for manufacturing the The semiconductor unit according to embodiment 2 is identical to the manufacturing process shown in Fig. 3 according to embodiment 1.

[0103] In step S10, the semiconductor substrate 1 is produced. The semiconductor substrate 1 produced here is in a state in which the Collector layer 9 of the IGBT is exposed and the collector electrode 20 has not yet formed. On the surface 1A of the semiconductor substrate 1 Many surface structures of the IGBT are formed.

[0104] In step S20, the first metal layer is formed in contact with the main surface of the semiconductor substrate 1. During this process the adhesion layer 12 is formed in contact with the surface of the collector layer 9, that is, with the rear surface 1B of the Semiconductor substrate 1. The adhesion layer 12 is formed, for example, by sputtering on the rear surface 1B of the substrate in a vacuum chamber. The semiconductor substrate 1 was formed. The adhesion layer 12 is an Al alloy containing Al and Si.

[0105] In step S30, the surface of the first metal layer is oxidized to form the metal oxide layer 13A. In this process, the surface The adhesion layer 12 is oxidized to form the metal oxide layer 13A. The metal oxide layer 13A is formed, for example, by heating the Semiconductor substrate 1 was formed using an oven system etc. into which oxygen was introduced.

[0106] Alternatively, the metal oxide layer 13A is formed, for example, by using the semiconductor substrate 1 removed from the vacuum chamber. is exposed to an atmosphere. The metal oxide layer 13A is a native oxide layer. The metal oxide layer 13A According to embodiment 2, the metal oxide layer 13A is formed by exposure to an atmosphere. The layer is formed by oxidation of the Al-containing aluminum. The adhesion layer 12 is formed and contains as a main component an Al oxide, which contains Al and oxygen.

[0107] In step S40, an area of ​​the metal oxide layer 13A is etched to form the oxide layer 13. The oxide layer 13 is, for example, etched by a wet treatment in which the semiconductor substrate 1 is immersed in an acidic chemical solution, or by a Dry etching treatment, in which the semiconductor substrate is exposed to ions or a plasma. In the case of the acidic chemical solution of the Wet treatment involves, for example, hydrofluoric acid.

[0108] The plasma used in the dry treatment contains, for example, hydrogen. The metal oxide layer 13A according to embodiment 2 is etched using a plasma containing hydrogen and argon. The oxide layer 13 has a thickness sufficient to prevent the alloying reaction of A1 and Ti at a temperature of thermal treatment is sufficient, which is used when the collector- Electrode 20 is attached to the circuit board 50 through the metal layer 11, which has a low melting point.

[0109] The temperature of the thermal treatment is, for example, approximately 300 °C to 500 °C, and the oxide layer 13 preferably has a Thicknesses of several nm up to 7 nm. Thus, etching of at least approximately a fraction of a nanometer of the material formed in step S30 is possible. Metal oxide layer 13A forms the oxide layer 13 with a thickness in the aforementioned range.

[0110] In step S50, the second metal layer is formed on the surface of the oxide layer 13. In embodiment 2, the Barrier layer 24, electrode layer 15, and affinity layer 16 are formed successively on the surface of oxide layer 13. Immediately After the formation of the oxide layer 13, the semiconductor substrate 1 is transferred to another vacuum chamber. In the vacuum chamber, the Barrier layer 24 formed by sputtering on the surface of the oxide layer 13.

[0111] Here, a TiN thin film is formed as the first barrier layer 24A, and a Ti thin film is formed as the second barrier layer 24B. educated. The TiN thin film is formed, for example, by sputtering a Ti target with a nitrogen-containing sputtering gas. The Ti thin film is formed, for example, by sputtering a Ti target with an Ar-containing sputtering gas. Furthermore, the electrode layer 15 and the Affinity layer 16 is formed by sputtering or by vapor deposition.

[0112] By the steps mentioned above, the IGBT is completed, which connects the collector electrode 20 to the rear surface 1B of the The semiconductor substrate 1 is present. The IGBT is attached to the circuit board 50 by the metal layer 11, which has a low melting point, so that This results in the structure shown in Fig. 14.

[0113] The semiconductor unit with the aforementioned structure has the oxide layer 13 between the adhesion layer 12 and the first Barrier layer 24A. The oxide layer 13 prevents contamination with carbon, while increasing the electrical resistance. is prevented. Furthermore, barrier layer 24 exhibits the two-layer structure of the first barrier layer 24A. and the second barrier layer 24B. The barrier layer 24 with its two-layer structure increases the separation effect of the Electrode layer 15 is reinforced by the adhesion layer 12.

[0114] If, in the case of a plurality of metal layers contained in an electrode, a layer that is in direct contact with the The main surface of a semiconductor substrate is an A1 layer, which is created by a thermal treatment process after the formation of the electrode. sometimes aluminum spikes. The thermal treatment process after electrode formation is, for example, a reflow process. A process in which an electrode is bonded to an external component using solder.

[0115] The aluminum spikes are produced by the interdiffusion of Si, which is contained in the semiconductor substrate, and Al in the Al layer. Since the semiconductor unit described in embodiment 1 or 2 contains Al and Si in the layer, which is in direct contact with the rear The aluminum spikes in this semiconductor unit can be reduced by the surface of the semiconductor substrate.

[0116] Furthermore, the reaction of an Al alloy layer and a Ti layer in a plurality of laminated metal layers sometimes results in Al3Ti is formed with high resistance. The oxide layer in the semiconductor unit described in embodiment 1 or 2 prevents a Formation of Al3Ti from the reaction of Al in the adhesion layer and Ti in the barrier layer.

[0117] During the plating treatment to form an electrode having a plurality of laminated metal layers, a Erosion of A1 by a chemical solution sometimes affects the Si in the lower layer. The oxide layer in embodiment 1 or 2 The described semiconductor unit prevents such erosion of A1 by the chemical solution as well as damage to the Si.

[0118] Embodiments of the present invention can be freely combined with one another, and each of the embodiments can be used in a suitable modifications within the scope of the invention or the omission of features.

[0119] Although this invention is described in detail, the description is in all aspects only illustrative and limits the The invention is not included. Therefore, numerous modifications and variations not yet illustrated by an example are not included without deviation from the scope. the present invention includes. Reference symbol list 1 semiconductor substrate 1A surface 1B rear surface 9 collector layer 10 Collector electrode 11 Metal layer with a low melting point 12 adhesion layer 13 oxide layer 13A Metal oxide layer 14 barrier layer 15 electrode layer 16 Affinity layer 20 Collector electrode 24 barrier layer 24A first barrier layer 24B second barrier layer 50 circuit board QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was generated automatically and is solely for the better information of the Readers' contributions were included. The list is not part of the German patent or utility model application. The DPMA assumes no liability whatsoever. for any errors or omissions. Cited patent literature

[0000] WO 2010 / 109572 A1

[0003] JP 2000183063 A

[0003] JP 2017135283 A

[0003] JP 2013214732 A

[0003]

Claims

[1] Semiconductor unit comprising the following: - a semiconductor substrate; and - an electrode having a plurality of layers laminated onto a main surface of the semiconductor substrate, wherein the electrode It exhibits the following: - a first metal layer in contact with the main surface of the semiconductor substrate, wherein the first metal layer contains Al; - an oxide layer formed on a surface of the first metal layer, wherein the oxide layer contains a metal as well as oxygen; and - a second metal layer formed on a surface of the oxide layer, wherein the oxygen concentrations in the oxide layer are higher than or equal to 8.0 × 1021 / cm3 and less than or equal to 4.0 × 1022 / cm3. [2] Semiconductor unit according to claim 1, wherein the oxide layer has a thickness of 7 nm or less. [3] Semiconductor unit according to claim 1 or 2, wherein the hydrogen concentrations in the oxide layer are higher than the oxygen concentrations in the oxide layer or similar. [4] Method for manufacturing a semiconductor device, the method comprising: - Manufacturing a semiconductor substrate; and - Forming an electrode having a plurality of layers laminated onto a main surface of the semiconductor substrate, wherein the Electrode formation includes the following: - Forming a first metal layer in contact with a main surface of the semiconductor substrate, wherein the first metal layer contains Al; - Forming an oxide layer on a surface of the first metal layer, wherein the oxide layer contains a metal as well as oxygen; and - Formation of a second metal layer on a surface of the oxide layer, where the oxygen concentrations in the oxide layer are higher than or equal to 8.0 × 1021 / cm3 and less than or equal to 4.0 × 1022 / cm3. [5] Method according to claim 4, wherein the oxide layer has a thickness of 7 nm or less. [6] Method according to claim 4 or 5, wherein forming the oxide layer comprises: - Oxidizing a surface of the first metal layer to form a metal oxide layer; and- etching a surface of the metal oxide layer. [7] Method according to claim 6, - wherein etching a surface of the metal oxide layer is etching the surface of the metal oxide layer using hydrogen containing plasma or a hydrogen-containing acid solution and - where the hydrogen concentrations in the oxide layer are higher than or equal to the oxygen concentrations in the oxide layer.

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