DEVICE AND METHOD FOR PIPELINED MULTIPLICATOR ACCUMULATOR

Abstract

A circuit can include a vector arithmetic logic unit (ALU), where the vector ALU has a multiplier, a first multiplexer, a second multiplexer, and an accumulator. The vector ALU can calculate the dot product of two or more vector inputs. A system can include two or more vector ALUs and can divide a vector input into multiple segments. Each segment can be fed into a corresponding vector ALU via a multiplexer, and a controller can route the partial sums from the corresponding ALUs through one or more feedback paths, allowing the system to calculate the complete dot product of the vector inputs.