High-throughput neural computing system using resistive memory crossbar arrays
DE202025107850U1Active Publication Date: 2026-03-26PSR ENG COLLEGE SIVAKASI +2
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Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Utility models
- Current Assignee / Owner
- Filing Date
- 2025-12-18
- Publication Date
- 2026-03-26
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Abstract
A system for high-throughput neural computing using resistive memory crossbar arrays, wherein the system comprises the following: one or more resistive memory crossbar arrays, each resistive memory crossbar array comprising a first plurality of conductors extending in a first direction and a second plurality of conductors extending in a second direction that is substantially orthogonal to the first direction, wherein a resistive memory element is electrically coupled at each intersection of the first plurality of conductors and the second plurality of conductors, wherein each resistive memory element is programmable to a selected conductivity state representing a weight of a neural network; an input signal application unit that is electrically connected to the first plurality of lines and is configured to apply electrical input signals corresponding to neural activation values to selected lines of the resistive storage crossbar arrays; a measuring and accumulating unit which is electrically connected to the second plurality of lines and is configured to detect the output currents generated by the resistive storage elements in response to the applied electrical input signals and to perform a weighted summation of the detected output currents; a conversion unit that is operationally coupled with the sensor and accumulation unit and is configured to convert the detected output currents into digital neural output representations with a defined resolution; one or more processors operationally connected to the resistive memory crossbar arrays, the input signal application unit, the acquisition and accumulation unit, and the conversion unit, wherein the processor(s) are configured to control the programming of the conductivity states of the resistive memory elements, schedule the application of input signals, and coordinate the execution of neural network layers; and one or more storage units that are operationally connected to one or more processors and are configured to store neural model parameters, calibration data, and intermediate results of neural activation.
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