IMAGE SENSOR

Description

[0001] The invention relates to an image sensor for electronic cameras, in particular a CMOS image sensor, with a plurality of pixels for generating exposure-dependent signals.

[0002] Electronic cameras are used, for example, as motion picture cameras to record moving image sequences that are later shown in cinemas. It is important that these cameras have high image quality. In particular, during post-production, the recorded images are adjusted in terms of brightness, contrast, and color, and the final product—the edited moving image sequence or film—is projected onto a large screen in the cinema.

[0003] Electronic cameras typically use silicon image sensors in CMOS or CCD technology. In such image sensors, the pixels form a pixel array and are arranged in rows and columns. The pixels can be equipped with a color filter array (CFA) to achieve different spectral sensitivities.Each pixel comprises at least: a photosensitive element to generate an electrical charge from incident light; a readout node; a transfer gate to selectively couple the photosensitive element to the readout node and transfer the generated charge from the photosensitive element to the readout node; a converter transistor to convert the charge present at the readout node into a voltage signal at a signal output; and a selector switch connected to the signal output of the converter transistor via an output line to selectively couple the signal output of the converter transistor to an associated readout line of the image sensor, commonly referred to as a column line.

[0004] Each pixel can also include a reset switch to selectively couple the readout node with a reset potential. Such an image sensor can further include a control circuit for generating control signals for the respective transfer gate, the respective selection switch, and, if applicable, the respective pixel reset switch, in order to selectively read image signals (or image signals and reference signals) from the readout node. The converter transistor can form an impedance converter that generates a voltage signal at its signal output depending on the amount of charge present at its input. The column lines of the image sensor can be connected to a respective readout amplifier (usually referred to as a column amplifier) ​​to selectively couple the signal output of the converter transistor to a column line of the image sensor that is assigned to several pixels of the image sensor.Several column lines of the image sensor can also be connected to a signal bus leading to one or more column amplifiers to amplify the (possibly pre-amplified) voltage signals from multiple column lines. The pixels of the image sensor are addressed, for example, row by row, and the pixel signals are routed to the column amplifiers (e.g., at the edge of the pixel array) and from there to an output, digitized, and optionally processed with calibration data.

[0005] In order to be able to record moving image sequences even in poor lighting conditions and to keep the costs of artificial lighting measures on a film set low, it is desirable that the image sensors of electronic cameras have a high light sensitivity.

[0006] US 2016 / 225803 A1 discloses an image sensor with the features of the preamble of claim 1. The image sensor has an image sensor pixel comprising a light-sensitive element, a readout node, a transfer gate, a converter transistor, a selector switch, an input capacitor, a column amplifier, a column line, a feedback line and a feedback capacitor connecting the feedback line to the readout node, wherein a switch is arranged between the feedback line and the feedback capacitor.

[0007] WO 00 / 19706 A1 teaches a pixel arrangement in which a feedback amplifier is used to minimize reset noise, wherein during a read operation a signal amplified by the feedback capacitor C fb is transferred to a storage capacity, thereby suppressing the reset noise, wherein the feedback capacitor is connected to a feedback line via a switch.

[0008] US 2018 / 054576 A1 describes an image sensor in which the charge generated by a photodiode is read out simultaneously with two different gains, wherein a column line of a high-amplifier output is connected to a feedback capacitor via a switch.

[0009] EP 800 356 A1 also describes an image sensor which feeds a column amplifier signal back into the pixels via a feedback capacitor.

[0010] The object of the present invention is to create an image sensor with improved light sensitivity.

[0011] The present invention is based on the following considerations.

[0012] Light sensitivity is largely determined by the noise of the image sensor. The lowest signal range is particularly critical in low light conditions. The image sensor noise essentially consists of the noise of the individual pixel and the noise of the readout path. The noise of the readout path can be reduced to values ​​of, for example, 80 µV (microvolts) through appropriate design, so that it plays only a minor role compared to the pixel noise of, for example, 180 µV.

[0013] The noise voltage in each pixel is largely determined by the converter transistor (e.g., source follower, SF). The pixel noise is the ratio between the signal voltage generated by an electron and the noise voltage of the converter transistor (SF). Therefore, to reduce the noise, either the noise voltage of the converter transistor must be decreased, or the signal voltage generated by an electron (known as transconductance) must be increased.

[0014] When a photon is absorbed in the light-sensitive element (e.g., a pinned diode), it generates an electron. Briefly activating the pixel's transfer gate transfers this electron to the readout node (e.g., floating diffusion, FD). Typically, a single readout transfers a large number of photoelectrically generated electrons. The charge of each electron affects the capacitance of the readout node (FD), causing a voltage change that is inversely proportional to the node's capacitance. Therefore, to increase the signal voltage generated by an electron and thus reduce pixel noise, the capacitance of the readout node (FD) can be decreased.

[0015] In typical image sensors, the readout node of each pixel can have a capacitance of, for example, 1.6 fF (femtofarads), resulting in a voltage shift of approximately 100 µV per electron. Through further methods, such as the use of a guarding structure, the FD capacitance can be reduced to, for example, 0.6 fF, thereby achieving a voltage shift of approximately 260 µV per electron.

[0016] However, it is desirable to further reduce the noise. This can be achieved by further decreasing the capacitance of the readout node, thereby increasing the signal voltage generated by an electron at the readout node. The capacitance of the readout node is essentially a parasitic capacitance to ground. For such capacitances to be ineffective or as small as possible, the voltage at the readout node must remain constant. However, when electrons are transferred from the photosensitive element to the readout node, causing a voltage change at the readout node, this voltage change in turn affects the capacitance of the readout node.To significantly increase the sensitivity of the image sensor, the voltage at the readout node must be kept constant so that a low capacitance at the readout node and thus a higher signal voltage per electron is achieved and maintained even during charge transfer to the readout node.

[0017] The aforementioned problem is solved by an image sensor having the features of claim 1.

[0018] In the image sensor, a column amplifier is assigned to the column line. The column line is coupled to a negative input of the column amplifier via an input capacitor, or can be coupled (e.g., via a switch). The column amplifier has an amplifier output for outputting an amplifier signal. This amplifier output is connected to a column readout circuit and to a compensation line. The compensation line can also be referred to as a compensation line. The compensation line is coupled to the respective readout node of the pixels assigned to the column line via a feedback capacitor, with the compensation line being directly connected to the feedback capacitor.

[0019] Thus, the voltage signal generated at the signal output of the converter transistor of the respective pixel can be effectively capacitively fed back to the readout node of that pixel. In other words, a negative feedback loop is formed, comprising the column line, the input capacitor, the column amplifier (via its negative input), the compensating line, and the feedback capacitor.

[0020] The feedback capacitor, indirectly coupled or connectable to the readout node, ensures that the voltage at the readout node of the respective pixel can be regulated by the column amplifier or the amplifier output during charge transfer from the photosensitive element to the readout node. In particular, the voltage at the readout node can be regulated to reduce its capacitance. This allows for an increased signal voltage per electron at the readout node of the respective pixel.

[0021] The feedback capacitor thus determines the signal voltage per electron and therefore the pixel's sensitivity. Through feedback and appropriate sizing of the feedback capacitor, a desired signal voltage per electron can be achieved. To obtain a signal voltage of, for example, 4000 µV per electron, a readout node capacitance of approximately 40 aF (attofarads) is required. The feedback capacitor can be dimensioned very small, since the capacitance between the column line and the readout node is the most critical factor.

[0022] The numerical values ​​mentioned above are for illustrative purposes only. The effect achieved by the feedback capacitor may be stronger or weaker.

[0023] This type of active capacity limitation of the readout node is particularly suitable for low signal strengths under poor lighting conditions, i.e., for a small number of electrons transferred from the photosensitive element to the readout node per actuation of the transfer gate. The photosensitive element of the respective pixel can thus be read out successively in several repetitions, yielding partial results that can be summed. For larger amounts of charge in the photosensitive element, however, conventional readout methods can be used without the feedback via the feedback capacitor described above.

[0024] The invention can also be used with a pixel architecture and / or readout architecture that is / are more complex than described above. For example, an overflow capacitor with an additional transfer gate can be provided within each pixel, as will be explained below. In some embodiments, each pixel can also have several photosensitive elements that are connected or can be coupled to a common readout node (FD) via a respective transfer gate (so-called "sharing") and / or that are assigned (alternating in time) to a common converter transistor. Furthermore, it is possible for the image sensor to have several column lines for each column of pixels, wherein several column lines can be coupled or can be coupled to a common column amplifier via a signal bus. It is also possible for several channels with different gain factors to be provided for each pixel.

[0025] Whenever reference is made to an electrical voltage or an electrical potential in connection with the invention, it should be noted that electrical voltage is defined as the difference between a first potential (e.g., a generated or considered potential) and a second potential (e.g., a reference potential). Therefore, the two terms can ultimately be synonymous or used interchangeably, provided the respective reference potential is given.

[0026] Where reference is made to conductors in the image sensor in connection with the invention, these shall be understood to be electrically conductive connections, which may in particular be formed on or within a substrate, for example by metallization or doping.

[0027] Further embodiments of the invention are explained below.

[0028] In some embodiments, the column amplifier can be configured to generate the amplifier output signal depending on the voltage signal of the converter transistor of the respective pixel received via the column line at the input capacitor, and to output the amplifier output signal to the column readout circuit and via the compensating line to the feedback capacitor.

[0029] For example, an electrical voltage generated at the readout node can be output as a voltage signal on the column line via the converter transistor when the selector switch is open. Specifically, the voltage signal on the column line can follow the voltage (particularly as a directly proportional value) that was generated at the readout node of the respective pixel, for example, due to a charge transfer via the transfer gate. The voltage difference between the column line and the negative input of the column amplifier can cause the input capacitor located between the column line and the negative amplifier input to charge according to this voltage difference. Depending on the operating mode of the column amplifier, the amplifier output signal can assume a different value, as will be explained below.The amplifier output signal is transmitted both to the column readout circuit and, via the compensating line, to the feedback capacitor. The column readout circuit can output corresponding signal values ​​that ultimately represent image information. The feedback loop described above can be formed via the compensating line and the feedback capacitor to the respective readout node.

[0030] In some embodiments, the column readout circuit can be configured to read the amplifier output signal. In particular, the column readout circuit can be configured to output a signal value corresponding to the amplifier output signal.

[0031] In particular, in some embodiments, the column readout circuit can be configured to read out a reference signal and an image signal as amplifier output signals and to calculate these together (especially by subtraction) in order to eliminate offset values ​​(so-called Correlated Double Sampling), as will be explained below.

[0032] In some embodiments, the converter transistor of the respective pixel, the column line, the input capacitor, the column amplifier, the equalizing line, and the feedback capacitor of the respective pixel can form a negative feedback loop for the readout node of the respective pixel. Such a negative feedback loop can counteract an undesired increase in voltage and thus an undesired increase in the capacitance of the readout node due to charge transfer.

[0033] The input capacitor, column amplifier and feedback capacitor of the respective pixel can be designed (arranged and dimensioned) in particular to keep a voltage at the readout node of the respective pixel essentially constant.

[0034] Such negative feedback need not be permanent. The column amplifier can also provide only temporary feedback via the aforementioned elements. During the feedback period, the column amplifier can regulate the voltage on the compensating line so that the voltage at the readout node of the respective pixel remains essentially constant, even in the event of a charge transfer (from the photosensitive element, via the transfer gate).

[0035] In some embodiments, the input capacitor, the column amplifier, and the feedback capacitor of the respective pixel can be configured to increase the voltage on the compensation line in the event of a charge increase at the readout node of the respective pixel, thereby essentially compensating for a voltage change at the readout node. In particular, the feedback mechanism can exploit the fact that the voltage on the column line follows the voltage at the readout node and that the voltage on the column line is also available at the column amplifier via the input capacitor.

[0036] In some embodiments, the column amplifier can include a positive amplifier input in addition to the negative amplifier input, to which a reference voltage is applied. The reference voltage can be used, in particular, as a reference value to perform the feedback described and to improve measurement accuracy. Specifically, negative feedback can be used to mirror the reference voltage to the negative amplifier input, thereby bringing it and the associated input capacitor to defined initial values ​​for a subsequent measurement.

[0037] In particular, the column amplifier can include an operational amplifier with a negative amplifier input and a positive amplifier input.

[0038] In some embodiments, the negative input of the column amplifier can be connected to the amplifier output via a feedback line and a feedback switch. Closing the feedback switch puts the column amplifier into negative feedback mode, in which a potential difference is set across the input capacitor between the voltage on the column line and the reference voltage. In particular, the column amplifier can operate as a voltage follower in negative feedback mode, meaning the amplifier output signal can correspond to the input voltage at the positive input of the column amplifier, i.e., the applied reference voltage.

[0039] By subsequently opening the negative feedback switch, the column amplifier can be switched from negative feedback operation to amplification operation, in which the amplifier output signal represents a different potential difference across the input capacitor compared to negative feedback operation. This change in the potential difference across the input capacitor can result, in particular, from an intermediate charge transfer from the photosensitive element to the readout node of the respective pixel and a corresponding change in the voltage signal of the respective converter transistor. In amplification operation of the column amplifier, the amplifier output signal can therefore represent a voltage change at the readout node of the respective pixel and thus the number of electrons transferred to the readout node. In amplification operation, the column amplifier can, in particular, operate as a differential amplifier.

[0040] In some embodiments, the image sensor may include a control circuit configured to first switch the column amplifier to negative feedback mode for reading the respective pixel; subsequently, switch the column amplifier to gain mode; then briefly, at least partially, open the transfer gate of the respective pixel to transfer charge to the readout node of the respective pixel; and finally, control the column readout circuit to read the amplifier output signal, which then represents a signal value or image signal value of the respective pixel. The control circuit may, for example, comprise an integrated circuit, a microprocessor, or an FPGA.

[0041] During the entire readout process, the selection switch for the respective pixel can be closed. As previously explained, negative feedback operation can be initiated by closing the negative feedback switch. This allows the input capacitor to be set to a defined initial value. The subsequent amplification operation can be initiated by opening the negative feedback switch. In amplification mode, the amplifier output signal can represent the charge transferred to the readout node of the respective pixel. Additionally, during amplification, the column amplifier can operate in feedback mode, meaning the amplifier output signal is capacitively fed back to the readout node of the respective pixel via the compensating line and the feedback capacitor.

[0042] In some embodiments, each pixel may also have a reset switch to selectively couple the readout node with a reset potential. The control circuit may be configured to briefly close the reset switch of the respective pixel to clear the charge present in the readout node of that pixel; and then, during the amplification operation of the column amplifier and before the transfer gate is activated (i.e., opened), to activate the column readout circuit to read the amplifier output signal, which then represents a reference value or reference signal value of the respective pixel.

[0043] Based on the readout reference value, the magnitude of the voltage change generated by the charge transfer at the readout node can be determined with higher accuracy. In particular, the reference value can be subtracted from the aforementioned signal value (determined with the transfer gate open) (so-called correlated double sampling).

[0044] In some embodiments, the column readout circuit can have a reference value readout path and a signal value readout path. In particular, the reference value can be read out via the reference value readout path and the signal value can be read out via the signal value readout path, whereby the reading of the reference value and the reading of the signal value can occur at different times.

[0045] In some embodiments, each pixel can further comprise an overflow capacitor and an additional transfer gate to selectively couple the readout node to the overflow capacitor. This allows the pixel's capacitance to be temporarily increased to accommodate large amounts of charge from the photosensitive element under strong exposure. The aforementioned control circuit can also be configured to generate control signals for the additional transfer gate.

[0046] The invention is described below with reference to exemplary embodiments and the drawings, wherein identical or similar elements are marked with the same reference numerals. Fig. 1 shows a four-transistor CMOS image sensor, wherein only one pixel of the image sensor and a column readout circuit associated with the column line of the pixel are shown; Fig. 2 shows an image sensor according to the invention in one of the Fig. 1 corresponding representation; Fig. 3 shows an alternative embodiment of the respective pixel of an image sensor according to Fig. 2 ; and Fig. 4 shows a circuit diagram for a control circuit of an image sensor according to the invention;

[0047] The basic operating principle of an exemplary four-transistor image sensor of the APS type (active pixel sensor) is explained below with reference to the invention for a better understanding of the invention. Fig. 1 explained, whereby individual components of this image sensor are also present in an image sensor according to the invention. In principle, the present invention is not limited to active four-transistor image sensors, but can also be used with image sensors with fewer or more than four transistors per pixel, as will be explained below.

[0048] In Fig. 1 Only a single pixel 10 is shown as a representative example, which comprises a light-sensitive element 20 in the form of a photodiode, in particular a so-called pinned diode. The light-sensitive element 20 can be charge-coupled via a switch in the form of a transfer gate 21 to a readout node 22, which can in particular be configured as a so-called floating diffusion (FD) node.

[0049] The readout node 22 is connected to the gate terminal of a converter transistor 24 configured as a source follower, which is a field-effect transistor (FET) and represents a charge-to-voltage converter circuit. Furthermore, the readout node 22 is connected via another switching device in the form of a reset switch 26 to a terminal 27 of a (for example, positive) voltage supply VDD. One of the two channel terminals (drain terminal) of the converter transistor 24 is also connected to the positive voltage supply VDD, whereas the other of the two channel terminals (source terminal) of the converter transistor 24 forms a signal output 29, at which a voltage signal is output and which is connected to a selection switch 25. The selection switch 25 functions as a line selector switch, whereby activating or deactivating it selects the line.Closing the selection switch 25 allows the signal output 29 of the converter transistor 24 to be optionally coupled with a column line 41 assigned to the displayed pixel 10.

[0050] The column line 41 (COL) is designed to connect several or all identical pixels 10 arranged in a corresponding column to a common column amplifier circuit 60, which is located, for example, outside the pixel field of the image sensor. This is done alternately by temporarily closing the respective selection switch 25 of the pixels 10.

[0051] The column amplifier circuit 60 comprises an input capacitor 61 (CIN) connected to the column line 41 and a voltage node 63. The column amplifier circuit 60 also includes a column amplifier 65, whose negative input 67 is connected to the voltage node 63 and to whose positive input 68 a reference voltage VREF is applied. An amplifier capacitor 64 is also connected to an output 69 of the amplifier and the voltage node 63. In parallel, a negative feedback switch 66 is connected via a feedback line to the amplifier output 69 and the voltage node 63.The amplifier output 69 is also connected to a column readout circuit 70, which includes a reference value capacitor 74 of a reference value readout path, wherein one terminal of the reference value capacitor 74 is connected to ground and the other terminal can be selectively coupled to the amplifier output 69 via a reference value switch 73. The column readout circuit 70 further includes a signal value capacitor 72 of a signal value readout path, wherein one terminal of the signal value capacitor 72 is also connected to ground and the other terminal can also be selectively coupled to the amplifier output 69 via a signal value switch 71.

[0052] Furthermore, a pre-charging circuit, comprising a power source 62, is assigned to the column line 41 outside the pixel field of the image sensor.

[0053] The transfer gate 21 of the respective pixel 10 is controllable via a control line TG1, the reset switch 26 is controllable via a control line RES, the selection switch 25 is controllable via a control line SEL, the feedback switch 66 is controllable via a control line FB, the reference value switch 73 is controllable via a control line SHR and the signal value switch 71 is controllable via a control line SHS from a common control circuit 40 of the image sensor.

[0054] The following describes the operating principle of such a pixel 10 using an example based on 3.3 V CMOS technology. This method is also known as "Correlated Double Sampling" (CDS). Typically, all pixels 10 in a row can be read out in the same way, and in particular in parallel, so that for the description of the readout process it is sufficient to consider only those pixels 10 that are connected to the same column line 41.

[0055] The light incident during an exposure process is converted into an electrical charge by the light-sensitive element 20 of the respective pixel 10, so that the light-sensitive element 20 fills with electrons. During the exposure process, the control lines TG1, SEL and RES are each held at 0 V, i.e., the switches 21, 24, 26 controlled by them are open.

[0056] Before the actual reading of each pixel 10, a voltage of 3.3 V is briefly applied to the control line RES to remove charge generated by leakage currents and / or stray light from the readout node 22, i.e., to clear the readout node 22. The readout node 22 is thus set to an initial state defined by the voltage supply VDD. A voltage corresponding to the charge at the cleared readout node 22 is therefore established at the signal output 29 of the converter transistor 24.

[0057] Furthermore, a voltage of 3.3 V is applied to the control line FB to close the negative feedback switch 66, so that the column amplifier 65 is negatively fed. This results in a voltage of VREF at the negative input 67 of the column amplifier 65, and thus at the voltage node 63 and at the associated terminal of the input capacitor 61.

[0058] To read a reference value, a voltage of 3.3 V is applied to the control line SEL, closing the selection switch 25. This switches a voltage signal from the converter transistor 24, corresponding to the charge in the readout node 22, via the selection switch 25 to the column line 41 and thus to the input capacitor 61. The input capacitor 61 is therefore charged to the potential difference between the reference voltage VREF and the voltage on the column line 41. Furthermore, the negative feedback switch 66 is opened (control line FB is set to 0 V). This switching process generates a slight disturbance (e.g., charge injection). The column amplifier 65 adjusts accordingly. A voltage of 3.3 V is then briefly applied to the control line SHR to close the reference value switch 73 and thereby charge the reference value capacitor 74 according to the amplifier output signal.After reopening the reference value switch 73, a reference value can be read from the reference value capacitor 74.

[0059] To read a signal value, a voltage of 3.3 V or less is briefly applied to the control line TG1 to at least partially open the transfer gate 21 of the respective pixel 10, or to close the switch formed by this opening. This allows the electrons generated by the exposure to be transferred from the photosensitive element 20 to the readout node 22. A modified voltage signal from the converter transistor 24, corresponding to the changed charge in the readout node 22, is transmitted via the selection switch 25 (either closed again or still closed) to the column line 41 and thus to the input capacitor 61. The column amplifier 65 amplifies this modified signal in proportion to the capacitances of the input capacitor 61 and the amplifier capacitor 64 (feedback switch 66 remains open) and generates a corresponding modified amplifier output signal at the amplifier output 69.A voltage is now present at output 69 of the column amplifier 65, which, starting from the initial state of the readout node 22 (offset value), corresponds to the voltage change (voltage drop) due to the transfer of electrical charge from the photosensitive element 20 to the readout node 22. A voltage of 3.3 V is briefly applied to the control line SHS to close the signal switch 71 and thereby charge the signal capacitor 72 according to the changed amplifier output signal. After the signal switch 71 is opened again, a signal value (image signal value) can thus be read from the signal capacitor 72.

[0060] The difference between the read-out reference value and the signal value corresponds to the amount of charge that was transferred from the photosensitive element 20 to the read-out node 22 by opening the transfer gate 21.

[0061] Afterwards, a voltage of 3.3 V can be briefly applied to the control line RES, if necessary, to remove the existing charge from the readout node 22 and to repeat the described readout process for another partial charge, which is transferred from the photosensitive element 20 to the readout node 22 by opening the transfer gate 21 even further (reading out a reference value and a signal value).

[0062] Finally, a voltage of 3.3 V can be briefly applied to the control lines RES and TG1 to remove both the charge from the readout node 22 and any residual charge from the photosensitive element 20, so that the next exposure process can begin again with a completely "empty" pixel 10.

[0063] These steps are also performed for the other pixels 10 connected to the respective column line 41.

[0064] Fig. 2 Figure 1 shows parts of an image sensor according to the invention, again illustrating by way of example a four-transistor image sensor and showing only a single pixel 10 as a representative representation, although the image sensor has a plurality of pixels 10 arranged in rows and columns. The essential differences to the image sensor according to [reference to figure 1] are described in detail below. Fig. 1 explained.

[0065] A difference to the image sensor according to Fig. 1 The configuration consists of the fact that each pixel 10 is coupled, in addition to the column line 41, to a compensating line 42 (CMP), which runs parallel to the column line 41 and, like the column line 41, is assigned to a column of pixels 11. The compensating line 42 is connected at one end to the amplifier output 69 of the column amplifier 65 of the assigned column line 41. At the other end, the compensating line 42 branches to the pixels 11 assigned to the column line 41 and is capacitively coupled to the readout node 22 of the respective pixel 10 via a respective feedback capacitor 28.

[0066] Another difference compared to the image sensor according to Fig. 1 The difference is that there is no amplifier capacitor 64 between the negative input 67 of the column amplifier 65 and the amplifier output 69, but only the negative feedback switch 66.

[0067] The image sensor according to Fig. 2 Even with small amounts of charge transferred from the light-sensitive element 20 to the readout node 22 of the respective pixel 10, the system can be operated with high light sensitivity, thus enabling the recording of moving image sequences even in poor lighting conditions. This is achieved through the high sensitivity (steepness of the gain characteristic) of the respective readout node 22.

[0068] The converter transistor 24 of the respective pixel 10, the column line 41, the input capacitor 61, the column amplifier 65, the compensating line 42, and the feedback capacitor 28 of the respective pixel 10 form a respective negative feedback loop for the readout node 22 of the respective pixel 10. The negative feedback loop ensures that a voltage change in the readout node 22, which is caused by the charge carriers transferred from the photosensitive element 20 to the readout node 22, is compensated by active feedback of the amplifier output 69 to the readout node 22. In particular, the column amplifier 65 can counteract a voltage drop at the readout node 22 by increasing the voltage at the amplifier output 69 or on the compensating line 42, so that, due to the capacitive coupling via the feedback capacitor 28, the voltage at the readout node 22 can be kept essentially constant.Parasitic capacities at readout node 22 (in . Fig. 2 (illustrated by reference numeral 23) are thus essentially ineffective. Therefore, the amplification characteristic is not deteriorated by the charge carriers transferred to the readout node 22 and any resulting increase in the (parasitic) capacitance.

[0069] By dimensioning the feedback capacitor 28 with a capacitance of, for example, 40 aF or less, a signal voltage of approximately 4000 µV per electron can be achieved in the readout node 22, which corresponds to a noise level of 0.05 electrons. As an example, a MIM (metal-insulator-metal) capacitor can be used as the feedback capacitor 28 by utilizing the capacitance between two line ends.

[0070] Similar to the image sensor according to Fig. 1 As explained, to read out the respective pixel 10, the column amplifier 65 can first operate in negative feedback mode to set the input capacitor 61 to a defined starting value, and subsequently, the column amplifier 65 can operate in amplification mode. In amplification mode, the column amplifier 65 can generate the amplifier output signal depending on the voltage signal received at the input capacitor 61 via the column line 41 from the converter transistor 24 and output it to the feedback capacitor 28 via the compensating line 42.

[0071] The following describes a possible data extraction process.

[0072] Before the actual reading of each pixel 10, a voltage of 3.3 V is briefly applied to the control line RES to momentarily close the reset switch 26 and clear the read node 22 (initial state of the read node 22). A voltage corresponding to the (residual) charge at the cleared read node 22 is thus established at the signal output 29 of the converter transistor 24. Furthermore, a voltage of 3.3 V is applied to the control line FB to close the negative feedback switch 66, so that the column amplifier 65 is negatively fed. This results in a voltage of VREF at the negative input 67 of the column amplifier 65, and thus also at the voltage node 63 and at the associated terminal of the input capacitor 61.

[0073] To read a reference value, a voltage of 3.3 V is applied to the control line SEL, closing the selection switch 25. This causes a voltage signal from the converter transistor 24, corresponding to the charge in the readout node 22 or its output state, to be switched via the selection switch 25 to the column line 41 and thus to the input capacitor 61. The input capacitor 61 is therefore charged to the potential difference between the reference voltage VREF of the column amplifier 65 and the voltage on the column line 41.

[0074] Furthermore, the negative feedback switch 66 is opened. The switching process generates a slight disturbance (e.g., charge injection). The column amplifier 65 adjusts according to the voltage difference present at the two inputs 67 and 68. At this point, a voltage of 3.3 V is applied to the control line SHR to close the reference switch 73 and thereby charge the reference capacitor 74 according to the amplifier output signal. After the reference switch 73 is opened again, a reference value can be read from the reference capacitor 74.

[0075] To read a signal value, a voltage of 3.3 V or less is briefly applied to the control line TG1 to partially or fully open the transfer gate 21 of the respective pixel 10, allowing the exposure-dependent electrons (or a portion thereof) to be transferred from the photosensitive element 20 to the readout node 22. During this period, the selection switch 25 for the connection to the column line 41 can be briefly opened, or it can remain closed. A changed voltage signal from the converter transistor 24, corresponding to the changed charge in the readout node 22, is transmitted via the selection switch 25 to the column line 41 and thus to the input capacitor 61. Due to the coupling of the input capacitor 61 with the negative input 67 of the column amplifier 65, a potential change occurs at the negative input 67.The column amplifier 65 generates a modified amplifier output signal at amplifier output 69, corresponding to the potential difference between the two inputs 67, 68, i.e., the further potential change relative to VREF. The amplifier output signal thus represents the electrical charge that, starting from the initial state of the readout node 22 (offset value), was transferred from the photosensitive element 20 to the readout node 22 by opening the transfer gate 21. The column amplifier 65 compensates for the effect of the charge in the readout node 22 of the respective pixel 10 by increasing the voltage on the compensating line 42 according to the amplifier output signal until (due to the capacitive coupling with the readout node 22) the voltage in the readout node 22 again corresponds to the original value.

[0076] A voltage of 3.3 V is applied to the control line SHS to briefly close the signal value switch 71 and thereby charge the signal value capacitor 72 according to the amplifier output signal. After the signal value switch 71 is opened again, a signal value (video signal value) can be read from the signal value capacitor 72. Furthermore, the difference between the read reference value and the read signal value can be calculated.

[0077] In addition to generating the signal value, the amplifier output signal is also used for the negative feedback described above. For this purpose, the amplifier output signal is also fed, as explained, via the compensating line 42 to the feedback capacitor 28 of the respective pixel 10 in order to keep the voltage at the readout node 22 essentially constant.

[0078] This readout process can be performed at least for small amounts of charge or under low light conditions. The readout process can also be repeated several times to transfer and read out partial amounts of charge to the readout node 22 by repeatedly and progressively opening the transfer gate 21.

[0079] To achieve high dynamic range, the readout method can be combined with other readout methods that allow a higher number of electrons to be read out simultaneously. For example, a readout process can be performed before or after the readout process described above, in which the negative feedback switch 66 remains closed. The voltage VREF is then permanently applied to the compensating line 42, and pixel 10 behaves like an ordinary four-transistor pixel. For example, an alternative amplifier circuit 80 can also be used for large amounts of charge, as described below in connection with Fig. 3 will be explained.

[0080] Fig. 3 This illustrates, firstly, that in parallel to the amplifier circuit described above with feedback via a compensating line 42 (in Fig. 3 (designated with reference numeral 60) a further amplifier circuit 80 for large charge quantities may also be provided (similar elements to those in amplifier circuit 60 are designated with reference numerals increased by 20 in amplifier circuit 80). This allows different amplification factors (so-called "gain") to be provided for different charge quantities in the photosensitive element 20, for example, a lower amplification factor in amplifier circuit 80 than in amplifier circuit 60. Such a selectable dual gain factor (so-called "dual gain") can also be provided in a four-transistor pixel 10 according to Fig. 2 be planned.

[0081] In other embodiments (not shown), in addition to the amplifier circuits 60 and 80, a further amplifier circuit 80 with a different gain factor can be provided in parallel (so-called "triple gain").

[0082] Fig. 3 On the other hand, it illustrates that the feedback capacitor 28 according to Fig. 2 for example, it can also be provided for in a five-transistor image sensor. The respective pixel 10 according to Fig. 3 The circuit also includes an overflow capacitor 30 and an additional transfer gate 31. The control circuit 40 can selectively activate the additional transfer gate 31 via a control line TG2 to couple the readout node 22 with the overflow capacitor 30. This allows the capacitance of the readout node 22 to be temporarily increased to accommodate large amounts of charge generated in the photosensitive element 20 when pixel 10 is exposed to high light levels. The associated (temporary) increase in the capacitance of the readout node 22 does not adversely affect the light sensitivity, as a high signal-to-noise ratio is achieved anyway under high light exposure.

[0083] For high exposures, and especially for reading an overflow capacitor 30 according to Fig. 3 , amplifier circuit 80 can be used, which is related to Fig. 1 The amplifier circuit described above corresponds to this. For high exposures, several identical amplifier circuits 80 can also be provided in parallel, which, however, have different gain factors (e.g. with amplifier capacitors 84 of different sizes), as explained above.

[0084] Fig. 4 illustrates a circuit diagram for a control circuit 40 of an image sensor according to Fig. 2 The diagram shows the switching sequence for a reset switch 26 (RES), a transfer gate 21 (TG), a selection switch 25 (SEL), a feedback switch 66 (FB), a signal value switch 71 (SHS) and a reference value switch 73 (SHR).

[0085] Before the exposure of each pixel 10 (time interval I to the left of the two vertical bars), the reset switch 26 (RES) is briefly closed and the transfer gate 21 (TG) is briefly opened to discharge the photosensitive element 20, i.e., to remove the charge carriers present there. The negative feedback switch 66 (FB) of the column amplifier 65 is closed. Now the exposure of pixel 10 can take place (time interval II).

[0086] At the end of the exposure (time period III to the right of the two vertical bars) the readout process of pixel 10 is initiated by briefly closing the reset switch 26 (RES) to remove charge formed by leakage currents and / or stray light from the readout node 22.

[0087] The selector switch 25 (SEL) and the reference switch 73 (SHR) are then closed, so that a voltage signal corresponding to the (residual) charge at the readout node 22 is sent from the converter transistor 24 via the column line 41 to the input capacitor 61. Simultaneously, the negative feedback switch 66 (FB) on the column amplifier 65, which is closed, initially ensures that the column amplifier 65 operates in negative feedback mode and that the reference voltage VREF is present at the negative voltage input 67 of the column amplifier 65. The potential difference between the column line 41 and the negative input of the column amplifier 65 causes the input capacitor 61 to charge accordingly. The negative feedback switch 66 (FB) is now opened, so that the column amplifier 65 switches to amplification mode. The resulting amplifier output signal is present at the compensating line 42.The reference capacitor 74 can be charged via the closed reference switch 73 (SHR) according to the amplifier output signal or the voltage at the amplifier output 69. Afterwards, the reference switch 73 (SHR) and the selection switch 25 (SEL) are opened. The reference capacitor 74 can then be read out, either now or later.

[0088] The signal voltage value is then read. For this purpose, the transfer gate 21 (TG) is briefly closed, allowing charge to pass from the photosensitive element 20 to the readout node 22. The selection switch 25 (SEL) and the signal value switch 71 (SHS) are then closed. This changes the voltage across the input capacitor 61 and thus the amplifier output signal, which charges the signal value capacitor 72. Simultaneously, negative feedback is applied to the readout node 22. For this, the amplifier output 69 of the column amplifier 65, whose output signal depends on the charge in the readout node 22 via the converter transistor 24, the column line 41, and the input capacitor 61, is fed back to the readout node 22 with a negative signal via the compensating line 42 and the feedback capacitor 28.In this feedback operation, the column amplifier 65 compensates for a voltage drop caused by the charge transfer at the readout node 22 by increasing the voltage at the amplifier output 69 and thus at the compensating line 42. The signal value switch 71 (SHS) and the selection switch 25 (SEL) are then opened. The signal value capacitor 72 can be read now or later. Based on the difference between the readout signal and reference values, an offset-corrected value can then be determined, which corresponds to an exposure value of pixel 10. Bezugszeichenliste

[0089] 10 Pixel 20 Photosensitive element 21 Transfer gate 22 Readout node 23 Parasitic capacitance 24 Converter transistor 25 Selector switch 26 Reset switch 27 Power supply connection 28 Feedback capacitor 29 Converter transistor signal output 30 Overflow capacitor 31 Another transfer gate 40 Control circuit 41 Column line 42 Compensation line 60 Low charge amplifier circuit 61, 81 Input capacitor 62 Current source 63, 83 Voltage node 64, 84 Amplifier capacitor 65, 85 Column amplifier 66, 86 Negative feedback switch 67 Negative column amplifier input 68 Positive column amplifier input 69 Amplifier output 70 Column readout circuit 71, 91 Signal value switch 72, 92 Signal value capacitor 73, 93 Reference value switch 74, 94 Reference value capacitor 80 Amplifier circuit for large charge quantities

Claims

1. An image sensor, in particular a CMOS image sensor, for electronic cameras, said image sensor comprising a plurality of pixels (10) for generating exposure-dependent signals, wherein a respective one of the plurality of pixels (10) at least comprises: - a light-sensitive element (20) to generate electric charge from incident light; - a readout node (22); - a transfer gate (21) to selectively couple the light-sensitive element to the readout node (22); - a converter transistor (24) to convert the charge present at the readout node (22) into a voltage signal at a signal output (29); and - a selection switch (25) which is connected to the signal output (29) of the converter transistor (24) to selectively couple the signal output (29) of the converter transistor (24) to a column line (17) of the image sensor which is associated with a plurality of pixels (10) of the image sensor; wherein a column amplifier (65) is associated with the column line (41), wherein the column line (41) is coupled or can be coupled to a negative input (67) of the column amplifier (65) via an input capacitor (61), wherein the column amplifier (65) has an amplifier output (69) for outputting an amplifier output signal, wherein the amplifier output (69) is connected to a column readout circuit (70) and to a compensation line (42), wherein the compensation line (42) is coupled via a respective feedback capacitor (28) to the respective readout node (22) of the pixels (10) associated with the column line (41), characterized in that the compensation line (42) is directly connected to the feedback capacitor (28).

2. An image sensor according to claim 1, wherein the column amplifier (65) is configured to generate the amplifier output signal in dependence on the voltage signal of the converter transistor (24) of the respective pixel (10) received via the column line (41) at the input capacitor (61) and to output the amplifier output signal to the column readout circuit (70) and, via the compensation line (42), to the feedback capacitor (28).

3. An image sensor according to claim 2, wherein the column readout circuit (70) is configured to read out the amplifier output signal.

4. An image sensor according to any one of the preceding claims, wherein the converter transistor (24) of the respective pixel (10), the column line (41), the input capacitor (61), the column amplifier (65), the compensation line (42) and the feedback capacitor (28) of the respective pixel (10) form a counter-feedback loop for the readout node (22) of the respective pixel (10).

5. An image sensor according to claim 4, wherein the input capacitor (61), the column amplifier (65) and the feedback capacitor (28) of the respective pixel (10) are configured to keep a voltage at the readout node (22) of the respective pixel (10) substantially constant.

6. An image sensor according to claim 4 or claim 5, wherein the input capacitor (61), the column amplifier (65) and the feedback capacitor (28) of the respective pixel (10) are configured, in the event of a charge increase at the readout node (22) of the respective pixel (10), to increase a voltage at the compensation line (42) and hereby to substantially compensate a voltage change at the readout node (22).

7. An image sensor according to any one of the preceding claims, wherein the column amplifier (65) comprises a positive amplifier input (68) to which a reference voltage (VREF) is applied.

8. An image sensor according to claim 7, wherein the negative amplifier input (67) can be connected to the amplifier output via a negative feedback switch (66), wherein, by closing the negative feedback switch (66), the column amplifier (65) can be brought into a negative feedback mode in which a potential difference between the voltage at the column line (41) and the reference voltage (VREF) is set at the input capacitor (61), and wherein, by opening the negative feedback switch (66), the column amplifier (65) can be brought into an amplification mode in which the amplifier output signal represents a potential difference at the input capacitor (61) that is changed with respect to the negative feedback mode.

9. An image sensor according to claim 8, wherein the image sensor has a control circuit (40) which is configured to first bring the column amplifier (65) into the negative feedback mode for a readout of the respective pixel (10); subsequently to bring the column amplifier (65) into the amplification mode; thereafter to at least partly open the transfer gate (21) of the respective pixel (10) for a short time in order to transmit charge into the readout node (22) of the respective pixel (10); and then to control the column readout circuit (70) to read out a signal value.

10. An image sensor according to claim 9, wherein the respective pixel (10) further has a reset switch (26) to selectively couple the readout node (22) to a reset potential (VDD), wherein the control circuit (40) is configured to briefly close the reset switch (26) of the respective pixel (10) to remove charge present in the readout node (22) of the respective pixel (10); and thereafter, in the amplification mode of the column amplifier (65) and before opening the transfer gate (21), to control the column readout circuit (70) to read out a reference value.

11. An image sensor according to any one of the preceding claims, wherein the respective pixel (10) further comprises: - an overflow capacitor (30); and - a further transfer gate (31) to selectively couple the readout node (22) to the overflow capacitor (30).