Computational optimization mechanism
DE602018080896T2Active Publication Date: 2025-04-09INTEL CORP
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Patent Information
- Application Number
- DE602018080896
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2017-04-24
- Filing Date
- 2018-03-02
- Publication Date
- 2025-04-09
- Estimated Expiration
- 2038-03-02
AI Technical Summary
Technical Problem
Current graphics processing units (GPUs) face challenges in optimizing computing efficiency due to the need for sorting and processing threads with varying bit depths and precision requirements within the graphics pipeline.
Method used
The proposed solution involves a compute mechanism that includes sorting logic to group threads based on the bit depth of floating-point operations, floating-point logic to process threads with higher bit depths, and variable precision support in math instructions, enabling efficient handling of mixed precision computations.
Benefits of technology
This approach enhances computing efficiency by optimizing thread grouping and precision handling, leading to improved performance in graphics processing and other compute-intensive tasks.
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