REMOVAL OF HIGH-VOLTAGE ZONES IN ELECTRONIC ASSEMBLIES

DE602018088989T2Active Publication Date: 2026-02-04SAFRAN ELECTRONICS & DEFENSE (FR)
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Patent Information

Application Number
DE602018088989
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2017-12-19
Filing Date
2018-12-03
Publication Date
2026-02-04
Estimated Expiration
2038-12-03

AI Technical Summary

Technical Problem

Existing surface-mount component (SMD) solder joints on electronic boards are prone to cracking due to high shear stresses and relative displacements caused by differential thermal expansion, leading to reduced lifespan and reliability, especially in harsh environments.

Method used

Adjust the positioning of solder pads on the printed circuit board to ensure they are located on either side of the SMD terminations, with a distance calculated to compensate for the difference in thermal expansion coefficients, and optionally use sacrificial pads or glue to stabilize the SMD during soldering.

Benefits of technology

This approach enhances the lifespan and robustness of SMD solder joints by minimizing stress and preventing cracking, while maintaining assembly efficiency and cost-effectiveness.

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