PACKAGING GLASS SUBSTRATE FOR SEMICONDUCTORS, PACKAGING SUBSTRATE FOR SEMICONDUCTORS AND SEMICONDUCTOR COMPONENTS
Patent Information
- Application Number
- DE602020056555
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2020-03-27
- Publication Date
- 2025-08-13
- Estimated Expiration
- 2040-03-27
AI Technical Summary
Existing semiconductor packaging technologies do not adequately support high-performance and high-frequency semiconductor elements due to material limitations in ceramic and resin substrates, and there is a need for improved stress management in glass substrates to facilitate more integrated and thinner semiconductor apparatuses.
A packaging glass substrate with controlled stress is developed, featuring a grid-patterned core via structure and a conductive layer, which reduces stress differences and enhances electrical connectivity, using a glass substrate with specific stress difference values and ratios, allowing for efficient signal transmission and mechanical stability.
The solution improves electrical properties by shortening signal paths, reduces parasitic elements, and enables mass production with improved mechanical stability, facilitating high-speed circuits and miniaturization of semiconductor devices.