STRUCTURES FOR CONTROLLING SINGLE-EVENT DistortionS FOR PARALLEL ENGINE CONTROL ARCHITECTS

DE602021050962T2Active Publication Date: 2026-04-01COLLINS AEROSPACE IRELAND LTD +2
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-02-12
Publication Date
2026-04-01

AI Technical Summary

Technical Problem

Existing parallel motor drive systems face instability due to single event upsets, which can cause sudden integrator saturation and destabilize the system, particularly when multiple drives are connected in parallel.

Method used

A proportional integrator is incorporated into the current and speed control loops, using a global voltage reference based on local references from all connected motor drives to initialize and balance the integrators, mitigating the effects of single event upsets.

Benefits of technology

The solution ensures seamless operation and current balance across parallel motor drives by initializing integrators, preventing destabilization and maintaining system stability even in the presence of single event upsets.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL FIELD

[0001] The present disclosure is concerned with power drive systems for controlling one or more loads, and in particular with parallel motor drive systems and how to control such systems to handle single event upset.BACKGROUND

[0002] Many applications require electronic control architectures to control several loads. Typically such architectures include motor drives comprising power converters to convert an input from a power supply (AC or DC) to an output of a different voltage appropriate to the load to be driven. Traditionally, each load would have its own dedicated power supply and its own dedicated motor drive, since the different loads may have different power and control requirements. In other systems, the motor loads may be supplied from a common power supply, but each still has its own dedicated motor drive. The development of power converters for respective loads is a significant part of the non-recurring cost incurred in developing new systems.

[0003] In some fields, there is a desire or a trend to reduce the number of system components in order to e.g. reduce weight or size, complexity and / or cost.

[0004] In aircraft, there is currently a trend towards so-called More Electric Aircraft (MEA) whereby loads such as flight control surfaces, landing gear, actuators, fans, pumps etc. which have traditionally be controlled by hydraulic and mechanical systems are now being designed to be controlled electrically by means of an electric motor. Steps are also being made towards All Electric Aircraft, where all loads, including the propulsion systems, will be controlled by electric motors. Whilst there are clear and significant advantages to electrical control of aircraft systems, and electrical control of systems in other fields, in terms of weight, size, reliability, environmental factors, cost and maintenance, further improvements can be made.

[0005] Recently, it has been considered whether control architectures might be designed that allow multiple potential loads to be driven using standard motor drives. Multiplexed motor drive systems have been designed for use in e.g. MEA. In such systems, multiple motor drives are interfaced to electrical loads via a switching matrix that reconfigures the connections between motor drives and loads / motors. Such systems are useful in applications where the loads are not all used simultaneously and so the motors can be allocated amongst the loads as they need to be powered. In an aircraft, for example, an electrical thrust reverser actuator and a landing gear electrical retraction actuator are not required to operate at the same time and so can be powered by the same motor drive at different times. Such a design has a greatly reduced size and weight and associated cost and complexity.

[0006] Along similar lines, switching matrices can be used to parallel-connect multiple drives to power large loads. This avoids the need to have large drives always available for such large loads. Ideally, the weight of the inductive components used in interfacing the parallel drives should be minimised; the drives should be scalable and modular so that they can easily be switched between parallel operation and stand-alone operation; the designs should enable fast current control loop dynamics and the need for high bandwidth communications should be minimised.

[0007] Chunwei Song et al., entitled "Using fuzzy control for parallel-inverter system with nonlinear-load" (XP031832289, ISBN: 978-1-4244-7720-3), discloses features of the preamble of claim 1.

[0008] An example of an architecture that enables switching between parallel and stand-alone operation is shown in Fig. 1 described further below.

[0009] In motor drive systems, 'Single Event Upset' can be considered as a random event whereby a single bit in the system controller (CPU, FPGA, DSP, etc.) can be flipped, or 'upset', as a consequence of cosmic radiation. In the case of this occurring within the motor drive controller structure, it is possible that a Single Event Upset could result in the sudden saturation of a controller integrator. For parallel motor drive systems, such an occurrence would be problematic since the sudden saturation within one controller of one drive in a parallel configuration may result in a current transient which could de-stabilise the system behaviour. To achieve seamless response and ensure current balance across the motor drives, the integrators in the drives should also be reset or initialised after every computational step to ensure that all motor drives are working from the same initial conditions.

[0010] There is, therefore, a need to provide a simple, effective and reliable single event ride through capability for a motor drive control system having parallel-connected motor drives.SUMMARY

[0011] According to one aspect, there is provided a proportional integrator for control of a motor drive as claimed in claim 1.

[0012] The PI may be incorporated into a current control loop or a speed control loop, whereby the input command signal is a current / speed reference signal and the local measured signal is a local current / speed signal, and wherein the global input signal is a global voltage reference based on a local voltage reference from the motor drive and all motor drives connected in parallel with the motor drive, in use. The global reference may be based on e.g. a sum or average of local reference signals.BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Some examples of implanting the ideas of this disclosure will now be described, by way of example only, with reference to the drawings. Fig. 1 shows an example of a parallel motor drive architecture into which the PI according to the disclosure could be incorporated. Figure 2 is a schematic view of a conventional motor control scheme. Figure 3 shows a conventional PI control. Figure 4 shows an example of a current control proportional integrator adapted for integrator initialisation according to the disclosure. Figure 5 shows an example of a current control proportional integrator in more detail adapted for integrator initialisation in a two-drive system according to the disclosure. Figure 6 shows an alternative proportional integrator modification for a speed control loop. DETAILED DESCRIPTION

[0014] The present disclosure is concerned with control of motor drives to address issues that can arise particularly when operating in parallel to drive a common load.

[0015] Figure 1 shows an example of such a parallel drive architecture.

[0016] In the example shown, the system 100 includes a central controller 1 that interfaces two motor drives, or power blades 2,3, in parallel, to drive a single motor 4.

[0017] Each motor drive 2, 3 may include an inverter 122 and output inductors 124. The motor drives 2, 3 may each receive DC power via input terminals 50 (e.g., from a common power supply). This may then be converted by the inverter 122 into an output voltage (e.g., a three-phase AC voltage) for actuating a load via inductors 124. Two motor drives 2, 3 are shown in Fig. 1, but more could be provided as required, and as discussed herein.

[0018] It will be appreciated that references to motor drives in accordance with various embodiments could refer to any type of power converter, and the broadest aspects of the present disclosure are not intended to be limited to using motor drives, or providing a load in the form of a motor.

[0019] The plurality of motor drives 2, 3, whilst each having their own local controller, typically need some sort of common or centralised operation (e.g., control system) for example to synchronise their operation. Accordingly, the motor drives 2, 3 may be controlled centrally using a central controller 1 (e.g., processor or circuitry) or global communication module. The central controller 1 may be configured to control, for example, which motor drive(s) 2, 3 are to be used (e.g., selected as discussed above) at a particular time. The central controller 1 may achieve this by switching between the motor drives (e.g., the power inverters thereof) using, e.g., a modulation scheme or technique.

[0020] Generally, this technology combines the use of local current controllers (e.g., current control loops) of each motor drive, and a central or global controller (e.g., the central controller 1 in Fig. 1). The local current controllers are configured to receive current values associated with each output voltage phase of the inverter 122 (e.g., measured at an output of each inverter 122 and optionally presented in a synchronous reference frame or "d-q system"), which correspond to a local current measurement i local for each of the motor drives 2, 3 to be transmitted to the central controller 1.

[0021] Each motor drive 2, 3 may include components or circuitry that form a speed loop 160 having as an input a reference speed ω ref and also a motor speed ω m (which may be measured or calculated). The reference speed ω ref would typically be given to all power converters operating in parallel, and could be set by the central controller 1 or elsewhere (e.g., a flight control computer, or other component or module, e.g., having another control loop). For example, a flight controller may be commanding that a component moves by actuating to a certain position at a given speed. The speed loop 160 is configured to generate a suitable reference (e.g., current reference), which is then input into a current loop 170 (described below) to regulate the output current of the motor drive, in effect regulating the speed of rotation of the motor.

[0022] Although speed loops such as this are known in the art, the technology disclosed herein means this control can be retained while integrating a parallel system. A speed loop 160 is not essential, however, for example in cases where the load is not a motor, or the rotational speed of the motor does not otherwise require regulation.

[0023] Each motor drive 2, 3 comprises a local current control loop 170 that is configured to regulate the output current of the respective motor drive 2, 3, so as to ensure the motor drives 2, 3 operating in parallel work together adequately and effectively.

[0024] The central controller 1 is configured to determine or calculate a global voltage reference V global based on the local voltage reference Vl localN generated via the current controllers for each of the parallel motor drives 2, 3. The global voltage reference V global may be an average or sum of the local voltage references V localN . The global voltage reference V global is then transmitted back to each local motor drive 2, 3.

[0025] As shown in Fig. 1, there may be a conventional speed controller (speed loop 160) implemented on each local motor drive 2, 3, where the speed controller is configured to generate a current reference, which the current loop 170 acts upon to regulate the output current of the motor drive 2, 3, in effect regulating the speed of rotation of the motor. The speed reference ω ref is specified from the central controller 1 or central communication element, and is the same for all motor drives 2, 3 operating in parallel.

[0026] An optional balancing network 180 may be used within each motor drive 2, 3 that can form a supplementary element of the local control scheme. The balancing network 180 may be configured to adjust the voltage reference further, based on the local output currents of the respective inverter 122. This can help to alleviate differences in output currents between the motor drives 2, 3.

[0027] Any suitable method or type of modulation may be employed in the present disclosure. In particular, the modulation may comprise pulse width modulation ("PWM") such as space vector modulation ("SVM"). Each motor drive 2, 3 may include a modulation module 126 configured to control the synchronisation of the motor drive 120, for example the synchronisation of a switching frequency of the modulation, e.g., using PWM or SVM.

[0028] The modulation (e.g., PWM or SVM) module 126 is configured to generate the appropriate signals (e.g., logic and / or switching signals) for the inverter 122 of the motor drive 2, 3 (e.g., gate drivers thereof) to provide a controlled commutation of the output voltages thereof, whilst regulating the output voltages / currents of each inverter 122 to maintain consistency between the motor drives 2, 3. Thus, the modulation module 126 may be configured to send suitable such signals to the inverter 122 that control the timings associated with the respective motor drive 2, 3 (e.g., the output voltages thereof) in use. Generation of the switching signals for the inverters 122 by each respective modulation (e.g., SVM) module 126 is facilitated by the use of the global voltage measurement V global and current reference.

[0029] Each motor drive 2, 3 may be a single power converter and the circuitry / components thereof may be located on a single circuit board (e.g., a single printed circuit board or "PCB"). The circuit boards (or "blades") holding the motor drives 2, 3 could be similar (or substantially identical), such that they comprise the same interface for communicating with the central controller 1. In this manner, the motor drives 2, 3 could be easily scaled (e.g., from using two motor drives 2, 3 to using three or more) without any modification of the motor drives 2, 3 or central controller 1.

[0030] The current values of the three phases (i.e., the instantaneous inverter 122 output currents) may be measured and / or determined for use in the circuitry of the motor drive 2, 3 and (optionally) as part of the balancing network 180. Suitable components or circuitry may be configured to determine the output currents. The output currents (e.g., phase currents) could be measured and / or determined using a current sensor, although any suitable technique could be used, with optionally a current sensor provided for each of the three phases.

[0031] The distributed system 100 may use synchronous reference frame control, which is known in the art (also called "d-q control"). Using such a control mechanism, the voltage and current can be converted into a reference frame that rotates synchronously with a voltage vector (e.g., by Park Transformation) so that three-phase time-varying signals are transformed into DC signals. Using "d-q currents" provides a convenient way of representing the output current of the motor drive, and analysing the system.

[0032] As mentioned above, a problem with such parallel drive systems is that a single event upset can result in the sudden saturation of the integrators of one of the controllers, can propagate through all of the parallel drives leading to an overall lack of control by the system.

[0033] Fig. 2 shows a simplified motor drive control scheme to explain the problems with having parallel motor drives controlled by a single central controller 1. The motor control unit 200 receives a motor speed input ω 1 and outputs a motor control voltage V 1 * to the power converter and motor drive. The motor control unit 200 has an inner current feedback control loop containing a current control circuit and an outer speed control loop containing a speed control circuit. Figure 3 shows a conventional proportional integral controller for the current control loop for regulating motor current as is known.

[0034] Referring back to Fig. 1, in a parallel architecture, each motor drive will have a structure such as shown in Fig. 2, with the current loop 170 designed as a proportional integrator as shown in Fig. 3. The input to the speed loop ω 1 * in Fig. 2, will be ω ref from the central controller. The speed loop will provide a reference current i ref to the current loop 170 (Fig. 1) which will be compared and integrated using the local measured current i meas1 , to output a local control voltage V local . This is provided to the central controller 1. The central controller combines V local from each of the parallel drives to provide the global voltage V global .

[0035] Such structures will not be described in further detail. Each motor drive will have different local component and sensor tolerances, and so each motor drive will supply a different output. Neither local controller will be able to regulate their output current to the correct value, as there will be circulating current flowing between the parallel motor drives due to these component and sensor tolerance issues. Without compensation, this will result in integrator wind up and saturation.

[0036] For a parallel drive system to function correctly, therefore, it has been found necessary to integrate local controls which can handle single event upset and can ensure global functionality to prevent issues due to a single event upset under normal, parallel, operating conditions.

[0037] The present disclosure provides a control scheme whereby a 'global integrator signal' can be derived, based on local signals and on the global voltage command, for initialisation of the integrators.

[0038] The integrator of the current loop is therefore modified based on the global voltage. Referring to Figure 4, an example of the control scheme according to this disclosure will now be described.

[0039] The example shown in fig. 4 is for two motor drives (inverters) operating in parallel. The system can, however, be adapted for more than two parallel drives, as will be further described below. In the example shown, and as will be described further, the scheme generates an integer global average term along with an error term associated with the local control error.

[0040] The control scheme is arranged to cause initialisation of the current control proportional integrator based on a combination of the local controller output and the feedback from the global reference.

[0041] The principle of the modification provided according to this disclosure will now be described in more detail, first with reference to Fig. 4. The portion of Fig. 4 in dotted lines is essentially the same as the conventional proportional integrator shown in Fig. 3. As is conventional for current control, the PI scheme compares the current demand, i.e. the reference current for the first drive 2 (derived, in this example, from the reference speed ω ref input from the central controller) with the local current measured in the first drive 2 and performs a proportional integral function to provide a local control voltage V ctrl1 for the first drive. In addition, however, the local voltage demand of the first motor drive 2 is summed with a modified signal S which takes into account the local voltage demand of the second motor drive 3 (and other motor drives if more than two are connected).

[0042] In more detail, for each drive, the global voltage V global from the central controller 1, is provided as an input to the local current loop proportional integrator. As mentioned above, the global voltage V global is a sum or an average of all of the local current controller reference voltages in the system e.g. V global = V local 1 + V local2 .....+ V localN where N is the number of parallel drives in the system. Thus, the global reference V global contains information about the behaviour of each drive in the system. By appropriate scaling of the signals using appropriate gains K, V global can be used to compare against the behaviour of the local drive, from V ctrl , to inject a modification signal S into the local proportional integrator, which contains some information as to the behaviour of the other drives in the system.

[0043] If, for example, the system includes two parallel drives, then V global = V ctrl1 + V ctrl2 . The gain K GInt2 will be selected, in this case, as 2, and K Int1 will be selected as ½. The modification signal S, injected into the local proportional integrator, will, in that case, be equal to (V global - (2*V ctrl1 ))*1 / 2. As V global , for two drives, = V ctrl1 + V ctrl2 , then the injected signal S is 1 / 2V ctrl2 , i.e. is based on the output of the other drive.

[0044] This can be seen in more detail, for the two drive system, in Fig. 5. Here, it can be seen that since V q2-local contains information from the second drive, and as this is provided as an input to the local integrator for the first drive, the local integrator becomes, essentially, an average of the two local drives (including a small error term), so including some of the behaviour of the second drive into the first drive. This allows the system to balance itself.

[0045] The equation for the integrator is: y 1 n = x n . Ki . dT + y 1 ′ n − 1 and y 1 ′ n − 1 = y 1 n − 1 + v 2 n − 1 − v 1 n − 1 / 2 and y 1 ′ n − 1 = y 1 n − 1 + y 2 n − 1 / 2 + Kp . error 2 n − 1 − error 1 n − 1 / 2 where: y 1 (n-1) + y 2 (n-1)) / 2 is the actual integrator average which is to be estimated, and Kp.(error 2 (n-1) - error 1 (n-1)) / 2 is the error in the estimation due to the use of the local error which, in an ideal case, is zero.

[0046] Fig. 5 shows the integrator of fig 4 in the context of a parallel motor drive control architecture with two parallel motor drives, but more than two motor drives may also be connected in parallel, as required, with the gains tuned accordingly.

[0047] Test have confirmed that the modified integrator control structure of this disclosure allows the system to maintain operation in the event of sudden integrator saturation in one of the current controls.

[0048] The modification to the PI can easily be bypassed / deactivated if the motor drive is to be used as a standalone drive rather than in a parallel assembly.

[0049] Whilst the modification of the integrator has been described in relation to the current loop, the same principle can be applied to the proportional integrator of the speed loop, whereby local current setpoints of other drives are used to inject a modification signal to the integrator.

[0050] In another example, the speed loop may be modified in a simpler way, as shown in Fig. 6, to provide single event upset ride-through capabilities. Here a correction factor Corr is added to the proportional integrator of the speed loop that balances the integral term depending on the total current reference command. This is equivalent to limiting the steady-state gain of the proportional integral control of the speed loop. The correction factor Corr acts as a discharge term, slowly winding back each local integrator, allowing the system to maintain stability but performing more slowly. This simplified structure is possible because the speed loop does not need to react as quickly as the current loop to system transients caused by a single event upset and, therefore, it is not necessary to utilise a global feedback signal.

[0051] The present disclosure provides a simple modification to the conventional proportional integrator of the current and / or speed control loop which mitigates the impact of controller saturation resulting from parallel operation of motor drives. The approach can be easily switched in or out as required as motor drives transition from standalone operation to parallel operation.

Claims

1. A proportional integrator for control of a motor drive (2) arranged to be connected in parallel with one or more other motor drives (3) to drive a common load (4), the proportional integrator comprising means to receive an input command signal and to compare with a local measured signal from the motor drive (2) and to output a local control signal for that motor drive (2), further comprising a global input signal indicative of the behaviour of the one or more other motor drives (3), the global input signal being incorporated into the proportional integral function with the input command signal and the local measured signal to provide the local control signal, characterised in that the proportional integrator further comprises tunable gains applying a gain (KGInt2) factor to the global input signal depending on local signals from which the global input signal is derived.

2. The proportional integrator of claim 1, wherein the input command signal is a current reference signal and the local measured signal is a measured current signal, and wherein the global input signal is a global voltage reference based on a local voltage reference from the motor drive (2) and all motor drives (3) connected in parallel with the motor drive (2), in use.

3. The proportional integrator of claim 2, incorporated in a current control loop for the motor drive (2).

4. The proportional integrator of claim 1, wherein the input command signal is a speed reference signal and the local measured signal is a local speed signal, and wherein the global input signal is a global q-axis current reference based on a local current reference from the motor drive (2) and all motor drives (3) connected in parallel with the motor drive (2), in use.

5. The proportional integrator of claim 4, incorporated in a speed control loop for the motor drive (2).